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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
5 */
6
7/dts-v1/;
8
9#include "omap34xx.dtsi"
10#include <dt-bindings/input/input.h>
11
12/*
13 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
14 * for omap AES HW crypto support. When linux kernel try to access memory of AES
15 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
16 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
17 * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
18 * There is "unofficial" version of bootloader which enables AES in L3 firewall
19 * but it is not widely used and to prevent kernel crash rather AES is disabled.
20 * There is also no runtime detection code if AES is disabled in L3 firewall...
21 */
22&aes1_target {
23 status = "disabled";
24};
25
26&aes2_target {
27 status = "disabled";
28};
29
30/ {
31 model = "Nokia N900";
32 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
33
34 aliases {
35 i2c0;
36 i2c1 = &i2c1;
37 i2c2 = &i2c2;
38 i2c3 = &i2c3;
39 display0 = &lcd;
40 display1 = &tv;
41 };
42
43 cpus {
44 cpu@0 {
45 cpu0-supply = <&vcc>;
46 };
47 };
48
49 leds {
50 compatible = "gpio-leds";
51 heartbeat {
52 label = "debug::sleep";
53 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* 162 */
54 linux,default-trigger = "default-on";
55 pinctrl-names = "default";
56 pinctrl-0 = <&debug_leds>;
57 };
58 };
59
60 memory@80000000 {
61 device_type = "memory";
62 reg = <0x80000000 0x10000000>; /* 256 MB */
63 };
64
65 gpio_keys {
66 compatible = "gpio-keys";
67
68 camera_lens_cover {
69 label = "Camera Lens Cover";
70 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
71 linux,input-type = <EV_SW>;
72 linux,code = <SW_CAMERA_LENS_COVER>;
73 linux,can-disable;
74 };
75
76 camera_focus {
77 label = "Camera Focus";
78 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
79 linux,code = <KEY_CAMERA_FOCUS>;
80 linux,can-disable;
81 };
82
83 camera_capture {
84 label = "Camera Capture";
85 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
86 linux,code = <KEY_CAMERA>;
87 linux,can-disable;
88 };
89
90 lock_button {
91 label = "Lock Button";
92 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
93 linux,code = <KEY_SCREENLOCK>;
94 linux,can-disable;
95 };
96
97 keypad_slide {
98 label = "Keypad Slide";
99 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
100 linux,input-type = <EV_SW>;
101 linux,code = <SW_KEYPAD_SLIDE>;
102 linux,can-disable;
103 };
104
105 proximity_sensor {
106 label = "Proximity Sensor";
107 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
108 linux,input-type = <EV_SW>;
109 linux,code = <SW_FRONT_PROXIMITY>;
110 linux,can-disable;
111 };
112
113 machine_cover {
114 label = "Machine Cover";
115 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
116 linux,input-type = <EV_SW>;
117 linux,code = <SW_MACHINE_COVER>;
118 linux,can-disable;
119 };
120 };
121
122 isp1707: isp1707 {
123 compatible = "nxp,isp1707";
124 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
125 usb-phy = <&usb2_phy>;
126 };
127
128 tv: connector {
129 compatible = "composite-video-connector";
130 label = "tv";
131
132 port {
133 tv_connector_in: endpoint {
134 remote-endpoint = <&venc_out>;
135 };
136 };
137 };
138
139 sound: n900-audio {
140 compatible = "nokia,n900-audio";
141
142 nokia,cpu-dai = <&mcbsp2>;
143 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
144 nokia,headphone-amplifier = <&tpa6130a2>;
145
146 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
147 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
148 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
149 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
150 };
151
152 battery: n900-battery {
153 compatible = "nokia,n900-battery";
154 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
155 io-channel-names = "temp", "bsi", "vbat";
156 };
157
158 pwm9: dmtimer-pwm {
159 compatible = "ti,omap-dmtimer-pwm";
160 #pwm-cells = <3>;
161 ti,timers = <&timer9>;
162 ti,clock-source = <0x00>; /* timer_sys_ck */
163 };
164
165 ir: n900-ir {
166 compatible = "nokia,n900-ir";
167 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
168 };
169
170 rom_rng: rng {
171 compatible = "nokia,n900-rom-rng";
172 clocks = <&rng_ick>;
173 clock-names = "ick";
174 };
175
176 /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
177 vctcxo: vctcxo {
178 compatible = "fixed-clock";
179 #clock-cells = <0>;
180 clock-frequency = <38400000>;
181 };
182};
183
184&isp {
185 vdds_csib-supply = <&vaux2>;
186
187 pinctrl-names = "default";
188 pinctrl-0 = <&camera_pins>;
189
190 ports {
191 port@1 {
192 reg = <1>;
193
194 csi_isp: endpoint {
195 remote-endpoint = <&csi_cam1>;
196 bus-type = <3>; /* CCP2 */
197 clock-lanes = <1>;
198 data-lanes = <0>;
199 lane-polarity = <0 0>;
200 /* Select strobe = <1> for back camera, <0> for front camera */
201 strobe = <1>;
202 };
203 };
204 };
205};
206
207&omap3_pmx_core {
208 pinctrl-names = "default";
209
210 uart2_pins: pinmux_uart2_pins {
211 pinctrl-single,pins = <
212 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
213 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
214 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
215 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
216 >;
217 };
218
219 uart3_pins: pinmux_uart3_pins {
220 pinctrl-single,pins = <
221 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx */
222 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
223 >;
224 };
225
226 ethernet_pins: pinmux_ethernet_pins {
227 pinctrl-single,pins = <
228 OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
229 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */
230 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
231 >;
232 };
233
234 gpmc_pins: pinmux_gpmc_pins {
235 pinctrl-single,pins = <
236
237 /* address lines */
238 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
239 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
240 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
241
242 /* data lines, gpmc_d0..d7 not muxable according to TRM */
243 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
244 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
245 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
246 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
247 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
248 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
249 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
250 OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
251
252 /*
253 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
254 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
255 */
256 OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
257 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
258 >;
259 };
260
261 i2c1_pins: pinmux_i2c1_pins {
262 pinctrl-single,pins = <
263 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
264 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
265 >;
266 };
267
268 i2c2_pins: pinmux_i2c2_pins {
269 pinctrl-single,pins = <
270 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
271 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
272 >;
273 };
274
275 i2c3_pins: pinmux_i2c3_pins {
276 pinctrl-single,pins = <
277 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
278 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
279 >;
280 };
281
282 debug_leds: pinmux_debug_led_pins {
283 pinctrl-single,pins = <
284 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 */
285 >;
286 };
287
288 mcspi4_pins: pinmux_mcspi4_pins {
289 pinctrl-single,pins = <
290 OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
291 OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
292 OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
293 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
294 >;
295 };
296
297 mmc1_pins: pinmux_mmc1_pins {
298 pinctrl-single,pins = <
299 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
300 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
301 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
302 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
303 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
304 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
305 >;
306 };
307
308 mmc2_pins: pinmux_mmc2_pins {
309 pinctrl-single,pins = <
310 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
311 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
312 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
313 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
314 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
315 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
316 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
317 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
318 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
319 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
320 >;
321 };
322
323 acx565akm_pins: pinmux_acx565akm_pins {
324 pinctrl-single,pins = <
325 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
326 >;
327 };
328
329 dss_sdi_pins: pinmux_dss_sdi_pins {
330 pinctrl-single,pins = <
331 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
332 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
333 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
334 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
335
336 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
337 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
338 >;
339 };
340
341 wl1251_pins: pinmux_wl1251 {
342 pinctrl-single,pins = <
343 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
344 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
345 >;
346 };
347
348 ssi_pins: pinmux_ssi {
349 pinctrl-single,pins = <
350 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
351 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
352 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
353 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
354 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
355 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
356 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
357 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
358 >;
359 };
360
361 modem_pins: pinmux_modem {
362 pinctrl-single,pins = <
363 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
364 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* gpio 72 => ape_rst_rq */
365 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
366 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
367 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
368 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
369 >;
370 };
371
372 camera_pins: pinmux_camera {
373 pinctrl-single,pins = <
374 OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7) /* cam_hs */
375 OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7) /* cam_vs */
376 OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
377 OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7) /* cam_d4 */
378 OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6 */
379 OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7 */
380 OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0) /* cam_d8 */
381 OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0) /* cam_d9 */
382 OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7) /* cam_d10 */
383 OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7) /* cam_xclkb */
384 OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0) /* cam_strobe */
385 >;
386 };
387};
388
389&i2c1 {
390 pinctrl-names = "default";
391 pinctrl-0 = <&i2c1_pins>;
392
393 clock-frequency = <2200000>;
394
395 twl: twl@48 {
396 reg = <0x48>;
397 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
398 interrupt-parent = <&intc>;
399 };
400};
401
402#include "twl4030.dtsi"
403#include "twl4030_omap3.dtsi"
404
405&vaux1 {
406 regulator-name = "V28";
407 regulator-min-microvolt = <2800000>;
408 regulator-max-microvolt = <2800000>;
409 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
410 regulator-always-on; /* due to battery cover sensor */
411};
412
413&vaux2 {
414 regulator-name = "VCSI";
415 regulator-min-microvolt = <1800000>;
416 regulator-max-microvolt = <1800000>;
417 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
418};
419
420&vaux3 {
421 regulator-name = "VMMC2_30";
422 regulator-min-microvolt = <2800000>;
423 regulator-max-microvolt = <3000000>;
424 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
425};
426
427&vaux4 {
428 regulator-name = "VCAM_ANA_28";
429 regulator-min-microvolt = <2800000>;
430 regulator-max-microvolt = <2800000>;
431 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
432};
433
434&vmmc1 {
435 regulator-name = "VMMC1";
436 regulator-min-microvolt = <1850000>;
437 regulator-max-microvolt = <3150000>;
438 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
439};
440
441&vmmc2 {
442 regulator-name = "V28_A";
443 regulator-min-microvolt = <2800000>;
444 regulator-max-microvolt = <3000000>;
445 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
446 regulator-always-on; /* due VIO leak to AIC34 VDDs */
447};
448
449&vpll1 {
450 regulator-name = "VPLL";
451 regulator-min-microvolt = <1800000>;
452 regulator-max-microvolt = <1800000>;
453 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
454 regulator-always-on;
455};
456
457&vpll2 {
458 regulator-name = "VSDI_CSI";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <1800000>;
461 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
462 regulator-always-on;
463};
464
465&vsim {
466 regulator-name = "VMMC2_IO_18";
467 regulator-min-microvolt = <1800000>;
468 regulator-max-microvolt = <1800000>;
469 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
470};
471
472&vio {
473 regulator-name = "VIO";
474 regulator-min-microvolt = <1800000>;
475 regulator-max-microvolt = <1800000>;
476};
477
478&vintana1 {
479 regulator-name = "VINTANA1";
480 /* fixed to 1500000 */
481 regulator-always-on;
482};
483
484&vintana2 {
485 regulator-name = "VINTANA2";
486 regulator-min-microvolt = <2750000>;
487 regulator-max-microvolt = <2750000>;
488 regulator-always-on;
489};
490
491&vintdig {
492 regulator-name = "VINTDIG";
493 /* fixed to 1500000 */
494 regulator-always-on;
495};
496
497/* First two dma channels are reserved on secure omap3 */
498&sdma {
499 dma-channel-mask = <0xfffffffc>;
500};
501
502&twl {
503 twl_audio: audio {
504 compatible = "ti,twl4030-audio";
505 ti,enable-vibra = <1>;
506 };
507
508 twl_power: power {
509 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
510 ti,use_poweroff;
511 };
512};
513
514&twl_keypad {
515 linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
516 MATRIX_KEY(0x00, 0x01, KEY_O)
517 MATRIX_KEY(0x00, 0x02, KEY_P)
518 MATRIX_KEY(0x00, 0x03, KEY_COMMA)
519 MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
520 MATRIX_KEY(0x00, 0x06, KEY_A)
521 MATRIX_KEY(0x00, 0x07, KEY_S)
522
523 MATRIX_KEY(0x01, 0x00, KEY_W)
524 MATRIX_KEY(0x01, 0x01, KEY_D)
525 MATRIX_KEY(0x01, 0x02, KEY_F)
526 MATRIX_KEY(0x01, 0x03, KEY_G)
527 MATRIX_KEY(0x01, 0x04, KEY_H)
528 MATRIX_KEY(0x01, 0x05, KEY_J)
529 MATRIX_KEY(0x01, 0x06, KEY_K)
530 MATRIX_KEY(0x01, 0x07, KEY_L)
531
532 MATRIX_KEY(0x02, 0x00, KEY_E)
533 MATRIX_KEY(0x02, 0x01, KEY_DOT)
534 MATRIX_KEY(0x02, 0x02, KEY_UP)
535 MATRIX_KEY(0x02, 0x03, KEY_ENTER)
536 MATRIX_KEY(0x02, 0x05, KEY_Z)
537 MATRIX_KEY(0x02, 0x06, KEY_X)
538 MATRIX_KEY(0x02, 0x07, KEY_C)
539 MATRIX_KEY(0x02, 0x08, KEY_F9)
540
541 MATRIX_KEY(0x03, 0x00, KEY_R)
542 MATRIX_KEY(0x03, 0x01, KEY_V)
543 MATRIX_KEY(0x03, 0x02, KEY_B)
544 MATRIX_KEY(0x03, 0x03, KEY_N)
545 MATRIX_KEY(0x03, 0x04, KEY_M)
546 MATRIX_KEY(0x03, 0x05, KEY_SPACE)
547 MATRIX_KEY(0x03, 0x06, KEY_SPACE)
548 MATRIX_KEY(0x03, 0x07, KEY_LEFT)
549
550 MATRIX_KEY(0x04, 0x00, KEY_T)
551 MATRIX_KEY(0x04, 0x01, KEY_DOWN)
552 MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
553 MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
554 MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
555 MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
556 MATRIX_KEY(0x04, 0x08, KEY_F10)
557
558 MATRIX_KEY(0x05, 0x00, KEY_Y)
559 MATRIX_KEY(0x05, 0x08, KEY_F11)
560
561 MATRIX_KEY(0x06, 0x00, KEY_U)
562
563 MATRIX_KEY(0x07, 0x00, KEY_I)
564 MATRIX_KEY(0x07, 0x01, KEY_F7)
565 MATRIX_KEY(0x07, 0x02, KEY_F8)
566 >;
567};
568
569&twl_gpio {
570 ti,pullups = <0x0>;
571 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
572};
573
574&i2c2 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&i2c2_pins>;
577
578 clock-frequency = <100000>;
579
580 tlv320aic3x: tlv320aic3x@18 {
581 compatible = "ti,tlv320aic3x";
582 reg = <0x18>;
583 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
584 ai3x-gpio-func = <
585 0 /* AIC3X_GPIO1_FUNC_DISABLED */
586 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
587 >;
588
589 AVDD-supply = <&vmmc2>;
590 DRVDD-supply = <&vmmc2>;
591 IOVDD-supply = <&vio>;
592 DVDD-supply = <&vio>;
593
594 ai3x-micbias-vg = <1>;
595 };
596
597 tlv320aic3x_aux: tlv320aic3x@19 {
598 compatible = "ti,tlv320aic3x";
599 reg = <0x19>;
600 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
601
602 AVDD-supply = <&vmmc2>;
603 DRVDD-supply = <&vmmc2>;
604 IOVDD-supply = <&vio>;
605 DVDD-supply = <&vio>;
606
607 ai3x-micbias-vg = <2>;
608 };
609
610 tsl2563: tsl2563@29 {
611 compatible = "amstaos,tsl2563";
612 reg = <0x29>;
613
614 amstaos,cover-comp-gain = <16>;
615 };
616
617 adp1653: led-controller@30 {
618 compatible = "adi,adp1653";
619 reg = <0x30>;
620 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
621
622 flash {
623 flash-timeout-us = <500000>;
624 flash-max-microamp = <320000>;
625 led-max-microamp = <50000>;
626 };
627 indicator {
628 led-max-microamp = <17500>;
629 };
630 };
631
632 lp5523: lp5523@32 {
633 compatible = "national,lp5523";
634 reg = <0x32>;
635 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
636 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
637
638 chan0 {
639 chan-name = "lp5523:kb1";
640 led-cur = /bits/ 8 <50>;
641 max-cur = /bits/ 8 <100>;
642 };
643
644 chan1 {
645 chan-name = "lp5523:kb2";
646 led-cur = /bits/ 8 <50>;
647 max-cur = /bits/ 8 <100>;
648 };
649
650 chan2 {
651 chan-name = "lp5523:kb3";
652 led-cur = /bits/ 8 <50>;
653 max-cur = /bits/ 8 <100>;
654 };
655
656 chan3 {
657 chan-name = "lp5523:kb4";
658 led-cur = /bits/ 8 <50>;
659 max-cur = /bits/ 8 <100>;
660 };
661
662 chan4 {
663 chan-name = "lp5523:b";
664 led-cur = /bits/ 8 <50>;
665 max-cur = /bits/ 8 <100>;
666 };
667
668 chan5 {
669 chan-name = "lp5523:g";
670 led-cur = /bits/ 8 <50>;
671 max-cur = /bits/ 8 <100>;
672 };
673
674 chan6 {
675 chan-name = "lp5523:r";
676 led-cur = /bits/ 8 <50>;
677 max-cur = /bits/ 8 <100>;
678 };
679
680 chan7 {
681 chan-name = "lp5523:kb5";
682 led-cur = /bits/ 8 <50>;
683 max-cur = /bits/ 8 <100>;
684 };
685
686 chan8 {
687 chan-name = "lp5523:kb6";
688 led-cur = /bits/ 8 <50>;
689 max-cur = /bits/ 8 <100>;
690 };
691 };
692
693 bq27200: bq27200@55 {
694 compatible = "ti,bq27200";
695 reg = <0x55>;
696 power-supplies = <&bq24150a>;
697 };
698
699 /* Stereo headphone amplifier */
700 tpa6130a2: tpa6130a2@60 {
701 compatible = "ti,tpa6130a2";
702 reg = <0x60>;
703
704 Vdd-supply = <&vmmc2>;
705
706 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
707 };
708
709 si4713: si4713@63 {
710 compatible = "silabs,si4713";
711 reg = <0x63>;
712
713 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
714 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
715 vio-supply = <&vio>;
716 vdd-supply = <&vaux1>;
717 };
718
719 bq24150a: bq24150a@6b {
720 compatible = "ti,bq24150a";
721 reg = <0x6b>;
722
723 ti,current-limit = <100>;
724 ti,weak-battery-voltage = <3400>;
725 ti,battery-regulation-voltage = <4200>;
726 ti,charge-current = <650>;
727 ti,termination-current = <100>;
728 ti,resistor-sense = <68>;
729
730 ti,usb-charger-detection = <&isp1707>;
731 };
732};
733
734&i2c3 {
735 pinctrl-names = "default";
736 pinctrl-0 = <&i2c3_pins>;
737
738 clock-frequency = <400000>;
739
740 lis302dl: lis3lv02d@1d {
741 compatible = "st,lis3lv02d";
742 reg = <0x1d>;
743
744 Vdd-supply = <&vaux1>;
745 Vdd_IO-supply = <&vio>;
746
747 interrupt-parent = <&gpio6>;
748 interrupts = <21 20>; /* 181 and 180 */
749
750 /* click flags */
751 st,click-single-x;
752 st,click-single-y;
753 st,click-single-z;
754
755 /* Limits are 0.5g * value */
756 st,click-threshold-x = <8>;
757 st,click-threshold-y = <8>;
758 st,click-threshold-z = <10>;
759
760 /* Click must be longer than time limit */
761 st,click-time-limit = <9>;
762
763 /* Kind of debounce filter */
764 st,click-latency = <50>;
765
766 /* Interrupt line 2 for click detection */
767 st,irq2-click;
768
769 st,wakeup-x-hi;
770 st,wakeup-y-hi;
771 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
772
773 st,wakeup2-z-hi;
774 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
775
776 st,hipass1-disable;
777 st,hipass2-disable;
778
779 st,axis-x = <1>; /* LIS3_DEV_X */
780 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
781 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
782
783 st,min-limit-x = <(-32)>;
784 st,min-limit-y = <3>;
785 st,min-limit-z = <3>;
786
787 st,max-limit-x = <(-3)>;
788 st,max-limit-y = <32>;
789 st,max-limit-z = <32>;
790 };
791
792 cam1: camera@3e {
793 compatible = "toshiba,et8ek8";
794 reg = <0x3e>;
795
796 vana-supply = <&vaux4>;
797
798 clocks = <&isp 0>;
799 clock-names = "extclk";
800 clock-frequency = <9600000>;
801
802 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
803
804 lens-focus = <&ad5820>;
805
806 port {
807 csi_cam1: endpoint {
808 bus-type = <3>; /* CCP2 */
809 strobe = <1>;
810 clock-inv = <0>;
811 crc = <1>;
812
813 remote-endpoint = <&csi_isp>;
814 };
815 };
816 };
817
818 /* D/A converter for auto-focus */
819 ad5820: dac@c {
820 compatible = "adi,ad5820";
821 reg = <0x0c>;
822
823 VANA-supply = <&vaux4>;
824
825 #io-channel-cells = <0>;
826 };
827};
828
829&mmc1 {
830 pinctrl-names = "default";
831 pinctrl-0 = <&mmc1_pins>;
832 vmmc-supply = <&vmmc1>;
833 bus-width = <4>;
834};
835
836/* most boards use vaux3, only some old versions use vmmc2 instead */
837&mmc2 {
838 pinctrl-names = "default";
839 pinctrl-0 = <&mmc2_pins>;
840 vmmc-supply = <&vaux3>;
841 vqmmc-supply = <&vsim>;
842 bus-width = <8>;
843 non-removable;
844 no-sdio;
845 no-sd;
846};
847
848&mmc3 {
849 status = "disabled";
850};
851
852&gpmc {
853 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
854 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
855 pinctrl-names = "default";
856 pinctrl-0 = <&gpmc_pins>;
857
858 /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
859 onenand@0,0 {
860 #address-cells = <1>;
861 #size-cells = <1>;
862 compatible = "ti,omap2-onenand";
863 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
864
865 /*
866 * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
867 * bootloader set values when booted with v5.1
868 * (OneNAND Manufacturer: Samsung):
869 *
870 * cs0 GPMC_CS_CONFIG1: 0xfb001202
871 * cs0 GPMC_CS_CONFIG2: 0x00111100
872 * cs0 GPMC_CS_CONFIG3: 0x00020200
873 * cs0 GPMC_CS_CONFIG4: 0x11001102
874 * cs0 GPMC_CS_CONFIG5: 0x03101616
875 * cs0 GPMC_CS_CONFIG6: 0x90060000
876 */
877 gpmc,sync-read;
878 gpmc,sync-write;
879 gpmc,burst-length = <16>;
880 gpmc,burst-read;
881 gpmc,burst-wrap;
882 gpmc,burst-write;
883 gpmc,device-width = <2>;
884 gpmc,mux-add-data = <2>;
885 gpmc,cs-on-ns = <0>;
886 gpmc,cs-rd-off-ns = <102>;
887 gpmc,cs-wr-off-ns = <102>;
888 gpmc,adv-on-ns = <0>;
889 gpmc,adv-rd-off-ns = <12>;
890 gpmc,adv-wr-off-ns = <12>;
891 gpmc,oe-on-ns = <12>;
892 gpmc,oe-off-ns = <102>;
893 gpmc,we-on-ns = <0>;
894 gpmc,we-off-ns = <102>;
895 gpmc,rd-cycle-ns = <132>;
896 gpmc,wr-cycle-ns = <132>;
897 gpmc,access-ns = <96>;
898 gpmc,page-burst-access-ns = <18>;
899 gpmc,bus-turnaround-ns = <0>;
900 gpmc,cycle2cycle-delay-ns = <0>;
901 gpmc,wait-monitoring-ns = <0>;
902 gpmc,clk-activation-ns = <6>;
903 gpmc,wr-data-mux-bus-ns = <36>;
904 gpmc,wr-access-ns = <96>;
905 gpmc,sync-clk-ps = <15000>;
906
907 /*
908 * MTD partition table corresponding to Nokia's
909 * Maemo 5 (Fremantle) release.
910 */
911 partition@0 {
912 label = "bootloader";
913 reg = <0x00000000 0x00020000>;
914 read-only;
915 };
916 partition@1 {
917 label = "config";
918 reg = <0x00020000 0x00060000>;
919 };
920 partition@2 {
921 label = "log";
922 reg = <0x00080000 0x00040000>;
923 };
924 partition@3 {
925 label = "kernel";
926 reg = <0x000c0000 0x00200000>;
927 };
928 partition@4 {
929 label = "initfs";
930 reg = <0x002c0000 0x00200000>;
931 };
932 partition@5 {
933 label = "rootfs";
934 reg = <0x004c0000 0x0fb40000>;
935 };
936 };
937
938 /* Ethernet is on some early development boards and qemu */
939 ethernet@gpmc {
940 compatible = "smsc,lan91c94";
941 interrupt-parent = <&gpio2>;
942 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
943 reg = <1 0 0xf>; /* 16 byte IO range */
944 bank-width = <2>;
945 pinctrl-names = "default";
946 pinctrl-0 = <ðernet_pins>;
947 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */
948 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */
949 gpmc,device-width = <2>;
950 gpmc,sync-clk-ps = <0>;
951 gpmc,cs-on-ns = <0>;
952 gpmc,cs-rd-off-ns = <48>;
953 gpmc,cs-wr-off-ns = <24>;
954 gpmc,adv-on-ns = <0>;
955 gpmc,adv-rd-off-ns = <0>;
956 gpmc,adv-wr-off-ns = <0>;
957 gpmc,we-on-ns = <12>;
958 gpmc,we-off-ns = <18>;
959 gpmc,oe-on-ns = <12>;
960 gpmc,oe-off-ns = <48>;
961 gpmc,page-burst-access-ns = <0>;
962 gpmc,access-ns = <42>;
963 gpmc,rd-cycle-ns = <180>;
964 gpmc,wr-cycle-ns = <180>;
965 gpmc,bus-turnaround-ns = <0>;
966 gpmc,cycle2cycle-delay-ns = <0>;
967 gpmc,wait-monitoring-ns = <0>;
968 gpmc,clk-activation-ns = <0>;
969 gpmc,wr-access-ns = <0>;
970 gpmc,wr-data-mux-bus-ns = <12>;
971 };
972};
973
974&mcspi1 {
975 /*
976 * For some reason, touchscreen is necessary for screen to work at
977 * all on real hw. It works well without it on emulator.
978 *
979 * Also... order in the device tree actually matters here.
980 */
981 tsc2005@0 {
982 compatible = "ti,tsc2005";
983 spi-max-frequency = <6000000>;
984 reg = <0>;
985
986 vio-supply = <&vio>;
987
988 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
989 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
990
991 touchscreen-fuzz-x = <4>;
992 touchscreen-fuzz-y = <7>;
993 touchscreen-fuzz-pressure = <2>;
994 touchscreen-size-x = <4096>;
995 touchscreen-size-y = <4096>;
996 touchscreen-max-pressure = <2048>;
997
998 ti,x-plate-ohms = <280>;
999 ti,esd-recovery-timeout-ms = <8000>;
1000 };
1001
1002 lcd: acx565akm@2 {
1003 compatible = "sony,acx565akm";
1004 spi-max-frequency = <6000000>;
1005 reg = <2>;
1006
1007 pinctrl-names = "default";
1008 pinctrl-0 = <&acx565akm_pins>;
1009
1010 label = "lcd";
1011 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
1012
1013 port {
1014 lcd_in: endpoint {
1015 remote-endpoint = <&sdi_out>;
1016 };
1017 };
1018 };
1019};
1020
1021&mcspi4 {
1022 pinctrl-names = "default";
1023 pinctrl-0 = <&mcspi4_pins>;
1024
1025 wl1251@0 {
1026 pinctrl-names = "default";
1027 pinctrl-0 = <&wl1251_pins>;
1028
1029 vio-supply = <&vio>;
1030
1031 compatible = "ti,wl1251";
1032 reg = <0>;
1033 spi-max-frequency = <48000000>;
1034
1035 spi-cpol;
1036 spi-cpha;
1037
1038 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1039
1040 interrupt-parent = <&gpio2>;
1041 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1042
1043 clocks = <&vctcxo>;
1044 };
1045};
1046
1047/* RNG not directly accessible on n900, see omap3-rom-rng instead */
1048&rng_target {
1049 status = "disabled";
1050};
1051
1052&usb_otg_hs {
1053 interface-type = <0>;
1054 usb-phy = <&usb2_phy>;
1055 phys = <&usb2_phy>;
1056 phy-names = "usb2-phy";
1057 mode = <2>;
1058 power = <50>;
1059};
1060
1061&uart1 {
1062 status = "disabled";
1063};
1064
1065&uart2 {
1066 pinctrl-names = "default";
1067 pinctrl-0 = <&uart2_pins>;
1068
1069 bcm2048: bluetooth {
1070 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1071 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1072 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1073 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1074 clocks = <&vctcxo>;
1075 clock-names = "sysclk";
1076 };
1077};
1078
1079&uart3 {
1080 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1081 pinctrl-names = "default";
1082 pinctrl-0 = <&uart3_pins>;
1083};
1084
1085&dss {
1086 status = "okay";
1087
1088 pinctrl-names = "default";
1089 pinctrl-0 = <&dss_sdi_pins>;
1090
1091 vdds_sdi-supply = <&vaux1>;
1092
1093 ports {
1094 #address-cells = <1>;
1095 #size-cells = <0>;
1096
1097 port@1 {
1098 reg = <1>;
1099
1100 sdi_out: endpoint {
1101 remote-endpoint = <&lcd_in>;
1102 datapairs = <2>;
1103 };
1104 };
1105 };
1106};
1107
1108&venc {
1109 status = "okay";
1110
1111 vdda-supply = <&vdac>;
1112
1113 port {
1114 venc_out: endpoint {
1115 remote-endpoint = <&tv_connector_in>;
1116 ti,channels = <1>;
1117 };
1118 };
1119};
1120
1121&mcbsp2 {
1122 status = "okay";
1123};
1124
1125&ssi_port1 {
1126 pinctrl-names = "default";
1127 pinctrl-0 = <&ssi_pins>;
1128
1129 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1130
1131 modem: hsi-client {
1132 compatible = "nokia,n900-modem";
1133
1134 pinctrl-names = "default";
1135 pinctrl-0 = <&modem_pins>;
1136
1137 hsi-channel-ids = <0>, <1>, <2>, <3>;
1138 hsi-channel-names = "mcsaab-control",
1139 "speech-control",
1140 "speech-data",
1141 "mcsaab-data";
1142 hsi-speed-kbps = <55000>;
1143 hsi-mode = "frame";
1144 hsi-flow = "synchronized";
1145 hsi-arb-mode = "round-robin";
1146
1147 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1148
1149 gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>, /* 70 */
1150 <&gpio3 9 GPIO_ACTIVE_HIGH>, /* 73 */
1151 <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1152 <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1153 <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1154 gpio-names = "cmt_apeslpx",
1155 "cmt_rst_rq",
1156 "cmt_en",
1157 "cmt_rst",
1158 "cmt_bsi";
1159 };
1160};
1161
1162&ssi_port2 {
1163 status = "disabled";
1164};
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
5 */
6
7/dts-v1/;
8
9#include "omap34xx.dtsi"
10#include <dt-bindings/input/input.h>
11
12/*
13 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
14 * for omap AES HW crypto support. When linux kernel try to access memory of AES
15 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
16 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
17 * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
18 * There is "unofficial" version of bootloader which enables AES in L3 firewall
19 * but it is not widely used and to prevent kernel crash rather AES is disabled.
20 * There is also no runtime detection code if AES is disabled in L3 firewall...
21 */
22&aes {
23 status = "disabled";
24};
25
26/ {
27 model = "Nokia N900";
28 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
29
30 aliases {
31 i2c0;
32 i2c1 = &i2c1;
33 i2c2 = &i2c2;
34 i2c3 = &i2c3;
35 display0 = &lcd;
36 display1 = &tv;
37 };
38
39 cpus {
40 cpu@0 {
41 cpu0-supply = <&vcc>;
42 };
43 };
44
45 leds {
46 compatible = "gpio-leds";
47 heartbeat {
48 label = "debug::sleep";
49 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* 162 */
50 linux,default-trigger = "default-on";
51 pinctrl-names = "default";
52 pinctrl-0 = <&debug_leds>;
53 };
54 };
55
56 memory@80000000 {
57 device_type = "memory";
58 reg = <0x80000000 0x10000000>; /* 256 MB */
59 };
60
61 gpio_keys {
62 compatible = "gpio-keys";
63
64 camera_lens_cover {
65 label = "Camera Lens Cover";
66 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
67 linux,input-type = <EV_SW>;
68 linux,code = <SW_CAMERA_LENS_COVER>;
69 linux,can-disable;
70 };
71
72 camera_focus {
73 label = "Camera Focus";
74 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
75 linux,code = <KEY_CAMERA_FOCUS>;
76 linux,can-disable;
77 };
78
79 camera_capture {
80 label = "Camera Capture";
81 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
82 linux,code = <KEY_CAMERA>;
83 linux,can-disable;
84 };
85
86 lock_button {
87 label = "Lock Button";
88 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
89 linux,code = <KEY_SCREENLOCK>;
90 linux,can-disable;
91 };
92
93 keypad_slide {
94 label = "Keypad Slide";
95 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
96 linux,input-type = <EV_SW>;
97 linux,code = <SW_KEYPAD_SLIDE>;
98 linux,can-disable;
99 };
100
101 proximity_sensor {
102 label = "Proximity Sensor";
103 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
104 linux,input-type = <EV_SW>;
105 linux,code = <SW_FRONT_PROXIMITY>;
106 linux,can-disable;
107 };
108 };
109
110 isp1707: isp1707 {
111 compatible = "nxp,isp1707";
112 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
113 usb-phy = <&usb2_phy>;
114 };
115
116 tv: connector {
117 compatible = "composite-video-connector";
118 label = "tv";
119
120 port {
121 tv_connector_in: endpoint {
122 remote-endpoint = <&venc_out>;
123 };
124 };
125 };
126
127 sound: n900-audio {
128 compatible = "nokia,n900-audio";
129
130 nokia,cpu-dai = <&mcbsp2>;
131 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
132 nokia,headphone-amplifier = <&tpa6130a2>;
133
134 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
135 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
136 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
137 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
138 };
139
140 battery: n900-battery {
141 compatible = "nokia,n900-battery";
142 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
143 io-channel-names = "temp", "bsi", "vbat";
144 };
145
146 pwm9: dmtimer-pwm {
147 compatible = "ti,omap-dmtimer-pwm";
148 #pwm-cells = <3>;
149 ti,timers = <&timer9>;
150 ti,clock-source = <0x00>; /* timer_sys_ck */
151 };
152
153 ir: n900-ir {
154 compatible = "nokia,n900-ir";
155 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
156 };
157
158 /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
159 vctcxo: vctcxo {
160 compatible = "fixed-clock";
161 #clock-cells = <0>;
162 clock-frequency = <38400000>;
163 };
164};
165
166&isp {
167 vdds_csib-supply = <&vaux2>;
168
169 pinctrl-names = "default";
170 pinctrl-0 = <&camera_pins>;
171
172 ports {
173 port@1 {
174 reg = <1>;
175
176 csi_isp: endpoint {
177 remote-endpoint = <&csi_cam1>;
178 bus-type = <3>; /* CCP2 */
179 clock-lanes = <1>;
180 data-lanes = <0>;
181 lane-polarity = <0 0>;
182 /* Select strobe = <1> for back camera, <0> for front camera */
183 strobe = <1>;
184 };
185 };
186 };
187};
188
189&omap3_pmx_core {
190 pinctrl-names = "default";
191
192 uart2_pins: pinmux_uart2_pins {
193 pinctrl-single,pins = <
194 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
195 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
196 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
197 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
198 >;
199 };
200
201 uart3_pins: pinmux_uart3_pins {
202 pinctrl-single,pins = <
203 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx */
204 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
205 >;
206 };
207
208 ethernet_pins: pinmux_ethernet_pins {
209 pinctrl-single,pins = <
210 OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
211 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */
212 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
213 >;
214 };
215
216 gpmc_pins: pinmux_gpmc_pins {
217 pinctrl-single,pins = <
218
219 /* address lines */
220 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
221 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
222 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
223
224 /* data lines, gpmc_d0..d7 not muxable according to TRM */
225 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
226 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
227 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
228 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
229 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
230 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
231 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
232 OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
233
234 /*
235 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
236 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
237 */
238 OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
239 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
240 >;
241 };
242
243 i2c1_pins: pinmux_i2c1_pins {
244 pinctrl-single,pins = <
245 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
246 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
247 >;
248 };
249
250 i2c2_pins: pinmux_i2c2_pins {
251 pinctrl-single,pins = <
252 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
253 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
254 >;
255 };
256
257 i2c3_pins: pinmux_i2c3_pins {
258 pinctrl-single,pins = <
259 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
260 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
261 >;
262 };
263
264 debug_leds: pinmux_debug_led_pins {
265 pinctrl-single,pins = <
266 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 */
267 >;
268 };
269
270 mcspi4_pins: pinmux_mcspi4_pins {
271 pinctrl-single,pins = <
272 OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
273 OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
274 OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
275 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
276 >;
277 };
278
279 mmc1_pins: pinmux_mmc1_pins {
280 pinctrl-single,pins = <
281 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
282 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
283 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
284 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
285 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
286 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
287 >;
288 };
289
290 mmc2_pins: pinmux_mmc2_pins {
291 pinctrl-single,pins = <
292 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
293 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
294 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
295 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
296 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
297 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
298 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
299 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
300 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
301 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
302 >;
303 };
304
305 acx565akm_pins: pinmux_acx565akm_pins {
306 pinctrl-single,pins = <
307 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
308 >;
309 };
310
311 dss_sdi_pins: pinmux_dss_sdi_pins {
312 pinctrl-single,pins = <
313 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
314 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
315 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
316 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
317
318 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
319 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
320 >;
321 };
322
323 wl1251_pins: pinmux_wl1251 {
324 pinctrl-single,pins = <
325 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
326 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
327 >;
328 };
329
330 ssi_pins: pinmux_ssi {
331 pinctrl-single,pins = <
332 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
333 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
334 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
335 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
336 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
337 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
338 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
339 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
340 >;
341 };
342
343 modem_pins: pinmux_modem {
344 pinctrl-single,pins = <
345 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
346 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* gpio 72 => ape_rst_rq */
347 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
348 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
349 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
350 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
351 >;
352 };
353
354 camera_pins: pinmux_camera {
355 pinctrl-single,pins = <
356 OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7) /* cam_hs */
357 OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7) /* cam_vs */
358 OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
359 OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7) /* cam_d4 */
360 OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6 */
361 OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7 */
362 OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0) /* cam_d8 */
363 OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0) /* cam_d9 */
364 OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7) /* cam_d10 */
365 OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7) /* cam_xclkb */
366 OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0) /* cam_strobe */
367 >;
368 };
369};
370
371&i2c1 {
372 pinctrl-names = "default";
373 pinctrl-0 = <&i2c1_pins>;
374
375 clock-frequency = <2200000>;
376
377 twl: twl@48 {
378 reg = <0x48>;
379 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
380 interrupt-parent = <&intc>;
381 };
382};
383
384#include "twl4030.dtsi"
385#include "twl4030_omap3.dtsi"
386
387&vaux1 {
388 regulator-name = "V28";
389 regulator-min-microvolt = <2800000>;
390 regulator-max-microvolt = <2800000>;
391 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
392 regulator-always-on; /* due to battery cover sensor */
393};
394
395&vaux2 {
396 regulator-name = "VCSI";
397 regulator-min-microvolt = <1800000>;
398 regulator-max-microvolt = <1800000>;
399 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
400};
401
402&vaux3 {
403 regulator-name = "VMMC2_30";
404 regulator-min-microvolt = <2800000>;
405 regulator-max-microvolt = <3000000>;
406 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
407};
408
409&vaux4 {
410 regulator-name = "VCAM_ANA_28";
411 regulator-min-microvolt = <2800000>;
412 regulator-max-microvolt = <2800000>;
413 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
414};
415
416&vmmc1 {
417 regulator-name = "VMMC1";
418 regulator-min-microvolt = <1850000>;
419 regulator-max-microvolt = <3150000>;
420 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
421};
422
423&vmmc2 {
424 regulator-name = "V28_A";
425 regulator-min-microvolt = <2800000>;
426 regulator-max-microvolt = <3000000>;
427 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
428 regulator-always-on; /* due VIO leak to AIC34 VDDs */
429};
430
431&vpll1 {
432 regulator-name = "VPLL";
433 regulator-min-microvolt = <1800000>;
434 regulator-max-microvolt = <1800000>;
435 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
436 regulator-always-on;
437};
438
439&vpll2 {
440 regulator-name = "VSDI_CSI";
441 regulator-min-microvolt = <1800000>;
442 regulator-max-microvolt = <1800000>;
443 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
444 regulator-always-on;
445};
446
447&vsim {
448 regulator-name = "VMMC2_IO_18";
449 regulator-min-microvolt = <1800000>;
450 regulator-max-microvolt = <1800000>;
451 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
452};
453
454&vio {
455 regulator-name = "VIO";
456 regulator-min-microvolt = <1800000>;
457 regulator-max-microvolt = <1800000>;
458};
459
460&vintana1 {
461 regulator-name = "VINTANA1";
462 /* fixed to 1500000 */
463 regulator-always-on;
464};
465
466&vintana2 {
467 regulator-name = "VINTANA2";
468 regulator-min-microvolt = <2750000>;
469 regulator-max-microvolt = <2750000>;
470 regulator-always-on;
471};
472
473&vintdig {
474 regulator-name = "VINTDIG";
475 /* fixed to 1500000 */
476 regulator-always-on;
477};
478
479&twl {
480 twl_audio: audio {
481 compatible = "ti,twl4030-audio";
482 ti,enable-vibra = <1>;
483 };
484
485 twl_power: power {
486 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
487 ti,use_poweroff;
488 };
489};
490
491&twl_keypad {
492 linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
493 MATRIX_KEY(0x00, 0x01, KEY_O)
494 MATRIX_KEY(0x00, 0x02, KEY_P)
495 MATRIX_KEY(0x00, 0x03, KEY_COMMA)
496 MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
497 MATRIX_KEY(0x00, 0x06, KEY_A)
498 MATRIX_KEY(0x00, 0x07, KEY_S)
499
500 MATRIX_KEY(0x01, 0x00, KEY_W)
501 MATRIX_KEY(0x01, 0x01, KEY_D)
502 MATRIX_KEY(0x01, 0x02, KEY_F)
503 MATRIX_KEY(0x01, 0x03, KEY_G)
504 MATRIX_KEY(0x01, 0x04, KEY_H)
505 MATRIX_KEY(0x01, 0x05, KEY_J)
506 MATRIX_KEY(0x01, 0x06, KEY_K)
507 MATRIX_KEY(0x01, 0x07, KEY_L)
508
509 MATRIX_KEY(0x02, 0x00, KEY_E)
510 MATRIX_KEY(0x02, 0x01, KEY_DOT)
511 MATRIX_KEY(0x02, 0x02, KEY_UP)
512 MATRIX_KEY(0x02, 0x03, KEY_ENTER)
513 MATRIX_KEY(0x02, 0x05, KEY_Z)
514 MATRIX_KEY(0x02, 0x06, KEY_X)
515 MATRIX_KEY(0x02, 0x07, KEY_C)
516 MATRIX_KEY(0x02, 0x08, KEY_F9)
517
518 MATRIX_KEY(0x03, 0x00, KEY_R)
519 MATRIX_KEY(0x03, 0x01, KEY_V)
520 MATRIX_KEY(0x03, 0x02, KEY_B)
521 MATRIX_KEY(0x03, 0x03, KEY_N)
522 MATRIX_KEY(0x03, 0x04, KEY_M)
523 MATRIX_KEY(0x03, 0x05, KEY_SPACE)
524 MATRIX_KEY(0x03, 0x06, KEY_SPACE)
525 MATRIX_KEY(0x03, 0x07, KEY_LEFT)
526
527 MATRIX_KEY(0x04, 0x00, KEY_T)
528 MATRIX_KEY(0x04, 0x01, KEY_DOWN)
529 MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
530 MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
531 MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
532 MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
533 MATRIX_KEY(0x04, 0x08, KEY_F10)
534
535 MATRIX_KEY(0x05, 0x00, KEY_Y)
536 MATRIX_KEY(0x05, 0x08, KEY_F11)
537
538 MATRIX_KEY(0x06, 0x00, KEY_U)
539
540 MATRIX_KEY(0x07, 0x00, KEY_I)
541 MATRIX_KEY(0x07, 0x01, KEY_F7)
542 MATRIX_KEY(0x07, 0x02, KEY_F8)
543 >;
544};
545
546&twl_gpio {
547 ti,pullups = <0x0>;
548 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
549};
550
551&i2c2 {
552 pinctrl-names = "default";
553 pinctrl-0 = <&i2c2_pins>;
554
555 clock-frequency = <100000>;
556
557 tlv320aic3x: tlv320aic3x@18 {
558 compatible = "ti,tlv320aic3x";
559 reg = <0x18>;
560 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
561 ai3x-gpio-func = <
562 0 /* AIC3X_GPIO1_FUNC_DISABLED */
563 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
564 >;
565
566 AVDD-supply = <&vmmc2>;
567 DRVDD-supply = <&vmmc2>;
568 IOVDD-supply = <&vio>;
569 DVDD-supply = <&vio>;
570
571 ai3x-micbias-vg = <1>;
572 };
573
574 tlv320aic3x_aux: tlv320aic3x@19 {
575 compatible = "ti,tlv320aic3x";
576 reg = <0x19>;
577 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
578
579 AVDD-supply = <&vmmc2>;
580 DRVDD-supply = <&vmmc2>;
581 IOVDD-supply = <&vio>;
582 DVDD-supply = <&vio>;
583
584 ai3x-micbias-vg = <2>;
585 };
586
587 tsl2563: tsl2563@29 {
588 compatible = "amstaos,tsl2563";
589 reg = <0x29>;
590
591 amstaos,cover-comp-gain = <16>;
592 };
593
594 adp1653: led-controller@30 {
595 compatible = "adi,adp1653";
596 reg = <0x30>;
597 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
598
599 flash {
600 flash-timeout-us = <500000>;
601 flash-max-microamp = <320000>;
602 led-max-microamp = <50000>;
603 };
604 indicator {
605 led-max-microamp = <17500>;
606 };
607 };
608
609 lp5523: lp5523@32 {
610 compatible = "national,lp5523";
611 reg = <0x32>;
612 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
613 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
614
615 chan0 {
616 chan-name = "lp5523:kb1";
617 led-cur = /bits/ 8 <50>;
618 max-cur = /bits/ 8 <100>;
619 };
620
621 chan1 {
622 chan-name = "lp5523:kb2";
623 led-cur = /bits/ 8 <50>;
624 max-cur = /bits/ 8 <100>;
625 };
626
627 chan2 {
628 chan-name = "lp5523:kb3";
629 led-cur = /bits/ 8 <50>;
630 max-cur = /bits/ 8 <100>;
631 };
632
633 chan3 {
634 chan-name = "lp5523:kb4";
635 led-cur = /bits/ 8 <50>;
636 max-cur = /bits/ 8 <100>;
637 };
638
639 chan4 {
640 chan-name = "lp5523:b";
641 led-cur = /bits/ 8 <50>;
642 max-cur = /bits/ 8 <100>;
643 };
644
645 chan5 {
646 chan-name = "lp5523:g";
647 led-cur = /bits/ 8 <50>;
648 max-cur = /bits/ 8 <100>;
649 };
650
651 chan6 {
652 chan-name = "lp5523:r";
653 led-cur = /bits/ 8 <50>;
654 max-cur = /bits/ 8 <100>;
655 };
656
657 chan7 {
658 chan-name = "lp5523:kb5";
659 led-cur = /bits/ 8 <50>;
660 max-cur = /bits/ 8 <100>;
661 };
662
663 chan8 {
664 chan-name = "lp5523:kb6";
665 led-cur = /bits/ 8 <50>;
666 max-cur = /bits/ 8 <100>;
667 };
668 };
669
670 bq27200: bq27200@55 {
671 compatible = "ti,bq27200";
672 reg = <0x55>;
673 power-supplies = <&bq24150a>;
674 };
675
676 /* Stereo headphone amplifier */
677 tpa6130a2: tpa6130a2@60 {
678 compatible = "ti,tpa6130a2";
679 reg = <0x60>;
680
681 Vdd-supply = <&vmmc2>;
682
683 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
684 };
685
686 si4713: si4713@63 {
687 compatible = "silabs,si4713";
688 reg = <0x63>;
689
690 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
691 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
692 vio-supply = <&vio>;
693 vdd-supply = <&vaux1>;
694 };
695
696 bq24150a: bq24150a@6b {
697 compatible = "ti,bq24150a";
698 reg = <0x6b>;
699
700 ti,current-limit = <100>;
701 ti,weak-battery-voltage = <3400>;
702 ti,battery-regulation-voltage = <4200>;
703 ti,charge-current = <650>;
704 ti,termination-current = <100>;
705 ti,resistor-sense = <68>;
706
707 ti,usb-charger-detection = <&isp1707>;
708 };
709};
710
711&i2c3 {
712 pinctrl-names = "default";
713 pinctrl-0 = <&i2c3_pins>;
714
715 clock-frequency = <400000>;
716
717 lis302dl: lis3lv02d@1d {
718 compatible = "st,lis3lv02d";
719 reg = <0x1d>;
720
721 Vdd-supply = <&vaux1>;
722 Vdd_IO-supply = <&vio>;
723
724 interrupt-parent = <&gpio6>;
725 interrupts = <21 20>; /* 181 and 180 */
726
727 /* click flags */
728 st,click-single-x;
729 st,click-single-y;
730 st,click-single-z;
731
732 /* Limits are 0.5g * value */
733 st,click-threshold-x = <8>;
734 st,click-threshold-y = <8>;
735 st,click-threshold-z = <10>;
736
737 /* Click must be longer than time limit */
738 st,click-time-limit = <9>;
739
740 /* Kind of debounce filter */
741 st,click-latency = <50>;
742
743 /* Interrupt line 2 for click detection */
744 st,irq2-click;
745
746 st,wakeup-x-hi;
747 st,wakeup-y-hi;
748 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
749
750 st,wakeup2-z-hi;
751 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
752
753 st,hipass1-disable;
754 st,hipass2-disable;
755
756 st,axis-x = <1>; /* LIS3_DEV_X */
757 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
758 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
759
760 st,min-limit-x = <(-32)>;
761 st,min-limit-y = <3>;
762 st,min-limit-z = <3>;
763
764 st,max-limit-x = <(-3)>;
765 st,max-limit-y = <32>;
766 st,max-limit-z = <32>;
767 };
768
769 cam1: camera@3e {
770 compatible = "toshiba,et8ek8";
771 reg = <0x3e>;
772
773 vana-supply = <&vaux4>;
774
775 clocks = <&isp 0>;
776 clock-names = "extclk";
777 clock-frequency = <9600000>;
778
779 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
780
781 lens-focus = <&ad5820>;
782
783 port {
784 csi_cam1: endpoint {
785 bus-type = <3>; /* CCP2 */
786 strobe = <1>;
787 clock-inv = <0>;
788 crc = <1>;
789
790 remote-endpoint = <&csi_isp>;
791 };
792 };
793 };
794
795 /* D/A converter for auto-focus */
796 ad5820: dac@c {
797 compatible = "adi,ad5820";
798 reg = <0x0c>;
799
800 VANA-supply = <&vaux4>;
801
802 #io-channel-cells = <0>;
803 };
804};
805
806&mmc1 {
807 pinctrl-names = "default";
808 pinctrl-0 = <&mmc1_pins>;
809 vmmc-supply = <&vmmc1>;
810 bus-width = <4>;
811 /* For debugging, it is often good idea to remove this GPIO.
812 It means you can remove back cover (to reboot by removing
813 battery) and still use the MMC card. */
814 cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
815};
816
817/* most boards use vaux3, only some old versions use vmmc2 instead */
818&mmc2 {
819 pinctrl-names = "default";
820 pinctrl-0 = <&mmc2_pins>;
821 vmmc-supply = <&vaux3>;
822 vqmmc-supply = <&vsim>;
823 bus-width = <8>;
824 non-removable;
825 no-sdio;
826 no-sd;
827};
828
829&mmc3 {
830 status = "disabled";
831};
832
833&gpmc {
834 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
835 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
836 pinctrl-names = "default";
837 pinctrl-0 = <&gpmc_pins>;
838
839 /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
840 onenand@0,0 {
841 #address-cells = <1>;
842 #size-cells = <1>;
843 compatible = "ti,omap2-onenand";
844 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
845
846 gpmc,sync-read;
847 gpmc,sync-write;
848 gpmc,burst-length = <16>;
849 gpmc,burst-read;
850 gpmc,burst-wrap;
851 gpmc,burst-write;
852 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
853 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
854 gpmc,cs-on-ns = <0>;
855 gpmc,cs-rd-off-ns = <87>;
856 gpmc,cs-wr-off-ns = <87>;
857 gpmc,adv-on-ns = <0>;
858 gpmc,adv-rd-off-ns = <10>;
859 gpmc,adv-wr-off-ns = <10>;
860 gpmc,oe-on-ns = <15>;
861 gpmc,oe-off-ns = <87>;
862 gpmc,we-on-ns = <0>;
863 gpmc,we-off-ns = <87>;
864 gpmc,rd-cycle-ns = <112>;
865 gpmc,wr-cycle-ns = <112>;
866 gpmc,access-ns = <81>;
867 gpmc,page-burst-access-ns = <15>;
868 gpmc,bus-turnaround-ns = <0>;
869 gpmc,cycle2cycle-delay-ns = <0>;
870 gpmc,wait-monitoring-ns = <0>;
871 gpmc,clk-activation-ns = <5>;
872 gpmc,wr-data-mux-bus-ns = <30>;
873 gpmc,wr-access-ns = <81>;
874 gpmc,sync-clk-ps = <15000>;
875
876 /*
877 * MTD partition table corresponding to Nokia's
878 * Maemo 5 (Fremantle) release.
879 */
880 partition@0 {
881 label = "bootloader";
882 reg = <0x00000000 0x00020000>;
883 read-only;
884 };
885 partition@1 {
886 label = "config";
887 reg = <0x00020000 0x00060000>;
888 };
889 partition@2 {
890 label = "log";
891 reg = <0x00080000 0x00040000>;
892 };
893 partition@3 {
894 label = "kernel";
895 reg = <0x000c0000 0x00200000>;
896 };
897 partition@4 {
898 label = "initfs";
899 reg = <0x002c0000 0x00200000>;
900 };
901 partition@5 {
902 label = "rootfs";
903 reg = <0x004c0000 0x0fb40000>;
904 };
905 };
906
907 /* Ethernet is on some early development boards and qemu */
908 ethernet@gpmc {
909 compatible = "smsc,lan91c94";
910 interrupt-parent = <&gpio2>;
911 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
912 reg = <1 0 0xf>; /* 16 byte IO range */
913 bank-width = <2>;
914 pinctrl-names = "default";
915 pinctrl-0 = <ðernet_pins>;
916 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */
917 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */
918 gpmc,device-width = <2>;
919 gpmc,sync-clk-ps = <0>;
920 gpmc,cs-on-ns = <0>;
921 gpmc,cs-rd-off-ns = <48>;
922 gpmc,cs-wr-off-ns = <24>;
923 gpmc,adv-on-ns = <0>;
924 gpmc,adv-rd-off-ns = <0>;
925 gpmc,adv-wr-off-ns = <0>;
926 gpmc,we-on-ns = <12>;
927 gpmc,we-off-ns = <18>;
928 gpmc,oe-on-ns = <12>;
929 gpmc,oe-off-ns = <48>;
930 gpmc,page-burst-access-ns = <0>;
931 gpmc,access-ns = <42>;
932 gpmc,rd-cycle-ns = <180>;
933 gpmc,wr-cycle-ns = <180>;
934 gpmc,bus-turnaround-ns = <0>;
935 gpmc,cycle2cycle-delay-ns = <0>;
936 gpmc,wait-monitoring-ns = <0>;
937 gpmc,clk-activation-ns = <0>;
938 gpmc,wr-access-ns = <0>;
939 gpmc,wr-data-mux-bus-ns = <12>;
940 };
941};
942
943&mcspi1 {
944 /*
945 * For some reason, touchscreen is necessary for screen to work at
946 * all on real hw. It works well without it on emulator.
947 *
948 * Also... order in the device tree actually matters here.
949 */
950 tsc2005@0 {
951 compatible = "ti,tsc2005";
952 spi-max-frequency = <6000000>;
953 reg = <0>;
954
955 vio-supply = <&vio>;
956
957 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
958 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
959
960 touchscreen-fuzz-x = <4>;
961 touchscreen-fuzz-y = <7>;
962 touchscreen-fuzz-pressure = <2>;
963 touchscreen-size-x = <4096>;
964 touchscreen-size-y = <4096>;
965 touchscreen-max-pressure = <2048>;
966
967 ti,x-plate-ohms = <280>;
968 ti,esd-recovery-timeout-ms = <8000>;
969 };
970
971 lcd: acx565akm@2 {
972 compatible = "sony,acx565akm";
973 spi-max-frequency = <6000000>;
974 reg = <2>;
975
976 pinctrl-names = "default";
977 pinctrl-0 = <&acx565akm_pins>;
978
979 label = "lcd";
980 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
981
982 port {
983 lcd_in: endpoint {
984 remote-endpoint = <&sdi_out>;
985 };
986 };
987 };
988};
989
990&mcspi4 {
991 pinctrl-names = "default";
992 pinctrl-0 = <&mcspi4_pins>;
993
994 wl1251@0 {
995 pinctrl-names = "default";
996 pinctrl-0 = <&wl1251_pins>;
997
998 vio-supply = <&vio>;
999
1000 compatible = "ti,wl1251";
1001 reg = <0>;
1002 spi-max-frequency = <48000000>;
1003
1004 spi-cpol;
1005 spi-cpha;
1006
1007 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1008
1009 interrupt-parent = <&gpio2>;
1010 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1011
1012 clocks = <&vctcxo>;
1013 };
1014};
1015
1016&usb_otg_hs {
1017 interface-type = <0>;
1018 usb-phy = <&usb2_phy>;
1019 phys = <&usb2_phy>;
1020 phy-names = "usb2-phy";
1021 mode = <2>;
1022 power = <50>;
1023};
1024
1025&uart1 {
1026 status = "disabled";
1027};
1028
1029&uart2 {
1030 pinctrl-names = "default";
1031 pinctrl-0 = <&uart2_pins>;
1032
1033 bcm2048: bluetooth {
1034 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1035 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1036 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1037 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1038 clocks = <&vctcxo>;
1039 clock-names = "sysclk";
1040 };
1041};
1042
1043&uart3 {
1044 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1045 pinctrl-names = "default";
1046 pinctrl-0 = <&uart3_pins>;
1047};
1048
1049&dss {
1050 status = "ok";
1051
1052 pinctrl-names = "default";
1053 pinctrl-0 = <&dss_sdi_pins>;
1054
1055 vdds_sdi-supply = <&vaux1>;
1056
1057 ports {
1058 #address-cells = <1>;
1059 #size-cells = <0>;
1060
1061 port@1 {
1062 reg = <1>;
1063
1064 sdi_out: endpoint {
1065 remote-endpoint = <&lcd_in>;
1066 datapairs = <2>;
1067 };
1068 };
1069 };
1070};
1071
1072&venc {
1073 status = "ok";
1074
1075 vdda-supply = <&vdac>;
1076
1077 port {
1078 venc_out: endpoint {
1079 remote-endpoint = <&tv_connector_in>;
1080 ti,channels = <1>;
1081 };
1082 };
1083};
1084
1085&mcbsp2 {
1086 status = "ok";
1087};
1088
1089&ssi_port1 {
1090 pinctrl-names = "default";
1091 pinctrl-0 = <&ssi_pins>;
1092
1093 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1094
1095 modem: hsi-client {
1096 compatible = "nokia,n900-modem";
1097
1098 pinctrl-names = "default";
1099 pinctrl-0 = <&modem_pins>;
1100
1101 hsi-channel-ids = <0>, <1>, <2>, <3>;
1102 hsi-channel-names = "mcsaab-control",
1103 "speech-control",
1104 "speech-data",
1105 "mcsaab-data";
1106 hsi-speed-kbps = <55000>;
1107 hsi-mode = "frame";
1108 hsi-flow = "synchronized";
1109 hsi-arb-mode = "round-robin";
1110
1111 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1112
1113 gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>, /* 70 */
1114 <&gpio3 9 GPIO_ACTIVE_HIGH>, /* 73 */
1115 <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1116 <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1117 <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1118 gpio-names = "cmt_apeslpx",
1119 "cmt_rst_rq",
1120 "cmt_en",
1121 "cmt_rst",
1122 "cmt_bsi";
1123 };
1124};
1125
1126&ssi_port2 {
1127 status = "disabled";
1128};