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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
4 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
5 * AT91SAM9X25, AT91SAM9X35 SoC
6 *
7 * Copyright (C) 2012 Atmel,
8 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 */
10
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
16
17/ {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 model = "Atmel AT91SAM9x5 family SoC";
21 compatible = "atmel,at91sam9x5";
22 interrupt-parent = <&aic>;
23
24 aliases {
25 serial0 = &dbgu;
26 serial1 = &usart0;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 gpio3 = &pioD;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 i2c1 = &i2c1;
37 i2c2 = &i2c2;
38 ssc0 = &ssc0;
39 pwm0 = &pwm0;
40 };
41 cpus {
42 #address-cells = <1>;
43 #size-cells = <0>;
44
45 cpu@0 {
46 compatible = "arm,arm926ej-s";
47 device_type = "cpu";
48 reg = <0>;
49 };
50 };
51
52 memory@20000000 {
53 device_type = "memory";
54 reg = <0x20000000 0x10000000>;
55 };
56
57 clocks {
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63
64 main_xtal: main_xtal {
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 clock-frequency = <0>;
68 };
69
70 adc_op_clk: adc_op_clk{
71 compatible = "fixed-clock";
72 #clock-cells = <0>;
73 clock-frequency = <1000000>;
74 };
75 };
76
77 sram: sram@300000 {
78 compatible = "mmio-sram";
79 reg = <0x00300000 0x8000>;
80 #address-cells = <1>;
81 #size-cells = <1>;
82 ranges = <0 0x00300000 0x8000>;
83 };
84
85 ahb {
86 compatible = "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges;
90
91 apb {
92 compatible = "simple-bus";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges;
96
97 aic: interrupt-controller@fffff000 {
98 #interrupt-cells = <3>;
99 compatible = "atmel,at91rm9200-aic";
100 interrupt-controller;
101 reg = <0xfffff000 0x200>;
102 atmel,external-irqs = <31>;
103 };
104
105 matrix: matrix@ffffde00 {
106 compatible = "atmel,at91sam9x5-matrix", "syscon";
107 reg = <0xffffde00 0x100>;
108 };
109
110 pmecc: ecc-engine@ffffe000 {
111 compatible = "atmel,at91sam9g45-pmecc";
112 reg = <0xffffe000 0x600>,
113 <0xffffe600 0x200>;
114 };
115
116 ramc0: ramc@ffffe800 {
117 compatible = "atmel,at91sam9g45-ddramc";
118 reg = <0xffffe800 0x200>;
119 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
120 clock-names = "ddrck";
121 };
122
123 smc: smc@ffffea00 {
124 compatible = "atmel,at91sam9260-smc", "syscon";
125 reg = <0xffffea00 0x200>;
126 };
127
128 pmc: pmc@fffffc00 {
129 compatible = "atmel,at91sam9x5-pmc", "syscon";
130 reg = <0xfffffc00 0x200>;
131 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
132 #clock-cells = <2>;
133 clocks = <&clk32k>, <&main_xtal>;
134 clock-names = "slow_clk", "main_xtal";
135 };
136
137 reset_controller: rstc@fffffe00 {
138 compatible = "atmel,at91sam9g45-rstc";
139 reg = <0xfffffe00 0x10>;
140 clocks = <&clk32k>;
141 };
142
143 shutdown_controller: shdwc@fffffe10 {
144 compatible = "atmel,at91sam9x5-shdwc";
145 reg = <0xfffffe10 0x10>;
146 clocks = <&clk32k>;
147 };
148
149 pit: timer@fffffe30 {
150 compatible = "atmel,at91sam9260-pit";
151 reg = <0xfffffe30 0xf>;
152 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
153 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
154 };
155
156 clk32k: sckc@fffffe50 {
157 compatible = "atmel,at91sam9x5-sckc";
158 reg = <0xfffffe50 0x4>;
159 clocks = <&slow_xtal>;
160 #clock-cells = <0>;
161 };
162
163 tcb0: timer@f8008000 {
164 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
165 #address-cells = <1>;
166 #size-cells = <0>;
167 reg = <0xf8008000 0x100>;
168 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
169 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
170 clock-names = "t0_clk", "slow_clk";
171 };
172
173 tcb1: timer@f800c000 {
174 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
175 #address-cells = <1>;
176 #size-cells = <0>;
177 reg = <0xf800c000 0x100>;
178 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
179 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
180 clock-names = "t0_clk", "slow_clk";
181 };
182
183 dma0: dma-controller@ffffec00 {
184 compatible = "atmel,at91sam9g45-dma";
185 reg = <0xffffec00 0x200>;
186 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
187 #dma-cells = <2>;
188 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
189 clock-names = "dma_clk";
190 };
191
192 dma1: dma-controller@ffffee00 {
193 compatible = "atmel,at91sam9g45-dma";
194 reg = <0xffffee00 0x200>;
195 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
196 #dma-cells = <2>;
197 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
198 clock-names = "dma_clk";
199 };
200
201 pinctrl: pinctrl@fffff400 {
202 #address-cells = <1>;
203 #size-cells = <1>;
204 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
205 ranges = <0xfffff400 0xfffff400 0x800>;
206
207 /* shared pinctrl settings */
208 dbgu {
209 pinctrl_dbgu: dbgu-0 {
210 atmel,pins =
211 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
212 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
213 };
214 };
215
216 ebi {
217 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
218 atmel,pins =
219 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
220 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
221 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
222 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
223 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
224 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
225 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
226 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
227 };
228
229 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
230 atmel,pins =
231 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
232 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
233 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
234 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
235 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
236 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
237 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
238 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
239 };
240
241 pinctrl_ebi_addr_nand: ebi-addr-0 {
242 atmel,pins =
243 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
244 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
245 };
246 };
247
248 usart0 {
249 pinctrl_usart0: usart0-0 {
250 atmel,pins =
251 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
252 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
253 };
254
255 pinctrl_usart0_rts: usart0_rts-0 {
256 atmel,pins =
257 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
258 };
259
260 pinctrl_usart0_cts: usart0_cts-0 {
261 atmel,pins =
262 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
263 };
264
265 pinctrl_usart0_sck: usart0_sck-0 {
266 atmel,pins =
267 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
268 };
269 };
270
271 usart1 {
272 pinctrl_usart1: usart1-0 {
273 atmel,pins =
274 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
275 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
276 };
277
278 pinctrl_usart1_rts: usart1_rts-0 {
279 atmel,pins =
280 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
281 };
282
283 pinctrl_usart1_cts: usart1_cts-0 {
284 atmel,pins =
285 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
286 };
287
288 pinctrl_usart1_sck: usart1_sck-0 {
289 atmel,pins =
290 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
291 };
292 };
293
294 usart2 {
295 pinctrl_usart2: usart2-0 {
296 atmel,pins =
297 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
298 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
299 };
300
301 pinctrl_usart2_rts: usart2_rts-0 {
302 atmel,pins =
303 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
304 };
305
306 pinctrl_usart2_cts: usart2_cts-0 {
307 atmel,pins =
308 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
309 };
310
311 pinctrl_usart2_sck: usart2_sck-0 {
312 atmel,pins =
313 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
314 };
315 };
316
317 uart0 {
318 pinctrl_uart0: uart0-0 {
319 atmel,pins =
320 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
321 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
322 };
323 };
324
325 uart1 {
326 pinctrl_uart1: uart1-0 {
327 atmel,pins =
328 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
329 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
330 };
331 };
332
333 nand {
334 pinctrl_nand_oe_we: nand-oe-we-0 {
335 atmel,pins =
336 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
337 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
338 };
339
340 pinctrl_nand_rb: nand-rb-0 {
341 atmel,pins =
342 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
343 };
344
345 pinctrl_nand_cs: nand-cs-0 {
346 atmel,pins =
347 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
348 };
349 };
350
351 mmc0 {
352 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
353 atmel,pins =
354 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
355 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
356 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
357 };
358
359 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
360 atmel,pins =
361 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
362 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
363 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
364 };
365 };
366
367 mmc1 {
368 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
369 atmel,pins =
370 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
371 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
372 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
373 };
374
375 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
376 atmel,pins =
377 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
378 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
379 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
380 };
381 };
382
383 ssc0 {
384 pinctrl_ssc0_tx: ssc0_tx-0 {
385 atmel,pins =
386 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
387 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
388 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
389 };
390
391 pinctrl_ssc0_rx: ssc0_rx-0 {
392 atmel,pins =
393 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
394 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
395 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
396 };
397 };
398
399 spi0 {
400 pinctrl_spi0: spi0-0 {
401 atmel,pins =
402 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
403 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
404 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
405 };
406 };
407
408 spi1 {
409 pinctrl_spi1: spi1-0 {
410 atmel,pins =
411 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
412 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
413 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
414 };
415 };
416
417 i2c0 {
418 pinctrl_i2c0: i2c0-0 {
419 atmel,pins =
420 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
421 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
422 };
423 };
424
425 i2c1 {
426 pinctrl_i2c1: i2c1-0 {
427 atmel,pins =
428 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
429 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
430 };
431 };
432
433 i2c2 {
434 pinctrl_i2c2: i2c2-0 {
435 atmel,pins =
436 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
437 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
438 };
439 };
440
441 i2c_gpio0 {
442 pinctrl_i2c_gpio0: i2c_gpio0-0 {
443 atmel,pins =
444 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
445 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
446 };
447 };
448
449 i2c_gpio1 {
450 pinctrl_i2c_gpio1: i2c_gpio1-0 {
451 atmel,pins =
452 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
453 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
454 };
455 };
456
457 i2c_gpio2 {
458 pinctrl_i2c_gpio2: i2c_gpio2-0 {
459 atmel,pins =
460 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
461 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
462 };
463 };
464
465 pwm0 {
466 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
467 atmel,pins =
468 <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
469 };
470 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
471 atmel,pins =
472 <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
473 };
474 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
475 atmel,pins =
476 <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
477 };
478
479 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
480 atmel,pins =
481 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
482 };
483 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
484 atmel,pins =
485 <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
486 };
487 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
488 atmel,pins =
489 <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
490 };
491
492 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
493 atmel,pins =
494 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
495 };
496 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
497 atmel,pins =
498 <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
499 };
500
501 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
502 atmel,pins =
503 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
504 };
505 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
506 atmel,pins =
507 <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
508 };
509 };
510
511 tcb0 {
512 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
513 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
514 };
515
516 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
517 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
518 };
519
520 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
521 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
522 };
523
524 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
525 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
526 };
527
528 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
529 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
530 };
531
532 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
533 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
534 };
535
536 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
537 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
538 };
539
540 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
541 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
542 };
543
544 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
545 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
546 };
547 };
548
549 tcb1 {
550 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
551 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
552 };
553
554 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
555 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
556 };
557
558 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
559 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
560 };
561
562 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
563 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
564 };
565
566 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
567 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
568 };
569
570 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
571 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
572 };
573
574 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
575 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
576 };
577
578 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
579 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
580 };
581
582 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
583 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
584 };
585 };
586
587 pioA: gpio@fffff400 {
588 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
589 reg = <0xfffff400 0x200>;
590 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
591 #gpio-cells = <2>;
592 gpio-controller;
593 interrupt-controller;
594 #interrupt-cells = <2>;
595 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
596 };
597
598 pioB: gpio@fffff600 {
599 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
600 reg = <0xfffff600 0x200>;
601 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
602 #gpio-cells = <2>;
603 gpio-controller;
604 #gpio-lines = <19>;
605 interrupt-controller;
606 #interrupt-cells = <2>;
607 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
608 };
609
610 pioC: gpio@fffff800 {
611 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
612 reg = <0xfffff800 0x200>;
613 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
614 #gpio-cells = <2>;
615 gpio-controller;
616 interrupt-controller;
617 #interrupt-cells = <2>;
618 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
619 };
620
621 pioD: gpio@fffffa00 {
622 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
623 reg = <0xfffffa00 0x200>;
624 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
625 #gpio-cells = <2>;
626 gpio-controller;
627 #gpio-lines = <22>;
628 interrupt-controller;
629 #interrupt-cells = <2>;
630 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
631 };
632 };
633
634 ssc0: ssc@f0010000 {
635 compatible = "atmel,at91sam9g45-ssc";
636 reg = <0xf0010000 0x4000>;
637 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
638 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
639 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
640 dma-names = "tx", "rx";
641 pinctrl-names = "default";
642 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
643 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
644 clock-names = "pclk";
645 status = "disabled";
646 };
647
648 mmc0: mmc@f0008000 {
649 compatible = "atmel,hsmci";
650 reg = <0xf0008000 0x600>;
651 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
652 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
653 dma-names = "rxtx";
654 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
655 clock-names = "mci_clk";
656 #address-cells = <1>;
657 #size-cells = <0>;
658 status = "disabled";
659 };
660
661 mmc1: mmc@f000c000 {
662 compatible = "atmel,hsmci";
663 reg = <0xf000c000 0x600>;
664 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
665 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
666 dma-names = "rxtx";
667 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
668 clock-names = "mci_clk";
669 #address-cells = <1>;
670 #size-cells = <0>;
671 status = "disabled";
672 };
673
674 dbgu: serial@fffff200 {
675 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
676 reg = <0xfffff200 0x200>;
677 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
678 pinctrl-names = "default";
679 pinctrl-0 = <&pinctrl_dbgu>;
680 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
681 <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
682 dma-names = "tx", "rx";
683 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
684 clock-names = "usart";
685 status = "disabled";
686 };
687
688 usart0: serial@f801c000 {
689 compatible = "atmel,at91sam9260-usart";
690 reg = <0xf801c000 0x200>;
691 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_usart0>;
694 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
695 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
696 dma-names = "tx", "rx";
697 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
698 clock-names = "usart";
699 status = "disabled";
700 };
701
702 usart1: serial@f8020000 {
703 compatible = "atmel,at91sam9260-usart";
704 reg = <0xf8020000 0x200>;
705 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
706 pinctrl-names = "default";
707 pinctrl-0 = <&pinctrl_usart1>;
708 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
709 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
710 dma-names = "tx", "rx";
711 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
712 clock-names = "usart";
713 status = "disabled";
714 };
715
716 usart2: serial@f8024000 {
717 compatible = "atmel,at91sam9260-usart";
718 reg = <0xf8024000 0x200>;
719 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
720 pinctrl-names = "default";
721 pinctrl-0 = <&pinctrl_usart2>;
722 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
723 <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
724 dma-names = "tx", "rx";
725 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
726 clock-names = "usart";
727 status = "disabled";
728 };
729
730 i2c0: i2c@f8010000 {
731 compatible = "atmel,at91sam9x5-i2c";
732 reg = <0xf8010000 0x100>;
733 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
734 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
735 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
736 dma-names = "tx", "rx";
737 #address-cells = <1>;
738 #size-cells = <0>;
739 pinctrl-names = "default";
740 pinctrl-0 = <&pinctrl_i2c0>;
741 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
742 status = "disabled";
743 };
744
745 i2c1: i2c@f8014000 {
746 compatible = "atmel,at91sam9x5-i2c";
747 reg = <0xf8014000 0x100>;
748 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
749 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
750 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
751 dma-names = "tx", "rx";
752 #address-cells = <1>;
753 #size-cells = <0>;
754 pinctrl-names = "default";
755 pinctrl-0 = <&pinctrl_i2c1>;
756 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
757 status = "disabled";
758 };
759
760 i2c2: i2c@f8018000 {
761 compatible = "atmel,at91sam9x5-i2c";
762 reg = <0xf8018000 0x100>;
763 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
764 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
765 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
766 dma-names = "tx", "rx";
767 #address-cells = <1>;
768 #size-cells = <0>;
769 pinctrl-names = "default";
770 pinctrl-0 = <&pinctrl_i2c2>;
771 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
772 status = "disabled";
773 };
774
775 uart0: serial@f8040000 {
776 compatible = "atmel,at91sam9260-usart";
777 reg = <0xf8040000 0x200>;
778 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
779 pinctrl-names = "default";
780 pinctrl-0 = <&pinctrl_uart0>;
781 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
782 clock-names = "usart";
783 status = "disabled";
784 };
785
786 uart1: serial@f8044000 {
787 compatible = "atmel,at91sam9260-usart";
788 reg = <0xf8044000 0x200>;
789 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
790 pinctrl-names = "default";
791 pinctrl-0 = <&pinctrl_uart1>;
792 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
793 clock-names = "usart";
794 status = "disabled";
795 };
796
797 adc0: adc@f804c000 {
798 compatible = "atmel,at91sam9x5-adc";
799 reg = <0xf804c000 0x100>;
800 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
801 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
802 <&adc_op_clk>;
803 clock-names = "adc_clk", "adc_op_clk";
804 atmel,adc-use-external-triggers;
805 atmel,adc-channels-used = <0xffff>;
806 atmel,adc-vref = <3300>;
807 atmel,adc-startup-time = <40>;
808 atmel,adc-sample-hold-time = <11>;
809 };
810
811 spi0: spi@f0000000 {
812 #address-cells = <1>;
813 #size-cells = <0>;
814 compatible = "atmel,at91rm9200-spi";
815 reg = <0xf0000000 0x100>;
816 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
817 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
818 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
819 dma-names = "tx", "rx";
820 pinctrl-names = "default";
821 pinctrl-0 = <&pinctrl_spi0>;
822 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
823 clock-names = "spi_clk";
824 status = "disabled";
825 };
826
827 spi1: spi@f0004000 {
828 #address-cells = <1>;
829 #size-cells = <0>;
830 compatible = "atmel,at91rm9200-spi";
831 reg = <0xf0004000 0x100>;
832 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
833 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
834 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
835 dma-names = "tx", "rx";
836 pinctrl-names = "default";
837 pinctrl-0 = <&pinctrl_spi1>;
838 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
839 clock-names = "spi_clk";
840 status = "disabled";
841 };
842
843 usb2: gadget@f803c000 {
844 compatible = "atmel,at91sam9g45-udc";
845 reg = <0x00500000 0x80000
846 0xf803c000 0x400>;
847 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
848 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
849 clock-names = "hclk", "pclk";
850 status = "disabled";
851 };
852
853 watchdog: watchdog@fffffe40 {
854 compatible = "atmel,at91sam9260-wdt";
855 reg = <0xfffffe40 0x10>;
856 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
857 clocks = <&clk32k>;
858 atmel,watchdog-type = "hardware";
859 atmel,reset-type = "all";
860 atmel,dbg-halt;
861 status = "disabled";
862 };
863
864 rtc: rtc@fffffeb0 {
865 compatible = "atmel,at91sam9x5-rtc";
866 reg = <0xfffffeb0 0x40>;
867 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
868 clocks = <&clk32k>;
869 status = "disabled";
870 };
871
872 pwm0: pwm@f8034000 {
873 compatible = "atmel,at91sam9rl-pwm";
874 reg = <0xf8034000 0x300>;
875 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
876 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
877 #pwm-cells = <3>;
878 status = "disabled";
879 };
880 };
881
882 usb0: ohci@600000 {
883 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
884 reg = <0x00600000 0x100000>;
885 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
886 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
887 clock-names = "ohci_clk", "hclk", "uhpck";
888 status = "disabled";
889 };
890
891 usb1: ehci@700000 {
892 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
893 reg = <0x00700000 0x100000>;
894 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
895 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
896 clock-names = "usb_clk", "ehci_clk";
897 status = "disabled";
898 };
899
900 ebi: ebi@10000000 {
901 compatible = "atmel,at91sam9x5-ebi";
902 #address-cells = <2>;
903 #size-cells = <1>;
904 atmel,smc = <&smc>;
905 atmel,matrix = <&matrix>;
906 reg = <0x10000000 0x60000000>;
907 ranges = <0x0 0x0 0x10000000 0x10000000
908 0x1 0x0 0x20000000 0x10000000
909 0x2 0x0 0x30000000 0x10000000
910 0x3 0x0 0x40000000 0x10000000
911 0x4 0x0 0x50000000 0x10000000
912 0x5 0x0 0x60000000 0x10000000>;
913 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
914 status = "disabled";
915
916 nand_controller: nand-controller {
917 compatible = "atmel,at91sam9g45-nand-controller";
918 ecc-engine = <&pmecc>;
919 #address-cells = <2>;
920 #size-cells = <1>;
921 ranges;
922 status = "disabled";
923 };
924 };
925 };
926
927 i2c-gpio-0 {
928 compatible = "i2c-gpio";
929 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
930 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
931 >;
932 i2c-gpio,sda-open-drain;
933 i2c-gpio,scl-open-drain;
934 i2c-gpio,delay-us = <2>; /* ~100 kHz */
935 #address-cells = <1>;
936 #size-cells = <0>;
937 pinctrl-names = "default";
938 pinctrl-0 = <&pinctrl_i2c_gpio0>;
939 status = "disabled";
940 };
941
942 i2c-gpio-1 {
943 compatible = "i2c-gpio";
944 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
945 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
946 >;
947 i2c-gpio,sda-open-drain;
948 i2c-gpio,scl-open-drain;
949 i2c-gpio,delay-us = <2>; /* ~100 kHz */
950 #address-cells = <1>;
951 #size-cells = <0>;
952 pinctrl-names = "default";
953 pinctrl-0 = <&pinctrl_i2c_gpio1>;
954 status = "disabled";
955 };
956
957 i2c-gpio-2 {
958 compatible = "i2c-gpio";
959 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
960 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
961 >;
962 i2c-gpio,sda-open-drain;
963 i2c-gpio,scl-open-drain;
964 i2c-gpio,delay-us = <2>; /* ~100 kHz */
965 #address-cells = <1>;
966 #size-cells = <0>;
967 pinctrl-names = "default";
968 pinctrl-0 = <&pinctrl_i2c_gpio2>;
969 status = "disabled";
970 };
971};
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
4 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
5 * AT91SAM9X25, AT91SAM9X35 SoC
6 *
7 * Copyright (C) 2012 Atmel,
8 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 */
10
11#include <dt-bindings/dma/at91.h>
12#include <dt-bindings/pinctrl/at91.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/clock/at91.h>
16
17/ {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 model = "Atmel AT91SAM9x5 family SoC";
21 compatible = "atmel,at91sam9x5";
22 interrupt-parent = <&aic>;
23
24 aliases {
25 serial0 = &dbgu;
26 serial1 = &usart0;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 gpio3 = &pioD;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 i2c1 = &i2c1;
37 i2c2 = &i2c2;
38 ssc0 = &ssc0;
39 pwm0 = &pwm0;
40 };
41 cpus {
42 #address-cells = <0>;
43 #size-cells = <0>;
44
45 cpu {
46 compatible = "arm,arm926ej-s";
47 device_type = "cpu";
48 };
49 };
50
51 memory {
52 device_type = "memory";
53 reg = <0x20000000 0x10000000>;
54 };
55
56 clocks {
57 slow_xtal: slow_xtal {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
61 };
62
63 main_xtal: main_xtal {
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <0>;
67 };
68
69 adc_op_clk: adc_op_clk{
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <1000000>;
73 };
74 };
75
76 sram: sram@300000 {
77 compatible = "mmio-sram";
78 reg = <0x00300000 0x8000>;
79 };
80
81 ahb {
82 compatible = "simple-bus";
83 #address-cells = <1>;
84 #size-cells = <1>;
85 ranges;
86
87 apb {
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
91 ranges;
92
93 aic: interrupt-controller@fffff000 {
94 #interrupt-cells = <3>;
95 compatible = "atmel,at91rm9200-aic";
96 interrupt-controller;
97 reg = <0xfffff000 0x200>;
98 atmel,external-irqs = <31>;
99 };
100
101 matrix: matrix@ffffde00 {
102 compatible = "atmel,at91sam9x5-matrix", "syscon";
103 reg = <0xffffde00 0x100>;
104 };
105
106 pmecc: ecc-engine@ffffe000 {
107 compatible = "atmel,at91sam9g45-pmecc";
108 reg = <0xffffe000 0x600>,
109 <0xffffe600 0x200>;
110 };
111
112 ramc0: ramc@ffffe800 {
113 compatible = "atmel,at91sam9g45-ddramc";
114 reg = <0xffffe800 0x200>;
115 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
116 clock-names = "ddrck";
117 };
118
119 smc: smc@ffffea00 {
120 compatible = "atmel,at91sam9260-smc", "syscon";
121 reg = <0xffffea00 0x200>;
122 };
123
124 pmc: pmc@fffffc00 {
125 compatible = "atmel,at91sam9x5-pmc", "syscon";
126 reg = <0xfffffc00 0x200>;
127 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
128 #clock-cells = <2>;
129 clocks = <&clk32k>, <&main_xtal>;
130 clock-names = "slow_clk", "main_xtal";
131 };
132
133 reset_controller: rstc@fffffe00 {
134 compatible = "atmel,at91sam9g45-rstc";
135 reg = <0xfffffe00 0x10>;
136 clocks = <&clk32k>;
137 };
138
139 shutdown_controller: shdwc@fffffe10 {
140 compatible = "atmel,at91sam9x5-shdwc";
141 reg = <0xfffffe10 0x10>;
142 clocks = <&clk32k>;
143 };
144
145 pit: timer@fffffe30 {
146 compatible = "atmel,at91sam9260-pit";
147 reg = <0xfffffe30 0xf>;
148 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
149 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
150 };
151
152 clk32k: sckc@fffffe50 {
153 compatible = "atmel,at91sam9x5-sckc";
154 reg = <0xfffffe50 0x4>;
155 clocks = <&slow_xtal>;
156 #clock-cells = <0>;
157 };
158
159 tcb0: timer@f8008000 {
160 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
161 #address-cells = <1>;
162 #size-cells = <0>;
163 reg = <0xf8008000 0x100>;
164 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
165 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
166 clock-names = "t0_clk", "slow_clk";
167 };
168
169 tcb1: timer@f800c000 {
170 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
171 #address-cells = <1>;
172 #size-cells = <0>;
173 reg = <0xf800c000 0x100>;
174 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
175 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
176 clock-names = "t0_clk", "slow_clk";
177 };
178
179 dma0: dma-controller@ffffec00 {
180 compatible = "atmel,at91sam9g45-dma";
181 reg = <0xffffec00 0x200>;
182 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
183 #dma-cells = <2>;
184 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
185 clock-names = "dma_clk";
186 };
187
188 dma1: dma-controller@ffffee00 {
189 compatible = "atmel,at91sam9g45-dma";
190 reg = <0xffffee00 0x200>;
191 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
192 #dma-cells = <2>;
193 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
194 clock-names = "dma_clk";
195 };
196
197 pinctrl: pinctrl@fffff400 {
198 #address-cells = <1>;
199 #size-cells = <1>;
200 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
201 ranges = <0xfffff400 0xfffff400 0x800>;
202
203 /* shared pinctrl settings */
204 dbgu {
205 pinctrl_dbgu: dbgu-0 {
206 atmel,pins =
207 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
208 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
209 };
210 };
211
212 ebi {
213 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
214 atmel,pins =
215 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
216 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
217 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
218 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
219 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
220 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
221 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
222 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
223 };
224
225 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
226 atmel,pins =
227 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
228 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
229 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
230 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
231 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
232 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
233 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
234 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
235 };
236
237 pinctrl_ebi_addr_nand: ebi-addr-0 {
238 atmel,pins =
239 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
240 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
241 };
242 };
243
244 usart0 {
245 pinctrl_usart0: usart0-0 {
246 atmel,pins =
247 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
248 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
249 };
250
251 pinctrl_usart0_rts: usart0_rts-0 {
252 atmel,pins =
253 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
254 };
255
256 pinctrl_usart0_cts: usart0_cts-0 {
257 atmel,pins =
258 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
259 };
260
261 pinctrl_usart0_sck: usart0_sck-0 {
262 atmel,pins =
263 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
264 };
265 };
266
267 usart1 {
268 pinctrl_usart1: usart1-0 {
269 atmel,pins =
270 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
271 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
272 };
273
274 pinctrl_usart1_rts: usart1_rts-0 {
275 atmel,pins =
276 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
277 };
278
279 pinctrl_usart1_cts: usart1_cts-0 {
280 atmel,pins =
281 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
282 };
283
284 pinctrl_usart1_sck: usart1_sck-0 {
285 atmel,pins =
286 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
287 };
288 };
289
290 usart2 {
291 pinctrl_usart2: usart2-0 {
292 atmel,pins =
293 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
294 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
295 };
296
297 pinctrl_usart2_rts: usart2_rts-0 {
298 atmel,pins =
299 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
300 };
301
302 pinctrl_usart2_cts: usart2_cts-0 {
303 atmel,pins =
304 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
305 };
306
307 pinctrl_usart2_sck: usart2_sck-0 {
308 atmel,pins =
309 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
310 };
311 };
312
313 uart0 {
314 pinctrl_uart0: uart0-0 {
315 atmel,pins =
316 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
317 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
318 };
319 };
320
321 uart1 {
322 pinctrl_uart1: uart1-0 {
323 atmel,pins =
324 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
325 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
326 };
327 };
328
329 nand {
330 pinctrl_nand_oe_we: nand-oe-we-0 {
331 atmel,pins =
332 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
333 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
334 };
335
336 pinctrl_nand_rb: nand-rb-0 {
337 atmel,pins =
338 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
339 };
340
341 pinctrl_nand_cs: nand-cs-0 {
342 atmel,pins =
343 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
344 };
345 };
346
347 mmc0 {
348 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
349 atmel,pins =
350 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
351 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
352 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
353 };
354
355 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
356 atmel,pins =
357 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
358 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
359 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
360 };
361 };
362
363 mmc1 {
364 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
365 atmel,pins =
366 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
367 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
368 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
369 };
370
371 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
372 atmel,pins =
373 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
374 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
375 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
376 };
377 };
378
379 ssc0 {
380 pinctrl_ssc0_tx: ssc0_tx-0 {
381 atmel,pins =
382 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
383 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
384 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
385 };
386
387 pinctrl_ssc0_rx: ssc0_rx-0 {
388 atmel,pins =
389 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
390 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
391 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
392 };
393 };
394
395 spi0 {
396 pinctrl_spi0: spi0-0 {
397 atmel,pins =
398 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
399 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
400 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
401 };
402 };
403
404 spi1 {
405 pinctrl_spi1: spi1-0 {
406 atmel,pins =
407 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
408 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
409 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
410 };
411 };
412
413 i2c0 {
414 pinctrl_i2c0: i2c0-0 {
415 atmel,pins =
416 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
417 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
418 };
419 };
420
421 i2c1 {
422 pinctrl_i2c1: i2c1-0 {
423 atmel,pins =
424 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
425 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
426 };
427 };
428
429 i2c2 {
430 pinctrl_i2c2: i2c2-0 {
431 atmel,pins =
432 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
433 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
434 };
435 };
436
437 i2c_gpio0 {
438 pinctrl_i2c_gpio0: i2c_gpio0-0 {
439 atmel,pins =
440 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
441 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
442 };
443 };
444
445 i2c_gpio1 {
446 pinctrl_i2c_gpio1: i2c_gpio1-0 {
447 atmel,pins =
448 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
449 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
450 };
451 };
452
453 i2c_gpio2 {
454 pinctrl_i2c_gpio2: i2c_gpio2-0 {
455 atmel,pins =
456 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
457 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
458 };
459 };
460
461 pwm0 {
462 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
463 atmel,pins =
464 <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
465 };
466 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
467 atmel,pins =
468 <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
469 };
470 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
471 atmel,pins =
472 <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
473 };
474
475 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
476 atmel,pins =
477 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
478 };
479 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
480 atmel,pins =
481 <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
482 };
483 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
484 atmel,pins =
485 <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
486 };
487
488 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
489 atmel,pins =
490 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
491 };
492 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
493 atmel,pins =
494 <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
495 };
496
497 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
498 atmel,pins =
499 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500 };
501 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
502 atmel,pins =
503 <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
504 };
505 };
506
507 tcb0 {
508 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
509 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
510 };
511
512 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
513 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
514 };
515
516 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
517 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
518 };
519
520 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
521 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
522 };
523
524 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
525 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
526 };
527
528 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
529 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
530 };
531
532 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
533 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
534 };
535
536 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
537 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
538 };
539
540 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
541 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
542 };
543 };
544
545 tcb1 {
546 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
547 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
548 };
549
550 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
551 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
552 };
553
554 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
555 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
556 };
557
558 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
559 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
560 };
561
562 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
563 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
564 };
565
566 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
567 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
568 };
569
570 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
571 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
572 };
573
574 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
575 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
576 };
577
578 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
579 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
580 };
581 };
582
583 pioA: gpio@fffff400 {
584 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
585 reg = <0xfffff400 0x200>;
586 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
587 #gpio-cells = <2>;
588 gpio-controller;
589 interrupt-controller;
590 #interrupt-cells = <2>;
591 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
592 };
593
594 pioB: gpio@fffff600 {
595 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
596 reg = <0xfffff600 0x200>;
597 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
598 #gpio-cells = <2>;
599 gpio-controller;
600 #gpio-lines = <19>;
601 interrupt-controller;
602 #interrupt-cells = <2>;
603 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
604 };
605
606 pioC: gpio@fffff800 {
607 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
608 reg = <0xfffff800 0x200>;
609 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
610 #gpio-cells = <2>;
611 gpio-controller;
612 interrupt-controller;
613 #interrupt-cells = <2>;
614 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
615 };
616
617 pioD: gpio@fffffa00 {
618 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
619 reg = <0xfffffa00 0x200>;
620 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
621 #gpio-cells = <2>;
622 gpio-controller;
623 #gpio-lines = <22>;
624 interrupt-controller;
625 #interrupt-cells = <2>;
626 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
627 };
628 };
629
630 ssc0: ssc@f0010000 {
631 compatible = "atmel,at91sam9g45-ssc";
632 reg = <0xf0010000 0x4000>;
633 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
634 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
635 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
636 dma-names = "tx", "rx";
637 pinctrl-names = "default";
638 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
639 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
640 clock-names = "pclk";
641 status = "disabled";
642 };
643
644 mmc0: mmc@f0008000 {
645 compatible = "atmel,hsmci";
646 reg = <0xf0008000 0x600>;
647 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
648 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
649 dma-names = "rxtx";
650 pinctrl-names = "default";
651 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
652 clock-names = "mci_clk";
653 #address-cells = <1>;
654 #size-cells = <0>;
655 status = "disabled";
656 };
657
658 mmc1: mmc@f000c000 {
659 compatible = "atmel,hsmci";
660 reg = <0xf000c000 0x600>;
661 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
662 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
663 dma-names = "rxtx";
664 pinctrl-names = "default";
665 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
666 clock-names = "mci_clk";
667 #address-cells = <1>;
668 #size-cells = <0>;
669 status = "disabled";
670 };
671
672 dbgu: serial@fffff200 {
673 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
674 reg = <0xfffff200 0x200>;
675 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
676 pinctrl-names = "default";
677 pinctrl-0 = <&pinctrl_dbgu>;
678 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
679 <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
680 dma-names = "tx", "rx";
681 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
682 clock-names = "usart";
683 status = "disabled";
684 };
685
686 usart0: serial@f801c000 {
687 compatible = "atmel,at91sam9260-usart";
688 reg = <0xf801c000 0x200>;
689 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
690 pinctrl-names = "default";
691 pinctrl-0 = <&pinctrl_usart0>;
692 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
693 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
694 dma-names = "tx", "rx";
695 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
696 clock-names = "usart";
697 status = "disabled";
698 };
699
700 usart1: serial@f8020000 {
701 compatible = "atmel,at91sam9260-usart";
702 reg = <0xf8020000 0x200>;
703 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
704 pinctrl-names = "default";
705 pinctrl-0 = <&pinctrl_usart1>;
706 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
707 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
708 dma-names = "tx", "rx";
709 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
710 clock-names = "usart";
711 status = "disabled";
712 };
713
714 usart2: serial@f8024000 {
715 compatible = "atmel,at91sam9260-usart";
716 reg = <0xf8024000 0x200>;
717 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
718 pinctrl-names = "default";
719 pinctrl-0 = <&pinctrl_usart2>;
720 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
721 <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
722 dma-names = "tx", "rx";
723 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
724 clock-names = "usart";
725 status = "disabled";
726 };
727
728 i2c0: i2c@f8010000 {
729 compatible = "atmel,at91sam9x5-i2c";
730 reg = <0xf8010000 0x100>;
731 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
732 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
733 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
734 dma-names = "tx", "rx";
735 #address-cells = <1>;
736 #size-cells = <0>;
737 pinctrl-names = "default";
738 pinctrl-0 = <&pinctrl_i2c0>;
739 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
740 status = "disabled";
741 };
742
743 i2c1: i2c@f8014000 {
744 compatible = "atmel,at91sam9x5-i2c";
745 reg = <0xf8014000 0x100>;
746 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
747 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
748 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
749 dma-names = "tx", "rx";
750 #address-cells = <1>;
751 #size-cells = <0>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&pinctrl_i2c1>;
754 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
755 status = "disabled";
756 };
757
758 i2c2: i2c@f8018000 {
759 compatible = "atmel,at91sam9x5-i2c";
760 reg = <0xf8018000 0x100>;
761 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
762 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
763 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
764 dma-names = "tx", "rx";
765 #address-cells = <1>;
766 #size-cells = <0>;
767 pinctrl-names = "default";
768 pinctrl-0 = <&pinctrl_i2c2>;
769 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
770 status = "disabled";
771 };
772
773 uart0: serial@f8040000 {
774 compatible = "atmel,at91sam9260-usart";
775 reg = <0xf8040000 0x200>;
776 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
777 pinctrl-names = "default";
778 pinctrl-0 = <&pinctrl_uart0>;
779 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
780 clock-names = "usart";
781 status = "disabled";
782 };
783
784 uart1: serial@f8044000 {
785 compatible = "atmel,at91sam9260-usart";
786 reg = <0xf8044000 0x200>;
787 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
788 pinctrl-names = "default";
789 pinctrl-0 = <&pinctrl_uart1>;
790 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
791 clock-names = "usart";
792 status = "disabled";
793 };
794
795 adc0: adc@f804c000 {
796 #address-cells = <1>;
797 #size-cells = <0>;
798 compatible = "atmel,at91sam9x5-adc";
799 reg = <0xf804c000 0x100>;
800 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
801 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
802 <&adc_op_clk>;
803 clock-names = "adc_clk", "adc_op_clk";
804 atmel,adc-use-external-triggers;
805 atmel,adc-channels-used = <0xffff>;
806 atmel,adc-vref = <3300>;
807 atmel,adc-startup-time = <40>;
808 atmel,adc-sample-hold-time = <11>;
809 atmel,adc-res = <8 10>;
810 atmel,adc-res-names = "lowres", "highres";
811 atmel,adc-use-res = "highres";
812
813 trigger0 {
814 trigger-name = "external-rising";
815 trigger-value = <0x1>;
816 trigger-external;
817 };
818
819 trigger1 {
820 trigger-name = "external-falling";
821 trigger-value = <0x2>;
822 trigger-external;
823 };
824
825 trigger2 {
826 trigger-name = "external-any";
827 trigger-value = <0x3>;
828 trigger-external;
829 };
830
831 trigger3 {
832 trigger-name = "continuous";
833 trigger-value = <0x6>;
834 };
835 };
836
837 spi0: spi@f0000000 {
838 #address-cells = <1>;
839 #size-cells = <0>;
840 compatible = "atmel,at91rm9200-spi";
841 reg = <0xf0000000 0x100>;
842 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
843 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
844 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
845 dma-names = "tx", "rx";
846 pinctrl-names = "default";
847 pinctrl-0 = <&pinctrl_spi0>;
848 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
849 clock-names = "spi_clk";
850 status = "disabled";
851 };
852
853 spi1: spi@f0004000 {
854 #address-cells = <1>;
855 #size-cells = <0>;
856 compatible = "atmel,at91rm9200-spi";
857 reg = <0xf0004000 0x100>;
858 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
859 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
860 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
861 dma-names = "tx", "rx";
862 pinctrl-names = "default";
863 pinctrl-0 = <&pinctrl_spi1>;
864 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
865 clock-names = "spi_clk";
866 status = "disabled";
867 };
868
869 usb2: gadget@f803c000 {
870 #address-cells = <1>;
871 #size-cells = <0>;
872 compatible = "atmel,at91sam9g45-udc";
873 reg = <0x00500000 0x80000
874 0xf803c000 0x400>;
875 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
876 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
877 clock-names = "hclk", "pclk";
878 status = "disabled";
879
880 ep@0 {
881 reg = <0>;
882 atmel,fifo-size = <64>;
883 atmel,nb-banks = <1>;
884 };
885
886 ep@1 {
887 reg = <1>;
888 atmel,fifo-size = <1024>;
889 atmel,nb-banks = <2>;
890 atmel,can-dma;
891 atmel,can-isoc;
892 };
893
894 ep@2 {
895 reg = <2>;
896 atmel,fifo-size = <1024>;
897 atmel,nb-banks = <2>;
898 atmel,can-dma;
899 atmel,can-isoc;
900 };
901
902 ep@3 {
903 reg = <3>;
904 atmel,fifo-size = <1024>;
905 atmel,nb-banks = <3>;
906 atmel,can-dma;
907 };
908
909 ep@4 {
910 reg = <4>;
911 atmel,fifo-size = <1024>;
912 atmel,nb-banks = <3>;
913 atmel,can-dma;
914 };
915
916 ep@5 {
917 reg = <5>;
918 atmel,fifo-size = <1024>;
919 atmel,nb-banks = <3>;
920 atmel,can-dma;
921 atmel,can-isoc;
922 };
923
924 ep@6 {
925 reg = <6>;
926 atmel,fifo-size = <1024>;
927 atmel,nb-banks = <3>;
928 atmel,can-dma;
929 atmel,can-isoc;
930 };
931 };
932
933 watchdog: watchdog@fffffe40 {
934 compatible = "atmel,at91sam9260-wdt";
935 reg = <0xfffffe40 0x10>;
936 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
937 clocks = <&clk32k>;
938 atmel,watchdog-type = "hardware";
939 atmel,reset-type = "all";
940 atmel,dbg-halt;
941 status = "disabled";
942 };
943
944 rtc: rtc@fffffeb0 {
945 compatible = "atmel,at91sam9x5-rtc";
946 reg = <0xfffffeb0 0x40>;
947 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
948 clocks = <&clk32k>;
949 status = "disabled";
950 };
951
952 pwm0: pwm@f8034000 {
953 compatible = "atmel,at91sam9rl-pwm";
954 reg = <0xf8034000 0x300>;
955 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
956 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
957 #pwm-cells = <3>;
958 status = "disabled";
959 };
960 };
961
962 usb0: ohci@600000 {
963 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
964 reg = <0x00600000 0x100000>;
965 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
966 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
967 clock-names = "ohci_clk", "hclk", "uhpck";
968 status = "disabled";
969 };
970
971 usb1: ehci@700000 {
972 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
973 reg = <0x00700000 0x100000>;
974 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
975 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
976 clock-names = "usb_clk", "ehci_clk";
977 status = "disabled";
978 };
979
980 ebi: ebi@10000000 {
981 compatible = "atmel,at91sam9x5-ebi";
982 #address-cells = <2>;
983 #size-cells = <1>;
984 atmel,smc = <&smc>;
985 atmel,matrix = <&matrix>;
986 reg = <0x10000000 0x60000000>;
987 ranges = <0x0 0x0 0x10000000 0x10000000
988 0x1 0x0 0x20000000 0x10000000
989 0x2 0x0 0x30000000 0x10000000
990 0x3 0x0 0x40000000 0x10000000
991 0x4 0x0 0x50000000 0x10000000
992 0x5 0x0 0x60000000 0x10000000>;
993 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
994 status = "disabled";
995
996 nand_controller: nand-controller {
997 compatible = "atmel,at91sam9g45-nand-controller";
998 ecc-engine = <&pmecc>;
999 #address-cells = <2>;
1000 #size-cells = <1>;
1001 ranges;
1002 status = "disabled";
1003 };
1004 };
1005 };
1006
1007 i2c-gpio-0 {
1008 compatible = "i2c-gpio";
1009 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1010 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1011 >;
1012 i2c-gpio,sda-open-drain;
1013 i2c-gpio,scl-open-drain;
1014 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1015 #address-cells = <1>;
1016 #size-cells = <0>;
1017 pinctrl-names = "default";
1018 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1019 status = "disabled";
1020 };
1021
1022 i2c-gpio-1 {
1023 compatible = "i2c-gpio";
1024 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1025 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1026 >;
1027 i2c-gpio,sda-open-drain;
1028 i2c-gpio,scl-open-drain;
1029 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1030 #address-cells = <1>;
1031 #size-cells = <0>;
1032 pinctrl-names = "default";
1033 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1034 status = "disabled";
1035 };
1036
1037 i2c-gpio-2 {
1038 compatible = "i2c-gpio";
1039 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1040 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1041 >;
1042 i2c-gpio,sda-open-drain;
1043 i2c-gpio,scl-open-drain;
1044 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1045 #address-cells = <1>;
1046 #size-cells = <0>;
1047 pinctrl-names = "default";
1048 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1049 status = "disabled";
1050 };
1051};