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1/*
2 * Copyright(c) 2015 - 2017 Intel Corporation.
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47#ifndef _HFI1_MAD_H
48#define _HFI1_MAD_H
49
50#include <rdma/ib_pma.h>
51#include <rdma/opa_smi.h>
52#include <rdma/opa_port_info.h>
53#include "opa_compat.h"
54
55/*
56 * OPA Traps
57 */
58#define OPA_TRAP_GID_NOW_IN_SERVICE cpu_to_be16(64)
59#define OPA_TRAP_GID_OUT_OF_SERVICE cpu_to_be16(65)
60#define OPA_TRAP_ADD_MULTICAST_GROUP cpu_to_be16(66)
61#define OPA_TRAL_DEL_MULTICAST_GROUP cpu_to_be16(67)
62#define OPA_TRAP_UNPATH cpu_to_be16(68)
63#define OPA_TRAP_REPATH cpu_to_be16(69)
64#define OPA_TRAP_PORT_CHANGE_STATE cpu_to_be16(128)
65#define OPA_TRAP_LINK_INTEGRITY cpu_to_be16(129)
66#define OPA_TRAP_EXCESSIVE_BUFFER_OVERRUN cpu_to_be16(130)
67#define OPA_TRAP_FLOW_WATCHDOG cpu_to_be16(131)
68#define OPA_TRAP_CHANGE_CAPABILITY cpu_to_be16(144)
69#define OPA_TRAP_CHANGE_SYSGUID cpu_to_be16(145)
70#define OPA_TRAP_BAD_M_KEY cpu_to_be16(256)
71#define OPA_TRAP_BAD_P_KEY cpu_to_be16(257)
72#define OPA_TRAP_BAD_Q_KEY cpu_to_be16(258)
73#define OPA_TRAP_SWITCH_BAD_PKEY cpu_to_be16(259)
74#define OPA_SMA_TRAP_DATA_LINK_WIDTH cpu_to_be16(2048)
75
76/*
77 * Generic trap/notice other local changes flags (trap 144).
78 */
79#define OPA_NOTICE_TRAP_LWDE_CHG 0x08 /* Link Width Downgrade Enable
80 * changed
81 */
82#define OPA_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */
83#define OPA_NOTICE_TRAP_LWE_CHG 0x02 /* Link Width Enable changed */
84#define OPA_NOTICE_TRAP_NODE_DESC_CHG 0x01
85
86struct opa_mad_notice_attr {
87 u8 generic_type;
88 u8 prod_type_msb;
89 __be16 prod_type_lsb;
90 __be16 trap_num;
91 __be16 toggle_count;
92 __be32 issuer_lid;
93 __be32 reserved1;
94 union ib_gid issuer_gid;
95
96 union {
97 struct {
98 u8 details[64];
99 } raw_data;
100
101 struct {
102 union ib_gid gid;
103 } __packed ntc_64_65_66_67;
104
105 struct {
106 __be32 lid;
107 } __packed ntc_128;
108
109 struct {
110 __be32 lid; /* where violation happened */
111 u8 port_num; /* where violation happened */
112 } __packed ntc_129_130_131;
113
114 struct {
115 __be32 lid; /* LID where change occurred */
116 __be32 new_cap_mask; /* new capability mask */
117 __be16 reserved2;
118 __be16 cap_mask3;
119 __be16 change_flags; /* low 4 bits only */
120 } __packed ntc_144;
121
122 struct {
123 __be64 new_sys_guid;
124 __be32 lid; /* lid where sys guid changed */
125 } __packed ntc_145;
126
127 struct {
128 __be32 lid;
129 __be32 dr_slid;
130 u8 method;
131 u8 dr_trunc_hop;
132 __be16 attr_id;
133 __be32 attr_mod;
134 __be64 mkey;
135 u8 dr_rtn_path[30];
136 } __packed ntc_256;
137
138 struct {
139 __be32 lid1;
140 __be32 lid2;
141 __be32 key;
142 u8 sl; /* SL: high 5 bits */
143 u8 reserved3[3];
144 union ib_gid gid1;
145 union ib_gid gid2;
146 __be32 qp1; /* high 8 bits reserved */
147 __be32 qp2; /* high 8 bits reserved */
148 } __packed ntc_257_258;
149
150 struct {
151 __be16 flags; /* low 8 bits reserved */
152 __be16 pkey;
153 __be32 lid1;
154 __be32 lid2;
155 u8 sl; /* SL: high 5 bits */
156 u8 reserved4[3];
157 union ib_gid gid1;
158 union ib_gid gid2;
159 __be32 qp1; /* high 8 bits reserved */
160 __be32 qp2; /* high 8 bits reserved */
161 } __packed ntc_259;
162
163 struct {
164 __be32 lid;
165 } __packed ntc_2048;
166
167 };
168 u8 class_data[];
169};
170
171#define IB_VLARB_LOWPRI_0_31 1
172#define IB_VLARB_LOWPRI_32_63 2
173#define IB_VLARB_HIGHPRI_0_31 3
174#define IB_VLARB_HIGHPRI_32_63 4
175
176#define OPA_MAX_PREEMPT_CAP 32
177#define OPA_VLARB_LOW_ELEMENTS 0
178#define OPA_VLARB_HIGH_ELEMENTS 1
179#define OPA_VLARB_PREEMPT_ELEMENTS 2
180#define OPA_VLARB_PREEMPT_MATRIX 3
181
182#define IB_PMA_PORT_COUNTERS_CONG cpu_to_be16(0xFF00)
183#define LINK_SPEED_25G 1
184#define LINK_SPEED_12_5G 2
185#define LINK_WIDTH_DEFAULT 4
186#define DECIMAL_FACTORING 1000
187/*
188 * The default link width is multiplied by 1000
189 * to get accurate value after division.
190 */
191#define FACTOR_LINK_WIDTH (LINK_WIDTH_DEFAULT * DECIMAL_FACTORING)
192
193struct ib_pma_portcounters_cong {
194 u8 reserved;
195 u8 reserved1;
196 __be16 port_check_rate;
197 __be16 symbol_error_counter;
198 u8 link_error_recovery_counter;
199 u8 link_downed_counter;
200 __be16 port_rcv_errors;
201 __be16 port_rcv_remphys_errors;
202 __be16 port_rcv_switch_relay_errors;
203 __be16 port_xmit_discards;
204 u8 port_xmit_constraint_errors;
205 u8 port_rcv_constraint_errors;
206 u8 reserved2;
207 u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
208 __be16 reserved3;
209 __be16 vl15_dropped;
210 __be64 port_xmit_data;
211 __be64 port_rcv_data;
212 __be64 port_xmit_packets;
213 __be64 port_rcv_packets;
214 __be64 port_xmit_wait;
215 __be64 port_adr_events;
216} __packed;
217
218#define IB_SMP_UNSUP_VERSION cpu_to_be16(0x0004)
219#define IB_SMP_UNSUP_METHOD cpu_to_be16(0x0008)
220#define IB_SMP_UNSUP_METH_ATTR cpu_to_be16(0x000C)
221#define IB_SMP_INVALID_FIELD cpu_to_be16(0x001C)
222
223#define OPA_MAX_PREEMPT_CAP 32
224#define OPA_VLARB_LOW_ELEMENTS 0
225#define OPA_VLARB_HIGH_ELEMENTS 1
226#define OPA_VLARB_PREEMPT_ELEMENTS 2
227#define OPA_VLARB_PREEMPT_MATRIX 3
228
229#define HFI1_XMIT_RATE_UNSUPPORTED 0x0
230#define HFI1_XMIT_RATE_PICO 0x7
231/* number of 4nsec cycles equaling 2secs */
232#define HFI1_CONG_TIMER_PSINTERVAL 0x1DCD64EC
233
234#define IB_CC_SVCTYPE_RC 0x0
235#define IB_CC_SVCTYPE_UC 0x1
236#define IB_CC_SVCTYPE_RD 0x2
237#define IB_CC_SVCTYPE_UD 0x3
238
239/*
240 * There should be an equivalent IB #define for the following, but
241 * I cannot find it.
242 */
243#define OPA_CC_LOG_TYPE_HFI 2
244
245struct opa_hfi1_cong_log_event_internal {
246 u32 lqpn;
247 u32 rqpn;
248 u8 sl;
249 u8 svc_type;
250 u32 rlid;
251 u64 timestamp; /* wider than 32 bits to detect 32 bit rollover */
252};
253
254struct opa_hfi1_cong_log_event {
255 u8 local_qp_cn_entry[3];
256 u8 remote_qp_number_cn_entry[3];
257 u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */
258 u8 reserved;
259 __be32 remote_lid_cn_entry;
260 __be32 timestamp_cn_entry;
261} __packed;
262
263#define OPA_CONG_LOG_ELEMS 96
264
265struct opa_hfi1_cong_log {
266 u8 log_type;
267 u8 congestion_flags;
268 __be16 threshold_event_counter;
269 __be32 current_time_stamp;
270 u8 threshold_cong_event_map[OPA_MAX_SLS / 8];
271 struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS];
272} __packed;
273
274#define IB_CC_TABLE_CAP_DEFAULT 31
275
276/* Port control flags */
277#define IB_CC_CCS_PC_SL_BASED 0x01
278
279struct opa_congestion_setting_entry {
280 u8 ccti_increase;
281 u8 reserved;
282 __be16 ccti_timer;
283 u8 trigger_threshold;
284 u8 ccti_min; /* min CCTI for cc table */
285} __packed;
286
287struct opa_congestion_setting_entry_shadow {
288 u8 ccti_increase;
289 u8 reserved;
290 u16 ccti_timer;
291 u8 trigger_threshold;
292 u8 ccti_min; /* min CCTI for cc table */
293} __packed;
294
295struct opa_congestion_setting_attr {
296 __be32 control_map;
297 __be16 port_control;
298 struct opa_congestion_setting_entry entries[OPA_MAX_SLS];
299} __packed;
300
301struct opa_congestion_setting_attr_shadow {
302 u32 control_map;
303 u16 port_control;
304 struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS];
305} __packed;
306
307#define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
308#define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
309
310/* 64 Congestion Control table entries in a single MAD */
311#define IB_CCT_ENTRIES 64
312#define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
313
314struct ib_cc_table_entry {
315 __be16 entry; /* shift:2, multiplier:14 */
316};
317
318struct ib_cc_table_entry_shadow {
319 u16 entry; /* shift:2, multiplier:14 */
320};
321
322struct ib_cc_table_attr {
323 __be16 ccti_limit; /* max CCTI for cc table */
324 struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
325} __packed;
326
327struct ib_cc_table_attr_shadow {
328 u16 ccti_limit; /* max CCTI for cc table */
329 struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
330} __packed;
331
332#define CC_TABLE_SHADOW_MAX \
333 (IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
334
335struct cc_table_shadow {
336 u16 ccti_limit; /* max CCTI for cc table */
337 struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
338} __packed;
339
340/*
341 * struct cc_state combines the (active) per-port congestion control
342 * table, and the (active) per-SL congestion settings. cc_state data
343 * may need to be read in code paths that we want to be fast, so it
344 * is an RCU protected structure.
345 */
346struct cc_state {
347 struct rcu_head rcu;
348 struct cc_table_shadow cct;
349 struct opa_congestion_setting_attr_shadow cong_setting;
350};
351
352/*
353 * OPA BufferControl MAD
354 */
355
356/* attribute modifier macros */
357#define OPA_AM_NPORT_SHIFT 24
358#define OPA_AM_NPORT_MASK 0xff
359#define OPA_AM_NPORT_SMASK (OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT)
360#define OPA_AM_NPORT(am) (((am) >> OPA_AM_NPORT_SHIFT) & \
361 OPA_AM_NPORT_MASK)
362
363#define OPA_AM_NBLK_SHIFT 24
364#define OPA_AM_NBLK_MASK 0xff
365#define OPA_AM_NBLK_SMASK (OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT)
366#define OPA_AM_NBLK(am) (((am) >> OPA_AM_NBLK_SHIFT) & \
367 OPA_AM_NBLK_MASK)
368
369#define OPA_AM_START_BLK_SHIFT 0
370#define OPA_AM_START_BLK_MASK 0xff
371#define OPA_AM_START_BLK_SMASK (OPA_AM_START_BLK_MASK << \
372 OPA_AM_START_BLK_SHIFT)
373#define OPA_AM_START_BLK(am) (((am) >> OPA_AM_START_BLK_SHIFT) & \
374 OPA_AM_START_BLK_MASK)
375
376#define OPA_AM_PORTNUM_SHIFT 0
377#define OPA_AM_PORTNUM_MASK 0xff
378#define OPA_AM_PORTNUM_SMASK (OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT)
379#define OPA_AM_PORTNUM(am) (((am) >> OPA_AM_PORTNUM_SHIFT) & \
380 OPA_AM_PORTNUM_MASK)
381
382#define OPA_AM_ASYNC_SHIFT 12
383#define OPA_AM_ASYNC_MASK 0x1
384#define OPA_AM_ASYNC_SMASK (OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT)
385#define OPA_AM_ASYNC(am) (((am) >> OPA_AM_ASYNC_SHIFT) & \
386 OPA_AM_ASYNC_MASK)
387
388#define OPA_AM_START_SM_CFG_SHIFT 9
389#define OPA_AM_START_SM_CFG_MASK 0x1
390#define OPA_AM_START_SM_CFG_SMASK (OPA_AM_START_SM_CFG_MASK << \
391 OPA_AM_START_SM_CFG_SHIFT)
392#define OPA_AM_START_SM_CFG(am) (((am) >> OPA_AM_START_SM_CFG_SHIFT) \
393 & OPA_AM_START_SM_CFG_MASK)
394
395#define OPA_AM_CI_ADDR_SHIFT 19
396#define OPA_AM_CI_ADDR_MASK 0xfff
397#define OPA_AM_CI_ADDR_SMASK (OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT)
398#define OPA_AM_CI_ADDR(am) (((am) >> OPA_AM_CI_ADDR_SHIFT) & \
399 OPA_AM_CI_ADDR_MASK)
400
401#define OPA_AM_CI_LEN_SHIFT 13
402#define OPA_AM_CI_LEN_MASK 0x3f
403#define OPA_AM_CI_LEN_SMASK (OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT)
404#define OPA_AM_CI_LEN(am) (((am) >> OPA_AM_CI_LEN_SHIFT) & \
405 OPA_AM_CI_LEN_MASK)
406
407/* error info macros */
408#define OPA_EI_STATUS_SMASK 0x80
409#define OPA_EI_CODE_SMASK 0x0f
410
411struct vl_limit {
412 __be16 dedicated;
413 __be16 shared;
414};
415
416struct buffer_control {
417 __be16 reserved;
418 __be16 overall_shared_limit;
419 struct vl_limit vl[OPA_MAX_VLS];
420};
421
422struct sc2vlnt {
423 u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */
424};
425
426/*
427 * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
428 * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
429 * We support 5 counters which only count the mandatory quantities.
430 */
431#define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
432#define COUNTER_MASK0_9 \
433 cpu_to_be32(COUNTER_MASK(1, 0) | \
434 COUNTER_MASK(1, 1) | \
435 COUNTER_MASK(1, 2) | \
436 COUNTER_MASK(1, 3) | \
437 COUNTER_MASK(1, 4))
438
439void hfi1_event_pkey_change(struct hfi1_devdata *dd, u32 port);
440void hfi1_handle_trap_timer(struct timer_list *t);
441u16 tx_link_width(u16 link_width);
442u64 get_xmit_wait_counters(struct hfi1_pportdata *ppd, u16 link_width,
443 u16 link_speed, int vl);
444/**
445 * get_link_speed - determine whether 12.5G or 25G speed
446 * @link_speed: the speed of active link
447 * @return: Return 2 if link speed identified as 12.5G
448 * or return 1 if link speed is 25G.
449 *
450 * The function indirectly calculate required link speed
451 * value for convert_xmit_counter function. If the link
452 * speed is 25G, the function return as 1 as it is required
453 * by xmit counter conversion formula :-( 25G / link_speed).
454 * This conversion will provide value 1 if current
455 * link speed is 25G or 2 if 12.5G.This is done to avoid
456 * 12.5 float number conversion.
457 */
458static inline u16 get_link_speed(u16 link_speed)
459{
460 return (link_speed == 1) ?
461 LINK_SPEED_12_5G : LINK_SPEED_25G;
462}
463
464/**
465 * convert_xmit_counter - calculate flit times for given xmit counter
466 * value
467 * @xmit_wait_val: current xmit counter value
468 * @link_width: width of active link
469 * @link_speed: speed of active link
470 * @return: return xmit counter value in flit times.
471 */
472static inline u64 convert_xmit_counter(u64 xmit_wait_val, u16 link_width,
473 u16 link_speed)
474{
475 return (xmit_wait_val * 2 * (FACTOR_LINK_WIDTH / link_width)
476 * link_speed) / DECIMAL_FACTORING;
477}
478#endif /* _HFI1_MAD_H */
1/*
2 * Copyright(c) 2015 - 2017 Intel Corporation.
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47#ifndef _HFI1_MAD_H
48#define _HFI1_MAD_H
49
50#include <rdma/ib_pma.h>
51#include <rdma/opa_smi.h>
52#include <rdma/opa_port_info.h>
53#include "opa_compat.h"
54
55/*
56 * OPA Traps
57 */
58#define OPA_TRAP_GID_NOW_IN_SERVICE cpu_to_be16(64)
59#define OPA_TRAP_GID_OUT_OF_SERVICE cpu_to_be16(65)
60#define OPA_TRAP_ADD_MULTICAST_GROUP cpu_to_be16(66)
61#define OPA_TRAL_DEL_MULTICAST_GROUP cpu_to_be16(67)
62#define OPA_TRAP_UNPATH cpu_to_be16(68)
63#define OPA_TRAP_REPATH cpu_to_be16(69)
64#define OPA_TRAP_PORT_CHANGE_STATE cpu_to_be16(128)
65#define OPA_TRAP_LINK_INTEGRITY cpu_to_be16(129)
66#define OPA_TRAP_EXCESSIVE_BUFFER_OVERRUN cpu_to_be16(130)
67#define OPA_TRAP_FLOW_WATCHDOG cpu_to_be16(131)
68#define OPA_TRAP_CHANGE_CAPABILITY cpu_to_be16(144)
69#define OPA_TRAP_CHANGE_SYSGUID cpu_to_be16(145)
70#define OPA_TRAP_BAD_M_KEY cpu_to_be16(256)
71#define OPA_TRAP_BAD_P_KEY cpu_to_be16(257)
72#define OPA_TRAP_BAD_Q_KEY cpu_to_be16(258)
73#define OPA_TRAP_SWITCH_BAD_PKEY cpu_to_be16(259)
74#define OPA_SMA_TRAP_DATA_LINK_WIDTH cpu_to_be16(2048)
75
76/*
77 * Generic trap/notice other local changes flags (trap 144).
78 */
79#define OPA_NOTICE_TRAP_LWDE_CHG 0x08 /* Link Width Downgrade Enable
80 * changed
81 */
82#define OPA_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */
83#define OPA_NOTICE_TRAP_LWE_CHG 0x02 /* Link Width Enable changed */
84#define OPA_NOTICE_TRAP_NODE_DESC_CHG 0x01
85
86struct opa_mad_notice_attr {
87 u8 generic_type;
88 u8 prod_type_msb;
89 __be16 prod_type_lsb;
90 __be16 trap_num;
91 __be16 toggle_count;
92 __be32 issuer_lid;
93 __be32 reserved1;
94 union ib_gid issuer_gid;
95
96 union {
97 struct {
98 u8 details[64];
99 } raw_data;
100
101 struct {
102 union ib_gid gid;
103 } __packed ntc_64_65_66_67;
104
105 struct {
106 __be32 lid;
107 } __packed ntc_128;
108
109 struct {
110 __be32 lid; /* where violation happened */
111 u8 port_num; /* where violation happened */
112 } __packed ntc_129_130_131;
113
114 struct {
115 __be32 lid; /* LID where change occurred */
116 __be32 new_cap_mask; /* new capability mask */
117 __be16 reserved2;
118 __be16 cap_mask3;
119 __be16 change_flags; /* low 4 bits only */
120 } __packed ntc_144;
121
122 struct {
123 __be64 new_sys_guid;
124 __be32 lid; /* lid where sys guid changed */
125 } __packed ntc_145;
126
127 struct {
128 __be32 lid;
129 __be32 dr_slid;
130 u8 method;
131 u8 dr_trunc_hop;
132 __be16 attr_id;
133 __be32 attr_mod;
134 __be64 mkey;
135 u8 dr_rtn_path[30];
136 } __packed ntc_256;
137
138 struct {
139 __be32 lid1;
140 __be32 lid2;
141 __be32 key;
142 u8 sl; /* SL: high 5 bits */
143 u8 reserved3[3];
144 union ib_gid gid1;
145 union ib_gid gid2;
146 __be32 qp1; /* high 8 bits reserved */
147 __be32 qp2; /* high 8 bits reserved */
148 } __packed ntc_257_258;
149
150 struct {
151 __be16 flags; /* low 8 bits reserved */
152 __be16 pkey;
153 __be32 lid1;
154 __be32 lid2;
155 u8 sl; /* SL: high 5 bits */
156 u8 reserved4[3];
157 union ib_gid gid1;
158 union ib_gid gid2;
159 __be32 qp1; /* high 8 bits reserved */
160 __be32 qp2; /* high 8 bits reserved */
161 } __packed ntc_259;
162
163 struct {
164 __be32 lid;
165 } __packed ntc_2048;
166
167 };
168 u8 class_data[0];
169};
170
171#define IB_VLARB_LOWPRI_0_31 1
172#define IB_VLARB_LOWPRI_32_63 2
173#define IB_VLARB_HIGHPRI_0_31 3
174#define IB_VLARB_HIGHPRI_32_63 4
175
176#define OPA_MAX_PREEMPT_CAP 32
177#define OPA_VLARB_LOW_ELEMENTS 0
178#define OPA_VLARB_HIGH_ELEMENTS 1
179#define OPA_VLARB_PREEMPT_ELEMENTS 2
180#define OPA_VLARB_PREEMPT_MATRIX 3
181
182#define IB_PMA_PORT_COUNTERS_CONG cpu_to_be16(0xFF00)
183#define LINK_SPEED_25G 1
184#define LINK_SPEED_12_5G 2
185#define LINK_WIDTH_DEFAULT 4
186#define DECIMAL_FACTORING 1000
187/*
188 * The default link width is multiplied by 1000
189 * to get accurate value after division.
190 */
191#define FACTOR_LINK_WIDTH (LINK_WIDTH_DEFAULT * DECIMAL_FACTORING)
192
193struct ib_pma_portcounters_cong {
194 u8 reserved;
195 u8 reserved1;
196 __be16 port_check_rate;
197 __be16 symbol_error_counter;
198 u8 link_error_recovery_counter;
199 u8 link_downed_counter;
200 __be16 port_rcv_errors;
201 __be16 port_rcv_remphys_errors;
202 __be16 port_rcv_switch_relay_errors;
203 __be16 port_xmit_discards;
204 u8 port_xmit_constraint_errors;
205 u8 port_rcv_constraint_errors;
206 u8 reserved2;
207 u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
208 __be16 reserved3;
209 __be16 vl15_dropped;
210 __be64 port_xmit_data;
211 __be64 port_rcv_data;
212 __be64 port_xmit_packets;
213 __be64 port_rcv_packets;
214 __be64 port_xmit_wait;
215 __be64 port_adr_events;
216} __packed;
217
218#define IB_SMP_UNSUP_VERSION cpu_to_be16(0x0004)
219#define IB_SMP_UNSUP_METHOD cpu_to_be16(0x0008)
220#define IB_SMP_UNSUP_METH_ATTR cpu_to_be16(0x000C)
221#define IB_SMP_INVALID_FIELD cpu_to_be16(0x001C)
222
223#define OPA_MAX_PREEMPT_CAP 32
224#define OPA_VLARB_LOW_ELEMENTS 0
225#define OPA_VLARB_HIGH_ELEMENTS 1
226#define OPA_VLARB_PREEMPT_ELEMENTS 2
227#define OPA_VLARB_PREEMPT_MATRIX 3
228
229#define HFI1_XMIT_RATE_UNSUPPORTED 0x0
230#define HFI1_XMIT_RATE_PICO 0x7
231/* number of 4nsec cycles equaling 2secs */
232#define HFI1_CONG_TIMER_PSINTERVAL 0x1DCD64EC
233
234#define IB_CC_SVCTYPE_RC 0x0
235#define IB_CC_SVCTYPE_UC 0x1
236#define IB_CC_SVCTYPE_RD 0x2
237#define IB_CC_SVCTYPE_UD 0x3
238
239/*
240 * There should be an equivalent IB #define for the following, but
241 * I cannot find it.
242 */
243#define OPA_CC_LOG_TYPE_HFI 2
244
245struct opa_hfi1_cong_log_event_internal {
246 u32 lqpn;
247 u32 rqpn;
248 u8 sl;
249 u8 svc_type;
250 u32 rlid;
251 u64 timestamp; /* wider than 32 bits to detect 32 bit rollover */
252};
253
254struct opa_hfi1_cong_log_event {
255 u8 local_qp_cn_entry[3];
256 u8 remote_qp_number_cn_entry[3];
257 u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */
258 u8 reserved;
259 __be32 remote_lid_cn_entry;
260 __be32 timestamp_cn_entry;
261} __packed;
262
263#define OPA_CONG_LOG_ELEMS 96
264
265struct opa_hfi1_cong_log {
266 u8 log_type;
267 u8 congestion_flags;
268 __be16 threshold_event_counter;
269 __be32 current_time_stamp;
270 u8 threshold_cong_event_map[OPA_MAX_SLS / 8];
271 struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS];
272} __packed;
273
274#define IB_CC_TABLE_CAP_DEFAULT 31
275
276/* Port control flags */
277#define IB_CC_CCS_PC_SL_BASED 0x01
278
279struct opa_congestion_setting_entry {
280 u8 ccti_increase;
281 u8 reserved;
282 __be16 ccti_timer;
283 u8 trigger_threshold;
284 u8 ccti_min; /* min CCTI for cc table */
285} __packed;
286
287struct opa_congestion_setting_entry_shadow {
288 u8 ccti_increase;
289 u8 reserved;
290 u16 ccti_timer;
291 u8 trigger_threshold;
292 u8 ccti_min; /* min CCTI for cc table */
293} __packed;
294
295struct opa_congestion_setting_attr {
296 __be32 control_map;
297 __be16 port_control;
298 struct opa_congestion_setting_entry entries[OPA_MAX_SLS];
299} __packed;
300
301struct opa_congestion_setting_attr_shadow {
302 u32 control_map;
303 u16 port_control;
304 struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS];
305} __packed;
306
307#define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
308#define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
309
310/* 64 Congestion Control table entries in a single MAD */
311#define IB_CCT_ENTRIES 64
312#define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
313
314struct ib_cc_table_entry {
315 __be16 entry; /* shift:2, multiplier:14 */
316};
317
318struct ib_cc_table_entry_shadow {
319 u16 entry; /* shift:2, multiplier:14 */
320};
321
322struct ib_cc_table_attr {
323 __be16 ccti_limit; /* max CCTI for cc table */
324 struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
325} __packed;
326
327struct ib_cc_table_attr_shadow {
328 u16 ccti_limit; /* max CCTI for cc table */
329 struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
330} __packed;
331
332#define CC_TABLE_SHADOW_MAX \
333 (IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
334
335struct cc_table_shadow {
336 u16 ccti_limit; /* max CCTI for cc table */
337 struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
338} __packed;
339
340/*
341 * struct cc_state combines the (active) per-port congestion control
342 * table, and the (active) per-SL congestion settings. cc_state data
343 * may need to be read in code paths that we want to be fast, so it
344 * is an RCU protected structure.
345 */
346struct cc_state {
347 struct rcu_head rcu;
348 struct cc_table_shadow cct;
349 struct opa_congestion_setting_attr_shadow cong_setting;
350};
351
352/*
353 * OPA BufferControl MAD
354 */
355
356/* attribute modifier macros */
357#define OPA_AM_NPORT_SHIFT 24
358#define OPA_AM_NPORT_MASK 0xff
359#define OPA_AM_NPORT_SMASK (OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT)
360#define OPA_AM_NPORT(am) (((am) >> OPA_AM_NPORT_SHIFT) & \
361 OPA_AM_NPORT_MASK)
362
363#define OPA_AM_NBLK_SHIFT 24
364#define OPA_AM_NBLK_MASK 0xff
365#define OPA_AM_NBLK_SMASK (OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT)
366#define OPA_AM_NBLK(am) (((am) >> OPA_AM_NBLK_SHIFT) & \
367 OPA_AM_NBLK_MASK)
368
369#define OPA_AM_START_BLK_SHIFT 0
370#define OPA_AM_START_BLK_MASK 0xff
371#define OPA_AM_START_BLK_SMASK (OPA_AM_START_BLK_MASK << \
372 OPA_AM_START_BLK_SHIFT)
373#define OPA_AM_START_BLK(am) (((am) >> OPA_AM_START_BLK_SHIFT) & \
374 OPA_AM_START_BLK_MASK)
375
376#define OPA_AM_PORTNUM_SHIFT 0
377#define OPA_AM_PORTNUM_MASK 0xff
378#define OPA_AM_PORTNUM_SMASK (OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT)
379#define OPA_AM_PORTNUM(am) (((am) >> OPA_AM_PORTNUM_SHIFT) & \
380 OPA_AM_PORTNUM_MASK)
381
382#define OPA_AM_ASYNC_SHIFT 12
383#define OPA_AM_ASYNC_MASK 0x1
384#define OPA_AM_ASYNC_SMASK (OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT)
385#define OPA_AM_ASYNC(am) (((am) >> OPA_AM_ASYNC_SHIFT) & \
386 OPA_AM_ASYNC_MASK)
387
388#define OPA_AM_START_SM_CFG_SHIFT 9
389#define OPA_AM_START_SM_CFG_MASK 0x1
390#define OPA_AM_START_SM_CFG_SMASK (OPA_AM_START_SM_CFG_MASK << \
391 OPA_AM_START_SM_CFG_SHIFT)
392#define OPA_AM_START_SM_CFG(am) (((am) >> OPA_AM_START_SM_CFG_SHIFT) \
393 & OPA_AM_START_SM_CFG_MASK)
394
395#define OPA_AM_CI_ADDR_SHIFT 19
396#define OPA_AM_CI_ADDR_MASK 0xfff
397#define OPA_AM_CI_ADDR_SMASK (OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT)
398#define OPA_AM_CI_ADDR(am) (((am) >> OPA_AM_CI_ADDR_SHIFT) & \
399 OPA_AM_CI_ADDR_MASK)
400
401#define OPA_AM_CI_LEN_SHIFT 13
402#define OPA_AM_CI_LEN_MASK 0x3f
403#define OPA_AM_CI_LEN_SMASK (OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT)
404#define OPA_AM_CI_LEN(am) (((am) >> OPA_AM_CI_LEN_SHIFT) & \
405 OPA_AM_CI_LEN_MASK)
406
407/* error info macros */
408#define OPA_EI_STATUS_SMASK 0x80
409#define OPA_EI_CODE_SMASK 0x0f
410
411struct vl_limit {
412 __be16 dedicated;
413 __be16 shared;
414};
415
416struct buffer_control {
417 __be16 reserved;
418 __be16 overall_shared_limit;
419 struct vl_limit vl[OPA_MAX_VLS];
420};
421
422struct sc2vlnt {
423 u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */
424};
425
426/*
427 * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
428 * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
429 * We support 5 counters which only count the mandatory quantities.
430 */
431#define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
432#define COUNTER_MASK0_9 \
433 cpu_to_be32(COUNTER_MASK(1, 0) | \
434 COUNTER_MASK(1, 1) | \
435 COUNTER_MASK(1, 2) | \
436 COUNTER_MASK(1, 3) | \
437 COUNTER_MASK(1, 4))
438
439void hfi1_event_pkey_change(struct hfi1_devdata *dd, u8 port);
440void hfi1_handle_trap_timer(struct timer_list *t);
441u16 tx_link_width(u16 link_width);
442u64 get_xmit_wait_counters(struct hfi1_pportdata *ppd, u16 link_width,
443 u16 link_speed, int vl);
444/**
445 * get_link_speed - determine whether 12.5G or 25G speed
446 * @link_speed: the speed of active link
447 * @return: Return 2 if link speed identified as 12.5G
448 * or return 1 if link speed is 25G.
449 *
450 * The function indirectly calculate required link speed
451 * value for convert_xmit_counter function. If the link
452 * speed is 25G, the function return as 1 as it is required
453 * by xmit counter conversion formula :-( 25G / link_speed).
454 * This conversion will provide value 1 if current
455 * link speed is 25G or 2 if 12.5G.This is done to avoid
456 * 12.5 float number conversion.
457 */
458static inline u16 get_link_speed(u16 link_speed)
459{
460 return (link_speed == 1) ?
461 LINK_SPEED_12_5G : LINK_SPEED_25G;
462}
463
464/**
465 * convert_xmit_counter - calculate flit times for given xmit counter
466 * value
467 * @xmit_wait_val: current xmit counter value
468 * @link_width: width of active link
469 * @link_speed: speed of active link
470 * @return: return xmit counter value in flit times.
471 */
472static inline u64 convert_xmit_counter(u64 xmit_wait_val, u16 link_width,
473 u16 link_speed)
474{
475 return (xmit_wait_val * 2 * (FACTOR_LINK_WIDTH / link_width)
476 * link_speed) / DECIMAL_FACTORING;
477}
478#endif /* _HFI1_MAD_H */