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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Testsuite for atomic64_t functions
4 *
5 * Copyright © 2010 Luca Barbieri
6 */
7
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10#include <linux/init.h>
11#include <linux/bug.h>
12#include <linux/kernel.h>
13#include <linux/atomic.h>
14#include <linux/module.h>
15
16#ifdef CONFIG_X86
17#include <asm/cpufeature.h> /* for boot_cpu_has below */
18#endif
19
20#define TEST(bit, op, c_op, val) \
21do { \
22 atomic##bit##_set(&v, v0); \
23 r = v0; \
24 atomic##bit##_##op(val, &v); \
25 r c_op val; \
26 WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
27 (unsigned long long)atomic##bit##_read(&v), \
28 (unsigned long long)r); \
29} while (0)
30
31/*
32 * Test for a atomic operation family,
33 * @test should be a macro accepting parameters (bit, op, ...)
34 */
35
36#define FAMILY_TEST(test, bit, op, args...) \
37do { \
38 test(bit, op, ##args); \
39 test(bit, op##_acquire, ##args); \
40 test(bit, op##_release, ##args); \
41 test(bit, op##_relaxed, ##args); \
42} while (0)
43
44#define TEST_RETURN(bit, op, c_op, val) \
45do { \
46 atomic##bit##_set(&v, v0); \
47 r = v0; \
48 r c_op val; \
49 BUG_ON(atomic##bit##_##op(val, &v) != r); \
50 BUG_ON(atomic##bit##_read(&v) != r); \
51} while (0)
52
53#define TEST_FETCH(bit, op, c_op, val) \
54do { \
55 atomic##bit##_set(&v, v0); \
56 r = v0; \
57 r c_op val; \
58 BUG_ON(atomic##bit##_##op(val, &v) != v0); \
59 BUG_ON(atomic##bit##_read(&v) != r); \
60} while (0)
61
62#define RETURN_FAMILY_TEST(bit, op, c_op, val) \
63do { \
64 FAMILY_TEST(TEST_RETURN, bit, op, c_op, val); \
65} while (0)
66
67#define FETCH_FAMILY_TEST(bit, op, c_op, val) \
68do { \
69 FAMILY_TEST(TEST_FETCH, bit, op, c_op, val); \
70} while (0)
71
72#define TEST_ARGS(bit, op, init, ret, expect, args...) \
73do { \
74 atomic##bit##_set(&v, init); \
75 BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \
76 BUG_ON(atomic##bit##_read(&v) != expect); \
77} while (0)
78
79#define XCHG_FAMILY_TEST(bit, init, new) \
80do { \
81 FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new); \
82} while (0)
83
84#define CMPXCHG_FAMILY_TEST(bit, init, new, wrong) \
85do { \
86 FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
87 init, init, new, init, new); \
88 FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
89 init, init, init, wrong, new); \
90} while (0)
91
92#define INC_RETURN_FAMILY_TEST(bit, i) \
93do { \
94 FAMILY_TEST(TEST_ARGS, bit, inc_return, \
95 i, (i) + one, (i) + one); \
96} while (0)
97
98#define DEC_RETURN_FAMILY_TEST(bit, i) \
99do { \
100 FAMILY_TEST(TEST_ARGS, bit, dec_return, \
101 i, (i) - one, (i) - one); \
102} while (0)
103
104static __init void test_atomic(void)
105{
106 int v0 = 0xaaa31337;
107 int v1 = 0xdeadbeef;
108 int onestwos = 0x11112222;
109 int one = 1;
110
111 atomic_t v;
112 int r;
113
114 TEST(, add, +=, onestwos);
115 TEST(, add, +=, -one);
116 TEST(, sub, -=, onestwos);
117 TEST(, sub, -=, -one);
118 TEST(, or, |=, v1);
119 TEST(, and, &=, v1);
120 TEST(, xor, ^=, v1);
121 TEST(, andnot, &= ~, v1);
122
123 RETURN_FAMILY_TEST(, add_return, +=, onestwos);
124 RETURN_FAMILY_TEST(, add_return, +=, -one);
125 RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
126 RETURN_FAMILY_TEST(, sub_return, -=, -one);
127
128 FETCH_FAMILY_TEST(, fetch_add, +=, onestwos);
129 FETCH_FAMILY_TEST(, fetch_add, +=, -one);
130 FETCH_FAMILY_TEST(, fetch_sub, -=, onestwos);
131 FETCH_FAMILY_TEST(, fetch_sub, -=, -one);
132
133 FETCH_FAMILY_TEST(, fetch_or, |=, v1);
134 FETCH_FAMILY_TEST(, fetch_and, &=, v1);
135 FETCH_FAMILY_TEST(, fetch_andnot, &= ~, v1);
136 FETCH_FAMILY_TEST(, fetch_xor, ^=, v1);
137
138 INC_RETURN_FAMILY_TEST(, v0);
139 DEC_RETURN_FAMILY_TEST(, v0);
140
141 XCHG_FAMILY_TEST(, v0, v1);
142 CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);
143
144}
145
146#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
147static __init void test_atomic64(void)
148{
149 long long v0 = 0xaaa31337c001d00dLL;
150 long long v1 = 0xdeadbeefdeafcafeLL;
151 long long v2 = 0xfaceabadf00df001LL;
152 long long v3 = 0x8000000000000000LL;
153 long long onestwos = 0x1111111122222222LL;
154 long long one = 1LL;
155 int r_int;
156
157 atomic64_t v = ATOMIC64_INIT(v0);
158 long long r = v0;
159 BUG_ON(v.counter != r);
160
161 atomic64_set(&v, v1);
162 r = v1;
163 BUG_ON(v.counter != r);
164 BUG_ON(atomic64_read(&v) != r);
165
166 TEST(64, add, +=, onestwos);
167 TEST(64, add, +=, -one);
168 TEST(64, sub, -=, onestwos);
169 TEST(64, sub, -=, -one);
170 TEST(64, or, |=, v1);
171 TEST(64, and, &=, v1);
172 TEST(64, xor, ^=, v1);
173 TEST(64, andnot, &= ~, v1);
174
175 RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
176 RETURN_FAMILY_TEST(64, add_return, +=, -one);
177 RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
178 RETURN_FAMILY_TEST(64, sub_return, -=, -one);
179
180 FETCH_FAMILY_TEST(64, fetch_add, +=, onestwos);
181 FETCH_FAMILY_TEST(64, fetch_add, +=, -one);
182 FETCH_FAMILY_TEST(64, fetch_sub, -=, onestwos);
183 FETCH_FAMILY_TEST(64, fetch_sub, -=, -one);
184
185 FETCH_FAMILY_TEST(64, fetch_or, |=, v1);
186 FETCH_FAMILY_TEST(64, fetch_and, &=, v1);
187 FETCH_FAMILY_TEST(64, fetch_andnot, &= ~, v1);
188 FETCH_FAMILY_TEST(64, fetch_xor, ^=, v1);
189
190 INIT(v0);
191 atomic64_inc(&v);
192 r += one;
193 BUG_ON(v.counter != r);
194
195 INIT(v0);
196 atomic64_dec(&v);
197 r -= one;
198 BUG_ON(v.counter != r);
199
200 INC_RETURN_FAMILY_TEST(64, v0);
201 DEC_RETURN_FAMILY_TEST(64, v0);
202
203 XCHG_FAMILY_TEST(64, v0, v1);
204 CMPXCHG_FAMILY_TEST(64, v0, v1, v2);
205
206 INIT(v0);
207 BUG_ON(atomic64_add_unless(&v, one, v0));
208 BUG_ON(v.counter != r);
209
210 INIT(v0);
211 BUG_ON(!atomic64_add_unless(&v, one, v1));
212 r += one;
213 BUG_ON(v.counter != r);
214
215 INIT(onestwos);
216 BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
217 r -= one;
218 BUG_ON(v.counter != r);
219
220 INIT(0);
221 BUG_ON(atomic64_dec_if_positive(&v) != -one);
222 BUG_ON(v.counter != r);
223
224 INIT(-one);
225 BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
226 BUG_ON(v.counter != r);
227
228 INIT(onestwos);
229 BUG_ON(!atomic64_inc_not_zero(&v));
230 r += one;
231 BUG_ON(v.counter != r);
232
233 INIT(0);
234 BUG_ON(atomic64_inc_not_zero(&v));
235 BUG_ON(v.counter != r);
236
237 INIT(-one);
238 BUG_ON(!atomic64_inc_not_zero(&v));
239 r += one;
240 BUG_ON(v.counter != r);
241
242 /* Confirm the return value fits in an int, even if the value doesn't */
243 INIT(v3);
244 r_int = atomic64_inc_not_zero(&v);
245 BUG_ON(!r_int);
246}
247
248static __init int test_atomics_init(void)
249{
250 test_atomic();
251 test_atomic64();
252
253#ifdef CONFIG_X86
254 pr_info("passed for %s platform %s CX8 and %s SSE\n",
255#ifdef CONFIG_X86_64
256 "x86-64",
257#elif defined(CONFIG_X86_CMPXCHG64)
258 "i586+",
259#else
260 "i386+",
261#endif
262 boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
263 boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
264#else
265 pr_info("passed\n");
266#endif
267
268 return 0;
269}
270
271static __exit void test_atomics_exit(void) {}
272
273module_init(test_atomics_init);
274module_exit(test_atomics_exit);
275
276MODULE_LICENSE("GPL");
1/*
2 * Testsuite for atomic64_t functions
3 *
4 * Copyright © 2010 Luca Barbieri
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/init.h>
15#include <linux/bug.h>
16#include <linux/kernel.h>
17#include <linux/atomic.h>
18
19#ifdef CONFIG_X86
20#include <asm/cpufeature.h> /* for boot_cpu_has below */
21#endif
22
23#define TEST(bit, op, c_op, val) \
24do { \
25 atomic##bit##_set(&v, v0); \
26 r = v0; \
27 atomic##bit##_##op(val, &v); \
28 r c_op val; \
29 WARN(atomic##bit##_read(&v) != r, "%Lx != %Lx\n", \
30 (unsigned long long)atomic##bit##_read(&v), \
31 (unsigned long long)r); \
32} while (0)
33
34/*
35 * Test for a atomic operation family,
36 * @test should be a macro accepting parameters (bit, op, ...)
37 */
38
39#define FAMILY_TEST(test, bit, op, args...) \
40do { \
41 test(bit, op, ##args); \
42 test(bit, op##_acquire, ##args); \
43 test(bit, op##_release, ##args); \
44 test(bit, op##_relaxed, ##args); \
45} while (0)
46
47#define TEST_RETURN(bit, op, c_op, val) \
48do { \
49 atomic##bit##_set(&v, v0); \
50 r = v0; \
51 r c_op val; \
52 BUG_ON(atomic##bit##_##op(val, &v) != r); \
53 BUG_ON(atomic##bit##_read(&v) != r); \
54} while (0)
55
56#define RETURN_FAMILY_TEST(bit, op, c_op, val) \
57do { \
58 FAMILY_TEST(TEST_RETURN, bit, op, c_op, val); \
59} while (0)
60
61#define TEST_ARGS(bit, op, init, ret, expect, args...) \
62do { \
63 atomic##bit##_set(&v, init); \
64 BUG_ON(atomic##bit##_##op(&v, ##args) != ret); \
65 BUG_ON(atomic##bit##_read(&v) != expect); \
66} while (0)
67
68#define XCHG_FAMILY_TEST(bit, init, new) \
69do { \
70 FAMILY_TEST(TEST_ARGS, bit, xchg, init, init, new, new); \
71} while (0)
72
73#define CMPXCHG_FAMILY_TEST(bit, init, new, wrong) \
74do { \
75 FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
76 init, init, new, init, new); \
77 FAMILY_TEST(TEST_ARGS, bit, cmpxchg, \
78 init, init, init, wrong, new); \
79} while (0)
80
81#define INC_RETURN_FAMILY_TEST(bit, i) \
82do { \
83 FAMILY_TEST(TEST_ARGS, bit, inc_return, \
84 i, (i) + one, (i) + one); \
85} while (0)
86
87#define DEC_RETURN_FAMILY_TEST(bit, i) \
88do { \
89 FAMILY_TEST(TEST_ARGS, bit, dec_return, \
90 i, (i) - one, (i) - one); \
91} while (0)
92
93static __init void test_atomic(void)
94{
95 int v0 = 0xaaa31337;
96 int v1 = 0xdeadbeef;
97 int onestwos = 0x11112222;
98 int one = 1;
99
100 atomic_t v;
101 int r;
102
103 TEST(, add, +=, onestwos);
104 TEST(, add, +=, -one);
105 TEST(, sub, -=, onestwos);
106 TEST(, sub, -=, -one);
107 TEST(, or, |=, v1);
108 TEST(, and, &=, v1);
109 TEST(, xor, ^=, v1);
110 TEST(, andnot, &= ~, v1);
111
112 RETURN_FAMILY_TEST(, add_return, +=, onestwos);
113 RETURN_FAMILY_TEST(, add_return, +=, -one);
114 RETURN_FAMILY_TEST(, sub_return, -=, onestwos);
115 RETURN_FAMILY_TEST(, sub_return, -=, -one);
116
117 INC_RETURN_FAMILY_TEST(, v0);
118 DEC_RETURN_FAMILY_TEST(, v0);
119
120 XCHG_FAMILY_TEST(, v0, v1);
121 CMPXCHG_FAMILY_TEST(, v0, v1, onestwos);
122
123}
124
125#define INIT(c) do { atomic64_set(&v, c); r = c; } while (0)
126static __init void test_atomic64(void)
127{
128 long long v0 = 0xaaa31337c001d00dLL;
129 long long v1 = 0xdeadbeefdeafcafeLL;
130 long long v2 = 0xfaceabadf00df001LL;
131 long long onestwos = 0x1111111122222222LL;
132 long long one = 1LL;
133
134 atomic64_t v = ATOMIC64_INIT(v0);
135 long long r = v0;
136 BUG_ON(v.counter != r);
137
138 atomic64_set(&v, v1);
139 r = v1;
140 BUG_ON(v.counter != r);
141 BUG_ON(atomic64_read(&v) != r);
142
143 TEST(64, add, +=, onestwos);
144 TEST(64, add, +=, -one);
145 TEST(64, sub, -=, onestwos);
146 TEST(64, sub, -=, -one);
147 TEST(64, or, |=, v1);
148 TEST(64, and, &=, v1);
149 TEST(64, xor, ^=, v1);
150 TEST(64, andnot, &= ~, v1);
151
152 RETURN_FAMILY_TEST(64, add_return, +=, onestwos);
153 RETURN_FAMILY_TEST(64, add_return, +=, -one);
154 RETURN_FAMILY_TEST(64, sub_return, -=, onestwos);
155 RETURN_FAMILY_TEST(64, sub_return, -=, -one);
156
157 INIT(v0);
158 atomic64_inc(&v);
159 r += one;
160 BUG_ON(v.counter != r);
161
162 INIT(v0);
163 atomic64_dec(&v);
164 r -= one;
165 BUG_ON(v.counter != r);
166
167 INC_RETURN_FAMILY_TEST(64, v0);
168 DEC_RETURN_FAMILY_TEST(64, v0);
169
170 XCHG_FAMILY_TEST(64, v0, v1);
171 CMPXCHG_FAMILY_TEST(64, v0, v1, v2);
172
173 INIT(v0);
174 BUG_ON(atomic64_add_unless(&v, one, v0));
175 BUG_ON(v.counter != r);
176
177 INIT(v0);
178 BUG_ON(!atomic64_add_unless(&v, one, v1));
179 r += one;
180 BUG_ON(v.counter != r);
181
182#ifdef CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
183 INIT(onestwos);
184 BUG_ON(atomic64_dec_if_positive(&v) != (onestwos - 1));
185 r -= one;
186 BUG_ON(v.counter != r);
187
188 INIT(0);
189 BUG_ON(atomic64_dec_if_positive(&v) != -one);
190 BUG_ON(v.counter != r);
191
192 INIT(-one);
193 BUG_ON(atomic64_dec_if_positive(&v) != (-one - one));
194 BUG_ON(v.counter != r);
195#else
196#warning Please implement atomic64_dec_if_positive for your architecture and select the above Kconfig symbol
197#endif
198
199 INIT(onestwos);
200 BUG_ON(!atomic64_inc_not_zero(&v));
201 r += one;
202 BUG_ON(v.counter != r);
203
204 INIT(0);
205 BUG_ON(atomic64_inc_not_zero(&v));
206 BUG_ON(v.counter != r);
207
208 INIT(-one);
209 BUG_ON(!atomic64_inc_not_zero(&v));
210 r += one;
211 BUG_ON(v.counter != r);
212}
213
214static __init int test_atomics(void)
215{
216 test_atomic();
217 test_atomic64();
218
219#ifdef CONFIG_X86
220 pr_info("passed for %s platform %s CX8 and %s SSE\n",
221#ifdef CONFIG_X86_64
222 "x86-64",
223#elif defined(CONFIG_X86_CMPXCHG64)
224 "i586+",
225#else
226 "i386+",
227#endif
228 boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
229 boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
230#else
231 pr_info("passed\n");
232#endif
233
234 return 0;
235}
236
237core_initcall(test_atomics);