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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 *
4 * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
5 *
6 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
7 * to use polling for flow control. TX empty IRQ is unusable, since
8 * writing conf clears FIFO buffer and we cannot have this interrupt
9 * always asking us for attention.
10 *
11 * Example platform data:
12
13 static struct plat_max3100 max3100_plat_data = {
14 .loopback = 0,
15 .crystal = 0,
16 .poll_time = 100,
17 };
18
19 static struct spi_board_info spi_board_info[] = {
20 {
21 .modalias = "max3100",
22 .platform_data = &max3100_plat_data,
23 .irq = IRQ_EINT12,
24 .max_speed_hz = 5*1000*1000,
25 .chip_select = 0,
26 },
27 };
28
29 * The initial minor number is 209 in the low-density serial port:
30 * mknod /dev/ttyMAX0 c 204 209
31 */
32
33#define MAX3100_MAJOR 204
34#define MAX3100_MINOR 209
35/* 4 MAX3100s should be enough for everyone */
36#define MAX_MAX3100 4
37
38#include <linux/delay.h>
39#include <linux/slab.h>
40#include <linux/device.h>
41#include <linux/module.h>
42#include <linux/serial_core.h>
43#include <linux/serial.h>
44#include <linux/spi/spi.h>
45#include <linux/freezer.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48
49#include <linux/serial_max3100.h>
50
51#define MAX3100_C (1<<14)
52#define MAX3100_D (0<<14)
53#define MAX3100_W (1<<15)
54#define MAX3100_RX (0<<15)
55
56#define MAX3100_WC (MAX3100_W | MAX3100_C)
57#define MAX3100_RC (MAX3100_RX | MAX3100_C)
58#define MAX3100_WD (MAX3100_W | MAX3100_D)
59#define MAX3100_RD (MAX3100_RX | MAX3100_D)
60#define MAX3100_CMD (3 << 14)
61
62#define MAX3100_T (1<<14)
63#define MAX3100_R (1<<15)
64
65#define MAX3100_FEN (1<<13)
66#define MAX3100_SHDN (1<<12)
67#define MAX3100_TM (1<<11)
68#define MAX3100_RM (1<<10)
69#define MAX3100_PM (1<<9)
70#define MAX3100_RAM (1<<8)
71#define MAX3100_IR (1<<7)
72#define MAX3100_ST (1<<6)
73#define MAX3100_PE (1<<5)
74#define MAX3100_L (1<<4)
75#define MAX3100_BAUD (0xf)
76
77#define MAX3100_TE (1<<10)
78#define MAX3100_RAFE (1<<10)
79#define MAX3100_RTS (1<<9)
80#define MAX3100_CTS (1<<9)
81#define MAX3100_PT (1<<8)
82#define MAX3100_DATA (0xff)
83
84#define MAX3100_RT (MAX3100_R | MAX3100_T)
85#define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
86
87/* the following simulate a status reg for ignore_status_mask */
88#define MAX3100_STATUS_PE 1
89#define MAX3100_STATUS_FE 2
90#define MAX3100_STATUS_OE 4
91
92struct max3100_port {
93 struct uart_port port;
94 struct spi_device *spi;
95
96 int cts; /* last CTS received for flow ctrl */
97 int tx_empty; /* last TX empty bit */
98
99 spinlock_t conf_lock; /* shared data */
100 int conf_commit; /* need to make changes */
101 int conf; /* configuration for the MAX31000
102 * (bits 0-7, bits 8-11 are irqs) */
103 int rts_commit; /* need to change rts */
104 int rts; /* rts status */
105 int baud; /* current baud rate */
106
107 int parity; /* keeps track if we should send parity */
108#define MAX3100_PARITY_ON 1
109#define MAX3100_PARITY_ODD 2
110#define MAX3100_7BIT 4
111 int rx_enabled; /* if we should rx chars */
112
113 int irq; /* irq assigned to the max3100 */
114
115 int minor; /* minor number */
116 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
117 int loopback; /* 1 if we are in loopback mode */
118
119 /* for handling irqs: need workqueue since we do spi_sync */
120 struct workqueue_struct *workqueue;
121 struct work_struct work;
122 /* set to 1 to make the workhandler exit as soon as possible */
123 int force_end_work;
124 /* need to know we are suspending to avoid deadlock on workqueue */
125 int suspending;
126
127 /* hook for suspending MAX3100 via dedicated pin */
128 void (*max3100_hw_suspend) (int suspend);
129
130 /* poll time (in ms) for ctrl lines */
131 int poll_time;
132 /* and its timer */
133 struct timer_list timer;
134};
135
136static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
137static DEFINE_MUTEX(max3100s_lock); /* race on probe */
138
139static int max3100_do_parity(struct max3100_port *s, u16 c)
140{
141 int parity;
142
143 if (s->parity & MAX3100_PARITY_ODD)
144 parity = 1;
145 else
146 parity = 0;
147
148 if (s->parity & MAX3100_7BIT)
149 c &= 0x7f;
150 else
151 c &= 0xff;
152
153 parity = parity ^ (hweight8(c) & 1);
154 return parity;
155}
156
157static int max3100_check_parity(struct max3100_port *s, u16 c)
158{
159 return max3100_do_parity(s, c) == ((c >> 8) & 1);
160}
161
162static void max3100_calc_parity(struct max3100_port *s, u16 *c)
163{
164 if (s->parity & MAX3100_7BIT)
165 *c &= 0x7f;
166 else
167 *c &= 0xff;
168
169 if (s->parity & MAX3100_PARITY_ON)
170 *c |= max3100_do_parity(s, *c) << 8;
171}
172
173static void max3100_work(struct work_struct *w);
174
175static void max3100_dowork(struct max3100_port *s)
176{
177 if (!s->force_end_work && !freezing(current) && !s->suspending)
178 queue_work(s->workqueue, &s->work);
179}
180
181static void max3100_timeout(struct timer_list *t)
182{
183 struct max3100_port *s = from_timer(s, t, timer);
184
185 if (s->port.state) {
186 max3100_dowork(s);
187 mod_timer(&s->timer, jiffies + s->poll_time);
188 }
189}
190
191static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
192{
193 struct spi_message message;
194 u16 etx, erx;
195 int status;
196 struct spi_transfer tran = {
197 .tx_buf = &etx,
198 .rx_buf = &erx,
199 .len = 2,
200 };
201
202 etx = cpu_to_be16(tx);
203 spi_message_init(&message);
204 spi_message_add_tail(&tran, &message);
205 status = spi_sync(s->spi, &message);
206 if (status) {
207 dev_warn(&s->spi->dev, "error while calling spi_sync\n");
208 return -EIO;
209 }
210 *rx = be16_to_cpu(erx);
211 s->tx_empty = (*rx & MAX3100_T) > 0;
212 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
213 return 0;
214}
215
216static int max3100_handlerx(struct max3100_port *s, u16 rx)
217{
218 unsigned int ch, flg, status = 0;
219 int ret = 0, cts;
220
221 if (rx & MAX3100_R && s->rx_enabled) {
222 dev_dbg(&s->spi->dev, "%s\n", __func__);
223 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
224 if (rx & MAX3100_RAFE) {
225 s->port.icount.frame++;
226 flg = TTY_FRAME;
227 status |= MAX3100_STATUS_FE;
228 } else {
229 if (s->parity & MAX3100_PARITY_ON) {
230 if (max3100_check_parity(s, rx)) {
231 s->port.icount.rx++;
232 flg = TTY_NORMAL;
233 } else {
234 s->port.icount.parity++;
235 flg = TTY_PARITY;
236 status |= MAX3100_STATUS_PE;
237 }
238 } else {
239 s->port.icount.rx++;
240 flg = TTY_NORMAL;
241 }
242 }
243 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
244 ret = 1;
245 }
246
247 cts = (rx & MAX3100_CTS) > 0;
248 if (s->cts != cts) {
249 s->cts = cts;
250 uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
251 }
252
253 return ret;
254}
255
256static void max3100_work(struct work_struct *w)
257{
258 struct max3100_port *s = container_of(w, struct max3100_port, work);
259 int rxchars;
260 u16 tx, rx;
261 int conf, cconf, crts;
262 struct circ_buf *xmit = &s->port.state->xmit;
263
264 dev_dbg(&s->spi->dev, "%s\n", __func__);
265
266 rxchars = 0;
267 do {
268 spin_lock(&s->conf_lock);
269 conf = s->conf;
270 cconf = s->conf_commit;
271 s->conf_commit = 0;
272 crts = s->rts_commit;
273 s->rts_commit = 0;
274 spin_unlock(&s->conf_lock);
275 if (cconf)
276 max3100_sr(s, MAX3100_WC | conf, &rx);
277 if (crts) {
278 max3100_sr(s, MAX3100_WD | MAX3100_TE |
279 (s->rts ? MAX3100_RTS : 0), &rx);
280 rxchars += max3100_handlerx(s, rx);
281 }
282
283 max3100_sr(s, MAX3100_RD, &rx);
284 rxchars += max3100_handlerx(s, rx);
285
286 if (rx & MAX3100_T) {
287 tx = 0xffff;
288 if (s->port.x_char) {
289 tx = s->port.x_char;
290 s->port.icount.tx++;
291 s->port.x_char = 0;
292 } else if (!uart_circ_empty(xmit) &&
293 !uart_tx_stopped(&s->port)) {
294 tx = xmit->buf[xmit->tail];
295 xmit->tail = (xmit->tail + 1) &
296 (UART_XMIT_SIZE - 1);
297 s->port.icount.tx++;
298 }
299 if (tx != 0xffff) {
300 max3100_calc_parity(s, &tx);
301 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
302 max3100_sr(s, tx, &rx);
303 rxchars += max3100_handlerx(s, rx);
304 }
305 }
306
307 if (rxchars > 16) {
308 tty_flip_buffer_push(&s->port.state->port);
309 rxchars = 0;
310 }
311 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
312 uart_write_wakeup(&s->port);
313
314 } while (!s->force_end_work &&
315 !freezing(current) &&
316 ((rx & MAX3100_R) ||
317 (!uart_circ_empty(xmit) &&
318 !uart_tx_stopped(&s->port))));
319
320 if (rxchars > 0)
321 tty_flip_buffer_push(&s->port.state->port);
322}
323
324static irqreturn_t max3100_irq(int irqno, void *dev_id)
325{
326 struct max3100_port *s = dev_id;
327
328 dev_dbg(&s->spi->dev, "%s\n", __func__);
329
330 max3100_dowork(s);
331 return IRQ_HANDLED;
332}
333
334static void max3100_enable_ms(struct uart_port *port)
335{
336 struct max3100_port *s = container_of(port,
337 struct max3100_port,
338 port);
339
340 if (s->poll_time > 0)
341 mod_timer(&s->timer, jiffies);
342 dev_dbg(&s->spi->dev, "%s\n", __func__);
343}
344
345static void max3100_start_tx(struct uart_port *port)
346{
347 struct max3100_port *s = container_of(port,
348 struct max3100_port,
349 port);
350
351 dev_dbg(&s->spi->dev, "%s\n", __func__);
352
353 max3100_dowork(s);
354}
355
356static void max3100_stop_rx(struct uart_port *port)
357{
358 struct max3100_port *s = container_of(port,
359 struct max3100_port,
360 port);
361
362 dev_dbg(&s->spi->dev, "%s\n", __func__);
363
364 s->rx_enabled = 0;
365 spin_lock(&s->conf_lock);
366 s->conf &= ~MAX3100_RM;
367 s->conf_commit = 1;
368 spin_unlock(&s->conf_lock);
369 max3100_dowork(s);
370}
371
372static unsigned int max3100_tx_empty(struct uart_port *port)
373{
374 struct max3100_port *s = container_of(port,
375 struct max3100_port,
376 port);
377
378 dev_dbg(&s->spi->dev, "%s\n", __func__);
379
380 /* may not be truly up-to-date */
381 max3100_dowork(s);
382 return s->tx_empty;
383}
384
385static unsigned int max3100_get_mctrl(struct uart_port *port)
386{
387 struct max3100_port *s = container_of(port,
388 struct max3100_port,
389 port);
390
391 dev_dbg(&s->spi->dev, "%s\n", __func__);
392
393 /* may not be truly up-to-date */
394 max3100_dowork(s);
395 /* always assert DCD and DSR since these lines are not wired */
396 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
397}
398
399static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
400{
401 struct max3100_port *s = container_of(port,
402 struct max3100_port,
403 port);
404 int rts;
405
406 dev_dbg(&s->spi->dev, "%s\n", __func__);
407
408 rts = (mctrl & TIOCM_RTS) > 0;
409
410 spin_lock(&s->conf_lock);
411 if (s->rts != rts) {
412 s->rts = rts;
413 s->rts_commit = 1;
414 max3100_dowork(s);
415 }
416 spin_unlock(&s->conf_lock);
417}
418
419static void
420max3100_set_termios(struct uart_port *port, struct ktermios *termios,
421 struct ktermios *old)
422{
423 struct max3100_port *s = container_of(port,
424 struct max3100_port,
425 port);
426 int baud = 0;
427 unsigned cflag;
428 u32 param_new, param_mask, parity = 0;
429
430 dev_dbg(&s->spi->dev, "%s\n", __func__);
431
432 cflag = termios->c_cflag;
433 param_mask = 0;
434
435 baud = tty_termios_baud_rate(termios);
436 param_new = s->conf & MAX3100_BAUD;
437 switch (baud) {
438 case 300:
439 if (s->crystal)
440 baud = s->baud;
441 else
442 param_new = 15;
443 break;
444 case 600:
445 param_new = 14 + s->crystal;
446 break;
447 case 1200:
448 param_new = 13 + s->crystal;
449 break;
450 case 2400:
451 param_new = 12 + s->crystal;
452 break;
453 case 4800:
454 param_new = 11 + s->crystal;
455 break;
456 case 9600:
457 param_new = 10 + s->crystal;
458 break;
459 case 19200:
460 param_new = 9 + s->crystal;
461 break;
462 case 38400:
463 param_new = 8 + s->crystal;
464 break;
465 case 57600:
466 param_new = 1 + s->crystal;
467 break;
468 case 115200:
469 param_new = 0 + s->crystal;
470 break;
471 case 230400:
472 if (s->crystal)
473 param_new = 0;
474 else
475 baud = s->baud;
476 break;
477 default:
478 baud = s->baud;
479 }
480 tty_termios_encode_baud_rate(termios, baud, baud);
481 s->baud = baud;
482 param_mask |= MAX3100_BAUD;
483
484 if ((cflag & CSIZE) == CS8) {
485 param_new &= ~MAX3100_L;
486 parity &= ~MAX3100_7BIT;
487 } else {
488 param_new |= MAX3100_L;
489 parity |= MAX3100_7BIT;
490 cflag = (cflag & ~CSIZE) | CS7;
491 }
492 param_mask |= MAX3100_L;
493
494 if (cflag & CSTOPB)
495 param_new |= MAX3100_ST;
496 else
497 param_new &= ~MAX3100_ST;
498 param_mask |= MAX3100_ST;
499
500 if (cflag & PARENB) {
501 param_new |= MAX3100_PE;
502 parity |= MAX3100_PARITY_ON;
503 } else {
504 param_new &= ~MAX3100_PE;
505 parity &= ~MAX3100_PARITY_ON;
506 }
507 param_mask |= MAX3100_PE;
508
509 if (cflag & PARODD)
510 parity |= MAX3100_PARITY_ODD;
511 else
512 parity &= ~MAX3100_PARITY_ODD;
513
514 /* mask termios capabilities we don't support */
515 cflag &= ~CMSPAR;
516 termios->c_cflag = cflag;
517
518 s->port.ignore_status_mask = 0;
519 if (termios->c_iflag & IGNPAR)
520 s->port.ignore_status_mask |=
521 MAX3100_STATUS_PE | MAX3100_STATUS_FE |
522 MAX3100_STATUS_OE;
523
524 if (s->poll_time > 0)
525 del_timer_sync(&s->timer);
526
527 uart_update_timeout(port, termios->c_cflag, baud);
528
529 spin_lock(&s->conf_lock);
530 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
531 s->conf_commit = 1;
532 s->parity = parity;
533 spin_unlock(&s->conf_lock);
534 max3100_dowork(s);
535
536 if (UART_ENABLE_MS(&s->port, termios->c_cflag))
537 max3100_enable_ms(&s->port);
538}
539
540static void max3100_shutdown(struct uart_port *port)
541{
542 struct max3100_port *s = container_of(port,
543 struct max3100_port,
544 port);
545
546 dev_dbg(&s->spi->dev, "%s\n", __func__);
547
548 if (s->suspending)
549 return;
550
551 s->force_end_work = 1;
552
553 if (s->poll_time > 0)
554 del_timer_sync(&s->timer);
555
556 if (s->workqueue) {
557 flush_workqueue(s->workqueue);
558 destroy_workqueue(s->workqueue);
559 s->workqueue = NULL;
560 }
561 if (s->irq)
562 free_irq(s->irq, s);
563
564 /* set shutdown mode to save power */
565 if (s->max3100_hw_suspend)
566 s->max3100_hw_suspend(1);
567 else {
568 u16 tx, rx;
569
570 tx = MAX3100_WC | MAX3100_SHDN;
571 max3100_sr(s, tx, &rx);
572 }
573}
574
575static int max3100_startup(struct uart_port *port)
576{
577 struct max3100_port *s = container_of(port,
578 struct max3100_port,
579 port);
580 char b[12];
581
582 dev_dbg(&s->spi->dev, "%s\n", __func__);
583
584 s->conf = MAX3100_RM;
585 s->baud = s->crystal ? 230400 : 115200;
586 s->rx_enabled = 1;
587
588 if (s->suspending)
589 return 0;
590
591 s->force_end_work = 0;
592 s->parity = 0;
593 s->rts = 0;
594
595 sprintf(b, "max3100-%d", s->minor);
596 s->workqueue = create_freezable_workqueue(b);
597 if (!s->workqueue) {
598 dev_warn(&s->spi->dev, "cannot create workqueue\n");
599 return -EBUSY;
600 }
601 INIT_WORK(&s->work, max3100_work);
602
603 if (request_irq(s->irq, max3100_irq,
604 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
605 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
606 s->irq = 0;
607 destroy_workqueue(s->workqueue);
608 s->workqueue = NULL;
609 return -EBUSY;
610 }
611
612 if (s->loopback) {
613 u16 tx, rx;
614 tx = 0x4001;
615 max3100_sr(s, tx, &rx);
616 }
617
618 if (s->max3100_hw_suspend)
619 s->max3100_hw_suspend(0);
620 s->conf_commit = 1;
621 max3100_dowork(s);
622 /* wait for clock to settle */
623 msleep(50);
624
625 max3100_enable_ms(&s->port);
626
627 return 0;
628}
629
630static const char *max3100_type(struct uart_port *port)
631{
632 struct max3100_port *s = container_of(port,
633 struct max3100_port,
634 port);
635
636 dev_dbg(&s->spi->dev, "%s\n", __func__);
637
638 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
639}
640
641static void max3100_release_port(struct uart_port *port)
642{
643 struct max3100_port *s = container_of(port,
644 struct max3100_port,
645 port);
646
647 dev_dbg(&s->spi->dev, "%s\n", __func__);
648}
649
650static void max3100_config_port(struct uart_port *port, int flags)
651{
652 struct max3100_port *s = container_of(port,
653 struct max3100_port,
654 port);
655
656 dev_dbg(&s->spi->dev, "%s\n", __func__);
657
658 if (flags & UART_CONFIG_TYPE)
659 s->port.type = PORT_MAX3100;
660}
661
662static int max3100_verify_port(struct uart_port *port,
663 struct serial_struct *ser)
664{
665 struct max3100_port *s = container_of(port,
666 struct max3100_port,
667 port);
668 int ret = -EINVAL;
669
670 dev_dbg(&s->spi->dev, "%s\n", __func__);
671
672 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
673 ret = 0;
674 return ret;
675}
676
677static void max3100_stop_tx(struct uart_port *port)
678{
679 struct max3100_port *s = container_of(port,
680 struct max3100_port,
681 port);
682
683 dev_dbg(&s->spi->dev, "%s\n", __func__);
684}
685
686static int max3100_request_port(struct uart_port *port)
687{
688 struct max3100_port *s = container_of(port,
689 struct max3100_port,
690 port);
691
692 dev_dbg(&s->spi->dev, "%s\n", __func__);
693 return 0;
694}
695
696static void max3100_break_ctl(struct uart_port *port, int break_state)
697{
698 struct max3100_port *s = container_of(port,
699 struct max3100_port,
700 port);
701
702 dev_dbg(&s->spi->dev, "%s\n", __func__);
703}
704
705static const struct uart_ops max3100_ops = {
706 .tx_empty = max3100_tx_empty,
707 .set_mctrl = max3100_set_mctrl,
708 .get_mctrl = max3100_get_mctrl,
709 .stop_tx = max3100_stop_tx,
710 .start_tx = max3100_start_tx,
711 .stop_rx = max3100_stop_rx,
712 .enable_ms = max3100_enable_ms,
713 .break_ctl = max3100_break_ctl,
714 .startup = max3100_startup,
715 .shutdown = max3100_shutdown,
716 .set_termios = max3100_set_termios,
717 .type = max3100_type,
718 .release_port = max3100_release_port,
719 .request_port = max3100_request_port,
720 .config_port = max3100_config_port,
721 .verify_port = max3100_verify_port,
722};
723
724static struct uart_driver max3100_uart_driver = {
725 .owner = THIS_MODULE,
726 .driver_name = "ttyMAX",
727 .dev_name = "ttyMAX",
728 .major = MAX3100_MAJOR,
729 .minor = MAX3100_MINOR,
730 .nr = MAX_MAX3100,
731};
732static int uart_driver_registered;
733
734static int max3100_probe(struct spi_device *spi)
735{
736 int i, retval;
737 struct plat_max3100 *pdata;
738 u16 tx, rx;
739
740 mutex_lock(&max3100s_lock);
741
742 if (!uart_driver_registered) {
743 uart_driver_registered = 1;
744 retval = uart_register_driver(&max3100_uart_driver);
745 if (retval) {
746 printk(KERN_ERR "Couldn't register max3100 uart driver\n");
747 mutex_unlock(&max3100s_lock);
748 return retval;
749 }
750 }
751
752 for (i = 0; i < MAX_MAX3100; i++)
753 if (!max3100s[i])
754 break;
755 if (i == MAX_MAX3100) {
756 dev_warn(&spi->dev, "too many MAX3100 chips\n");
757 mutex_unlock(&max3100s_lock);
758 return -ENOMEM;
759 }
760
761 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
762 if (!max3100s[i]) {
763 dev_warn(&spi->dev,
764 "kmalloc for max3100 structure %d failed!\n", i);
765 mutex_unlock(&max3100s_lock);
766 return -ENOMEM;
767 }
768 max3100s[i]->spi = spi;
769 max3100s[i]->irq = spi->irq;
770 spin_lock_init(&max3100s[i]->conf_lock);
771 spi_set_drvdata(spi, max3100s[i]);
772 pdata = dev_get_platdata(&spi->dev);
773 max3100s[i]->crystal = pdata->crystal;
774 max3100s[i]->loopback = pdata->loopback;
775 max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
776 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
777 max3100s[i]->poll_time = 1;
778 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
779 max3100s[i]->minor = i;
780 timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
781
782 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
783 max3100s[i]->port.irq = max3100s[i]->irq;
784 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
785 max3100s[i]->port.fifosize = 16;
786 max3100s[i]->port.ops = &max3100_ops;
787 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
788 max3100s[i]->port.line = i;
789 max3100s[i]->port.type = PORT_MAX3100;
790 max3100s[i]->port.dev = &spi->dev;
791 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
792 if (retval < 0)
793 dev_warn(&spi->dev,
794 "uart_add_one_port failed for line %d with error %d\n",
795 i, retval);
796
797 /* set shutdown mode to save power. Will be woken-up on open */
798 if (max3100s[i]->max3100_hw_suspend)
799 max3100s[i]->max3100_hw_suspend(1);
800 else {
801 tx = MAX3100_WC | MAX3100_SHDN;
802 max3100_sr(max3100s[i], tx, &rx);
803 }
804 mutex_unlock(&max3100s_lock);
805 return 0;
806}
807
808static int max3100_remove(struct spi_device *spi)
809{
810 struct max3100_port *s = spi_get_drvdata(spi);
811 int i;
812
813 mutex_lock(&max3100s_lock);
814
815 /* find out the index for the chip we are removing */
816 for (i = 0; i < MAX_MAX3100; i++)
817 if (max3100s[i] == s) {
818 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
819 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
820 kfree(max3100s[i]);
821 max3100s[i] = NULL;
822 break;
823 }
824
825 WARN_ON(i == MAX_MAX3100);
826
827 /* check if this is the last chip we have */
828 for (i = 0; i < MAX_MAX3100; i++)
829 if (max3100s[i]) {
830 mutex_unlock(&max3100s_lock);
831 return 0;
832 }
833 pr_debug("removing max3100 driver\n");
834 uart_unregister_driver(&max3100_uart_driver);
835
836 mutex_unlock(&max3100s_lock);
837 return 0;
838}
839
840#ifdef CONFIG_PM_SLEEP
841
842static int max3100_suspend(struct device *dev)
843{
844 struct max3100_port *s = dev_get_drvdata(dev);
845
846 dev_dbg(&s->spi->dev, "%s\n", __func__);
847
848 disable_irq(s->irq);
849
850 s->suspending = 1;
851 uart_suspend_port(&max3100_uart_driver, &s->port);
852
853 if (s->max3100_hw_suspend)
854 s->max3100_hw_suspend(1);
855 else {
856 /* no HW suspend, so do SW one */
857 u16 tx, rx;
858
859 tx = MAX3100_WC | MAX3100_SHDN;
860 max3100_sr(s, tx, &rx);
861 }
862 return 0;
863}
864
865static int max3100_resume(struct device *dev)
866{
867 struct max3100_port *s = dev_get_drvdata(dev);
868
869 dev_dbg(&s->spi->dev, "%s\n", __func__);
870
871 if (s->max3100_hw_suspend)
872 s->max3100_hw_suspend(0);
873 uart_resume_port(&max3100_uart_driver, &s->port);
874 s->suspending = 0;
875
876 enable_irq(s->irq);
877
878 s->conf_commit = 1;
879 if (s->workqueue)
880 max3100_dowork(s);
881
882 return 0;
883}
884
885static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
886#define MAX3100_PM_OPS (&max3100_pm_ops)
887
888#else
889#define MAX3100_PM_OPS NULL
890#endif
891
892static struct spi_driver max3100_driver = {
893 .driver = {
894 .name = "max3100",
895 .pm = MAX3100_PM_OPS,
896 },
897 .probe = max3100_probe,
898 .remove = max3100_remove,
899};
900
901module_spi_driver(max3100_driver);
902
903MODULE_DESCRIPTION("MAX3100 driver");
904MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
905MODULE_LICENSE("GPL");
906MODULE_ALIAS("spi:max3100");
1/*
2 *
3 * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 *
11 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
12 * to use polling for flow control. TX empty IRQ is unusable, since
13 * writing conf clears FIFO buffer and we cannot have this interrupt
14 * always asking us for attention.
15 *
16 * Example platform data:
17
18 static struct plat_max3100 max3100_plat_data = {
19 .loopback = 0,
20 .crystal = 0,
21 .poll_time = 100,
22 };
23
24 static struct spi_board_info spi_board_info[] = {
25 {
26 .modalias = "max3100",
27 .platform_data = &max3100_plat_data,
28 .irq = IRQ_EINT12,
29 .max_speed_hz = 5*1000*1000,
30 .chip_select = 0,
31 },
32 };
33
34 * The initial minor number is 209 in the low-density serial port:
35 * mknod /dev/ttyMAX0 c 204 209
36 */
37
38#define MAX3100_MAJOR 204
39#define MAX3100_MINOR 209
40/* 4 MAX3100s should be enough for everyone */
41#define MAX_MAX3100 4
42
43#include <linux/delay.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/module.h>
47#include <linux/serial_core.h>
48#include <linux/serial.h>
49#include <linux/spi/spi.h>
50#include <linux/freezer.h>
51#include <linux/tty.h>
52#include <linux/tty_flip.h>
53
54#include <linux/serial_max3100.h>
55
56#define MAX3100_C (1<<14)
57#define MAX3100_D (0<<14)
58#define MAX3100_W (1<<15)
59#define MAX3100_RX (0<<15)
60
61#define MAX3100_WC (MAX3100_W | MAX3100_C)
62#define MAX3100_RC (MAX3100_RX | MAX3100_C)
63#define MAX3100_WD (MAX3100_W | MAX3100_D)
64#define MAX3100_RD (MAX3100_RX | MAX3100_D)
65#define MAX3100_CMD (3 << 14)
66
67#define MAX3100_T (1<<14)
68#define MAX3100_R (1<<15)
69
70#define MAX3100_FEN (1<<13)
71#define MAX3100_SHDN (1<<12)
72#define MAX3100_TM (1<<11)
73#define MAX3100_RM (1<<10)
74#define MAX3100_PM (1<<9)
75#define MAX3100_RAM (1<<8)
76#define MAX3100_IR (1<<7)
77#define MAX3100_ST (1<<6)
78#define MAX3100_PE (1<<5)
79#define MAX3100_L (1<<4)
80#define MAX3100_BAUD (0xf)
81
82#define MAX3100_TE (1<<10)
83#define MAX3100_RAFE (1<<10)
84#define MAX3100_RTS (1<<9)
85#define MAX3100_CTS (1<<9)
86#define MAX3100_PT (1<<8)
87#define MAX3100_DATA (0xff)
88
89#define MAX3100_RT (MAX3100_R | MAX3100_T)
90#define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
91
92/* the following simulate a status reg for ignore_status_mask */
93#define MAX3100_STATUS_PE 1
94#define MAX3100_STATUS_FE 2
95#define MAX3100_STATUS_OE 4
96
97struct max3100_port {
98 struct uart_port port;
99 struct spi_device *spi;
100
101 int cts; /* last CTS received for flow ctrl */
102 int tx_empty; /* last TX empty bit */
103
104 spinlock_t conf_lock; /* shared data */
105 int conf_commit; /* need to make changes */
106 int conf; /* configuration for the MAX31000
107 * (bits 0-7, bits 8-11 are irqs) */
108 int rts_commit; /* need to change rts */
109 int rts; /* rts status */
110 int baud; /* current baud rate */
111
112 int parity; /* keeps track if we should send parity */
113#define MAX3100_PARITY_ON 1
114#define MAX3100_PARITY_ODD 2
115#define MAX3100_7BIT 4
116 int rx_enabled; /* if we should rx chars */
117
118 int irq; /* irq assigned to the max3100 */
119
120 int minor; /* minor number */
121 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
122 int loopback; /* 1 if we are in loopback mode */
123
124 /* for handling irqs: need workqueue since we do spi_sync */
125 struct workqueue_struct *workqueue;
126 struct work_struct work;
127 /* set to 1 to make the workhandler exit as soon as possible */
128 int force_end_work;
129 /* need to know we are suspending to avoid deadlock on workqueue */
130 int suspending;
131
132 /* hook for suspending MAX3100 via dedicated pin */
133 void (*max3100_hw_suspend) (int suspend);
134
135 /* poll time (in ms) for ctrl lines */
136 int poll_time;
137 /* and its timer */
138 struct timer_list timer;
139};
140
141static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
142static DEFINE_MUTEX(max3100s_lock); /* race on probe */
143
144static int max3100_do_parity(struct max3100_port *s, u16 c)
145{
146 int parity;
147
148 if (s->parity & MAX3100_PARITY_ODD)
149 parity = 1;
150 else
151 parity = 0;
152
153 if (s->parity & MAX3100_7BIT)
154 c &= 0x7f;
155 else
156 c &= 0xff;
157
158 parity = parity ^ (hweight8(c) & 1);
159 return parity;
160}
161
162static int max3100_check_parity(struct max3100_port *s, u16 c)
163{
164 return max3100_do_parity(s, c) == ((c >> 8) & 1);
165}
166
167static void max3100_calc_parity(struct max3100_port *s, u16 *c)
168{
169 if (s->parity & MAX3100_7BIT)
170 *c &= 0x7f;
171 else
172 *c &= 0xff;
173
174 if (s->parity & MAX3100_PARITY_ON)
175 *c |= max3100_do_parity(s, *c) << 8;
176}
177
178static void max3100_work(struct work_struct *w);
179
180static void max3100_dowork(struct max3100_port *s)
181{
182 if (!s->force_end_work && !freezing(current) && !s->suspending)
183 queue_work(s->workqueue, &s->work);
184}
185
186static void max3100_timeout(unsigned long data)
187{
188 struct max3100_port *s = (struct max3100_port *)data;
189
190 if (s->port.state) {
191 max3100_dowork(s);
192 mod_timer(&s->timer, jiffies + s->poll_time);
193 }
194}
195
196static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
197{
198 struct spi_message message;
199 u16 etx, erx;
200 int status;
201 struct spi_transfer tran = {
202 .tx_buf = &etx,
203 .rx_buf = &erx,
204 .len = 2,
205 };
206
207 etx = cpu_to_be16(tx);
208 spi_message_init(&message);
209 spi_message_add_tail(&tran, &message);
210 status = spi_sync(s->spi, &message);
211 if (status) {
212 dev_warn(&s->spi->dev, "error while calling spi_sync\n");
213 return -EIO;
214 }
215 *rx = be16_to_cpu(erx);
216 s->tx_empty = (*rx & MAX3100_T) > 0;
217 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
218 return 0;
219}
220
221static int max3100_handlerx(struct max3100_port *s, u16 rx)
222{
223 unsigned int ch, flg, status = 0;
224 int ret = 0, cts;
225
226 if (rx & MAX3100_R && s->rx_enabled) {
227 dev_dbg(&s->spi->dev, "%s\n", __func__);
228 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
229 if (rx & MAX3100_RAFE) {
230 s->port.icount.frame++;
231 flg = TTY_FRAME;
232 status |= MAX3100_STATUS_FE;
233 } else {
234 if (s->parity & MAX3100_PARITY_ON) {
235 if (max3100_check_parity(s, rx)) {
236 s->port.icount.rx++;
237 flg = TTY_NORMAL;
238 } else {
239 s->port.icount.parity++;
240 flg = TTY_PARITY;
241 status |= MAX3100_STATUS_PE;
242 }
243 } else {
244 s->port.icount.rx++;
245 flg = TTY_NORMAL;
246 }
247 }
248 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
249 ret = 1;
250 }
251
252 cts = (rx & MAX3100_CTS) > 0;
253 if (s->cts != cts) {
254 s->cts = cts;
255 uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
256 }
257
258 return ret;
259}
260
261static void max3100_work(struct work_struct *w)
262{
263 struct max3100_port *s = container_of(w, struct max3100_port, work);
264 int rxchars;
265 u16 tx, rx;
266 int conf, cconf, rts, crts;
267 struct circ_buf *xmit = &s->port.state->xmit;
268
269 dev_dbg(&s->spi->dev, "%s\n", __func__);
270
271 rxchars = 0;
272 do {
273 spin_lock(&s->conf_lock);
274 conf = s->conf;
275 cconf = s->conf_commit;
276 s->conf_commit = 0;
277 rts = s->rts;
278 crts = s->rts_commit;
279 s->rts_commit = 0;
280 spin_unlock(&s->conf_lock);
281 if (cconf)
282 max3100_sr(s, MAX3100_WC | conf, &rx);
283 if (crts) {
284 max3100_sr(s, MAX3100_WD | MAX3100_TE |
285 (s->rts ? MAX3100_RTS : 0), &rx);
286 rxchars += max3100_handlerx(s, rx);
287 }
288
289 max3100_sr(s, MAX3100_RD, &rx);
290 rxchars += max3100_handlerx(s, rx);
291
292 if (rx & MAX3100_T) {
293 tx = 0xffff;
294 if (s->port.x_char) {
295 tx = s->port.x_char;
296 s->port.icount.tx++;
297 s->port.x_char = 0;
298 } else if (!uart_circ_empty(xmit) &&
299 !uart_tx_stopped(&s->port)) {
300 tx = xmit->buf[xmit->tail];
301 xmit->tail = (xmit->tail + 1) &
302 (UART_XMIT_SIZE - 1);
303 s->port.icount.tx++;
304 }
305 if (tx != 0xffff) {
306 max3100_calc_parity(s, &tx);
307 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
308 max3100_sr(s, tx, &rx);
309 rxchars += max3100_handlerx(s, rx);
310 }
311 }
312
313 if (rxchars > 16) {
314 tty_flip_buffer_push(&s->port.state->port);
315 rxchars = 0;
316 }
317 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
318 uart_write_wakeup(&s->port);
319
320 } while (!s->force_end_work &&
321 !freezing(current) &&
322 ((rx & MAX3100_R) ||
323 (!uart_circ_empty(xmit) &&
324 !uart_tx_stopped(&s->port))));
325
326 if (rxchars > 0)
327 tty_flip_buffer_push(&s->port.state->port);
328}
329
330static irqreturn_t max3100_irq(int irqno, void *dev_id)
331{
332 struct max3100_port *s = dev_id;
333
334 dev_dbg(&s->spi->dev, "%s\n", __func__);
335
336 max3100_dowork(s);
337 return IRQ_HANDLED;
338}
339
340static void max3100_enable_ms(struct uart_port *port)
341{
342 struct max3100_port *s = container_of(port,
343 struct max3100_port,
344 port);
345
346 if (s->poll_time > 0)
347 mod_timer(&s->timer, jiffies);
348 dev_dbg(&s->spi->dev, "%s\n", __func__);
349}
350
351static void max3100_start_tx(struct uart_port *port)
352{
353 struct max3100_port *s = container_of(port,
354 struct max3100_port,
355 port);
356
357 dev_dbg(&s->spi->dev, "%s\n", __func__);
358
359 max3100_dowork(s);
360}
361
362static void max3100_stop_rx(struct uart_port *port)
363{
364 struct max3100_port *s = container_of(port,
365 struct max3100_port,
366 port);
367
368 dev_dbg(&s->spi->dev, "%s\n", __func__);
369
370 s->rx_enabled = 0;
371 spin_lock(&s->conf_lock);
372 s->conf &= ~MAX3100_RM;
373 s->conf_commit = 1;
374 spin_unlock(&s->conf_lock);
375 max3100_dowork(s);
376}
377
378static unsigned int max3100_tx_empty(struct uart_port *port)
379{
380 struct max3100_port *s = container_of(port,
381 struct max3100_port,
382 port);
383
384 dev_dbg(&s->spi->dev, "%s\n", __func__);
385
386 /* may not be truly up-to-date */
387 max3100_dowork(s);
388 return s->tx_empty;
389}
390
391static unsigned int max3100_get_mctrl(struct uart_port *port)
392{
393 struct max3100_port *s = container_of(port,
394 struct max3100_port,
395 port);
396
397 dev_dbg(&s->spi->dev, "%s\n", __func__);
398
399 /* may not be truly up-to-date */
400 max3100_dowork(s);
401 /* always assert DCD and DSR since these lines are not wired */
402 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
403}
404
405static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
406{
407 struct max3100_port *s = container_of(port,
408 struct max3100_port,
409 port);
410 int rts;
411
412 dev_dbg(&s->spi->dev, "%s\n", __func__);
413
414 rts = (mctrl & TIOCM_RTS) > 0;
415
416 spin_lock(&s->conf_lock);
417 if (s->rts != rts) {
418 s->rts = rts;
419 s->rts_commit = 1;
420 max3100_dowork(s);
421 }
422 spin_unlock(&s->conf_lock);
423}
424
425static void
426max3100_set_termios(struct uart_port *port, struct ktermios *termios,
427 struct ktermios *old)
428{
429 struct max3100_port *s = container_of(port,
430 struct max3100_port,
431 port);
432 int baud = 0;
433 unsigned cflag;
434 u32 param_new, param_mask, parity = 0;
435
436 dev_dbg(&s->spi->dev, "%s\n", __func__);
437
438 cflag = termios->c_cflag;
439 param_new = 0;
440 param_mask = 0;
441
442 baud = tty_termios_baud_rate(termios);
443 param_new = s->conf & MAX3100_BAUD;
444 switch (baud) {
445 case 300:
446 if (s->crystal)
447 baud = s->baud;
448 else
449 param_new = 15;
450 break;
451 case 600:
452 param_new = 14 + s->crystal;
453 break;
454 case 1200:
455 param_new = 13 + s->crystal;
456 break;
457 case 2400:
458 param_new = 12 + s->crystal;
459 break;
460 case 4800:
461 param_new = 11 + s->crystal;
462 break;
463 case 9600:
464 param_new = 10 + s->crystal;
465 break;
466 case 19200:
467 param_new = 9 + s->crystal;
468 break;
469 case 38400:
470 param_new = 8 + s->crystal;
471 break;
472 case 57600:
473 param_new = 1 + s->crystal;
474 break;
475 case 115200:
476 param_new = 0 + s->crystal;
477 break;
478 case 230400:
479 if (s->crystal)
480 param_new = 0;
481 else
482 baud = s->baud;
483 break;
484 default:
485 baud = s->baud;
486 }
487 tty_termios_encode_baud_rate(termios, baud, baud);
488 s->baud = baud;
489 param_mask |= MAX3100_BAUD;
490
491 if ((cflag & CSIZE) == CS8) {
492 param_new &= ~MAX3100_L;
493 parity &= ~MAX3100_7BIT;
494 } else {
495 param_new |= MAX3100_L;
496 parity |= MAX3100_7BIT;
497 cflag = (cflag & ~CSIZE) | CS7;
498 }
499 param_mask |= MAX3100_L;
500
501 if (cflag & CSTOPB)
502 param_new |= MAX3100_ST;
503 else
504 param_new &= ~MAX3100_ST;
505 param_mask |= MAX3100_ST;
506
507 if (cflag & PARENB) {
508 param_new |= MAX3100_PE;
509 parity |= MAX3100_PARITY_ON;
510 } else {
511 param_new &= ~MAX3100_PE;
512 parity &= ~MAX3100_PARITY_ON;
513 }
514 param_mask |= MAX3100_PE;
515
516 if (cflag & PARODD)
517 parity |= MAX3100_PARITY_ODD;
518 else
519 parity &= ~MAX3100_PARITY_ODD;
520
521 /* mask termios capabilities we don't support */
522 cflag &= ~CMSPAR;
523 termios->c_cflag = cflag;
524
525 s->port.ignore_status_mask = 0;
526 if (termios->c_iflag & IGNPAR)
527 s->port.ignore_status_mask |=
528 MAX3100_STATUS_PE | MAX3100_STATUS_FE |
529 MAX3100_STATUS_OE;
530
531 /* we are sending char from a workqueue so enable */
532 s->port.state->port.low_latency = 1;
533
534 if (s->poll_time > 0)
535 del_timer_sync(&s->timer);
536
537 uart_update_timeout(port, termios->c_cflag, baud);
538
539 spin_lock(&s->conf_lock);
540 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
541 s->conf_commit = 1;
542 s->parity = parity;
543 spin_unlock(&s->conf_lock);
544 max3100_dowork(s);
545
546 if (UART_ENABLE_MS(&s->port, termios->c_cflag))
547 max3100_enable_ms(&s->port);
548}
549
550static void max3100_shutdown(struct uart_port *port)
551{
552 struct max3100_port *s = container_of(port,
553 struct max3100_port,
554 port);
555
556 dev_dbg(&s->spi->dev, "%s\n", __func__);
557
558 if (s->suspending)
559 return;
560
561 s->force_end_work = 1;
562
563 if (s->poll_time > 0)
564 del_timer_sync(&s->timer);
565
566 if (s->workqueue) {
567 flush_workqueue(s->workqueue);
568 destroy_workqueue(s->workqueue);
569 s->workqueue = NULL;
570 }
571 if (s->irq)
572 free_irq(s->irq, s);
573
574 /* set shutdown mode to save power */
575 if (s->max3100_hw_suspend)
576 s->max3100_hw_suspend(1);
577 else {
578 u16 tx, rx;
579
580 tx = MAX3100_WC | MAX3100_SHDN;
581 max3100_sr(s, tx, &rx);
582 }
583}
584
585static int max3100_startup(struct uart_port *port)
586{
587 struct max3100_port *s = container_of(port,
588 struct max3100_port,
589 port);
590 char b[12];
591
592 dev_dbg(&s->spi->dev, "%s\n", __func__);
593
594 s->conf = MAX3100_RM;
595 s->baud = s->crystal ? 230400 : 115200;
596 s->rx_enabled = 1;
597
598 if (s->suspending)
599 return 0;
600
601 s->force_end_work = 0;
602 s->parity = 0;
603 s->rts = 0;
604
605 sprintf(b, "max3100-%d", s->minor);
606 s->workqueue = create_freezable_workqueue(b);
607 if (!s->workqueue) {
608 dev_warn(&s->spi->dev, "cannot create workqueue\n");
609 return -EBUSY;
610 }
611 INIT_WORK(&s->work, max3100_work);
612
613 if (request_irq(s->irq, max3100_irq,
614 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
615 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
616 s->irq = 0;
617 destroy_workqueue(s->workqueue);
618 s->workqueue = NULL;
619 return -EBUSY;
620 }
621
622 if (s->loopback) {
623 u16 tx, rx;
624 tx = 0x4001;
625 max3100_sr(s, tx, &rx);
626 }
627
628 if (s->max3100_hw_suspend)
629 s->max3100_hw_suspend(0);
630 s->conf_commit = 1;
631 max3100_dowork(s);
632 /* wait for clock to settle */
633 msleep(50);
634
635 max3100_enable_ms(&s->port);
636
637 return 0;
638}
639
640static const char *max3100_type(struct uart_port *port)
641{
642 struct max3100_port *s = container_of(port,
643 struct max3100_port,
644 port);
645
646 dev_dbg(&s->spi->dev, "%s\n", __func__);
647
648 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
649}
650
651static void max3100_release_port(struct uart_port *port)
652{
653 struct max3100_port *s = container_of(port,
654 struct max3100_port,
655 port);
656
657 dev_dbg(&s->spi->dev, "%s\n", __func__);
658}
659
660static void max3100_config_port(struct uart_port *port, int flags)
661{
662 struct max3100_port *s = container_of(port,
663 struct max3100_port,
664 port);
665
666 dev_dbg(&s->spi->dev, "%s\n", __func__);
667
668 if (flags & UART_CONFIG_TYPE)
669 s->port.type = PORT_MAX3100;
670}
671
672static int max3100_verify_port(struct uart_port *port,
673 struct serial_struct *ser)
674{
675 struct max3100_port *s = container_of(port,
676 struct max3100_port,
677 port);
678 int ret = -EINVAL;
679
680 dev_dbg(&s->spi->dev, "%s\n", __func__);
681
682 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
683 ret = 0;
684 return ret;
685}
686
687static void max3100_stop_tx(struct uart_port *port)
688{
689 struct max3100_port *s = container_of(port,
690 struct max3100_port,
691 port);
692
693 dev_dbg(&s->spi->dev, "%s\n", __func__);
694}
695
696static int max3100_request_port(struct uart_port *port)
697{
698 struct max3100_port *s = container_of(port,
699 struct max3100_port,
700 port);
701
702 dev_dbg(&s->spi->dev, "%s\n", __func__);
703 return 0;
704}
705
706static void max3100_break_ctl(struct uart_port *port, int break_state)
707{
708 struct max3100_port *s = container_of(port,
709 struct max3100_port,
710 port);
711
712 dev_dbg(&s->spi->dev, "%s\n", __func__);
713}
714
715static struct uart_ops max3100_ops = {
716 .tx_empty = max3100_tx_empty,
717 .set_mctrl = max3100_set_mctrl,
718 .get_mctrl = max3100_get_mctrl,
719 .stop_tx = max3100_stop_tx,
720 .start_tx = max3100_start_tx,
721 .stop_rx = max3100_stop_rx,
722 .enable_ms = max3100_enable_ms,
723 .break_ctl = max3100_break_ctl,
724 .startup = max3100_startup,
725 .shutdown = max3100_shutdown,
726 .set_termios = max3100_set_termios,
727 .type = max3100_type,
728 .release_port = max3100_release_port,
729 .request_port = max3100_request_port,
730 .config_port = max3100_config_port,
731 .verify_port = max3100_verify_port,
732};
733
734static struct uart_driver max3100_uart_driver = {
735 .owner = THIS_MODULE,
736 .driver_name = "ttyMAX",
737 .dev_name = "ttyMAX",
738 .major = MAX3100_MAJOR,
739 .minor = MAX3100_MINOR,
740 .nr = MAX_MAX3100,
741};
742static int uart_driver_registered;
743
744static int max3100_probe(struct spi_device *spi)
745{
746 int i, retval;
747 struct plat_max3100 *pdata;
748 u16 tx, rx;
749
750 mutex_lock(&max3100s_lock);
751
752 if (!uart_driver_registered) {
753 uart_driver_registered = 1;
754 retval = uart_register_driver(&max3100_uart_driver);
755 if (retval) {
756 printk(KERN_ERR "Couldn't register max3100 uart driver\n");
757 mutex_unlock(&max3100s_lock);
758 return retval;
759 }
760 }
761
762 for (i = 0; i < MAX_MAX3100; i++)
763 if (!max3100s[i])
764 break;
765 if (i == MAX_MAX3100) {
766 dev_warn(&spi->dev, "too many MAX3100 chips\n");
767 mutex_unlock(&max3100s_lock);
768 return -ENOMEM;
769 }
770
771 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
772 if (!max3100s[i]) {
773 dev_warn(&spi->dev,
774 "kmalloc for max3100 structure %d failed!\n", i);
775 mutex_unlock(&max3100s_lock);
776 return -ENOMEM;
777 }
778 max3100s[i]->spi = spi;
779 max3100s[i]->irq = spi->irq;
780 spin_lock_init(&max3100s[i]->conf_lock);
781 spi_set_drvdata(spi, max3100s[i]);
782 pdata = dev_get_platdata(&spi->dev);
783 max3100s[i]->crystal = pdata->crystal;
784 max3100s[i]->loopback = pdata->loopback;
785 max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
786 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
787 max3100s[i]->poll_time = 1;
788 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
789 max3100s[i]->minor = i;
790 init_timer(&max3100s[i]->timer);
791 max3100s[i]->timer.function = max3100_timeout;
792 max3100s[i]->timer.data = (unsigned long) max3100s[i];
793
794 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
795 max3100s[i]->port.irq = max3100s[i]->irq;
796 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
797 max3100s[i]->port.fifosize = 16;
798 max3100s[i]->port.ops = &max3100_ops;
799 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
800 max3100s[i]->port.line = i;
801 max3100s[i]->port.type = PORT_MAX3100;
802 max3100s[i]->port.dev = &spi->dev;
803 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
804 if (retval < 0)
805 dev_warn(&spi->dev,
806 "uart_add_one_port failed for line %d with error %d\n",
807 i, retval);
808
809 /* set shutdown mode to save power. Will be woken-up on open */
810 if (max3100s[i]->max3100_hw_suspend)
811 max3100s[i]->max3100_hw_suspend(1);
812 else {
813 tx = MAX3100_WC | MAX3100_SHDN;
814 max3100_sr(max3100s[i], tx, &rx);
815 }
816 mutex_unlock(&max3100s_lock);
817 return 0;
818}
819
820static int max3100_remove(struct spi_device *spi)
821{
822 struct max3100_port *s = spi_get_drvdata(spi);
823 int i;
824
825 mutex_lock(&max3100s_lock);
826
827 /* find out the index for the chip we are removing */
828 for (i = 0; i < MAX_MAX3100; i++)
829 if (max3100s[i] == s) {
830 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
831 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
832 kfree(max3100s[i]);
833 max3100s[i] = NULL;
834 break;
835 }
836
837 WARN_ON(i == MAX_MAX3100);
838
839 /* check if this is the last chip we have */
840 for (i = 0; i < MAX_MAX3100; i++)
841 if (max3100s[i]) {
842 mutex_unlock(&max3100s_lock);
843 return 0;
844 }
845 pr_debug("removing max3100 driver\n");
846 uart_unregister_driver(&max3100_uart_driver);
847
848 mutex_unlock(&max3100s_lock);
849 return 0;
850}
851
852#ifdef CONFIG_PM_SLEEP
853
854static int max3100_suspend(struct device *dev)
855{
856 struct max3100_port *s = dev_get_drvdata(dev);
857
858 dev_dbg(&s->spi->dev, "%s\n", __func__);
859
860 disable_irq(s->irq);
861
862 s->suspending = 1;
863 uart_suspend_port(&max3100_uart_driver, &s->port);
864
865 if (s->max3100_hw_suspend)
866 s->max3100_hw_suspend(1);
867 else {
868 /* no HW suspend, so do SW one */
869 u16 tx, rx;
870
871 tx = MAX3100_WC | MAX3100_SHDN;
872 max3100_sr(s, tx, &rx);
873 }
874 return 0;
875}
876
877static int max3100_resume(struct device *dev)
878{
879 struct max3100_port *s = dev_get_drvdata(dev);
880
881 dev_dbg(&s->spi->dev, "%s\n", __func__);
882
883 if (s->max3100_hw_suspend)
884 s->max3100_hw_suspend(0);
885 uart_resume_port(&max3100_uart_driver, &s->port);
886 s->suspending = 0;
887
888 enable_irq(s->irq);
889
890 s->conf_commit = 1;
891 if (s->workqueue)
892 max3100_dowork(s);
893
894 return 0;
895}
896
897static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
898#define MAX3100_PM_OPS (&max3100_pm_ops)
899
900#else
901#define MAX3100_PM_OPS NULL
902#endif
903
904static struct spi_driver max3100_driver = {
905 .driver = {
906 .name = "max3100",
907 .pm = MAX3100_PM_OPS,
908 },
909 .probe = max3100_probe,
910 .remove = max3100_remove,
911};
912
913module_spi_driver(max3100_driver);
914
915MODULE_DESCRIPTION("MAX3100 driver");
916MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
917MODULE_LICENSE("GPL");
918MODULE_ALIAS("spi:max3100");