1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
  4 */
  5
  6#include "meson-g12.dtsi"
  7
  8/ {
  9	compatible = "amlogic,g12a";
 10
 11	cpus {
 12		#address-cells = <0x2>;
 13		#size-cells = <0x0>;
 14
 15		cpu0: cpu@0 {
 16			device_type = "cpu";
 17			compatible = "arm,cortex-a53";
 18			reg = <0x0 0x0>;
 19			enable-method = "psci";
 20			next-level-cache = <&l2>;
 21			#cooling-cells = <2>;
 22		};
 23
 24		cpu1: cpu@1 {
 25			device_type = "cpu";
 26			compatible = "arm,cortex-a53";
 27			reg = <0x0 0x1>;
 28			enable-method = "psci";
 29			next-level-cache = <&l2>;
 30			#cooling-cells = <2>;
 31		};
 32
 33		cpu2: cpu@2 {
 34			device_type = "cpu";
 35			compatible = "arm,cortex-a53";
 36			reg = <0x0 0x2>;
 37			enable-method = "psci";
 38			next-level-cache = <&l2>;
 39			#cooling-cells = <2>;
 40		};
 41
 42		cpu3: cpu@3 {
 43			device_type = "cpu";
 44			compatible = "arm,cortex-a53";
 45			reg = <0x0 0x3>;
 46			enable-method = "psci";
 47			next-level-cache = <&l2>;
 48			#cooling-cells = <2>;
 49		};
 50
 51		l2: l2-cache0 {
 52			compatible = "cache";
 53		};
 54	};
 55
 56	cpu_opp_table: opp-table {
 57		compatible = "operating-points-v2";
 58		opp-shared;
 59
 60		opp-100000000 {
 61			opp-hz = /bits/ 64 <100000000>;
 62			opp-microvolt = <731000>;
 63		};
 64
 65		opp-250000000 {
 66			opp-hz = /bits/ 64 <250000000>;
 67			opp-microvolt = <731000>;
 68		};
 69
 70		opp-500000000 {
 71			opp-hz = /bits/ 64 <500000000>;
 72			opp-microvolt = <731000>;
 73		};
 74
 75		opp-667000000 {
 76			opp-hz = /bits/ 64 <666666666>;
 77			opp-microvolt = <731000>;
 78		};
 79
 80		opp-1000000000 {
 81			opp-hz = /bits/ 64 <1000000000>;
 82			opp-microvolt = <731000>;
 83		};
 84
 85		opp-1200000000 {
 86			opp-hz = /bits/ 64 <1200000000>;
 87			opp-microvolt = <731000>;
 88		};
 89
 90		opp-1398000000 {
 91			opp-hz = /bits/ 64 <1398000000>;
 92			opp-microvolt = <761000>;
 93		};
 94
 95		opp-1512000000 {
 96			opp-hz = /bits/ 64 <1512000000>;
 97			opp-microvolt = <791000>;
 98		};
 99
100		opp-1608000000 {
101			opp-hz = /bits/ 64 <1608000000>;
102			opp-microvolt = <831000>;
103		};
104
105		opp-1704000000 {
106			opp-hz = /bits/ 64 <1704000000>;
107			opp-microvolt = <861000>;
108		};
109
110		opp-1800000000 {
111			opp-hz = /bits/ 64 <1800000000>;
112			opp-microvolt = <981000>;
113		};
114	};
115};
116
117&cpu_thermal {
118	cooling-maps {
119		map0 {
120			trip = <&cpu_passive>;
121			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
122					<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
123					<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
124					<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
125		};
126
127		map1 {
128			trip = <&cpu_hot>;
129			cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
130					<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
131					<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
132					<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
133		};
134	};
135};