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v5.14.15
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * This dts file supports Dalmore A04.
   4 * Other board revisions are not supported
   5 */
   6
   7/dts-v1/;
   8
   9#include <dt-bindings/input/input.h>
  10#include "tegra114.dtsi"
  11
  12/ {
  13	model = "NVIDIA Tegra114 Dalmore evaluation board";
  14	compatible = "nvidia,dalmore", "nvidia,tegra114";
  15
  16	aliases {
  17		rtc0 = "/i2c@7000d000/tps65913@58";
  18		rtc1 = "/rtc@7000e000";
  19		serial0 = &uartd;
  20	};
  21
  22	chosen {
  23		stdout-path = "serial0:115200n8";
  24	};
  25
  26	memory@80000000 {
  27		reg = <0x80000000 0x40000000>;
  28	};
  29
  30	host1x@50000000 {
  31		hdmi@54280000 {
  32			status = "okay";
  33
  34			hdmi-supply = <&vdd_5v0_hdmi>;
  35			vdd-supply = <&vdd_hdmi_reg>;
  36			pll-supply = <&palmas_smps3_reg>;
  37
  38			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  39			nvidia,hpd-gpio =
  40				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  41		};
  42
  43		dsi@54300000 {
  44			status = "okay";
  45
  46			avdd-dsi-csi-supply = <&avdd_1v2_reg>;
  47
  48			panel@0 {
  49				compatible = "panasonic,vvx10f004b00";
 
  50				reg = <0>;
  51
  52				power-supply = <&avdd_lcd_reg>;
  53				backlight = <&backlight>;
  54			};
  55		};
  56	};
  57
  58	pinmux@70000868 {
  59		pinctrl-names = "default";
  60		pinctrl-0 = <&state_default>;
  61
  62		state_default: pinmux {
  63			clk1_out_pw4 {
  64				nvidia,pins = "clk1_out_pw4";
  65				nvidia,function = "extperiph1";
  66				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  67				nvidia,tristate = <TEGRA_PIN_DISABLE>;
  68				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  69			};
  70			dap1_din_pn1 {
  71				nvidia,pins = "dap1_din_pn1";
  72				nvidia,function = "i2s0";
  73				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  74				nvidia,tristate = <TEGRA_PIN_ENABLE>;
  75				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  76			};
  77			dap1_dout_pn2 {
  78				nvidia,pins = "dap1_dout_pn2",
  79						"dap1_fs_pn0",
  80						"dap1_sclk_pn3";
  81				nvidia,function = "i2s0";
  82				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  83				nvidia,tristate = <TEGRA_PIN_DISABLE>;
  84				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  85			};
  86			dap2_din_pa4 {
  87				nvidia,pins = "dap2_din_pa4";
  88				nvidia,function = "i2s1";
  89				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  90				nvidia,tristate = <TEGRA_PIN_ENABLE>;
  91				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  92			};
  93			dap2_dout_pa5 {
  94				nvidia,pins = "dap2_dout_pa5",
  95						"dap2_fs_pa2",
  96						"dap2_sclk_pa3";
  97				nvidia,function = "i2s1";
  98				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  99				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 100				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 101			};
 102			dap4_din_pp5 {
 103				nvidia,pins = "dap4_din_pp5",
 104						"dap4_dout_pp6",
 105						"dap4_fs_pp4",
 106						"dap4_sclk_pp7";
 107				nvidia,function = "i2s3";
 108				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 109				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 110				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 111			};
 112			dvfs_pwm_px0 {
 113				nvidia,pins = "dvfs_pwm_px0",
 114						"dvfs_clk_px2";
 115				nvidia,function = "cldvfs";
 116				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 117				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 118				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 119			};
 120			ulpi_clk_py0 {
 121				nvidia,pins = "ulpi_clk_py0",
 122						"ulpi_data0_po1",
 123						"ulpi_data1_po2",
 124						"ulpi_data2_po3",
 125						"ulpi_data3_po4",
 126						"ulpi_data4_po5",
 127						"ulpi_data5_po6",
 128						"ulpi_data6_po7",
 129						"ulpi_data7_po0";
 130				nvidia,function = "ulpi";
 131				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 132				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 133				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 134			};
 135			ulpi_dir_py1 {
 136				nvidia,pins = "ulpi_dir_py1",
 137						"ulpi_nxt_py2";
 138				nvidia,function = "ulpi";
 139				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 140				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 141				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 142			};
 143			ulpi_stp_py3 {
 144				nvidia,pins = "ulpi_stp_py3";
 145				nvidia,function = "ulpi";
 146				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 147				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 148				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 149			};
 150			cam_i2c_scl_pbb1 {
 151				nvidia,pins = "cam_i2c_scl_pbb1",
 152						"cam_i2c_sda_pbb2";
 153				nvidia,function = "i2c3";
 154				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 155				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 156				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 157				nvidia,lock = <TEGRA_PIN_DISABLE>;
 158				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 159			};
 160			cam_mclk_pcc0 {
 161				nvidia,pins = "cam_mclk_pcc0",
 162						"pbb0";
 163				nvidia,function = "vi_alt3";
 164				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 165				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 166				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 167				nvidia,lock = <TEGRA_PIN_DISABLE>;
 168			};
 169			gen2_i2c_scl_pt5 {
 170				nvidia,pins = "gen2_i2c_scl_pt5",
 171						"gen2_i2c_sda_pt6";
 172				nvidia,function = "i2c2";
 173				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 174				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 175				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 176				nvidia,lock = <TEGRA_PIN_DISABLE>;
 177				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 178			};
 179			gmi_a16_pj7 {
 180				nvidia,pins = "gmi_a16_pj7";
 181				nvidia,function = "uartd";
 182				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 183				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 184				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 185			};
 186			gmi_a17_pb0 {
 187				nvidia,pins = "gmi_a17_pb0",
 188						"gmi_a18_pb1";
 189				nvidia,function = "uartd";
 190				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 191				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 192				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 193			};
 194			gmi_a19_pk7 {
 195				nvidia,pins = "gmi_a19_pk7";
 196				nvidia,function = "uartd";
 197				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 198				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 199				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 200			};
 201			gmi_ad5_pg5 {
 202				nvidia,pins = "gmi_ad5_pg5",
 203						"gmi_cs6_n_pi3",
 204						"gmi_wr_n_pi0";
 205				nvidia,function = "spi4";
 206				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 207				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 208				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 209			};
 210			gmi_ad6_pg6 {
 211				nvidia,pins = "gmi_ad6_pg6",
 212						"gmi_ad7_pg7";
 213				nvidia,function = "spi4";
 214				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 215				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 216				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 217			};
 218			gmi_ad12_ph4 {
 219				nvidia,pins = "gmi_ad12_ph4";
 220				nvidia,function = "rsvd4";
 221				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 222				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 223				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 224			};
 225			gmi_ad9_ph1 {
 226				nvidia,pins = "gmi_ad9_ph1";
 227				nvidia,function = "pwm1";
 228				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 229				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 230				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 231			};
 232			gmi_cs1_n_pj2 {
 233				nvidia,pins = "gmi_cs1_n_pj2",
 234						"gmi_oe_n_pi1";
 235				nvidia,function = "soc";
 236				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 237				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 238				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 239			};
 240			clk2_out_pw5 {
 241				nvidia,pins = "clk2_out_pw5";
 242				nvidia,function = "extperiph2";
 243				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 244				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 245				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 246			};
 247			sdmmc1_clk_pz0 {
 248				nvidia,pins = "sdmmc1_clk_pz0";
 249				nvidia,function = "sdmmc1";
 250				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 251				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 252				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 253			};
 254			sdmmc1_cmd_pz1 {
 255				nvidia,pins = "sdmmc1_cmd_pz1",
 256						"sdmmc1_dat0_py7",
 257						"sdmmc1_dat1_py6",
 258						"sdmmc1_dat2_py5",
 259						"sdmmc1_dat3_py4";
 260				nvidia,function = "sdmmc1";
 261				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 262				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 263				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 264			};
 265			sdmmc1_wp_n_pv3 {
 266				nvidia,pins = "sdmmc1_wp_n_pv3";
 267				nvidia,function = "spi4";
 268				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 269				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 270				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 271			};
 272			sdmmc3_clk_pa6 {
 273				nvidia,pins = "sdmmc3_clk_pa6";
 274				nvidia,function = "sdmmc3";
 275				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 276				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 277				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 278			};
 279			sdmmc3_cmd_pa7 {
 280				nvidia,pins = "sdmmc3_cmd_pa7",
 281						"sdmmc3_dat0_pb7",
 282						"sdmmc3_dat1_pb6",
 283						"sdmmc3_dat2_pb5",
 284						"sdmmc3_dat3_pb4",
 285						"kb_col4_pq4",
 286						"sdmmc3_clk_lb_out_pee4",
 287						"sdmmc3_clk_lb_in_pee5";
 288				nvidia,function = "sdmmc3";
 289				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 290				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 291				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 292			};
 293			sdmmc4_clk_pcc4 {
 294				nvidia,pins = "sdmmc4_clk_pcc4";
 295				nvidia,function = "sdmmc4";
 296				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 297				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 298				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 299			};
 300			sdmmc4_cmd_pt7 {
 301				nvidia,pins = "sdmmc4_cmd_pt7",
 302						"sdmmc4_dat0_paa0",
 303						"sdmmc4_dat1_paa1",
 304						"sdmmc4_dat2_paa2",
 305						"sdmmc4_dat3_paa3",
 306						"sdmmc4_dat4_paa4",
 307						"sdmmc4_dat5_paa5",
 308						"sdmmc4_dat6_paa6",
 309						"sdmmc4_dat7_paa7";
 310				nvidia,function = "sdmmc4";
 311				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 312				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 313				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 314			};
 315			clk_32k_out_pa0 {
 316				nvidia,pins = "clk_32k_out_pa0";
 317				nvidia,function = "blink";
 318				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 319				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 320				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 321			};
 322			kb_col0_pq0 {
 323				nvidia,pins = "kb_col0_pq0",
 324						"kb_col1_pq1",
 325						"kb_col2_pq2",
 326						"kb_row0_pr0",
 327						"kb_row1_pr1",
 328						"kb_row2_pr2";
 329				nvidia,function = "kbc";
 330				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 331				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 332				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 333			};
 334			dap3_din_pp1 {
 335				nvidia,pins = "dap3_din_pp1",
 336						"dap3_sclk_pp3";
 337				nvidia,function = "displayb";
 338				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 339				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 340				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 341			};
 342			pv0 {
 343				nvidia,pins = "pv0";
 344				nvidia,function = "rsvd4";
 345				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 346				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 347				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 348			};
 349			kb_row7_pr7 {
 350				nvidia,pins = "kb_row7_pr7";
 351				nvidia,function = "rsvd2";
 352				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 353				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 354				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 355			};
 356			kb_row10_ps2 {
 357				nvidia,pins = "kb_row10_ps2";
 358				nvidia,function = "uarta";
 359				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 360				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 361				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 362			};
 363			kb_row9_ps1 {
 364				nvidia,pins = "kb_row9_ps1";
 365				nvidia,function = "uarta";
 366				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 367				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 368				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 369			};
 370			pwr_i2c_scl_pz6 {
 371				nvidia,pins = "pwr_i2c_scl_pz6",
 372						"pwr_i2c_sda_pz7";
 373				nvidia,function = "i2cpwr";
 374				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 375				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 376				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 377				nvidia,lock = <TEGRA_PIN_DISABLE>;
 378				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 379			};
 380			sys_clk_req_pz5 {
 381				nvidia,pins = "sys_clk_req_pz5";
 382				nvidia,function = "sysclk";
 383				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 384				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 385				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 386			};
 387			core_pwr_req {
 388				nvidia,pins = "core_pwr_req";
 389				nvidia,function = "pwron";
 390				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 391				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 392				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 393			};
 394			cpu_pwr_req {
 395				nvidia,pins = "cpu_pwr_req";
 396				nvidia,function = "cpu";
 397				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 398				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 399				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 400			};
 401			pwr_int_n {
 402				nvidia,pins = "pwr_int_n";
 403				nvidia,function = "pmi";
 404				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 405				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 406				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 407			};
 408			reset_out_n {
 409				nvidia,pins = "reset_out_n";
 410				nvidia,function = "reset_out_n";
 411				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 412				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 413				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 414			};
 415			clk3_out_pee0 {
 416				nvidia,pins = "clk3_out_pee0";
 417				nvidia,function = "extperiph3";
 418				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 419				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 420				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 421			};
 422			gen1_i2c_scl_pc4 {
 423				nvidia,pins = "gen1_i2c_scl_pc4",
 424						"gen1_i2c_sda_pc5";
 425				nvidia,function = "i2c1";
 426				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 427				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 428				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 429				nvidia,lock = <TEGRA_PIN_DISABLE>;
 430				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 431			};
 432			uart2_cts_n_pj5 {
 433				nvidia,pins = "uart2_cts_n_pj5";
 434				nvidia,function = "uartb";
 435				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 436				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 437				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 438			};
 439			uart2_rts_n_pj6 {
 440				nvidia,pins = "uart2_rts_n_pj6";
 441				nvidia,function = "uartb";
 442				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 443				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 444				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 445			};
 446			uart2_rxd_pc3 {
 447				nvidia,pins = "uart2_rxd_pc3";
 448				nvidia,function = "irda";
 449				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 450				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 451				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 452			};
 453			uart2_txd_pc2 {
 454				nvidia,pins = "uart2_txd_pc2";
 455				nvidia,function = "irda";
 456				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 457				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 458				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 459			};
 460			uart3_cts_n_pa1 {
 461				nvidia,pins = "uart3_cts_n_pa1",
 462						"uart3_rxd_pw7";
 463				nvidia,function = "uartc";
 464				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 465				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 466				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 467			};
 468			uart3_rts_n_pc0 {
 469				nvidia,pins = "uart3_rts_n_pc0",
 470						"uart3_txd_pw6";
 471				nvidia,function = "uartc";
 472				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 473				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 474				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 475			};
 476			owr {
 477				nvidia,pins = "owr";
 478				nvidia,function = "owr";
 479				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 480				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 481				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 482			};
 483			hdmi_cec_pee3 {
 484				nvidia,pins = "hdmi_cec_pee3";
 485				nvidia,function = "cec";
 486				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 487				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 488				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 489				nvidia,lock = <TEGRA_PIN_DISABLE>;
 490				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 491			};
 492			ddc_scl_pv4 {
 493				nvidia,pins = "ddc_scl_pv4",
 494						"ddc_sda_pv5";
 495				nvidia,function = "i2c4";
 496				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 497				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 498				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 499				nvidia,lock = <TEGRA_PIN_DISABLE>;
 500				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 501			};
 502			spdif_in_pk6 {
 503				nvidia,pins = "spdif_in_pk6";
 504				nvidia,function = "usb";
 505				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 506				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 507				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 508				nvidia,lock = <TEGRA_PIN_DISABLE>;
 509			};
 510			usb_vbus_en0_pn4 {
 511				nvidia,pins = "usb_vbus_en0_pn4";
 512				nvidia,function = "usb";
 513				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 514				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 515				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 516				nvidia,lock = <TEGRA_PIN_DISABLE>;
 517				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 518			};
 519			gpio_x6_aud_px6 {
 520				nvidia,pins = "gpio_x6_aud_px6";
 521				nvidia,function = "spi6";
 522				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 523				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 524				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 525			};
 526			gpio_x4_aud_px4 {
 527				nvidia,pins = "gpio_x4_aud_px4",
 528						"gpio_x7_aud_px7";
 529				nvidia,function = "rsvd1";
 530				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 531				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 532				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 533			};
 534			gpio_x5_aud_px5 {
 535				nvidia,pins = "gpio_x5_aud_px5";
 536				nvidia,function = "rsvd1";
 537				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 538				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 539				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 540			};
 541			gpio_w2_aud_pw2 {
 542				nvidia,pins = "gpio_w2_aud_pw2";
 543				nvidia,function = "rsvd2";
 544				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 545				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 546				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 547			};
 548			gpio_w3_aud_pw3 {
 549				nvidia,pins = "gpio_w3_aud_pw3";
 550				nvidia,function = "spi6";
 551				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 552				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 553				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 554			};
 555			gpio_x1_aud_px1 {
 556				nvidia,pins = "gpio_x1_aud_px1";
 557				nvidia,function = "rsvd4";
 558				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 559				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 560				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 561			};
 562			gpio_x3_aud_px3 {
 563				nvidia,pins = "gpio_x3_aud_px3";
 564				nvidia,function = "rsvd4";
 565				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 566				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 567				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 568			};
 569			dap3_fs_pp0 {
 570				nvidia,pins = "dap3_fs_pp0";
 571				nvidia,function = "i2s2";
 572				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 573				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 574				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 575			};
 576			dap3_dout_pp2 {
 577				nvidia,pins = "dap3_dout_pp2";
 578				nvidia,function = "i2s2";
 579				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 580				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 581				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 582			};
 583			pv1 {
 584				nvidia,pins = "pv1";
 585				nvidia,function = "rsvd1";
 586				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 587				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 588				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 589			};
 590			pbb3 {
 591				nvidia,pins = "pbb3",
 592						"pbb5",
 593						"pbb6",
 594						"pbb7";
 595				nvidia,function = "rsvd4";
 596				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 597				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 598				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 599			};
 600			pcc1 {
 601				nvidia,pins = "pcc1",
 602						"pcc2";
 603				nvidia,function = "rsvd4";
 604				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 605				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 606				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 607			};
 608			gmi_ad0_pg0 {
 609				nvidia,pins = "gmi_ad0_pg0",
 610						"gmi_ad1_pg1";
 611				nvidia,function = "gmi";
 612				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 613				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 614				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 615			};
 616			gmi_ad10_ph2 {
 617				nvidia,pins = "gmi_ad10_ph2",
 618						"gmi_ad11_ph3",
 619						"gmi_ad13_ph5",
 620						"gmi_ad8_ph0",
 621						"gmi_clk_pk1";
 622				nvidia,function = "gmi";
 623				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 624				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 625				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 626			};
 627			gmi_ad2_pg2 {
 628				nvidia,pins = "gmi_ad2_pg2",
 629						"gmi_ad3_pg3";
 630				nvidia,function = "gmi";
 631				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 632				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 633				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 634			};
 635			gmi_adv_n_pk0 {
 636				nvidia,pins = "gmi_adv_n_pk0",
 637						"gmi_cs0_n_pj0",
 638						"gmi_cs2_n_pk3",
 639						"gmi_cs4_n_pk2",
 640						"gmi_cs7_n_pi6",
 641						"gmi_dqs_p_pj3",
 642						"gmi_iordy_pi5",
 643						"gmi_wp_n_pc7";
 644				nvidia,function = "gmi";
 645				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 646				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 647				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 648			};
 649			gmi_cs3_n_pk4 {
 650				nvidia,pins = "gmi_cs3_n_pk4";
 651				nvidia,function = "gmi";
 652				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 653				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 654				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 655			};
 656			clk2_req_pcc5 {
 657				nvidia,pins = "clk2_req_pcc5";
 658				nvidia,function = "rsvd4";
 659				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 660				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 661				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 662			};
 663			kb_col3_pq3 {
 664				nvidia,pins = "kb_col3_pq3",
 665						"kb_col6_pq6",
 666						"kb_col7_pq7";
 667				nvidia,function = "kbc";
 668				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 669				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 670				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 671			};
 672			kb_col5_pq5 {
 673				nvidia,pins = "kb_col5_pq5";
 674				nvidia,function = "kbc";
 675				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 676				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 677				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 678			};
 679			kb_row3_pr3 {
 680				nvidia,pins = "kb_row3_pr3",
 681						"kb_row4_pr4",
 682						"kb_row6_pr6",
 683						"kb_row8_ps0";
 684				nvidia,function = "kbc";
 685				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 686				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 687				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 688			};
 689			clk3_req_pee1 {
 690				nvidia,pins = "clk3_req_pee1";
 691				nvidia,function = "rsvd4";
 692				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 693				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 694				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 695			};
 696			pu4 {
 697				nvidia,pins = "pu4";
 698				nvidia,function = "displayb";
 699				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 700				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 701				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 702			};
 703			pu5 {
 704				nvidia,pins = "pu5",
 705						"pu6";
 706				nvidia,function = "displayb";
 707				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 708				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 709				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 710			};
 711			hdmi_int_pn7 {
 712				nvidia,pins = "hdmi_int_pn7";
 713				nvidia,function = "rsvd1";
 714				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 715				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 716				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 717			};
 718			clk1_req_pee2 {
 719				nvidia,pins = "clk1_req_pee2",
 720						"usb_vbus_en1_pn5";
 721				nvidia,function = "rsvd4";
 722				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 723				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 724				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 725			};
 726
 727			drive_sdio1 {
 728				nvidia,pins = "drive_sdio1";
 729				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 730				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 731				nvidia,pull-down-strength = <36>;
 732				nvidia,pull-up-strength = <20>;
 733				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 734				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 735			};
 736			drive_sdio3 {
 737				nvidia,pins = "drive_sdio3";
 738				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 739				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 740				nvidia,pull-down-strength = <22>;
 741				nvidia,pull-up-strength = <36>;
 742				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 743				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 744			};
 745			drive_gma {
 746				nvidia,pins = "drive_gma";
 747				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 748				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 749				nvidia,pull-down-strength = <2>;
 750				nvidia,pull-up-strength = <1>;
 751				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 752				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 753			};
 754		};
 755	};
 756
 757	serial@70006300 {
 758		status = "okay";
 759	};
 760
 761	pwm@7000a000 {
 762		status = "okay";
 763	};
 764
 765	i2c@7000c000 {
 766		status = "okay";
 767		clock-frequency = <100000>;
 768
 769		battery: smart-battery@b {
 770			compatible = "ti,bq20z45", "sbs,sbs-battery";
 771			reg = <0xb>;
 
 772			sbs,i2c-retry-count = <2>;
 773			sbs,poll-retry-count = <100>;
 774			power-supplies = <&charger>;
 775		};
 776
 777		rt5640: rt5640@1c {
 778			compatible = "realtek,rt5640";
 779			reg = <0x1c>;
 780			interrupt-parent = <&gpio>;
 781			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
 782			realtek,ldo1-en-gpios =
 783				<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
 784		};
 785
 786		temperature-sensor@4c {
 787			compatible = "onnn,nct1008";
 788			reg = <0x4c>;
 789			vcc-supply = <&palmas_ldo6_reg>;
 790			interrupt-parent = <&gpio>;
 791			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
 792		};
 793	};
 794
 795	hdmi_ddc: i2c@7000c700 {
 796		status = "okay";
 797	};
 798
 799	i2c@7000d000 {
 800		status = "okay";
 801		clock-frequency = <400000>;
 802
 803		tps51632@43 {
 804			compatible = "ti,tps51632";
 805			reg = <0x43>;
 806			regulator-name = "vdd-cpu";
 807			regulator-min-microvolt = <500000>;
 808			regulator-max-microvolt = <1520000>;
 809			regulator-boot-on;
 810			regulator-always-on;
 811		};
 812
 813		tps65090@48 {
 814			compatible = "ti,tps65090";
 815			reg = <0x48>;
 816			interrupt-parent = <&gpio>;
 817			interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
 818
 819			vsys1-supply = <&vdd_ac_bat_reg>;
 820			vsys2-supply = <&vdd_ac_bat_reg>;
 821			vsys3-supply = <&vdd_ac_bat_reg>;
 822			infet1-supply = <&vdd_ac_bat_reg>;
 823			infet2-supply = <&vdd_ac_bat_reg>;
 824			infet3-supply = <&tps65090_dcdc2_reg>;
 825			infet4-supply = <&tps65090_dcdc2_reg>;
 826			infet5-supply = <&tps65090_dcdc2_reg>;
 827			infet6-supply = <&tps65090_dcdc2_reg>;
 828			infet7-supply = <&tps65090_dcdc2_reg>;
 829			vsys-l1-supply = <&vdd_ac_bat_reg>;
 830			vsys-l2-supply = <&vdd_ac_bat_reg>;
 831
 832			charger: charger {
 833				compatible = "ti,tps65090-charger";
 834				ti,enable-low-current-chrg;
 835			};
 836
 837			regulators {
 838				tps65090_dcdc1_reg: dcdc1 {
 839					regulator-name = "vdd-sys-5v0";
 840					regulator-always-on;
 841					regulator-boot-on;
 842				};
 843
 844				tps65090_dcdc2_reg: dcdc2 {
 845					regulator-name = "vdd-sys-3v3";
 846					regulator-always-on;
 847					regulator-boot-on;
 848				};
 849
 850				tps65090_dcdc3_reg: dcdc3 {
 851					regulator-name = "vdd-ao";
 852					regulator-always-on;
 853					regulator-boot-on;
 854				};
 855
 856				vdd_bl_reg: fet1 {
 857					regulator-name = "vdd-lcd-bl";
 858				};
 859
 860				fet3 {
 861					regulator-name = "vdd-modem-3v3";
 862				};
 863
 864				avdd_lcd_reg: fet4 {
 865					regulator-name = "avdd-lcd";
 866				};
 867
 868				fet5 {
 869					regulator-name = "vdd-lvds";
 870				};
 871
 872				fet6 {
 873					regulator-name = "vdd-sd-slot";
 874					regulator-always-on;
 875					regulator-boot-on;
 876				};
 877
 878				fet7 {
 879					regulator-name = "vdd-com-3v3";
 880				};
 881
 882				ldo1 {
 883					regulator-name = "vdd-sby-5v0";
 884					regulator-always-on;
 885					regulator-boot-on;
 886				};
 887
 888				ldo2 {
 889					regulator-name = "vdd-sby-3v3";
 890					regulator-always-on;
 891					regulator-boot-on;
 892				};
 893			};
 894		};
 895
 896		palmas: tps65913@58 {
 897			compatible = "ti,palmas";
 898			reg = <0x58>;
 899			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 900
 901			#interrupt-cells = <2>;
 902			interrupt-controller;
 903
 904			ti,system-power-controller;
 905
 906			palmas_gpio: gpio {
 907				compatible = "ti,palmas-gpio";
 908				gpio-controller;
 909				#gpio-cells = <2>;
 910			};
 911
 912			pmic {
 913				compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
 914				smps1-in-supply = <&tps65090_dcdc3_reg>;
 915				smps3-in-supply = <&tps65090_dcdc3_reg>;
 916				smps4-in-supply = <&tps65090_dcdc2_reg>;
 917				smps7-in-supply = <&tps65090_dcdc2_reg>;
 918				smps8-in-supply = <&tps65090_dcdc2_reg>;
 919				smps9-in-supply = <&tps65090_dcdc2_reg>;
 920				ldo1-in-supply = <&tps65090_dcdc2_reg>;
 921				ldo2-in-supply = <&tps65090_dcdc2_reg>;
 922				ldo3-in-supply = <&palmas_smps3_reg>;
 923				ldo4-in-supply = <&tps65090_dcdc2_reg>;
 924				ldo5-in-supply = <&vdd_ac_bat_reg>;
 925				ldo6-in-supply = <&tps65090_dcdc2_reg>;
 926				ldo7-in-supply = <&tps65090_dcdc2_reg>;
 927				ldo8-in-supply = <&tps65090_dcdc3_reg>;
 928				ldo9-in-supply = <&palmas_smps9_reg>;
 929				ldoln-in-supply = <&tps65090_dcdc1_reg>;
 930				ldousb-in-supply = <&tps65090_dcdc1_reg>;
 931
 932				regulators {
 933					smps12 {
 934						regulator-name = "vddio-ddr";
 935						regulator-min-microvolt = <1350000>;
 936						regulator-max-microvolt = <1350000>;
 937						regulator-always-on;
 938						regulator-boot-on;
 939					};
 940
 941					palmas_smps3_reg: smps3 {
 942						regulator-name = "vddio-1v8";
 943						regulator-min-microvolt = <1800000>;
 944						regulator-max-microvolt = <1800000>;
 945						regulator-always-on;
 946						regulator-boot-on;
 947					};
 948
 949					smps45 {
 950						regulator-name = "vdd-core";
 951						regulator-min-microvolt = <900000>;
 952						regulator-max-microvolt = <1400000>;
 953						regulator-always-on;
 954						regulator-boot-on;
 955					};
 956
 957					smps457 {
 958						regulator-name = "vdd-core";
 959						regulator-min-microvolt = <900000>;
 960						regulator-max-microvolt = <1400000>;
 961						regulator-always-on;
 962						regulator-boot-on;
 963					};
 964
 965					smps8 {
 966						regulator-name = "avdd-pll";
 967						regulator-min-microvolt = <1050000>;
 968						regulator-max-microvolt = <1050000>;
 969						regulator-always-on;
 970						regulator-boot-on;
 971					};
 972
 973					palmas_smps9_reg: smps9 {
 974						regulator-name = "sdhci-vdd-sd-slot";
 975						regulator-min-microvolt = <2800000>;
 976						regulator-max-microvolt = <2800000>;
 977						regulator-always-on;
 978					};
 979
 980					ldo1 {
 981						regulator-name = "avdd-cam1";
 982						regulator-min-microvolt = <2800000>;
 983						regulator-max-microvolt = <2800000>;
 984					};
 985
 986					ldo2 {
 987						regulator-name = "avdd-cam2";
 988						regulator-min-microvolt = <2800000>;
 989						regulator-max-microvolt = <2800000>;
 990					};
 991
 992					avdd_1v2_reg: ldo3 {
 993						regulator-name = "avdd-dsi-csi";
 994						regulator-min-microvolt = <1200000>;
 995						regulator-max-microvolt = <1200000>;
 996					};
 997
 998					ldo4 {
 999						regulator-name = "vpp-fuse";
1000						regulator-min-microvolt = <1800000>;
1001						regulator-max-microvolt = <1800000>;
1002					};
1003
1004					palmas_ldo6_reg: ldo6 {
1005						regulator-name = "vdd-sensor-2v85";
1006						regulator-min-microvolt = <2850000>;
1007						regulator-max-microvolt = <2850000>;
1008					};
1009
1010					ldo7 {
1011						regulator-name = "vdd-af-cam1";
1012						regulator-min-microvolt = <2800000>;
1013						regulator-max-microvolt = <2800000>;
1014					};
1015
1016					ldo8 {
1017						regulator-name = "vdd-rtc";
1018						regulator-min-microvolt = <900000>;
1019						regulator-max-microvolt = <900000>;
1020						regulator-always-on;
1021						regulator-boot-on;
1022						ti,enable-ldo8-tracking;
1023					};
1024
1025					ldo9 {
1026						regulator-name = "vddio-sdmmc-2";
1027						regulator-min-microvolt = <1800000>;
1028						regulator-max-microvolt = <3300000>;
1029						regulator-always-on;
1030						regulator-boot-on;
1031					};
1032
1033					ldoln {
1034						regulator-name = "hvdd-usb";
1035						regulator-min-microvolt = <3300000>;
1036						regulator-max-microvolt = <3300000>;
1037					};
1038
1039					ldousb {
1040						regulator-name = "avdd-usb";
1041						regulator-min-microvolt = <3300000>;
1042						regulator-max-microvolt = <3300000>;
1043						regulator-always-on;
1044						regulator-boot-on;
1045					};
1046
1047					regen1 {
1048						regulator-name = "rail-3v3";
1049						regulator-max-microvolt = <3300000>;
1050						regulator-always-on;
1051						regulator-boot-on;
1052					};
1053
1054					regen2 {
1055						regulator-name = "rail-5v0";
1056						regulator-max-microvolt = <5000000>;
1057						regulator-always-on;
1058						regulator-boot-on;
1059					};
1060				};
1061			};
1062
1063			rtc {
1064				compatible = "ti,palmas-rtc";
1065				interrupt-parent = <&palmas>;
1066				interrupts = <8 0>;
1067			};
1068
1069			pinmux {
1070				compatible = "ti,tps65913-pinctrl";
1071				pinctrl-names = "default";
1072				pinctrl-0 = <&palmas_default>;
1073
1074				palmas_default: pinmux {
1075					pin_gpio6 {
1076						pins = "gpio6";
1077						function = "gpio";
1078					};
1079				};
1080			};
1081		};
1082	};
1083
1084	spi@7000da00 {
1085		status = "okay";
1086		spi-max-frequency = <25000000>;
1087		spi-flash@0 {
1088			compatible = "winbond,w25q32dw", "jedec,spi-nor";
1089			reg = <0>;
1090			spi-max-frequency = <20000000>;
1091		};
1092	};
1093
1094	pmc@7000e400 {
1095		nvidia,invert-interrupt;
1096		nvidia,suspend-mode = <1>;
1097		nvidia,cpu-pwr-good-time = <500>;
1098		nvidia,cpu-pwr-off-time = <300>;
1099		nvidia,core-pwr-good-time = <641 3845>;
1100		nvidia,core-pwr-off-time = <61036>;
1101		nvidia,core-power-req-active-high;
1102		nvidia,sys-clock-req-active-high;
1103	};
1104
1105	ahub@70080000 {
1106		i2s@70080400 {
1107			status = "okay";
1108		};
1109	};
1110
1111	mmc@78000400 {
1112		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1113		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1114		bus-width = <4>;
1115		status = "okay";
1116	};
1117
1118	mmc@78000600 {
1119		bus-width = <8>;
1120		status = "okay";
1121		non-removable;
1122	};
1123
1124	usb@7d000000 {
1125		compatible = "nvidia,tegra114-udc";
1126		status = "okay";
1127		dr_mode = "peripheral";
1128	};
1129
1130	usb-phy@7d000000 {
1131		status = "okay";
1132	};
1133
1134	usb@7d008000 {
1135		status = "okay";
1136	};
1137
1138	usb-phy@7d008000 {
1139		status = "okay";
1140		vbus-supply = <&usb3_vbus_reg>;
1141	};
1142
1143	backlight: backlight {
1144		compatible = "pwm-backlight";
1145
1146		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1147		power-supply = <&vdd_bl_reg>;
1148		pwms = <&pwm 1 1000000>;
1149
1150		brightness-levels = <0 4 8 16 32 64 128 255>;
1151		default-brightness-level = <6>;
1152	};
1153
1154	clk32k_in: clock@0 {
1155		compatible = "fixed-clock";
1156		clock-frequency = <32768>;
1157		#clock-cells = <0>;
 
 
 
 
 
 
 
1158	};
1159
1160	gpio-keys {
1161		compatible = "gpio-keys";
1162
1163		home {
1164			label = "Home";
1165			gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1166			linux,code = <KEY_HOME>;
1167		};
1168
1169		power {
1170			label = "Power";
1171			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1172			linux,code = <KEY_POWER>;
1173			wakeup-source;
1174		};
1175
1176		volume_down {
1177			label = "Volume Down";
1178			gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1179			linux,code = <KEY_VOLUMEDOWN>;
1180		};
1181
1182		volume_up {
1183			label = "Volume Up";
1184			gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1185			linux,code = <KEY_VOLUMEUP>;
1186		};
1187	};
1188
1189	vdd_ac_bat_reg: regulator@0 {
1190		compatible = "regulator-fixed";
1191		regulator-name = "vdd_ac_bat";
1192		regulator-min-microvolt = <5000000>;
1193		regulator-max-microvolt = <5000000>;
1194		regulator-always-on;
1195	};
1196
1197	dvdd_ts_reg: regulator@1 {
1198		compatible = "regulator-fixed";
1199		regulator-name = "dvdd_ts";
1200		regulator-min-microvolt = <1800000>;
1201		regulator-max-microvolt = <1800000>;
1202		enable-active-high;
1203		gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1204	};
1205
1206	usb1_vbus_reg: regulator@3 {
1207		compatible = "regulator-fixed";
1208		regulator-name = "usb1_vbus";
1209		regulator-min-microvolt = <5000000>;
1210		regulator-max-microvolt = <5000000>;
1211		enable-active-high;
1212		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1213		gpio-open-drain;
1214		vin-supply = <&tps65090_dcdc1_reg>;
1215	};
1216
1217	usb3_vbus_reg: regulator@4 {
1218		compatible = "regulator-fixed";
1219		regulator-name = "usb2_vbus";
1220		regulator-min-microvolt = <5000000>;
1221		regulator-max-microvolt = <5000000>;
1222		enable-active-high;
1223		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1224		gpio-open-drain;
1225		vin-supply = <&tps65090_dcdc1_reg>;
1226	};
 
1227
1228	vdd_hdmi_reg: regulator@5 {
1229		compatible = "regulator-fixed";
1230		regulator-name = "vdd_hdmi_5v0";
1231		regulator-min-microvolt = <5000000>;
1232		regulator-max-microvolt = <5000000>;
1233		vin-supply = <&tps65090_dcdc1_reg>;
1234	};
 
 
 
 
1235
1236	vdd_cam_1v8_reg: regulator@6 {
1237		compatible = "regulator-fixed";
1238		regulator-name = "vdd_cam_1v8_reg";
1239		regulator-min-microvolt = <1800000>;
1240		regulator-max-microvolt = <1800000>;
1241		enable-active-high;
1242		gpio = <&palmas_gpio 6 0>;
1243	};
 
 
 
 
 
 
 
 
 
 
1244
1245	vdd_5v0_hdmi: regulator@7 {
1246		compatible = "regulator-fixed";
1247		regulator-name = "VDD_5V0_HDMI_CON";
1248		regulator-min-microvolt = <5000000>;
1249		regulator-max-microvolt = <5000000>;
1250		gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1251		enable-active-high;
1252		vin-supply = <&tps65090_dcdc1_reg>;
 
 
1253	};
1254
1255	sound {
1256		compatible = "nvidia,tegra-audio-rt5640-dalmore",
1257			     "nvidia,tegra-audio-rt5640";
1258		nvidia,model = "NVIDIA Tegra Dalmore";
1259
1260		nvidia,audio-routing =
1261			"Headphones", "HPOR",
1262			"Headphones", "HPOL",
1263			"Speakers", "SPORP",
1264			"Speakers", "SPORN",
1265			"Speakers", "SPOLP",
1266			"Speakers", "SPOLN",
1267			"Mic Jack", "MICBIAS1",
1268			"IN2P", "Mic Jack";
1269
1270		nvidia,i2s-controller = <&tegra_i2s1>;
1271		nvidia,audio-codec = <&rt5640>;
1272
1273		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1274
1275		clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1276			 <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1277			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1278		clock-names = "pll_a", "pll_a_out0", "mclk";
1279
1280		assigned-clocks = <&tegra_car TEGRA114_CLK_EXTERN1>,
1281				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1282
1283		assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1284					 <&tegra_car TEGRA114_CLK_EXTERN1>;
1285	};
1286};
v4.6
 
   1/*
   2 * This dts file supports Dalmore A04.
   3 * Other board revisions are not supported
   4 */
   5
   6/dts-v1/;
   7
   8#include <dt-bindings/input/input.h>
   9#include "tegra114.dtsi"
  10
  11/ {
  12	model = "NVIDIA Tegra114 Dalmore evaluation board";
  13	compatible = "nvidia,dalmore", "nvidia,tegra114";
  14
  15	aliases {
  16		rtc0 = "/i2c@7000d000/tps65913@58";
  17		rtc1 = "/rtc@7000e000";
  18		serial0 = &uartd;
  19	};
  20
  21	memory {
 
 
 
 
  22		reg = <0x80000000 0x40000000>;
  23	};
  24
  25	host1x@50000000 {
  26		hdmi@54280000 {
  27			status = "okay";
  28
  29			hdmi-supply = <&vdd_5v0_hdmi>;
  30			vdd-supply = <&vdd_hdmi_reg>;
  31			pll-supply = <&palmas_smps3_reg>;
  32
  33			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  34			nvidia,hpd-gpio =
  35				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  36		};
  37
  38		dsi@54300000 {
  39			status = "okay";
  40
  41			avdd-dsi-csi-supply = <&avdd_1v2_reg>;
  42
  43			panel@0 {
  44				compatible = "panasonic,vvx10f004b00",
  45					     "simple-panel";
  46				reg = <0>;
  47
  48				power-supply = <&avdd_lcd_reg>;
  49				backlight = <&backlight>;
  50			};
  51		};
  52	};
  53
  54	pinmux@70000868 {
  55		pinctrl-names = "default";
  56		pinctrl-0 = <&state_default>;
  57
  58		state_default: pinmux {
  59			clk1_out_pw4 {
  60				nvidia,pins = "clk1_out_pw4";
  61				nvidia,function = "extperiph1";
  62				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  63				nvidia,tristate = <TEGRA_PIN_DISABLE>;
  64				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  65			};
  66			dap1_din_pn1 {
  67				nvidia,pins = "dap1_din_pn1";
  68				nvidia,function = "i2s0";
  69				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  70				nvidia,tristate = <TEGRA_PIN_ENABLE>;
  71				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  72			};
  73			dap1_dout_pn2 {
  74				nvidia,pins = "dap1_dout_pn2",
  75						"dap1_fs_pn0",
  76						"dap1_sclk_pn3";
  77				nvidia,function = "i2s0";
  78				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  79				nvidia,tristate = <TEGRA_PIN_DISABLE>;
  80				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  81			};
  82			dap2_din_pa4 {
  83				nvidia,pins = "dap2_din_pa4";
  84				nvidia,function = "i2s1";
  85				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  86				nvidia,tristate = <TEGRA_PIN_ENABLE>;
  87				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  88			};
  89			dap2_dout_pa5 {
  90				nvidia,pins = "dap2_dout_pa5",
  91						"dap2_fs_pa2",
  92						"dap2_sclk_pa3";
  93				nvidia,function = "i2s1";
  94				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  95				nvidia,tristate = <TEGRA_PIN_DISABLE>;
  96				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  97			};
  98			dap4_din_pp5 {
  99				nvidia,pins = "dap4_din_pp5",
 100						"dap4_dout_pp6",
 101						"dap4_fs_pp4",
 102						"dap4_sclk_pp7";
 103				nvidia,function = "i2s3";
 104				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 105				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 106				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 107			};
 108			dvfs_pwm_px0 {
 109				nvidia,pins = "dvfs_pwm_px0",
 110						"dvfs_clk_px2";
 111				nvidia,function = "cldvfs";
 112				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 113				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 114				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 115			};
 116			ulpi_clk_py0 {
 117				nvidia,pins = "ulpi_clk_py0",
 118						"ulpi_data0_po1",
 119						"ulpi_data1_po2",
 120						"ulpi_data2_po3",
 121						"ulpi_data3_po4",
 122						"ulpi_data4_po5",
 123						"ulpi_data5_po6",
 124						"ulpi_data6_po7",
 125						"ulpi_data7_po0";
 126				nvidia,function = "ulpi";
 127				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 128				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 129				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 130			};
 131			ulpi_dir_py1 {
 132				nvidia,pins = "ulpi_dir_py1",
 133						"ulpi_nxt_py2";
 134				nvidia,function = "ulpi";
 135				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 136				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 137				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 138			};
 139			ulpi_stp_py3 {
 140				nvidia,pins = "ulpi_stp_py3";
 141				nvidia,function = "ulpi";
 142				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 143				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 144				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 145			};
 146			cam_i2c_scl_pbb1 {
 147				nvidia,pins = "cam_i2c_scl_pbb1",
 148						"cam_i2c_sda_pbb2";
 149				nvidia,function = "i2c3";
 150				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 151				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 152				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 153				nvidia,lock = <TEGRA_PIN_DISABLE>;
 154				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 155			};
 156			cam_mclk_pcc0 {
 157				nvidia,pins = "cam_mclk_pcc0",
 158						"pbb0";
 159				nvidia,function = "vi_alt3";
 160				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 161				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 162				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 163				nvidia,lock = <TEGRA_PIN_DISABLE>;
 164			};
 165			gen2_i2c_scl_pt5 {
 166				nvidia,pins = "gen2_i2c_scl_pt5",
 167						"gen2_i2c_sda_pt6";
 168				nvidia,function = "i2c2";
 169				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 170				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 171				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 172				nvidia,lock = <TEGRA_PIN_DISABLE>;
 173				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 174			};
 175			gmi_a16_pj7 {
 176				nvidia,pins = "gmi_a16_pj7";
 177				nvidia,function = "uartd";
 178				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 179				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 180				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 181			};
 182			gmi_a17_pb0 {
 183				nvidia,pins = "gmi_a17_pb0",
 184						"gmi_a18_pb1";
 185				nvidia,function = "uartd";
 186				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 187				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 188				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 189			};
 190			gmi_a19_pk7 {
 191				nvidia,pins = "gmi_a19_pk7";
 192				nvidia,function = "uartd";
 193				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 194				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 195				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 196			};
 197			gmi_ad5_pg5 {
 198				nvidia,pins = "gmi_ad5_pg5",
 199						"gmi_cs6_n_pi3",
 200						"gmi_wr_n_pi0";
 201				nvidia,function = "spi4";
 202				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 203				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 204				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 205			};
 206			gmi_ad6_pg6 {
 207				nvidia,pins = "gmi_ad6_pg6",
 208						"gmi_ad7_pg7";
 209				nvidia,function = "spi4";
 210				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 211				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 212				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 213			};
 214			gmi_ad12_ph4 {
 215				nvidia,pins = "gmi_ad12_ph4";
 216				nvidia,function = "rsvd4";
 217				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 218				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 219				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 220			};
 221			gmi_ad9_ph1 {
 222				nvidia,pins = "gmi_ad9_ph1";
 223				nvidia,function = "pwm1";
 224				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 225				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 226				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 227			};
 228			gmi_cs1_n_pj2 {
 229				nvidia,pins = "gmi_cs1_n_pj2",
 230						"gmi_oe_n_pi1";
 231				nvidia,function = "soc";
 232				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 233				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 234				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 235			};
 236			clk2_out_pw5 {
 237				nvidia,pins = "clk2_out_pw5";
 238				nvidia,function = "extperiph2";
 239				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 240				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 241				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 242			};
 243			sdmmc1_clk_pz0 {
 244				nvidia,pins = "sdmmc1_clk_pz0";
 245				nvidia,function = "sdmmc1";
 246				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 247				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 248				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 249			};
 250			sdmmc1_cmd_pz1 {
 251				nvidia,pins = "sdmmc1_cmd_pz1",
 252						"sdmmc1_dat0_py7",
 253						"sdmmc1_dat1_py6",
 254						"sdmmc1_dat2_py5",
 255						"sdmmc1_dat3_py4";
 256				nvidia,function = "sdmmc1";
 257				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 258				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 259				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 260			};
 261			sdmmc1_wp_n_pv3 {
 262				nvidia,pins = "sdmmc1_wp_n_pv3";
 263				nvidia,function = "spi4";
 264				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 265				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 266				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 267			};
 268			sdmmc3_clk_pa6 {
 269				nvidia,pins = "sdmmc3_clk_pa6";
 270				nvidia,function = "sdmmc3";
 271				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 272				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 273				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 274			};
 275			sdmmc3_cmd_pa7 {
 276				nvidia,pins = "sdmmc3_cmd_pa7",
 277						"sdmmc3_dat0_pb7",
 278						"sdmmc3_dat1_pb6",
 279						"sdmmc3_dat2_pb5",
 280						"sdmmc3_dat3_pb4",
 281						"kb_col4_pq4",
 282						"sdmmc3_clk_lb_out_pee4",
 283						"sdmmc3_clk_lb_in_pee5";
 284				nvidia,function = "sdmmc3";
 285				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 286				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 287				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 288			};
 289			sdmmc4_clk_pcc4 {
 290				nvidia,pins = "sdmmc4_clk_pcc4";
 291				nvidia,function = "sdmmc4";
 292				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 293				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 294				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 295			};
 296			sdmmc4_cmd_pt7 {
 297				nvidia,pins = "sdmmc4_cmd_pt7",
 298						"sdmmc4_dat0_paa0",
 299						"sdmmc4_dat1_paa1",
 300						"sdmmc4_dat2_paa2",
 301						"sdmmc4_dat3_paa3",
 302						"sdmmc4_dat4_paa4",
 303						"sdmmc4_dat5_paa5",
 304						"sdmmc4_dat6_paa6",
 305						"sdmmc4_dat7_paa7";
 306				nvidia,function = "sdmmc4";
 307				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 308				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 309				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 310			};
 311			clk_32k_out_pa0 {
 312				nvidia,pins = "clk_32k_out_pa0";
 313				nvidia,function = "blink";
 314				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 315				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 316				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 317			};
 318			kb_col0_pq0 {
 319				nvidia,pins = "kb_col0_pq0",
 320						"kb_col1_pq1",
 321						"kb_col2_pq2",
 322						"kb_row0_pr0",
 323						"kb_row1_pr1",
 324						"kb_row2_pr2";
 325				nvidia,function = "kbc";
 326				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 327				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 328				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 329			};
 330			dap3_din_pp1 {
 331				nvidia,pins = "dap3_din_pp1",
 332						"dap3_sclk_pp3";
 333				nvidia,function = "displayb";
 334				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 335				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 336				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 337			};
 338			pv0 {
 339				nvidia,pins = "pv0";
 340				nvidia,function = "rsvd4";
 341				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 342				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 343				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 344			};
 345			kb_row7_pr7 {
 346				nvidia,pins = "kb_row7_pr7";
 347				nvidia,function = "rsvd2";
 348				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 349				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 350				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 351			};
 352			kb_row10_ps2 {
 353				nvidia,pins = "kb_row10_ps2";
 354				nvidia,function = "uarta";
 355				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 356				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 357				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 358			};
 359			kb_row9_ps1 {
 360				nvidia,pins = "kb_row9_ps1";
 361				nvidia,function = "uarta";
 362				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 363				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 364				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 365			};
 366			pwr_i2c_scl_pz6 {
 367				nvidia,pins = "pwr_i2c_scl_pz6",
 368						"pwr_i2c_sda_pz7";
 369				nvidia,function = "i2cpwr";
 370				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 371				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 372				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 373				nvidia,lock = <TEGRA_PIN_DISABLE>;
 374				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 375			};
 376			sys_clk_req_pz5 {
 377				nvidia,pins = "sys_clk_req_pz5";
 378				nvidia,function = "sysclk";
 379				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 380				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 381				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 382			};
 383			core_pwr_req {
 384				nvidia,pins = "core_pwr_req";
 385				nvidia,function = "pwron";
 386				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 387				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 388				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 389			};
 390			cpu_pwr_req {
 391				nvidia,pins = "cpu_pwr_req";
 392				nvidia,function = "cpu";
 393				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 394				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 395				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 396			};
 397			pwr_int_n {
 398				nvidia,pins = "pwr_int_n";
 399				nvidia,function = "pmi";
 400				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 401				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 402				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 403			};
 404			reset_out_n {
 405				nvidia,pins = "reset_out_n";
 406				nvidia,function = "reset_out_n";
 407				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 408				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 409				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 410			};
 411			clk3_out_pee0 {
 412				nvidia,pins = "clk3_out_pee0";
 413				nvidia,function = "extperiph3";
 414				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 415				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 416				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 417			};
 418			gen1_i2c_scl_pc4 {
 419				nvidia,pins = "gen1_i2c_scl_pc4",
 420						"gen1_i2c_sda_pc5";
 421				nvidia,function = "i2c1";
 422				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 423				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 424				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 425				nvidia,lock = <TEGRA_PIN_DISABLE>;
 426				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 427			};
 428			uart2_cts_n_pj5 {
 429				nvidia,pins = "uart2_cts_n_pj5";
 430				nvidia,function = "uartb";
 431				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 432				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 433				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 434			};
 435			uart2_rts_n_pj6 {
 436				nvidia,pins = "uart2_rts_n_pj6";
 437				nvidia,function = "uartb";
 438				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 439				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 440				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 441			};
 442			uart2_rxd_pc3 {
 443				nvidia,pins = "uart2_rxd_pc3";
 444				nvidia,function = "irda";
 445				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 446				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 447				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 448			};
 449			uart2_txd_pc2 {
 450				nvidia,pins = "uart2_txd_pc2";
 451				nvidia,function = "irda";
 452				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 453				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 454				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 455			};
 456			uart3_cts_n_pa1 {
 457				nvidia,pins = "uart3_cts_n_pa1",
 458						"uart3_rxd_pw7";
 459				nvidia,function = "uartc";
 460				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 461				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 462				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 463			};
 464			uart3_rts_n_pc0 {
 465				nvidia,pins = "uart3_rts_n_pc0",
 466						"uart3_txd_pw6";
 467				nvidia,function = "uartc";
 468				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 469				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 470				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 471			};
 472			owr {
 473				nvidia,pins = "owr";
 474				nvidia,function = "owr";
 475				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 476				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 477				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 478			};
 479			hdmi_cec_pee3 {
 480				nvidia,pins = "hdmi_cec_pee3";
 481				nvidia,function = "cec";
 482				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 483				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 484				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 485				nvidia,lock = <TEGRA_PIN_DISABLE>;
 486				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 487			};
 488			ddc_scl_pv4 {
 489				nvidia,pins = "ddc_scl_pv4",
 490						"ddc_sda_pv5";
 491				nvidia,function = "i2c4";
 492				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 493				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 494				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 495				nvidia,lock = <TEGRA_PIN_DISABLE>;
 496				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 497			};
 498			spdif_in_pk6 {
 499				nvidia,pins = "spdif_in_pk6";
 500				nvidia,function = "usb";
 501				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 502				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 503				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 504				nvidia,lock = <TEGRA_PIN_DISABLE>;
 505			};
 506			usb_vbus_en0_pn4 {
 507				nvidia,pins = "usb_vbus_en0_pn4";
 508				nvidia,function = "usb";
 509				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 510				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 511				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 512				nvidia,lock = <TEGRA_PIN_DISABLE>;
 513				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 514			};
 515			gpio_x6_aud_px6 {
 516				nvidia,pins = "gpio_x6_aud_px6";
 517				nvidia,function = "spi6";
 518				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 519				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 520				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 521			};
 522			gpio_x4_aud_px4 {
 523				nvidia,pins = "gpio_x4_aud_px4",
 524						"gpio_x7_aud_px7";
 525				nvidia,function = "rsvd1";
 526				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 527				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 528				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 529			};
 530			gpio_x5_aud_px5 {
 531				nvidia,pins = "gpio_x5_aud_px5";
 532				nvidia,function = "rsvd1";
 533				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 534				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 535				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 536			};
 537			gpio_w2_aud_pw2 {
 538				nvidia,pins = "gpio_w2_aud_pw2";
 539				nvidia,function = "rsvd2";
 540				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 541				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 542				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 543			};
 544			gpio_w3_aud_pw3 {
 545				nvidia,pins = "gpio_w3_aud_pw3";
 546				nvidia,function = "spi6";
 547				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 548				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 549				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 550			};
 551			gpio_x1_aud_px1 {
 552				nvidia,pins = "gpio_x1_aud_px1";
 553				nvidia,function = "rsvd4";
 554				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 555				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 556				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 557			};
 558			gpio_x3_aud_px3 {
 559				nvidia,pins = "gpio_x3_aud_px3";
 560				nvidia,function = "rsvd4";
 561				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 562				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 563				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 564			};
 565			dap3_fs_pp0 {
 566				nvidia,pins = "dap3_fs_pp0";
 567				nvidia,function = "i2s2";
 568				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 569				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 570				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 571			};
 572			dap3_dout_pp2 {
 573				nvidia,pins = "dap3_dout_pp2";
 574				nvidia,function = "i2s2";
 575				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 576				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 577				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 578			};
 579			pv1 {
 580				nvidia,pins = "pv1";
 581				nvidia,function = "rsvd1";
 582				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 583				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 584				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 585			};
 586			pbb3 {
 587				nvidia,pins = "pbb3",
 588						"pbb5",
 589						"pbb6",
 590						"pbb7";
 591				nvidia,function = "rsvd4";
 592				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 593				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 594				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 595			};
 596			pcc1 {
 597				nvidia,pins = "pcc1",
 598						"pcc2";
 599				nvidia,function = "rsvd4";
 600				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 601				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 602				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 603			};
 604			gmi_ad0_pg0 {
 605				nvidia,pins = "gmi_ad0_pg0",
 606						"gmi_ad1_pg1";
 607				nvidia,function = "gmi";
 608				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 609				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 610				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 611			};
 612			gmi_ad10_ph2 {
 613				nvidia,pins = "gmi_ad10_ph2",
 614						"gmi_ad11_ph3",
 615						"gmi_ad13_ph5",
 616						"gmi_ad8_ph0",
 617						"gmi_clk_pk1";
 618				nvidia,function = "gmi";
 619				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 620				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 621				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 622			};
 623			gmi_ad2_pg2 {
 624				nvidia,pins = "gmi_ad2_pg2",
 625						"gmi_ad3_pg3";
 626				nvidia,function = "gmi";
 627				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 628				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 629				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 630			};
 631			gmi_adv_n_pk0 {
 632				nvidia,pins = "gmi_adv_n_pk0",
 633						"gmi_cs0_n_pj0",
 634						"gmi_cs2_n_pk3",
 635						"gmi_cs4_n_pk2",
 636						"gmi_cs7_n_pi6",
 637						"gmi_dqs_p_pj3",
 638						"gmi_iordy_pi5",
 639						"gmi_wp_n_pc7";
 640				nvidia,function = "gmi";
 641				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 642				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 643				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 644			};
 645			gmi_cs3_n_pk4 {
 646				nvidia,pins = "gmi_cs3_n_pk4";
 647				nvidia,function = "gmi";
 648				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 649				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 650				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 651			};
 652			clk2_req_pcc5 {
 653				nvidia,pins = "clk2_req_pcc5";
 654				nvidia,function = "rsvd4";
 655				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 656				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 657				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 658			};
 659			kb_col3_pq3 {
 660				nvidia,pins = "kb_col3_pq3",
 661						"kb_col6_pq6",
 662						"kb_col7_pq7";
 663				nvidia,function = "kbc";
 664				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 665				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 666				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 667			};
 668			kb_col5_pq5 {
 669				nvidia,pins = "kb_col5_pq5";
 670				nvidia,function = "kbc";
 671				nvidia,pull = <TEGRA_PIN_PULL_UP>;
 672				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 673				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 674			};
 675			kb_row3_pr3 {
 676				nvidia,pins = "kb_row3_pr3",
 677						"kb_row4_pr4",
 678						"kb_row6_pr6",
 679						"kb_row8_ps0";
 680				nvidia,function = "kbc";
 681				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 682				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 683				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 684			};
 685			clk3_req_pee1 {
 686				nvidia,pins = "clk3_req_pee1";
 687				nvidia,function = "rsvd4";
 688				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 689				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 690				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 691			};
 692			pu4 {
 693				nvidia,pins = "pu4";
 694				nvidia,function = "displayb";
 695				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 696				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 697				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 698			};
 699			pu5 {
 700				nvidia,pins = "pu5",
 701						"pu6";
 702				nvidia,function = "displayb";
 703				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 704				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 705				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 706			};
 707			hdmi_int_pn7 {
 708				nvidia,pins = "hdmi_int_pn7";
 709				nvidia,function = "rsvd1";
 710				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 711				nvidia,tristate = <TEGRA_PIN_DISABLE>;
 712				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 713			};
 714			clk1_req_pee2 {
 715				nvidia,pins = "clk1_req_pee2",
 716						"usb_vbus_en1_pn5";
 717				nvidia,function = "rsvd4";
 718				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 719				nvidia,tristate = <TEGRA_PIN_ENABLE>;
 720				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 721			};
 722
 723			drive_sdio1 {
 724				nvidia,pins = "drive_sdio1";
 725				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 726				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 727				nvidia,pull-down-strength = <36>;
 728				nvidia,pull-up-strength = <20>;
 729				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 730				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 731			};
 732			drive_sdio3 {
 733				nvidia,pins = "drive_sdio3";
 734				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 735				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 736				nvidia,pull-down-strength = <22>;
 737				nvidia,pull-up-strength = <36>;
 738				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 739				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 740			};
 741			drive_gma {
 742				nvidia,pins = "drive_gma";
 743				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 744				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 745				nvidia,pull-down-strength = <2>;
 746				nvidia,pull-up-strength = <1>;
 747				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 748				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 749			};
 750		};
 751	};
 752
 753	serial@70006300 {
 754		status = "okay";
 755	};
 756
 757	pwm@7000a000 {
 758		status = "okay";
 759	};
 760
 761	i2c@7000c000 {
 762		status = "okay";
 763		clock-frequency = <100000>;
 764
 765		battery: smart-battery@b {
 766			compatible = "ti,bq20z45", "sbs,sbs-battery";
 767			reg = <0xb>;
 768			battery-name = "battery";
 769			sbs,i2c-retry-count = <2>;
 770			sbs,poll-retry-count = <100>;
 771			power-supplies = <&charger>;
 772		};
 773
 774		rt5640: rt5640@1c {
 775			compatible = "realtek,rt5640";
 776			reg = <0x1c>;
 777			interrupt-parent = <&gpio>;
 778			interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>;
 779			realtek,ldo1-en-gpios =
 780				<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
 781		};
 782
 783		temperature-sensor@4c {
 784			compatible = "onnn,nct1008";
 785			reg = <0x4c>;
 786			vcc-supply = <&palmas_ldo6_reg>;
 787			interrupt-parent = <&gpio>;
 788			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
 789		};
 790	};
 791
 792	hdmi_ddc: i2c@7000c700 {
 793		status = "okay";
 794	};
 795
 796	i2c@7000d000 {
 797		status = "okay";
 798		clock-frequency = <400000>;
 799
 800		tps51632@43 {
 801			compatible = "ti,tps51632";
 802			reg = <0x43>;
 803			regulator-name = "vdd-cpu";
 804			regulator-min-microvolt = <500000>;
 805			regulator-max-microvolt = <1520000>;
 806			regulator-boot-on;
 807			regulator-always-on;
 808		};
 809
 810		tps65090@48 {
 811			compatible = "ti,tps65090";
 812			reg = <0x48>;
 813			interrupt-parent = <&gpio>;
 814			interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
 815
 816			vsys1-supply = <&vdd_ac_bat_reg>;
 817			vsys2-supply = <&vdd_ac_bat_reg>;
 818			vsys3-supply = <&vdd_ac_bat_reg>;
 819			infet1-supply = <&vdd_ac_bat_reg>;
 820			infet2-supply = <&vdd_ac_bat_reg>;
 821			infet3-supply = <&tps65090_dcdc2_reg>;
 822			infet4-supply = <&tps65090_dcdc2_reg>;
 823			infet5-supply = <&tps65090_dcdc2_reg>;
 824			infet6-supply = <&tps65090_dcdc2_reg>;
 825			infet7-supply = <&tps65090_dcdc2_reg>;
 826			vsys-l1-supply = <&vdd_ac_bat_reg>;
 827			vsys-l2-supply = <&vdd_ac_bat_reg>;
 828
 829			charger: charger {
 830				compatible = "ti,tps65090-charger";
 831				ti,enable-low-current-chrg;
 832			};
 833
 834			regulators {
 835				tps65090_dcdc1_reg: dcdc1 {
 836					regulator-name = "vdd-sys-5v0";
 837					regulator-always-on;
 838					regulator-boot-on;
 839				};
 840
 841				tps65090_dcdc2_reg: dcdc2 {
 842					regulator-name = "vdd-sys-3v3";
 843					regulator-always-on;
 844					regulator-boot-on;
 845				};
 846
 847				tps65090_dcdc3_reg: dcdc3 {
 848					regulator-name = "vdd-ao";
 849					regulator-always-on;
 850					regulator-boot-on;
 851				};
 852
 853				vdd_bl_reg: fet1 {
 854					regulator-name = "vdd-lcd-bl";
 855				};
 856
 857				fet3 {
 858					regulator-name = "vdd-modem-3v3";
 859				};
 860
 861				avdd_lcd_reg: fet4 {
 862					regulator-name = "avdd-lcd";
 863				};
 864
 865				fet5 {
 866					regulator-name = "vdd-lvds";
 867				};
 868
 869				fet6 {
 870					regulator-name = "vdd-sd-slot";
 871					regulator-always-on;
 872					regulator-boot-on;
 873				};
 874
 875				fet7 {
 876					regulator-name = "vdd-com-3v3";
 877				};
 878
 879				ldo1 {
 880					regulator-name = "vdd-sby-5v0";
 881					regulator-always-on;
 882					regulator-boot-on;
 883				};
 884
 885				ldo2 {
 886					regulator-name = "vdd-sby-3v3";
 887					regulator-always-on;
 888					regulator-boot-on;
 889				};
 890			};
 891		};
 892
 893		palmas: tps65913@58 {
 894			compatible = "ti,palmas";
 895			reg = <0x58>;
 896			interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>;
 897
 898			#interrupt-cells = <2>;
 899			interrupt-controller;
 900
 901			ti,system-power-controller;
 902
 903			palmas_gpio: gpio {
 904				compatible = "ti,palmas-gpio";
 905				gpio-controller;
 906				#gpio-cells = <2>;
 907			};
 908
 909			pmic {
 910				compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
 911				smps1-in-supply = <&tps65090_dcdc3_reg>;
 912				smps3-in-supply = <&tps65090_dcdc3_reg>;
 913				smps4-in-supply = <&tps65090_dcdc2_reg>;
 914				smps7-in-supply = <&tps65090_dcdc2_reg>;
 915				smps8-in-supply = <&tps65090_dcdc2_reg>;
 916				smps9-in-supply = <&tps65090_dcdc2_reg>;
 917				ldo1-in-supply = <&tps65090_dcdc2_reg>;
 918				ldo2-in-supply = <&tps65090_dcdc2_reg>;
 919				ldo3-in-supply = <&palmas_smps3_reg>;
 920				ldo4-in-supply = <&tps65090_dcdc2_reg>;
 921				ldo5-in-supply = <&vdd_ac_bat_reg>;
 922				ldo6-in-supply = <&tps65090_dcdc2_reg>;
 923				ldo7-in-supply = <&tps65090_dcdc2_reg>;
 924				ldo8-in-supply = <&tps65090_dcdc3_reg>;
 925				ldo9-in-supply = <&palmas_smps9_reg>;
 926				ldoln-in-supply = <&tps65090_dcdc1_reg>;
 927				ldousb-in-supply = <&tps65090_dcdc1_reg>;
 928
 929				regulators {
 930					smps12 {
 931						regulator-name = "vddio-ddr";
 932						regulator-min-microvolt = <1350000>;
 933						regulator-max-microvolt = <1350000>;
 934						regulator-always-on;
 935						regulator-boot-on;
 936					};
 937
 938					palmas_smps3_reg: smps3 {
 939						regulator-name = "vddio-1v8";
 940						regulator-min-microvolt = <1800000>;
 941						regulator-max-microvolt = <1800000>;
 942						regulator-always-on;
 943						regulator-boot-on;
 944					};
 945
 946					smps45 {
 947						regulator-name = "vdd-core";
 948						regulator-min-microvolt = <900000>;
 949						regulator-max-microvolt = <1400000>;
 950						regulator-always-on;
 951						regulator-boot-on;
 952					};
 953
 954					smps457 {
 955						regulator-name = "vdd-core";
 956						regulator-min-microvolt = <900000>;
 957						regulator-max-microvolt = <1400000>;
 958						regulator-always-on;
 959						regulator-boot-on;
 960					};
 961
 962					smps8 {
 963						regulator-name = "avdd-pll";
 964						regulator-min-microvolt = <1050000>;
 965						regulator-max-microvolt = <1050000>;
 966						regulator-always-on;
 967						regulator-boot-on;
 968					};
 969
 970					palmas_smps9_reg: smps9 {
 971						regulator-name = "sdhci-vdd-sd-slot";
 972						regulator-min-microvolt = <2800000>;
 973						regulator-max-microvolt = <2800000>;
 974						regulator-always-on;
 975					};
 976
 977					ldo1 {
 978						regulator-name = "avdd-cam1";
 979						regulator-min-microvolt = <2800000>;
 980						regulator-max-microvolt = <2800000>;
 981					};
 982
 983					ldo2 {
 984						regulator-name = "avdd-cam2";
 985						regulator-min-microvolt = <2800000>;
 986						regulator-max-microvolt = <2800000>;
 987					};
 988
 989					avdd_1v2_reg: ldo3 {
 990						regulator-name = "avdd-dsi-csi";
 991						regulator-min-microvolt = <1200000>;
 992						regulator-max-microvolt = <1200000>;
 993					};
 994
 995					ldo4 {
 996						regulator-name = "vpp-fuse";
 997						regulator-min-microvolt = <1800000>;
 998						regulator-max-microvolt = <1800000>;
 999					};
1000
1001					palmas_ldo6_reg: ldo6 {
1002						regulator-name = "vdd-sensor-2v85";
1003						regulator-min-microvolt = <2850000>;
1004						regulator-max-microvolt = <2850000>;
1005					};
1006
1007					ldo7 {
1008						regulator-name = "vdd-af-cam1";
1009						regulator-min-microvolt = <2800000>;
1010						regulator-max-microvolt = <2800000>;
1011					};
1012
1013					ldo8 {
1014						regulator-name = "vdd-rtc";
1015						regulator-min-microvolt = <900000>;
1016						regulator-max-microvolt = <900000>;
1017						regulator-always-on;
1018						regulator-boot-on;
1019						ti,enable-ldo8-tracking;
1020					};
1021
1022					ldo9 {
1023						regulator-name = "vddio-sdmmc-2";
1024						regulator-min-microvolt = <1800000>;
1025						regulator-max-microvolt = <3300000>;
1026						regulator-always-on;
1027						regulator-boot-on;
1028					};
1029
1030					ldoln {
1031						regulator-name = "hvdd-usb";
1032						regulator-min-microvolt = <3300000>;
1033						regulator-max-microvolt = <3300000>;
1034					};
1035
1036					ldousb {
1037						regulator-name = "avdd-usb";
1038						regulator-min-microvolt = <3300000>;
1039						regulator-max-microvolt = <3300000>;
1040						regulator-always-on;
1041						regulator-boot-on;
1042					};
1043
1044					regen1 {
1045						regulator-name = "rail-3v3";
1046						regulator-max-microvolt = <3300000>;
1047						regulator-always-on;
1048						regulator-boot-on;
1049					};
1050
1051					regen2 {
1052						regulator-name = "rail-5v0";
1053						regulator-max-microvolt = <5000000>;
1054						regulator-always-on;
1055						regulator-boot-on;
1056					};
1057				};
1058			};
1059
1060			rtc {
1061				compatible = "ti,palmas-rtc";
1062				interrupt-parent = <&palmas>;
1063				interrupts = <8 0>;
1064			};
1065
1066			pinmux {
1067				compatible = "ti,tps65913-pinctrl";
1068				pinctrl-names = "default";
1069				pinctrl-0 = <&palmas_default>;
1070
1071				palmas_default: pinmux {
1072					pin_gpio6 {
1073						pins = "gpio6";
1074						function = "gpio";
1075					};
1076				};
1077			};
1078		};
1079	};
1080
1081	spi@7000da00 {
1082		status = "okay";
1083		spi-max-frequency = <25000000>;
1084		spi-flash@0 {
1085			compatible = "winbond,w25q32dw";
1086			reg = <0>;
1087			spi-max-frequency = <20000000>;
1088		};
1089	};
1090
1091	pmc@7000e400 {
1092		nvidia,invert-interrupt;
1093		nvidia,suspend-mode = <1>;
1094		nvidia,cpu-pwr-good-time = <500>;
1095		nvidia,cpu-pwr-off-time = <300>;
1096		nvidia,core-pwr-good-time = <641 3845>;
1097		nvidia,core-pwr-off-time = <61036>;
1098		nvidia,core-power-req-active-high;
1099		nvidia,sys-clock-req-active-high;
1100	};
1101
1102	ahub@70080000 {
1103		i2s@70080400 {
1104			status = "okay";
1105		};
1106	};
1107
1108	sdhci@78000400 {
1109		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1110		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1111		bus-width = <4>;
1112		status = "okay";
1113	};
1114
1115	sdhci@78000600 {
1116		bus-width = <8>;
1117		status = "okay";
1118		non-removable;
1119	};
1120
 
 
 
 
 
 
 
 
 
 
1121	usb@7d008000 {
1122		status = "okay";
1123	};
1124
1125	usb-phy@7d008000 {
1126		status = "okay";
1127		vbus-supply = <&usb3_vbus_reg>;
1128	};
1129
1130	backlight: backlight {
1131		compatible = "pwm-backlight";
1132
1133		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1134		power-supply = <&vdd_bl_reg>;
1135		pwms = <&pwm 1 1000000>;
1136
1137		brightness-levels = <0 4 8 16 32 64 128 255>;
1138		default-brightness-level = <6>;
1139	};
1140
1141	clocks {
1142		compatible = "simple-bus";
1143		#address-cells = <1>;
1144		#size-cells = <0>;
1145
1146		clk32k_in: clock@0 {
1147			compatible = "fixed-clock";
1148			reg=<0>;
1149			#clock-cells = <0>;
1150			clock-frequency = <32768>;
1151		};
1152	};
1153
1154	gpio-keys {
1155		compatible = "gpio-keys";
1156
1157		home {
1158			label = "Home";
1159			gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1160			linux,code = <KEY_HOME>;
1161		};
1162
1163		power {
1164			label = "Power";
1165			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1166			linux,code = <KEY_POWER>;
1167			gpio-key,wakeup;
1168		};
1169
1170		volume_down {
1171			label = "Volume Down";
1172			gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1173			linux,code = <KEY_VOLUMEDOWN>;
1174		};
1175
1176		volume_up {
1177			label = "Volume Up";
1178			gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1179			linux,code = <KEY_VOLUMEUP>;
1180		};
1181	};
1182
1183	regulators {
1184		compatible = "simple-bus";
1185		#address-cells = <1>;
1186		#size-cells = <0>;
 
 
 
1187
1188		vdd_ac_bat_reg: regulator@0 {
1189			compatible = "regulator-fixed";
1190			reg = <0>;
1191			regulator-name = "vdd_ac_bat";
1192			regulator-min-microvolt = <5000000>;
1193			regulator-max-microvolt = <5000000>;
1194			regulator-always-on;
1195		};
1196
1197		dvdd_ts_reg: regulator@1 {
1198			compatible = "regulator-fixed";
1199			reg = <1>;
1200			regulator-name = "dvdd_ts";
1201			regulator-min-microvolt = <1800000>;
1202			regulator-max-microvolt = <1800000>;
1203			enable-active-high;
1204			gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1205		};
 
1206
1207		usb1_vbus_reg: regulator@3 {
1208			compatible = "regulator-fixed";
1209			reg = <3>;
1210			regulator-name = "usb1_vbus";
1211			regulator-min-microvolt = <5000000>;
1212			regulator-max-microvolt = <5000000>;
1213			enable-active-high;
1214			gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1215			gpio-open-drain;
1216			vin-supply = <&tps65090_dcdc1_reg>;
1217		};
1218
1219		usb3_vbus_reg: regulator@4 {
1220			compatible = "regulator-fixed";
1221			reg = <4>;
1222			regulator-name = "usb2_vbus";
1223			regulator-min-microvolt = <5000000>;
1224			regulator-max-microvolt = <5000000>;
1225			enable-active-high;
1226			gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1227			gpio-open-drain;
1228			vin-supply = <&tps65090_dcdc1_reg>;
1229		};
1230
1231		vdd_hdmi_reg: regulator@5 {
1232			compatible = "regulator-fixed";
1233			reg = <5>;
1234			regulator-name = "vdd_hdmi_5v0";
1235			regulator-min-microvolt = <5000000>;
1236			regulator-max-microvolt = <5000000>;
1237			vin-supply = <&tps65090_dcdc1_reg>;
1238		};
1239
1240		vdd_cam_1v8_reg: regulator@6 {
1241			compatible = "regulator-fixed";
1242			reg = <6>;
1243			regulator-name = "vdd_cam_1v8_reg";
1244			regulator-min-microvolt = <1800000>;
1245			regulator-max-microvolt = <1800000>;
1246			enable-active-high;
1247			gpio = <&palmas_gpio 6 0>;
1248		};
1249
1250		vdd_5v0_hdmi: regulator@7 {
1251			compatible = "regulator-fixed";
1252			reg = <7>;
1253			regulator-name = "VDD_5V0_HDMI_CON";
1254			regulator-min-microvolt = <5000000>;
1255			regulator-max-microvolt = <5000000>;
1256			gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1257			enable-active-high;
1258			vin-supply = <&tps65090_dcdc1_reg>;
1259		};
1260	};
1261
1262	sound {
1263		compatible = "nvidia,tegra-audio-rt5640-dalmore",
1264			     "nvidia,tegra-audio-rt5640";
1265		nvidia,model = "NVIDIA Tegra Dalmore";
1266
1267		nvidia,audio-routing =
1268			"Headphones", "HPOR",
1269			"Headphones", "HPOL",
1270			"Speakers", "SPORP",
1271			"Speakers", "SPORN",
1272			"Speakers", "SPOLP",
1273			"Speakers", "SPOLN",
1274			"Mic Jack", "MICBIAS1",
1275			"IN2P", "Mic Jack";
1276
1277		nvidia,i2s-controller = <&tegra_i2s1>;
1278		nvidia,audio-codec = <&rt5640>;
1279
1280		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1281
1282		clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1283			 <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1284			 <&tegra_car TEGRA114_CLK_EXTERN1>;
1285		clock-names = "pll_a", "pll_a_out0", "mclk";
 
 
 
 
 
 
1286	};
1287};