Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Porter board
4 *
5 * Copyright (C) 2015 Cogent Embedded, Inc.
6 */
7
8/*
9 * SSI-AK4642
10 *
11 * JP3: 2-1: AK4642
12 * 2-3: ADV7511
13 *
14 * This command is required before playback/capture:
15 *
16 * amixer set "LINEOUT Mixer DACL" on
17 */
18
19/dts-v1/;
20#include "r8a7791.dtsi"
21#include <dt-bindings/gpio/gpio.h>
22
23/ {
24 model = "Porter";
25 compatible = "renesas,porter", "renesas,r8a7791";
26
27 aliases {
28 serial0 = &scif0;
29 i2c9 = &gpioi2c2;
30 i2c10 = &i2chdmi;
31 mmc0 = &sdhi0;
32 mmc1 = &sdhi2;
33 };
34
35 chosen {
36 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
37 stdout-path = "serial0:115200n8";
38 };
39
40 memory@40000000 {
41 device_type = "memory";
42 reg = <0 0x40000000 0 0x40000000>;
43 };
44
45 memory@200000000 {
46 device_type = "memory";
47 reg = <2 0x00000000 0 0x40000000>;
48 };
49
50 vcc_sdhi0: regulator-vcc-sdhi0 {
51 compatible = "regulator-fixed";
52
53 regulator-name = "SDHI0 Vcc";
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
56 regulator-always-on;
57 };
58
59 vccq_sdhi0: regulator-vccq-sdhi0 {
60 compatible = "regulator-gpio";
61
62 regulator-name = "SDHI0 VccQ";
63 regulator-min-microvolt = <1800000>;
64 regulator-max-microvolt = <3300000>;
65
66 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
67 gpios-states = <1>;
68 states = <3300000 1>, <1800000 0>;
69 };
70
71 vcc_sdhi2: regulator-vcc-sdhi2 {
72 compatible = "regulator-fixed";
73
74 regulator-name = "SDHI2 Vcc";
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
77 regulator-always-on;
78 };
79
80 vccq_sdhi2: regulator-vccq-sdhi2 {
81 compatible = "regulator-gpio";
82
83 regulator-name = "SDHI2 VccQ";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <3300000>;
86
87 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
88 gpios-states = <1>;
89 states = <3300000 1>, <1800000 0>;
90 };
91
92 hdmi-out {
93 compatible = "hdmi-connector";
94 type = "a";
95
96 port {
97 hdmi_con: endpoint {
98 remote-endpoint = <&adv7511_out>;
99 };
100 };
101 };
102
103 x3_clk: x3-clock {
104 compatible = "fixed-clock";
105 #clock-cells = <0>;
106 clock-frequency = <148500000>;
107 };
108
109 x16_clk: x16-clock {
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
112 clock-frequency = <74250000>;
113 };
114
115 x14_clk: audio_clock {
116 compatible = "fixed-clock";
117 #clock-cells = <0>;
118 clock-frequency = <11289600>;
119 };
120
121 sound {
122 compatible = "simple-audio-card";
123
124 simple-audio-card,format = "left_j";
125 simple-audio-card,bitclock-master = <&soundcodec>;
126 simple-audio-card,frame-master = <&soundcodec>;
127
128 simple-audio-card,cpu {
129 sound-dai = <&rcar_sound>;
130 };
131
132 soundcodec: simple-audio-card,codec {
133 sound-dai = <&ak4642>;
134 clocks = <&x14_clk>;
135 };
136 };
137
138 gpioi2c2: i2c-9 {
139 #address-cells = <1>;
140 #size-cells = <0>;
141 compatible = "i2c-gpio";
142 status = "disabled";
143 scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
144 sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
145 i2c-gpio,delay-us = <5>;
146 };
147
148 /*
149 * A fallback to GPIO is provided for I2C2.
150 */
151 i2chdmi: i2c-10 {
152 compatible = "i2c-demux-pinctrl";
153 i2c-parent = <&i2c2>, <&gpioi2c2>;
154 i2c-bus-name = "i2c-hdmi";
155 #address-cells = <1>;
156 #size-cells = <0>;
157
158 ak4642: codec@12 {
159 compatible = "asahi-kasei,ak4642";
160 #sound-dai-cells = <0>;
161 reg = <0x12>;
162 };
163
164 composite-in@20 {
165 compatible = "adi,adv7180";
166 reg = <0x20>;
167
168 port {
169 adv7180: endpoint {
170 bus-width = <8>;
171 remote-endpoint = <&vin0ep>;
172 };
173 };
174 };
175
176 hdmi@39 {
177 compatible = "adi,adv7511w";
178 reg = <0x39>;
179 interrupt-parent = <&gpio3>;
180 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
181
182 adi,input-depth = <8>;
183 adi,input-colorspace = "rgb";
184 adi,input-clock = "1x";
185
186 ports {
187 #address-cells = <1>;
188 #size-cells = <0>;
189
190 port@0 {
191 reg = <0>;
192 adv7511_in: endpoint {
193 remote-endpoint = <&du_out_rgb>;
194 };
195 };
196
197 port@1 {
198 reg = <1>;
199 adv7511_out: endpoint {
200 remote-endpoint = <&hdmi_con>;
201 };
202 };
203 };
204 };
205 };
206};
207
208&extal_clk {
209 clock-frequency = <20000000>;
210};
211
212&pfc {
213 scif0_pins: scif0 {
214 groups = "scif0_data_d";
215 function = "scif0";
216 };
217
218 ether_pins: ether {
219 groups = "eth_link", "eth_mdio", "eth_rmii";
220 function = "eth";
221 };
222
223 phy1_pins: phy1 {
224 groups = "intc_irq0";
225 function = "intc";
226 };
227
228 pmic_irq_pins: pmicirq {
229 groups = "intc_irq2";
230 function = "intc";
231 };
232
233 sdhi0_pins: sd0 {
234 groups = "sdhi0_data4", "sdhi0_ctrl";
235 function = "sdhi0";
236 };
237
238 sdhi2_pins: sd2 {
239 groups = "sdhi2_data4", "sdhi2_ctrl";
240 function = "sdhi2";
241 };
242
243 qspi_pins: qspi {
244 groups = "qspi_ctrl", "qspi_data4";
245 function = "qspi";
246 };
247
248 i2c2_pins: i2c2 {
249 groups = "i2c2";
250 function = "i2c2";
251 };
252
253 usb0_pins: usb0 {
254 groups = "usb0";
255 function = "usb0";
256 };
257
258 usb1_pins: usb1 {
259 groups = "usb1";
260 function = "usb1";
261 };
262
263 vin0_pins: vin0 {
264 groups = "vin0_data8", "vin0_clk";
265 function = "vin0";
266 };
267
268 can0_pins: can0 {
269 groups = "can0_data";
270 function = "can0";
271 };
272
273 du_pins: du {
274 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
275 function = "du";
276 };
277
278 ssi_pins: sound {
279 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
280 function = "ssi";
281 };
282
283 audio_clk_pins: audio_clk {
284 groups = "audio_clk_a";
285 function = "audio_clk";
286 };
287};
288
289&scif0 {
290 pinctrl-0 = <&scif0_pins>;
291 pinctrl-names = "default";
292
293 status = "okay";
294};
295
296ðer {
297 pinctrl-0 = <ðer_pins>, <&phy1_pins>;
298 pinctrl-names = "default";
299
300 phy-handle = <&phy1>;
301 renesas,ether-link-active-low;
302 status = "okay";
303
304 phy1: ethernet-phy@1 {
305 reg = <1>;
306 interrupt-parent = <&irqc0>;
307 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
308 micrel,led-mode = <1>;
309 reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
310 };
311};
312
313&sdhi0 {
314 pinctrl-0 = <&sdhi0_pins>;
315 pinctrl-names = "default";
316
317 vmmc-supply = <&vcc_sdhi0>;
318 vqmmc-supply = <&vccq_sdhi0>;
319 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
320 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
321 status = "okay";
322};
323
324&sdhi2 {
325 pinctrl-0 = <&sdhi2_pins>;
326 pinctrl-names = "default";
327
328 vmmc-supply = <&vcc_sdhi2>;
329 vqmmc-supply = <&vccq_sdhi2>;
330 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
331 status = "okay";
332};
333
334&qspi {
335 pinctrl-0 = <&qspi_pins>;
336 pinctrl-names = "default";
337
338 status = "okay";
339
340 flash@0 {
341 compatible = "spansion,s25fl512s", "jedec,spi-nor";
342 reg = <0>;
343 spi-max-frequency = <30000000>;
344 spi-tx-bus-width = <4>;
345 spi-rx-bus-width = <4>;
346 m25p,fast-read;
347
348 partitions {
349 compatible = "fixed-partitions";
350 #address-cells = <1>;
351 #size-cells = <1>;
352
353 partition@0 {
354 label = "loader_prg";
355 reg = <0x00000000 0x00040000>;
356 read-only;
357 };
358 partition@40000 {
359 label = "user_prg";
360 reg = <0x00040000 0x00400000>;
361 read-only;
362 };
363 partition@440000 {
364 label = "flash_fs";
365 reg = <0x00440000 0x03bc0000>;
366 };
367 };
368 };
369};
370
371&i2c2 {
372 pinctrl-0 = <&i2c2_pins>;
373 pinctrl-names = "i2c-hdmi";
374
375 clock-frequency = <400000>;
376};
377
378&i2c6 {
379 pinctrl-names = "default";
380 pinctrl-0 = <&pmic_irq_pins>;
381 status = "okay";
382 clock-frequency = <100000>;
383
384 pmic@5a {
385 compatible = "dlg,da9063l";
386 reg = <0x5a>;
387 interrupt-parent = <&irqc0>;
388 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
389 interrupt-controller;
390
391 wdt {
392 compatible = "dlg,da9063-watchdog";
393 };
394 };
395
396 vdd_dvfs: regulator@68 {
397 compatible = "dlg,da9210";
398 reg = <0x68>;
399 interrupt-parent = <&irqc0>;
400 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
401
402 regulator-min-microvolt = <1000000>;
403 regulator-max-microvolt = <1000000>;
404 regulator-boot-on;
405 regulator-always-on;
406 };
407};
408
409&sata0 {
410 status = "okay";
411};
412
413&cpu0 {
414 cpu0-supply = <&vdd_dvfs>;
415};
416
417/* composite video input */
418&vin0 {
419 status = "okay";
420 pinctrl-0 = <&vin0_pins>;
421 pinctrl-names = "default";
422
423 port {
424 vin0ep: endpoint {
425 remote-endpoint = <&adv7180>;
426 bus-width = <8>;
427 };
428 };
429};
430
431&pci0 {
432 pinctrl-0 = <&usb0_pins>;
433 pinctrl-names = "default";
434
435 status = "okay";
436};
437
438&pci1 {
439 pinctrl-0 = <&usb1_pins>;
440 pinctrl-names = "default";
441
442 status = "okay";
443};
444
445&hsusb {
446 pinctrl-0 = <&usb0_pins>;
447 pinctrl-names = "default";
448
449 status = "okay";
450};
451
452&usbphy {
453 status = "okay";
454};
455
456&pcie_bus_clk {
457 clock-frequency = <100000000>;
458};
459
460&pciec {
461 status = "okay";
462};
463
464&can0 {
465 pinctrl-0 = <&can0_pins>;
466 pinctrl-names = "default";
467
468 status = "okay";
469};
470
471&du {
472 pinctrl-0 = <&du_pins>;
473 pinctrl-names = "default";
474 status = "okay";
475
476 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
477 <&x3_clk>, <&x16_clk>;
478 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
479
480 ports {
481 port@0 {
482 endpoint {
483 remote-endpoint = <&adv7511_in>;
484 };
485 };
486 };
487};
488
489&lvds0 {
490 ports {
491 port@1 {
492 lvds_connector: endpoint {
493 };
494 };
495 };
496};
497
498&rcar_sound {
499 pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>;
500 pinctrl-names = "default";
501 status = "okay";
502
503 /* Single DAI */
504 #sound-dai-cells = <0>;
505
506 rcar_sound,dai {
507 dai0 {
508 playback = <&ssi0>;
509 capture = <&ssi1>;
510 };
511 };
512};
513
514&rwdt {
515 timeout-sec = <60>;
516 status = "okay";
517};
518
519&ssi1 {
520 shared-pin;
521};
1/*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/*
12 * SSI-AK4642
13 *
14 * JP3: 2-1: AK4642
15 * 2-3: ADV7511
16 *
17 * This command is required before playback/capture:
18 *
19 * amixer set "LINEOUT Mixer DACL" on
20 */
21
22/dts-v1/;
23#include "r8a7791.dtsi"
24#include <dt-bindings/gpio/gpio.h>
25
26/ {
27 model = "Porter";
28 compatible = "renesas,porter", "renesas,r8a7791";
29
30 aliases {
31 serial0 = &scif0;
32 };
33
34 chosen {
35 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
36 stdout-path = "serial0:115200n8";
37 };
38
39 memory@40000000 {
40 device_type = "memory";
41 reg = <0 0x40000000 0 0x40000000>;
42 };
43
44 memory@200000000 {
45 device_type = "memory";
46 reg = <2 0x00000000 0 0x40000000>;
47 };
48
49 vcc_sdhi0: regulator@0 {
50 compatible = "regulator-fixed";
51
52 regulator-name = "SDHI0 Vcc";
53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <3300000>;
55 regulator-always-on;
56 };
57
58 vccq_sdhi0: regulator@1 {
59 compatible = "regulator-gpio";
60
61 regulator-name = "SDHI0 VccQ";
62 regulator-min-microvolt = <1800000>;
63 regulator-max-microvolt = <3300000>;
64
65 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
66 gpios-states = <1>;
67 states = <3300000 1
68 1800000 0>;
69 };
70
71 vcc_sdhi2: regulator@2 {
72 compatible = "regulator-fixed";
73
74 regulator-name = "SDHI2 Vcc";
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
77 regulator-always-on;
78 };
79
80 vccq_sdhi2: regulator@3 {
81 compatible = "regulator-gpio";
82
83 regulator-name = "SDHI2 VccQ";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <3300000>;
86
87 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
88 gpios-states = <1>;
89 states = <3300000 1
90 1800000 0>;
91 };
92
93 hdmi-out {
94 compatible = "hdmi-connector";
95 type = "a";
96
97 port {
98 hdmi_con: endpoint {
99 remote-endpoint = <&adv7511_out>;
100 };
101 };
102 };
103
104 x3_clk: x3-clock {
105 compatible = "fixed-clock";
106 #clock-cells = <0>;
107 clock-frequency = <148500000>;
108 };
109
110 x16_clk: x16-clock {
111 compatible = "fixed-clock";
112 #clock-cells = <0>;
113 clock-frequency = <74250000>;
114 };
115
116 x14_clk: x14-clock {
117 compatible = "fixed-clock";
118 #clock-cells = <0>;
119 clock-frequency = <11289600>;
120 clock-output-names = "audio_clock";
121 };
122
123 sound {
124 compatible = "simple-audio-card";
125
126 simple-audio-card,format = "left_j";
127 simple-audio-card,bitclock-master = <&soundcodec>;
128 simple-audio-card,frame-master = <&soundcodec>;
129
130 simple-audio-card,cpu {
131 sound-dai = <&rcar_sound>;
132 };
133
134 soundcodec: simple-audio-card,codec {
135 sound-dai = <&ak4642>;
136 clocks = <&x14_clk>;
137 };
138 };
139};
140
141&extal_clk {
142 clock-frequency = <20000000>;
143};
144
145&pfc {
146 scif0_pins: serial0 {
147 renesas,groups = "scif0_data_d";
148 renesas,function = "scif0";
149 };
150
151 ether_pins: ether {
152 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
153 renesas,function = "eth";
154 };
155
156 phy1_pins: phy1 {
157 renesas,groups = "intc_irq0";
158 renesas,function = "intc";
159 };
160
161 sdhi0_pins: sd0 {
162 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
163 renesas,function = "sdhi0";
164 };
165
166 sdhi2_pins: sd2 {
167 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
168 renesas,function = "sdhi2";
169 };
170
171 qspi_pins: spi0 {
172 renesas,groups = "qspi_ctrl", "qspi_data4";
173 renesas,function = "qspi";
174 };
175
176 i2c2_pins: i2c2 {
177 renesas,groups = "i2c2";
178 renesas,function = "i2c2";
179 };
180
181 usb0_pins: usb0 {
182 renesas,groups = "usb0";
183 renesas,function = "usb0";
184 };
185
186 usb1_pins: usb1 {
187 renesas,groups = "usb1";
188 renesas,function = "usb1";
189 };
190
191 vin0_pins: vin0 {
192 renesas,groups = "vin0_data8", "vin0_clk";
193 renesas,function = "vin0";
194 };
195
196 can0_pins: can0 {
197 renesas,groups = "can0_data";
198 renesas,function = "can0";
199 };
200
201 du_pins: du {
202 renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
203 renesas,function = "du";
204 };
205
206 ssi_pins: sound {
207 renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
208 renesas,function = "ssi";
209 };
210
211 audio_clk_pins: audio_clk {
212 renesas,groups = "audio_clk_a";
213 renesas,function = "audio_clk";
214 };
215};
216
217&scif0 {
218 pinctrl-0 = <&scif0_pins>;
219 pinctrl-names = "default";
220
221 status = "okay";
222};
223
224ðer {
225 pinctrl-0 = <ðer_pins &phy1_pins>;
226 pinctrl-names = "default";
227
228 phy-handle = <&phy1>;
229 renesas,ether-link-active-low;
230 status = "ok";
231
232 phy1: ethernet-phy@1 {
233 reg = <1>;
234 interrupt-parent = <&irqc0>;
235 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
236 micrel,led-mode = <1>;
237 };
238};
239
240&sdhi0 {
241 pinctrl-0 = <&sdhi0_pins>;
242 pinctrl-names = "default";
243
244 vmmc-supply = <&vcc_sdhi0>;
245 vqmmc-supply = <&vccq_sdhi0>;
246 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
247 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
248 status = "okay";
249};
250
251&sdhi2 {
252 pinctrl-0 = <&sdhi2_pins>;
253 pinctrl-names = "default";
254
255 vmmc-supply = <&vcc_sdhi2>;
256 vqmmc-supply = <&vccq_sdhi2>;
257 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
258 status = "okay";
259};
260
261&qspi {
262 pinctrl-0 = <&qspi_pins>;
263 pinctrl-names = "default";
264
265 status = "okay";
266
267 flash@0 {
268 compatible = "spansion,s25fl512s", "jedec,spi-nor";
269 reg = <0>;
270 spi-max-frequency = <30000000>;
271 spi-tx-bus-width = <4>;
272 spi-rx-bus-width = <4>;
273 m25p,fast-read;
274
275 partitions {
276 compatible = "fixed-partitions";
277 #address-cells = <1>;
278 #size-cells = <1>;
279
280 partition@0 {
281 label = "loader_prg";
282 reg = <0x00000000 0x00040000>;
283 read-only;
284 };
285 partition@40000 {
286 label = "user_prg";
287 reg = <0x00040000 0x00400000>;
288 read-only;
289 };
290 partition@440000 {
291 label = "flash_fs";
292 reg = <0x00440000 0x03bc0000>;
293 };
294 };
295 };
296};
297
298&i2c2 {
299 pinctrl-0 = <&i2c2_pins>;
300 pinctrl-names = "default";
301
302 status = "okay";
303 clock-frequency = <400000>;
304
305 ak4642: codec@12 {
306 compatible = "asahi-kasei,ak4642";
307 #sound-dai-cells = <0>;
308 reg = <0x12>;
309 };
310
311 composite-in@20 {
312 compatible = "adi,adv7180";
313 reg = <0x20>;
314 remote = <&vin0>;
315
316 port {
317 adv7180: endpoint {
318 bus-width = <8>;
319 remote-endpoint = <&vin0ep>;
320 };
321 };
322 };
323
324 hdmi@39 {
325 compatible = "adi,adv7511w";
326 reg = <0x39>;
327 interrupt-parent = <&gpio3>;
328 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
329
330 adi,input-depth = <8>;
331 adi,input-colorspace = "rgb";
332 adi,input-clock = "1x";
333 adi,input-style = <1>;
334 adi,input-justification = "evenly";
335
336 ports {
337 #address-cells = <1>;
338 #size-cells = <0>;
339
340 port@0 {
341 reg = <0>;
342 adv7511_in: endpoint {
343 remote-endpoint = <&du_out_rgb>;
344 };
345 };
346
347 port@1 {
348 reg = <1>;
349 adv7511_out: endpoint {
350 remote-endpoint = <&hdmi_con>;
351 };
352 };
353 };
354 };
355};
356
357&sata0 {
358 status = "okay";
359};
360
361/* composite video input */
362&vin0 {
363 status = "ok";
364 pinctrl-0 = <&vin0_pins>;
365 pinctrl-names = "default";
366
367 port {
368 #address-cells = <1>;
369 #size-cells = <0>;
370
371 vin0ep: endpoint {
372 remote-endpoint = <&adv7180>;
373 bus-width = <8>;
374 };
375 };
376};
377
378&pci0 {
379 pinctrl-0 = <&usb0_pins>;
380 pinctrl-names = "default";
381
382 status = "okay";
383};
384
385&pci1 {
386 pinctrl-0 = <&usb1_pins>;
387 pinctrl-names = "default";
388
389 status = "okay";
390};
391
392&hsusb {
393 pinctrl-0 = <&usb0_pins>;
394 pinctrl-names = "default";
395
396 status = "okay";
397};
398
399&usbphy {
400 status = "okay";
401};
402
403&pcie_bus_clk {
404 clock-frequency = <100000000>;
405 status = "okay";
406};
407
408&pciec {
409 status = "okay";
410};
411
412&can0 {
413 pinctrl-0 = <&can0_pins>;
414 pinctrl-names = "default";
415
416 status = "okay";
417};
418
419&du {
420 pinctrl-0 = <&du_pins>;
421 pinctrl-names = "default";
422 status = "okay";
423
424 clocks = <&mstp7_clks R8A7791_CLK_DU0>,
425 <&mstp7_clks R8A7791_CLK_DU1>,
426 <&mstp7_clks R8A7791_CLK_LVDS0>,
427 <&x3_clk>, <&x16_clk>;
428 clock-names = "du.0", "du.1", "lvds.0",
429 "dclkin.0", "dclkin.1";
430
431 ports {
432 port@1 {
433 endpoint {
434 remote-endpoint = <&adv7511_in>;
435 };
436 };
437 };
438};
439
440&rcar_sound {
441 pinctrl-0 = <&ssi_pins &audio_clk_pins>;
442 pinctrl-names = "default";
443 status = "okay";
444
445 /* Single DAI */
446 #sound-dai-cells = <0>;
447
448 rcar_sound,dai {
449 dai0 {
450 playback = <&ssi0>;
451 capture = <&ssi1>;
452 };
453 };
454};
455
456&ssi1 {
457 shared-pin;
458};