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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung SMDK5410 board device tree source
4 *
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 */
8
9/dts-v1/;
10#include "exynos5410.dtsi"
11#include <dt-bindings/interrupt-controller/irq.h>
12/ {
13 model = "Samsung SMDK5410 board based on Exynos5410";
14 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
15
16 memory@40000000 {
17 device_type = "memory";
18 reg = <0x40000000 0x80000000>;
19 };
20
21 chosen {
22 stdout-path = "serial2:115200n8";
23 };
24
25 fin_pll: xxti {
26 compatible = "fixed-clock";
27 clock-frequency = <24000000>;
28 clock-output-names = "fin_pll";
29 #clock-cells = <0>;
30 };
31
32 pmic_ap_clk: pmic-ap-clk {
33 /* Workaround for missing PMIC and its clock */
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <32768>;
37 };
38
39 firmware@2037000 {
40 compatible = "samsung,secure-firmware";
41 reg = <0x02037000 0x1000>;
42 };
43
44};
45
46&mmc_0 {
47 status = "okay";
48 cap-mmc-highspeed;
49 broken-cd;
50 card-detect-delay = <200>;
51 samsung,dw-mshc-ciu-div = <3>;
52 samsung,dw-mshc-sdr-timing = <2 3>;
53 samsung,dw-mshc-ddr-timing = <1 2>;
54 bus-width = <8>;
55};
56
57&mmc_2 {
58 status = "okay";
59 cap-sd-highspeed;
60 card-detect-delay = <200>;
61 samsung,dw-mshc-ciu-div = <3>;
62 samsung,dw-mshc-sdr-timing = <2 3>;
63 samsung,dw-mshc-ddr-timing = <1 2>;
64 bus-width = <4>;
65 disable-wp;
66};
67
68&pinctrl_0 {
69 srom_ctl: srom-ctl {
70 samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
71 "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
72 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
73 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
74 };
75
76 srom_ebi: srom-ebi {
77 samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",
78 "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",
79 "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",
80 "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
81 "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
82 "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
83 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
84 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
85 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
86 };
87};
88
89&rtc {
90 clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
91 clock-names = "rtc", "rtc_src";
92};
93
94&sromc {
95 pinctrl-names = "default";
96 pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
97
98 ethernet@3,0 {
99 compatible = "smsc,lan9115";
100 reg = <3 0 0x10000>;
101 phy-mode = "mii";
102 interrupt-parent = <&gpx0>;
103 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
104 reg-io-width = <2>;
105 smsc,irq-push-pull;
106 smsc,force-internal-phy;
107
108 samsung,srom-page-mode;
109 samsung,srom-timing = <9 12 1 9 1 1>;
110 };
111};
112
113&serial_0 {
114 status = "okay";
115};
116
117&serial_1 {
118 status = "okay";
119};
120
121&serial_2 {
122 status = "okay";
123};
1/*
2 * SAMSUNG SMDK5410 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13#include "exynos5410.dtsi"
14#include <dt-bindings/interrupt-controller/irq.h>
15/ {
16 model = "Samsung SMDK5410 board based on EXYNOS5410";
17 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";
18
19 memory {
20 reg = <0x40000000 0x80000000>;
21 };
22
23 chosen {
24 bootargs = "console=ttySAC2,115200";
25 };
26
27 fin_pll: xxti {
28 compatible = "fixed-clock";
29 clock-frequency = <24000000>;
30 clock-output-names = "fin_pll";
31 #clock-cells = <0>;
32 };
33
34 firmware@02037000 {
35 compatible = "samsung,secure-firmware";
36 reg = <0x02037000 0x1000>;
37 };
38
39};
40
41&mmc_0 {
42 status = "okay";
43 num-slots = <1>;
44 cap-mmc-highspeed;
45 broken-cd;
46 card-detect-delay = <200>;
47 samsung,dw-mshc-ciu-div = <3>;
48 samsung,dw-mshc-sdr-timing = <2 3>;
49 samsung,dw-mshc-ddr-timing = <1 2>;
50 bus-width = <8>;
51};
52
53&mmc_2 {
54 status = "okay";
55 num-slots = <1>;
56 cap-sd-highspeed;
57 card-detect-delay = <200>;
58 samsung,dw-mshc-ciu-div = <3>;
59 samsung,dw-mshc-sdr-timing = <2 3>;
60 samsung,dw-mshc-ddr-timing = <1 2>;
61 bus-width = <4>;
62 disable-wp;
63};
64
65&pinctrl_0 {
66 srom_ctl: srom-ctl {
67 samsung,pins = "gpy0-3", "gpy0-4", "gpy0-5",
68 "gpy1-0", "gpy1-1", "gpy1-2", "gpy1-3";
69 samsung,pin-function = <2>;
70 samsung,pin-drv = <0>;
71 };
72
73 srom_ebi: srom-ebi {
74 samsung,pins = "gpy3-0", "gpy3-1", "gpy3-2", "gpy3-3",
75 "gpy3-4", "gpy3-5", "gpy3-6", "gpy3-7",
76 "gpy5-0", "gpy5-1", "gpy5-2", "gpy5-3",
77 "gpy5-4", "gpy5-5", "gpy5-6", "gpy5-7",
78 "gpy6-0", "gpy6-1", "gpy6-2", "gpy6-3",
79 "gpy6-4", "gpy6-5", "gpy6-6", "gpy6-7";
80 samsung,pin-function = <2>;
81 samsung,pin-pud = <3>;
82 samsung,pin-drv = <0>;
83 };
84};
85
86&sromc {
87 pinctrl-names = "default";
88 pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
89
90 ethernet@3,0 {
91 compatible = "smsc,lan9115";
92 reg = <3 0 0x10000>;
93 phy-mode = "mii";
94 interrupt-parent = <&gpx0>;
95 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
96 reg-io-width = <2>;
97 smsc,irq-push-pull;
98 smsc,force-internal-phy;
99
100 samsung,srom-page-mode = <1>;
101 samsung,srom-timing = <9 12 1 9 1 1>;
102 };
103};
104
105&uart0 {
106 status = "okay";
107};
108
109&uart1 {
110 status = "okay";
111};
112
113&uart2 {
114 status = "okay";
115};