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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 *
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 */
7
8#include <dt-bindings/pinctrl/at91.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/clock/at91.h>
12
13/ {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 ssc2 = &ssc2;
33 };
34
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 cpu@0 {
40 compatible = "arm,arm926ej-s";
41 device_type = "cpu";
42 reg = <0>;
43 };
44 };
45
46 memory@20000000 {
47 device_type = "memory";
48 reg = <0x20000000 0x08000000>;
49 };
50
51 clocks {
52 main_xtal: main_xtal {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <0>;
56 };
57
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63 };
64
65 sram: sram@300000 {
66 compatible = "mmio-sram";
67 reg = <0x00300000 0x28000>;
68 #address-cells = <1>;
69 #size-cells = <1>;
70 ranges = <0 0x00300000 0x28000>;
71 };
72
73 ahb {
74 compatible = "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 ranges;
78
79 usb0: ohci@500000 {
80 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
81 reg = <0x00500000 0x100000>;
82 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
83 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
84 clock-names = "ohci_clk", "hclk", "uhpck";
85 status = "disabled";
86 };
87
88 fb0: fb@600000 {
89 compatible = "atmel,at91sam9261-lcdc";
90 reg = <0x00600000 0x1000>;
91 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_fb>;
94 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
95 clock-names = "lcdc_clk", "hclk";
96 status = "disabled";
97 };
98
99 ebi: ebi@10000000 {
100 compatible = "atmel,at91sam9261-ebi";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 atmel,smc = <&smc>;
104 atmel,matrix = <&matrix>;
105 reg = <0x10000000 0x80000000>;
106 ranges = <0x0 0x0 0x10000000 0x10000000
107 0x1 0x0 0x20000000 0x10000000
108 0x2 0x0 0x30000000 0x10000000
109 0x3 0x0 0x40000000 0x10000000
110 0x4 0x0 0x50000000 0x10000000
111 0x5 0x0 0x60000000 0x10000000
112 0x6 0x0 0x70000000 0x10000000
113 0x7 0x0 0x80000000 0x10000000>;
114 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
115 status = "disabled";
116
117 nand_controller: nand-controller {
118 compatible = "atmel,at91sam9261-nand-controller";
119 #address-cells = <2>;
120 #size-cells = <1>;
121 ranges;
122 status = "disabled";
123 };
124 };
125
126 apb {
127 compatible = "simple-bus";
128 #address-cells = <1>;
129 #size-cells = <1>;
130 ranges;
131
132 tcb0: timer@fffa0000 {
133 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134 #address-cells = <1>;
135 #size-cells = <0>;
136 reg = <0xfffa0000 0x100>;
137 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
138 <18 IRQ_TYPE_LEVEL_HIGH 0>,
139 <19 IRQ_TYPE_LEVEL_HIGH 0>;
140 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
141 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
142 };
143
144 usb1: gadget@fffa4000 {
145 compatible = "atmel,at91sam9261-udc";
146 reg = <0xfffa4000 0x4000>;
147 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
148 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
149 clock-names = "pclk", "hclk";
150 atmel,matrix = <&matrix>;
151 status = "disabled";
152 };
153
154 mmc0: mmc@fffa8000 {
155 compatible = "atmel,hsmci";
156 reg = <0xfffa8000 0x600>;
157 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
163 clock-names = "mci_clk";
164 status = "disabled";
165 };
166
167 i2c0: i2c@fffac000 {
168 compatible = "atmel,at91sam9261-i2c";
169 pinctrl-names = "default";
170 pinctrl-0 = <&pinctrl_i2c_twi>;
171 reg = <0xfffac000 0x100>;
172 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
176 status = "disabled";
177 };
178
179 usart0: serial@fffb0000 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xfffb0000 0x200>;
182 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
183 atmel,use-dma-rx;
184 atmel,use-dma-tx;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_usart0>;
187 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
188 clock-names = "usart";
189 status = "disabled";
190 };
191
192 usart1: serial@fffb4000 {
193 compatible = "atmel,at91sam9260-usart";
194 reg = <0xfffb4000 0x200>;
195 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
196 atmel,use-dma-rx;
197 atmel,use-dma-tx;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_usart1>;
200 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
201 clock-names = "usart";
202 status = "disabled";
203 };
204
205 usart2: serial@fffb8000{
206 compatible = "atmel,at91sam9260-usart";
207 reg = <0xfffb8000 0x200>;
208 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
209 atmel,use-dma-rx;
210 atmel,use-dma-tx;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_usart2>;
213 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
214 clock-names = "usart";
215 status = "disabled";
216 };
217
218 ssc0: ssc@fffbc000 {
219 compatible = "atmel,at91rm9200-ssc";
220 reg = <0xfffbc000 0x4000>;
221 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
224 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
225 clock-names = "pclk";
226 status = "disabled";
227 };
228
229 ssc1: ssc@fffc0000 {
230 compatible = "atmel,at91rm9200-ssc";
231 reg = <0xfffc0000 0x4000>;
232 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
235 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
236 clock-names = "pclk";
237 status = "disabled";
238 };
239
240 ssc2: ssc@fffc4000 {
241 compatible = "atmel,at91rm9200-ssc";
242 reg = <0xfffc4000 0x4000>;
243 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
246 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
247 clock-names = "pclk";
248 status = "disabled";
249 };
250
251 spi0: spi@fffc8000 {
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "atmel,at91rm9200-spi";
255 reg = <0xfffc8000 0x200>;
256 cs-gpios = <0>, <0>, <0>, <0>;
257 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_spi0>;
260 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
261 clock-names = "spi_clk";
262 status = "disabled";
263 };
264
265 spi1: spi@fffcc000 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "atmel,at91rm9200-spi";
269 reg = <0xfffcc000 0x200>;
270 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_spi1>;
273 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
274 clock-names = "spi_clk";
275 status = "disabled";
276 };
277
278 ramc: ramc@ffffea00 {
279 compatible = "atmel,at91sam9260-sdramc";
280 reg = <0xffffea00 0x200>;
281 };
282
283 smc: smc@ffffec00 {
284 compatible = "atmel,at91sam9260-smc", "syscon";
285 reg = <0xffffec00 0x200>;
286 };
287
288 matrix: matrix@ffffee00 {
289 compatible = "atmel,at91sam9261-matrix", "syscon";
290 reg = <0xffffee00 0x200>;
291 };
292
293 aic: interrupt-controller@fffff000 {
294 #interrupt-cells = <3>;
295 compatible = "atmel,at91rm9200-aic";
296 interrupt-controller;
297 reg = <0xfffff000 0x200>;
298 atmel,external-irqs = <29 30 31>;
299 };
300
301 dbgu: serial@fffff200 {
302 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
303 reg = <0xfffff200 0x200>;
304 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_dbgu>;
307 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
308 clock-names = "usart";
309 status = "disabled";
310 };
311
312 pinctrl@fffff400 {
313 #address-cells = <1>;
314 #size-cells = <1>;
315 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
316 ranges = <0xfffff400 0xfffff400 0x600>;
317
318 atmel,mux-mask =
319 /* A B */
320 <0xffffffff 0xfffffff7>, /* pioA */
321 <0xffffffff 0xfffffff4>, /* pioB */
322 <0xffffffff 0xffffff07>; /* pioC */
323
324 /* shared pinctrl settings */
325 dbgu {
326 pinctrl_dbgu: dbgu-0 {
327 atmel,pins =
328 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
329 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
330 };
331 };
332
333 usart0 {
334 pinctrl_usart0: usart0-0 {
335 atmel,pins =
336 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
337 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
338 };
339
340 pinctrl_usart0_rts: usart0_rts-0 {
341 atmel,pins =
342 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
343 };
344
345 pinctrl_usart0_cts: usart0_cts-0 {
346 atmel,pins =
347 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
348 };
349 };
350
351 usart1 {
352 pinctrl_usart1: usart1-0 {
353 atmel,pins =
354 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
355 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
356 };
357
358 pinctrl_usart1_rts: usart1_rts-0 {
359 atmel,pins =
360 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
361 };
362
363 pinctrl_usart1_cts: usart1_cts-0 {
364 atmel,pins =
365 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
366 };
367 };
368
369 usart2 {
370 pinctrl_usart2: usart2-0 {
371 atmel,pins =
372 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
373 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
374 };
375
376 pinctrl_usart2_rts: usart2_rts-0 {
377 atmel,pins =
378 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
379 };
380
381 pinctrl_usart2_cts: usart2_cts-0 {
382 atmel,pins =
383 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 };
385 };
386
387 nand {
388 pinctrl_nand_rb: nand-rb-0 {
389 atmel,pins =
390 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
391 };
392
393 pinctrl_nand_cs: nand-cs-0 {
394 atmel,pins =
395 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
396 };
397 };
398
399 mmc0 {
400 pinctrl_mmc0_clk: mmc0_clk-0 {
401 atmel,pins =
402 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
403 };
404
405 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
406 atmel,pins =
407 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
408 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
409 };
410
411 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
412 atmel,pins =
413 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
414 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
415 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
416 };
417 };
418
419 ssc0 {
420 pinctrl_ssc0_tx: ssc0_tx-0 {
421 atmel,pins =
422 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
423 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
424 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_ssc0_rx: ssc0_rx-0 {
428 atmel,pins =
429 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
430 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
431 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 };
433 };
434
435 ssc1 {
436 pinctrl_ssc1_tx: ssc1_tx-0 {
437 atmel,pins =
438 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
439 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
440 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
441 };
442
443 pinctrl_ssc1_rx: ssc1_rx-0 {
444 atmel,pins =
445 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
446 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
447 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
448 };
449 };
450
451 ssc2 {
452 pinctrl_ssc2_tx: ssc2_tx-0 {
453 atmel,pins =
454 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
455 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
456 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
457 };
458
459 pinctrl_ssc2_rx: ssc2_rx-0 {
460 atmel,pins =
461 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
462 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
463 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
465 };
466
467 spi0 {
468 pinctrl_spi0: spi0-0 {
469 atmel,pins =
470 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
471 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
472 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
473 };
474 };
475
476 spi1 {
477 pinctrl_spi1: spi1-0 {
478 atmel,pins =
479 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
480 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
481 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
482 };
483 };
484
485 tcb0 {
486 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
487 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 };
489
490 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
491 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 };
493
494 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
495 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 };
497
498 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
499 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500 };
501
502 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
503 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
504 };
505
506 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
507 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
508 };
509
510 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
511 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
512 };
513
514 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
515 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
516 };
517
518 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
519 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
520 };
521 };
522
523 i2c0 {
524 pinctrl_i2c_bitbang: i2c-0-bitbang {
525 atmel,pins =
526 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
527 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
528 };
529 pinctrl_i2c_twi: i2c-0-twi {
530 atmel,pins =
531 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
532 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
533 };
534 };
535
536 fb {
537 pinctrl_fb: fb-0 {
538 atmel,pins =
539 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
540 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
541 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
542 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
543 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
544 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
550 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
551 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
552 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
553 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
554 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
555 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
556 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
557 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
558 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
559 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
560 };
561 };
562
563 pioA: gpio@fffff400 {
564 compatible = "atmel,at91rm9200-gpio";
565 reg = <0xfffff400 0x200>;
566 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
567 #gpio-cells = <2>;
568 gpio-controller;
569 interrupt-controller;
570 #interrupt-cells = <2>;
571 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
572 };
573
574 pioB: gpio@fffff600 {
575 compatible = "atmel,at91rm9200-gpio";
576 reg = <0xfffff600 0x200>;
577 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
578 #gpio-cells = <2>;
579 gpio-controller;
580 interrupt-controller;
581 #interrupt-cells = <2>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
583 };
584
585 pioC: gpio@fffff800 {
586 compatible = "atmel,at91rm9200-gpio";
587 reg = <0xfffff800 0x200>;
588 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
589 #gpio-cells = <2>;
590 gpio-controller;
591 interrupt-controller;
592 #interrupt-cells = <2>;
593 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
594 };
595 };
596
597 pmc: pmc@fffffc00 {
598 compatible = "atmel,at91sam9261-pmc", "syscon";
599 reg = <0xfffffc00 0x100>;
600 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
601 #clock-cells = <2>;
602 clocks = <&slow_xtal>, <&main_xtal>;
603 clock-names = "slow_xtal", "main_xtal";
604 };
605
606 rstc@fffffd00 {
607 compatible = "atmel,at91sam9260-rstc";
608 reg = <0xfffffd00 0x10>;
609 clocks = <&slow_xtal>;
610 };
611
612 shdwc@fffffd10 {
613 compatible = "atmel,at91sam9260-shdwc";
614 reg = <0xfffffd10 0x10>;
615 clocks = <&slow_xtal>;
616 };
617
618 pit: timer@fffffd30 {
619 compatible = "atmel,at91sam9260-pit";
620 reg = <0xfffffd30 0xf>;
621 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
622 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
623 };
624
625 rtc@fffffd20 {
626 compatible = "atmel,at91sam9260-rtt";
627 reg = <0xfffffd20 0x10>;
628 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
629 clocks = <&slow_xtal>;
630 status = "disabled";
631 };
632
633 watchdog@fffffd40 {
634 compatible = "atmel,at91sam9260-wdt";
635 reg = <0xfffffd40 0x10>;
636 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
637 clocks = <&slow_xtal>;
638 status = "disabled";
639 };
640
641 gpbr: syscon@fffffd50 {
642 compatible = "atmel,at91sam9260-gpbr", "syscon";
643 reg = <0xfffffd50 0x10>;
644 status = "disabled";
645 };
646 };
647 };
648
649 i2c-gpio-0 {
650 compatible = "i2c-gpio";
651 pinctrl-names = "default";
652 pinctrl-0 = <&pinctrl_i2c_bitbang>;
653 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
654 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
655 i2c-gpio,sda-open-drain;
656 i2c-gpio,scl-open-drain;
657 i2c-gpio,delay-us = <2>; /* ~100 kHz */
658 #address-cells = <1>;
659 #size-cells = <0>;
660 status = "disabled";
661 };
662};
1/*
2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3 *
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 ssc2 = &ssc2;
33 };
34
35 cpus {
36 #address-cells = <0>;
37 #size-cells = <0>;
38
39 cpu {
40 compatible = "arm,arm926ej-s";
41 device_type = "cpu";
42 };
43 };
44
45 memory {
46 reg = <0x20000000 0x08000000>;
47 };
48
49 clocks {
50 main_xtal: main_xtal {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61 };
62
63 sram: sram@00300000 {
64 compatible = "mmio-sram";
65 reg = <0x00300000 0x28000>;
66 };
67
68 ahb {
69 compatible = "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 ranges;
73
74 usb0: ohci@00500000 {
75 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
76 reg = <0x00500000 0x100000>;
77 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
78 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
79 clock-names = "ohci_clk", "hclk", "uhpck";
80 status = "disabled";
81 };
82
83 fb0: fb@0x00600000 {
84 compatible = "atmel,at91sam9261-lcdc";
85 reg = <0x00600000 0x1000>;
86 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_fb>;
89 clocks = <&lcd_clk>, <&hclk1>;
90 clock-names = "lcdc_clk", "hclk";
91 status = "disabled";
92 };
93
94 nand0: nand@40000000 {
95 compatible = "atmel,at91rm9200-nand";
96 #address-cells = <1>;
97 #size-cells = <1>;
98 reg = <0x40000000 0x10000000>;
99 atmel,nand-addr-offset = <22>;
100 atmel,nand-cmd-offset = <21>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_nand>;
103
104 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
105 <&pioC 14 GPIO_ACTIVE_HIGH>,
106 <0>;
107 status = "disabled";
108 };
109
110 apb {
111 compatible = "simple-bus";
112 #address-cells = <1>;
113 #size-cells = <1>;
114 ranges;
115
116 tcb0: timer@fffa0000 {
117 compatible = "atmel,at91rm9200-tcb";
118 reg = <0xfffa0000 0x100>;
119 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
120 <18 IRQ_TYPE_LEVEL_HIGH 0>,
121 <19 IRQ_TYPE_LEVEL_HIGH 0>;
122 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
123 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
124 };
125
126 usb1: gadget@fffa4000 {
127 compatible = "atmel,at91sam9261-udc";
128 reg = <0xfffa4000 0x4000>;
129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
130 clocks = <&udc_clk>, <&udpck>;
131 clock-names = "pclk", "hclk";
132 atmel,matrix = <&matrix>;
133 status = "disabled";
134 };
135
136 mmc0: mmc@fffa8000 {
137 compatible = "atmel,hsmci";
138 reg = <0xfffa8000 0x600>;
139 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
142 #address-cells = <1>;
143 #size-cells = <0>;
144 clocks = <&mci0_clk>;
145 clock-names = "mci_clk";
146 status = "disabled";
147 };
148
149 i2c0: i2c@fffac000 {
150 compatible = "atmel,at91sam9261-i2c";
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_i2c_twi>;
153 reg = <0xfffac000 0x100>;
154 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 clocks = <&twi0_clk>;
158 status = "disabled";
159 };
160
161 usart0: serial@fffb0000 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xfffb0000 0x200>;
164 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
165 atmel,use-dma-rx;
166 atmel,use-dma-tx;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_usart0>;
169 clocks = <&usart0_clk>;
170 clock-names = "usart";
171 status = "disabled";
172 };
173
174 usart1: serial@fffb4000 {
175 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfffb4000 0x200>;
177 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
178 atmel,use-dma-rx;
179 atmel,use-dma-tx;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_usart1>;
182 clocks = <&usart1_clk>;
183 clock-names = "usart";
184 status = "disabled";
185 };
186
187 usart2: serial@fffb8000{
188 compatible = "atmel,at91sam9260-usart";
189 reg = <0xfffb8000 0x200>;
190 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
191 atmel,use-dma-rx;
192 atmel,use-dma-tx;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_usart2>;
195 clocks = <&usart2_clk>;
196 clock-names = "usart";
197 status = "disabled";
198 };
199
200 ssc0: ssc@fffbc000 {
201 compatible = "atmel,at91rm9200-ssc";
202 reg = <0xfffbc000 0x4000>;
203 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
206 clocks = <&ssc0_clk>;
207 clock-names = "pclk";
208 status = "disabled";
209 };
210
211 ssc1: ssc@fffc0000 {
212 compatible = "atmel,at91rm9200-ssc";
213 reg = <0xfffc0000 0x4000>;
214 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
217 clocks = <&ssc1_clk>;
218 clock-names = "pclk";
219 status = "disabled";
220 };
221
222 ssc2: ssc@fffc4000 {
223 compatible = "atmel,at91rm9200-ssc";
224 reg = <0xfffc4000 0x4000>;
225 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
228 clocks = <&ssc2_clk>;
229 clock-names = "pclk";
230 status = "disabled";
231 };
232
233 spi0: spi@fffc8000 {
234 #address-cells = <1>;
235 #size-cells = <0>;
236 compatible = "atmel,at91rm9200-spi";
237 reg = <0xfffc8000 0x200>;
238 cs-gpios = <0>, <0>, <0>, <0>;
239 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_spi0>;
242 clocks = <&spi0_clk>;
243 clock-names = "spi_clk";
244 status = "disabled";
245 };
246
247 spi1: spi@fffcc000 {
248 #address-cells = <1>;
249 #size-cells = <0>;
250 compatible = "atmel,at91rm9200-spi";
251 reg = <0xfffcc000 0x200>;
252 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_spi1>;
255 clocks = <&spi1_clk>;
256 clock-names = "spi_clk";
257 status = "disabled";
258 };
259
260 ramc: ramc@ffffea00 {
261 compatible = "atmel,at91sam9260-sdramc";
262 reg = <0xffffea00 0x200>;
263 };
264
265 matrix: matrix@ffffee00 {
266 compatible = "atmel,at91sam9260-bus-matrix", "syscon";
267 reg = <0xffffee00 0x200>;
268 };
269
270 aic: interrupt-controller@fffff000 {
271 #interrupt-cells = <3>;
272 compatible = "atmel,at91rm9200-aic";
273 interrupt-controller;
274 reg = <0xfffff000 0x200>;
275 atmel,external-irqs = <29 30 31>;
276 };
277
278 dbgu: serial@fffff200 {
279 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
280 reg = <0xfffff200 0x200>;
281 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_dbgu>;
284 clocks = <&mck>;
285 clock-names = "usart";
286 status = "disabled";
287 };
288
289 pinctrl@fffff400 {
290 #address-cells = <1>;
291 #size-cells = <1>;
292 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
293 ranges = <0xfffff400 0xfffff400 0x600>;
294
295 atmel,mux-mask =
296 /* A B */
297 <0xffffffff 0xfffffff7>, /* pioA */
298 <0xffffffff 0xfffffff4>, /* pioB */
299 <0xffffffff 0xffffff07>; /* pioC */
300
301 /* shared pinctrl settings */
302 dbgu {
303 pinctrl_dbgu: dbgu-0 {
304 atmel,pins =
305 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
306 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
307 };
308 };
309
310 usart0 {
311 pinctrl_usart0: usart0-0 {
312 atmel,pins =
313 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
314 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
315 };
316
317 pinctrl_usart0_rts: usart0_rts-0 {
318 atmel,pins =
319 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
320 };
321
322 pinctrl_usart0_cts: usart0_cts-0 {
323 atmel,pins =
324 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
325 };
326 };
327
328 usart1 {
329 pinctrl_usart1: usart1-0 {
330 atmel,pins =
331 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
332 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
333 };
334
335 pinctrl_usart1_rts: usart1_rts-0 {
336 atmel,pins =
337 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
338 };
339
340 pinctrl_usart1_cts: usart1_cts-0 {
341 atmel,pins =
342 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
343 };
344 };
345
346 usart2 {
347 pinctrl_usart2: usart2-0 {
348 atmel,pins =
349 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
350 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
351 };
352
353 pinctrl_usart2_rts: usart2_rts-0 {
354 atmel,pins =
355 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
356 };
357
358 pinctrl_usart2_cts: usart2_cts-0 {
359 atmel,pins =
360 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
361 };
362 };
363
364 nand {
365 pinctrl_nand: nand-0 {
366 atmel,pins =
367 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
368 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
369 };
370 };
371
372 mmc0 {
373 pinctrl_mmc0_clk: mmc0_clk-0 {
374 atmel,pins =
375 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
376 };
377
378 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
379 atmel,pins =
380 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
381 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
382 };
383
384 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
385 atmel,pins =
386 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
387 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
388 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
389 };
390 };
391
392 ssc0 {
393 pinctrl_ssc0_tx: ssc0_tx-0 {
394 atmel,pins =
395 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
396 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
397 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
398 };
399
400 pinctrl_ssc0_rx: ssc0_rx-0 {
401 atmel,pins =
402 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
403 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
404 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
405 };
406 };
407
408 ssc1 {
409 pinctrl_ssc1_tx: ssc1_tx-0 {
410 atmel,pins =
411 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
412 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
413 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
414 };
415
416 pinctrl_ssc1_rx: ssc1_rx-0 {
417 atmel,pins =
418 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
419 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
420 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 };
422 };
423
424 ssc2 {
425 pinctrl_ssc2_tx: ssc2_tx-0 {
426 atmel,pins =
427 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
428 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
429 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_ssc2_rx: ssc2_rx-0 {
433 atmel,pins =
434 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
435 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
436 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
437 };
438 };
439
440 spi0 {
441 pinctrl_spi0: spi0-0 {
442 atmel,pins =
443 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
444 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
445 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
446 };
447 };
448
449 spi1 {
450 pinctrl_spi1: spi1-0 {
451 atmel,pins =
452 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
454 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
455 };
456 };
457
458 tcb0 {
459 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
460 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
461 };
462
463 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
464 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
465 };
466
467 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
468 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
469 };
470
471 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
472 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
473 };
474
475 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
476 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
477 };
478
479 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
480 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
481 };
482
483 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
484 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
485 };
486
487 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
488 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
489 };
490
491 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
492 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
493 };
494 };
495
496 i2c0 {
497 pinctrl_i2c_bitbang: i2c-0-bitbang {
498 atmel,pins =
499 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
500 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
501 };
502 pinctrl_i2c_twi: i2c-0-twi {
503 atmel,pins =
504 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
505 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
506 };
507 };
508
509 fb {
510 pinctrl_fb: fb-0 {
511 atmel,pins =
512 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
513 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
514 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
515 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
516 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
517 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
518 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
519 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
520 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
521 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
522 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
523 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
524 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
525 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
526 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
527 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
528 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
529 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
530 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
531 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
532 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
533 };
534 };
535
536 pioA: gpio@fffff400 {
537 compatible = "atmel,at91rm9200-gpio";
538 reg = <0xfffff400 0x200>;
539 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
540 #gpio-cells = <2>;
541 gpio-controller;
542 interrupt-controller;
543 #interrupt-cells = <2>;
544 clocks = <&pioA_clk>;
545 };
546
547 pioB: gpio@fffff600 {
548 compatible = "atmel,at91rm9200-gpio";
549 reg = <0xfffff600 0x200>;
550 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
551 #gpio-cells = <2>;
552 gpio-controller;
553 interrupt-controller;
554 #interrupt-cells = <2>;
555 clocks = <&pioB_clk>;
556 };
557
558 pioC: gpio@fffff800 {
559 compatible = "atmel,at91rm9200-gpio";
560 reg = <0xfffff800 0x200>;
561 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
562 #gpio-cells = <2>;
563 gpio-controller;
564 interrupt-controller;
565 #interrupt-cells = <2>;
566 clocks = <&pioC_clk>;
567 };
568 };
569
570 pmc: pmc@fffffc00 {
571 compatible = "atmel,at91rm9200-pmc", "syscon";
572 reg = <0xfffffc00 0x100>;
573 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
574 interrupt-controller;
575 #address-cells = <1>;
576 #size-cells = <0>;
577 #interrupt-cells = <1>;
578
579 main_osc: main_osc {
580 compatible = "atmel,at91rm9200-clk-main-osc";
581 #clock-cells = <0>;
582 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
583 clocks = <&main_xtal>;
584 };
585
586 main: mainck {
587 compatible = "atmel,at91rm9200-clk-main";
588 #clock-cells = <0>;
589 clocks = <&main_osc>;
590 };
591
592 plla: pllack {
593 compatible = "atmel,at91rm9200-clk-pll";
594 #clock-cells = <0>;
595 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
596 clocks = <&main>;
597 reg = <0>;
598 atmel,clk-input-range = <1000000 32000000>;
599 #atmel,pll-clk-output-range-cells = <4>;
600 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
601 <190000000 240000000 2 1>;
602 };
603
604 pllb: pllbck {
605 compatible = "atmel,at91rm9200-clk-pll";
606 #clock-cells = <0>;
607 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
608 clocks = <&main>;
609 reg = <1>;
610 atmel,clk-input-range = <1000000 5000000>;
611 #atmel,pll-clk-output-range-cells = <4>;
612 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
613 };
614
615 mck: masterck {
616 compatible = "atmel,at91rm9200-clk-master";
617 #clock-cells = <0>;
618 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
619 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
620 atmel,clk-output-range = <0 94000000>;
621 atmel,clk-divisors = <1 2 4 0>;
622 };
623
624 usb: usbck {
625 compatible = "atmel,at91rm9200-clk-usb";
626 #clock-cells = <0>;
627 atmel,clk-divisors = <1 2 4 0>;
628 clocks = <&pllb>;
629 };
630
631 prog: progck {
632 compatible = "atmel,at91rm9200-clk-programmable";
633 #address-cells = <1>;
634 #size-cells = <0>;
635 interrupt-parent = <&pmc>;
636 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
637
638 prog0: prog0 {
639 #clock-cells = <0>;
640 reg = <0>;
641 interrupts = <AT91_PMC_PCKRDY(0)>;
642 };
643
644 prog1: prog1 {
645 #clock-cells = <0>;
646 reg = <1>;
647 interrupts = <AT91_PMC_PCKRDY(1)>;
648 };
649
650 prog2: prog2 {
651 #clock-cells = <0>;
652 reg = <2>;
653 interrupts = <AT91_PMC_PCKRDY(2)>;
654 };
655
656 prog3: prog3 {
657 #clock-cells = <0>;
658 reg = <3>;
659 interrupts = <AT91_PMC_PCKRDY(3)>;
660 };
661 };
662
663 systemck {
664 compatible = "atmel,at91rm9200-clk-system";
665 #address-cells = <1>;
666 #size-cells = <0>;
667
668 uhpck: uhpck {
669 #clock-cells = <0>;
670 reg = <6>;
671 clocks = <&usb>;
672 };
673
674 udpck: udpck {
675 #clock-cells = <0>;
676 reg = <7>;
677 clocks = <&usb>;
678 };
679
680 pck0: pck0 {
681 #clock-cells = <0>;
682 reg = <8>;
683 clocks = <&prog0>;
684 };
685
686 pck1: pck1 {
687 #clock-cells = <0>;
688 reg = <9>;
689 clocks = <&prog1>;
690 };
691
692 pck2: pck2 {
693 #clock-cells = <0>;
694 reg = <10>;
695 clocks = <&prog2>;
696 };
697
698 pck3: pck3 {
699 #clock-cells = <0>;
700 reg = <11>;
701 clocks = <&prog3>;
702 };
703
704 hclk0: hclk0 {
705 #clock-cells = <0>;
706 reg = <16>;
707 clocks = <&mck>;
708 };
709
710 hclk1: hclk1 {
711 #clock-cells = <0>;
712 reg = <17>;
713 clocks = <&mck>;
714 };
715 };
716
717 periphck {
718 compatible = "atmel,at91rm9200-clk-peripheral";
719 #address-cells = <1>;
720 #size-cells = <0>;
721 clocks = <&mck>;
722
723 pioA_clk: pioA_clk {
724 #clock-cells = <0>;
725 reg = <2>;
726 };
727
728 pioB_clk: pioB_clk {
729 #clock-cells = <0>;
730 reg = <3>;
731 };
732
733 pioC_clk: pioC_clk {
734 #clock-cells = <0>;
735 reg = <4>;
736 };
737
738 usart0_clk: usart0_clk {
739 #clock-cells = <0>;
740 reg = <6>;
741 };
742
743 usart1_clk: usart1_clk {
744 #clock-cells = <0>;
745 reg = <7>;
746 };
747
748 usart2_clk: usart2_clk {
749 #clock-cells = <0>;
750 reg = <8>;
751 };
752
753 mci0_clk: mci0_clk {
754 #clock-cells = <0>;
755 reg = <9>;
756 };
757
758 udc_clk: udc_clk {
759 #clock-cells = <0>;
760 reg = <10>;
761 };
762
763 twi0_clk: twi0_clk {
764 reg = <11>;
765 #clock-cells = <0>;
766 };
767
768 spi0_clk: spi0_clk {
769 #clock-cells = <0>;
770 reg = <12>;
771 };
772
773 spi1_clk: spi1_clk {
774 #clock-cells = <0>;
775 reg = <13>;
776 };
777
778 ssc0_clk: ssc0_clk {
779 #clock-cells = <0>;
780 reg = <14>;
781 };
782
783 ssc1_clk: ssc1_clk {
784 #clock-cells = <0>;
785 reg = <15>;
786 };
787
788 ssc2_clk: ssc2_clk {
789 #clock-cells = <0>;
790 reg = <16>;
791 };
792
793 tc0_clk: tc0_clk {
794 #clock-cells = <0>;
795 reg = <17>;
796 };
797
798 tc1_clk: tc1_clk {
799 #clock-cells = <0>;
800 reg = <18>;
801 };
802
803 tc2_clk: tc2_clk {
804 #clock-cells = <0>;
805 reg = <19>;
806 };
807
808 ohci_clk: ohci_clk {
809 #clock-cells = <0>;
810 reg = <20>;
811 };
812
813 lcd_clk: lcd_clk {
814 #clock-cells = <0>;
815 reg = <21>;
816 };
817 };
818 };
819
820 rstc@fffffd00 {
821 compatible = "atmel,at91sam9260-rstc";
822 reg = <0xfffffd00 0x10>;
823 clocks = <&slow_xtal>;
824 };
825
826 shdwc@fffffd10 {
827 compatible = "atmel,at91sam9260-shdwc";
828 reg = <0xfffffd10 0x10>;
829 clocks = <&slow_xtal>;
830 };
831
832 pit: timer@fffffd30 {
833 compatible = "atmel,at91sam9260-pit";
834 reg = <0xfffffd30 0xf>;
835 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
836 clocks = <&mck>;
837 };
838
839 rtc@fffffd20 {
840 compatible = "atmel,at91sam9260-rtt";
841 reg = <0xfffffd20 0x10>;
842 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
843 clocks = <&slow_xtal>;
844 status = "disabled";
845 };
846
847 watchdog@fffffd40 {
848 compatible = "atmel,at91sam9260-wdt";
849 reg = <0xfffffd40 0x10>;
850 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
851 clocks = <&slow_xtal>;
852 status = "disabled";
853 };
854
855 gpbr: syscon@fffffd50 {
856 compatible = "atmel,at91sam9260-gpbr", "syscon";
857 reg = <0xfffffd50 0x10>;
858 status = "disabled";
859 };
860 };
861 };
862
863 i2c@0 {
864 compatible = "i2c-gpio";
865 pinctrl-names = "default";
866 pinctrl-0 = <&pinctrl_i2c_bitbang>;
867 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
868 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
869 i2c-gpio,sda-open-drain;
870 i2c-gpio,scl-open-drain;
871 i2c-gpio,delay-us = <2>; /* ~100 kHz */
872 #address-cells = <1>;
873 #size-cells = <0>;
874 status = "disabled";
875 };
876};