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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31#include <linux/export.h>
32#include <drm/drmP.h>
33#include <drm/drm_atomic_helper.h>
34#include <drm/drm_crtc.h>
35#include <drm/drm_edid.h>
36#include "intel_drv.h"
37#include <drm/i915_drm.h>
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
41#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56static const char * const tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64};
65
66#define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names)
67
68struct intel_sdvo {
69 struct intel_encoder base;
70
71 struct i2c_adapter *i2c;
72 u8 slave_addr;
73
74 struct i2c_adapter ddc;
75
76 /* Register for the SDVO device: SDVOB or SDVOC */
77 i915_reg_t sdvo_reg;
78
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
81
82 /*
83 * Capabilities of the SDVO device returned by
84 * intel_sdvo_get_capabilities()
85 */
86 struct intel_sdvo_caps caps;
87
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
90
91 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
97 /*
98 * Hotplug activation bits for this device
99 */
100 uint16_t hotplug_active;
101
102 /**
103 * This is set if we're going to treat the device as TV-out.
104 *
105 * While we have these nice friendly flags for output types that ought
106 * to decide this for us, the S-Video output on our HDMI+S-Video card
107 * shows up as RGB1 (VGA).
108 */
109 bool is_tv;
110
111 enum port port;
112
113 /**
114 * This is set if we treat the device as HDMI, instead of DVI.
115 */
116 bool is_hdmi;
117 bool has_hdmi_monitor;
118 bool has_hdmi_audio;
119 bool rgb_quant_range_selectable;
120
121 /**
122 * This is set if we detect output of sdvo device as LVDS and
123 * have a valid fixed mode to use with the panel.
124 */
125 bool is_lvds;
126
127 /**
128 * This is sdvo fixed pannel mode pointer
129 */
130 struct drm_display_mode *sdvo_lvds_fixed_mode;
131
132 /* DDC bus used by this SDVO encoder */
133 uint8_t ddc_bus;
134
135 /*
136 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
137 */
138 uint8_t dtd_sdvo_flags;
139};
140
141struct intel_sdvo_connector {
142 struct intel_connector base;
143
144 /* Mark the type of connector */
145 uint16_t output_flag;
146
147 /* This contains all current supported TV format */
148 u8 tv_format_supported[TV_FORMAT_NUM];
149 int format_supported_num;
150 struct drm_property *tv_format;
151
152 /* add the property for the SDVO-TV */
153 struct drm_property *left;
154 struct drm_property *right;
155 struct drm_property *top;
156 struct drm_property *bottom;
157 struct drm_property *hpos;
158 struct drm_property *vpos;
159 struct drm_property *contrast;
160 struct drm_property *saturation;
161 struct drm_property *hue;
162 struct drm_property *sharpness;
163 struct drm_property *flicker_filter;
164 struct drm_property *flicker_filter_adaptive;
165 struct drm_property *flicker_filter_2d;
166 struct drm_property *tv_chroma_filter;
167 struct drm_property *tv_luma_filter;
168 struct drm_property *dot_crawl;
169
170 /* add the property for the SDVO-TV/LVDS */
171 struct drm_property *brightness;
172
173 /* this is to get the range of margin.*/
174 u32 max_hscan, max_vscan;
175};
176
177struct intel_sdvo_connector_state {
178 /* base.base: tv.saturation/contrast/hue/brightness */
179 struct intel_digital_connector_state base;
180
181 struct {
182 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
183 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
184 unsigned chroma_filter, luma_filter, dot_crawl;
185 } tv;
186};
187
188static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
189{
190 return container_of(encoder, struct intel_sdvo, base);
191}
192
193static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
194{
195 return to_sdvo(intel_attached_encoder(connector));
196}
197
198static struct intel_sdvo_connector *
199to_intel_sdvo_connector(struct drm_connector *connector)
200{
201 return container_of(connector, struct intel_sdvo_connector, base.base);
202}
203
204#define to_intel_sdvo_connector_state(conn_state) \
205 container_of((conn_state), struct intel_sdvo_connector_state, base.base)
206
207static bool
208intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
209static bool
210intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
211 struct intel_sdvo_connector *intel_sdvo_connector,
212 int type);
213static bool
214intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
215 struct intel_sdvo_connector *intel_sdvo_connector);
216
217/*
218 * Writes the SDVOB or SDVOC with the given value, but always writes both
219 * SDVOB and SDVOC to work around apparent hardware issues (according to
220 * comments in the BIOS).
221 */
222static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
223{
224 struct drm_device *dev = intel_sdvo->base.base.dev;
225 struct drm_i915_private *dev_priv = to_i915(dev);
226 u32 bval = val, cval = val;
227 int i;
228
229 if (HAS_PCH_SPLIT(dev_priv)) {
230 I915_WRITE(intel_sdvo->sdvo_reg, val);
231 POSTING_READ(intel_sdvo->sdvo_reg);
232 /*
233 * HW workaround, need to write this twice for issue
234 * that may result in first write getting masked.
235 */
236 if (HAS_PCH_IBX(dev_priv)) {
237 I915_WRITE(intel_sdvo->sdvo_reg, val);
238 POSTING_READ(intel_sdvo->sdvo_reg);
239 }
240 return;
241 }
242
243 if (intel_sdvo->port == PORT_B)
244 cval = I915_READ(GEN3_SDVOC);
245 else
246 bval = I915_READ(GEN3_SDVOB);
247
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++) {
254 I915_WRITE(GEN3_SDVOB, bval);
255 POSTING_READ(GEN3_SDVOB);
256
257 I915_WRITE(GEN3_SDVOC, cval);
258 POSTING_READ(GEN3_SDVOC);
259 }
260}
261
262static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263{
264 struct i2c_msg msgs[] = {
265 {
266 .addr = intel_sdvo->slave_addr,
267 .flags = 0,
268 .len = 1,
269 .buf = &addr,
270 },
271 {
272 .addr = intel_sdvo->slave_addr,
273 .flags = I2C_M_RD,
274 .len = 1,
275 .buf = ch,
276 }
277 };
278 int ret;
279
280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281 return true;
282
283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284 return false;
285}
286
287#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288/** Mapping of command numbers to names, for debug output */
289static const struct _sdvo_cmd_name {
290 u8 cmd;
291 const char *name;
292} __attribute__ ((packed)) sdvo_cmd_names[] = {
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404};
405
406#define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
407
408static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
409 const void *args, int args_len)
410{
411 int i, pos = 0;
412#define BUF_LEN 256
413 char buffer[BUF_LEN];
414
415#define BUF_PRINT(args...) \
416 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
417
418
419 for (i = 0; i < args_len; i++) {
420 BUF_PRINT("%02X ", ((u8 *)args)[i]);
421 }
422 for (; i < 8; i++) {
423 BUF_PRINT(" ");
424 }
425 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
426 if (cmd == sdvo_cmd_names[i].cmd) {
427 BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
428 break;
429 }
430 }
431 if (i == ARRAY_SIZE(sdvo_cmd_names)) {
432 BUF_PRINT("(%02X)", cmd);
433 }
434 BUG_ON(pos >= BUF_LEN - 1);
435#undef BUF_PRINT
436#undef BUF_LEN
437
438 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
439}
440
441static const char * const cmd_status_names[] = {
442 "Power on",
443 "Success",
444 "Not supported",
445 "Invalid arg",
446 "Pending",
447 "Target not specified",
448 "Scaling not supported"
449};
450
451static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
452 const void *args, int args_len,
453 bool unlocked)
454{
455 u8 *buf, status;
456 struct i2c_msg *msgs;
457 int i, ret = true;
458
459 /* Would be simpler to allocate both in one go ? */
460 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
461 if (!buf)
462 return false;
463
464 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
465 if (!msgs) {
466 kfree(buf);
467 return false;
468 }
469
470 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
471
472 for (i = 0; i < args_len; i++) {
473 msgs[i].addr = intel_sdvo->slave_addr;
474 msgs[i].flags = 0;
475 msgs[i].len = 2;
476 msgs[i].buf = buf + 2 *i;
477 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
478 buf[2*i + 1] = ((u8*)args)[i];
479 }
480 msgs[i].addr = intel_sdvo->slave_addr;
481 msgs[i].flags = 0;
482 msgs[i].len = 2;
483 msgs[i].buf = buf + 2*i;
484 buf[2*i + 0] = SDVO_I2C_OPCODE;
485 buf[2*i + 1] = cmd;
486
487 /* the following two are to read the response */
488 status = SDVO_I2C_CMD_STATUS;
489 msgs[i+1].addr = intel_sdvo->slave_addr;
490 msgs[i+1].flags = 0;
491 msgs[i+1].len = 1;
492 msgs[i+1].buf = &status;
493
494 msgs[i+2].addr = intel_sdvo->slave_addr;
495 msgs[i+2].flags = I2C_M_RD;
496 msgs[i+2].len = 1;
497 msgs[i+2].buf = &status;
498
499 if (unlocked)
500 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
501 else
502 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
503 if (ret < 0) {
504 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
505 ret = false;
506 goto out;
507 }
508 if (ret != i+3) {
509 /* failure in I2C transfer */
510 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
511 ret = false;
512 }
513
514out:
515 kfree(msgs);
516 kfree(buf);
517 return ret;
518}
519
520static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
521 const void *args, int args_len)
522{
523 return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
524}
525
526static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
527 void *response, int response_len)
528{
529 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
530 u8 status;
531 int i, pos = 0;
532#define BUF_LEN 256
533 char buffer[BUF_LEN];
534
535
536 /*
537 * The documentation states that all commands will be
538 * processed within 15µs, and that we need only poll
539 * the status byte a maximum of 3 times in order for the
540 * command to be complete.
541 *
542 * Check 5 times in case the hardware failed to read the docs.
543 *
544 * Also beware that the first response by many devices is to
545 * reply PENDING and stall for time. TVs are notorious for
546 * requiring longer than specified to complete their replies.
547 * Originally (in the DDX long ago), the delay was only ever 15ms
548 * with an additional delay of 30ms applied for TVs added later after
549 * many experiments. To accommodate both sets of delays, we do a
550 * sequence of slow checks if the device is falling behind and fails
551 * to reply within 5*15µs.
552 */
553 if (!intel_sdvo_read_byte(intel_sdvo,
554 SDVO_I2C_CMD_STATUS,
555 &status))
556 goto log_fail;
557
558 while ((status == SDVO_CMD_STATUS_PENDING ||
559 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
560 if (retry < 10)
561 msleep(15);
562 else
563 udelay(15);
564
565 if (!intel_sdvo_read_byte(intel_sdvo,
566 SDVO_I2C_CMD_STATUS,
567 &status))
568 goto log_fail;
569 }
570
571#define BUF_PRINT(args...) \
572 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
573
574 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
575 BUF_PRINT("(%s)", cmd_status_names[status]);
576 else
577 BUF_PRINT("(??? %d)", status);
578
579 if (status != SDVO_CMD_STATUS_SUCCESS)
580 goto log_fail;
581
582 /* Read the command response */
583 for (i = 0; i < response_len; i++) {
584 if (!intel_sdvo_read_byte(intel_sdvo,
585 SDVO_I2C_RETURN_0 + i,
586 &((u8 *)response)[i]))
587 goto log_fail;
588 BUF_PRINT(" %02X", ((u8 *)response)[i]);
589 }
590 BUG_ON(pos >= BUF_LEN - 1);
591#undef BUF_PRINT
592#undef BUF_LEN
593
594 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
595 return true;
596
597log_fail:
598 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
599 return false;
600}
601
602static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
603{
604 if (adjusted_mode->crtc_clock >= 100000)
605 return 1;
606 else if (adjusted_mode->crtc_clock >= 50000)
607 return 2;
608 else
609 return 4;
610}
611
612static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
613 u8 ddc_bus)
614{
615 /* This must be the immediately preceding write before the i2c xfer */
616 return __intel_sdvo_write_cmd(intel_sdvo,
617 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
618 &ddc_bus, 1, false);
619}
620
621static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
622{
623 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
624 return false;
625
626 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
627}
628
629static bool
630intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
631{
632 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
633 return false;
634
635 return intel_sdvo_read_response(intel_sdvo, value, len);
636}
637
638static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
639{
640 struct intel_sdvo_set_target_input_args targets = {0};
641 return intel_sdvo_set_value(intel_sdvo,
642 SDVO_CMD_SET_TARGET_INPUT,
643 &targets, sizeof(targets));
644}
645
646/*
647 * Return whether each input is trained.
648 *
649 * This function is making an assumption about the layout of the response,
650 * which should be checked against the docs.
651 */
652static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
653{
654 struct intel_sdvo_get_trained_inputs_response response;
655
656 BUILD_BUG_ON(sizeof(response) != 1);
657 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
658 &response, sizeof(response)))
659 return false;
660
661 *input_1 = response.input0_trained;
662 *input_2 = response.input1_trained;
663 return true;
664}
665
666static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
667 u16 outputs)
668{
669 return intel_sdvo_set_value(intel_sdvo,
670 SDVO_CMD_SET_ACTIVE_OUTPUTS,
671 &outputs, sizeof(outputs));
672}
673
674static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
675 u16 *outputs)
676{
677 return intel_sdvo_get_value(intel_sdvo,
678 SDVO_CMD_GET_ACTIVE_OUTPUTS,
679 outputs, sizeof(*outputs));
680}
681
682static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
683 int mode)
684{
685 u8 state = SDVO_ENCODER_STATE_ON;
686
687 switch (mode) {
688 case DRM_MODE_DPMS_ON:
689 state = SDVO_ENCODER_STATE_ON;
690 break;
691 case DRM_MODE_DPMS_STANDBY:
692 state = SDVO_ENCODER_STATE_STANDBY;
693 break;
694 case DRM_MODE_DPMS_SUSPEND:
695 state = SDVO_ENCODER_STATE_SUSPEND;
696 break;
697 case DRM_MODE_DPMS_OFF:
698 state = SDVO_ENCODER_STATE_OFF;
699 break;
700 }
701
702 return intel_sdvo_set_value(intel_sdvo,
703 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
704}
705
706static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
707 int *clock_min,
708 int *clock_max)
709{
710 struct intel_sdvo_pixel_clock_range clocks;
711
712 BUILD_BUG_ON(sizeof(clocks) != 4);
713 if (!intel_sdvo_get_value(intel_sdvo,
714 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
715 &clocks, sizeof(clocks)))
716 return false;
717
718 /* Convert the values from units of 10 kHz to kHz. */
719 *clock_min = clocks.min * 10;
720 *clock_max = clocks.max * 10;
721 return true;
722}
723
724static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
725 u16 outputs)
726{
727 return intel_sdvo_set_value(intel_sdvo,
728 SDVO_CMD_SET_TARGET_OUTPUT,
729 &outputs, sizeof(outputs));
730}
731
732static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
733 struct intel_sdvo_dtd *dtd)
734{
735 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
736 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
737}
738
739static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
740 struct intel_sdvo_dtd *dtd)
741{
742 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
743 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
744}
745
746static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
747 struct intel_sdvo_dtd *dtd)
748{
749 return intel_sdvo_set_timing(intel_sdvo,
750 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
751}
752
753static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
754 struct intel_sdvo_dtd *dtd)
755{
756 return intel_sdvo_set_timing(intel_sdvo,
757 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
758}
759
760static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
761 struct intel_sdvo_dtd *dtd)
762{
763 return intel_sdvo_get_timing(intel_sdvo,
764 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
765}
766
767static bool
768intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
769 uint16_t clock,
770 uint16_t width,
771 uint16_t height)
772{
773 struct intel_sdvo_preferred_input_timing_args args;
774
775 memset(&args, 0, sizeof(args));
776 args.clock = clock;
777 args.width = width;
778 args.height = height;
779 args.interlace = 0;
780
781 if (intel_sdvo->is_lvds &&
782 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
783 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
784 args.scaled = 1;
785
786 return intel_sdvo_set_value(intel_sdvo,
787 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
788 &args, sizeof(args));
789}
790
791static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
792 struct intel_sdvo_dtd *dtd)
793{
794 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
795 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
796 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
797 &dtd->part1, sizeof(dtd->part1)) &&
798 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
799 &dtd->part2, sizeof(dtd->part2));
800}
801
802static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
803{
804 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
805}
806
807static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
808 const struct drm_display_mode *mode)
809{
810 uint16_t width, height;
811 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
812 uint16_t h_sync_offset, v_sync_offset;
813 int mode_clock;
814
815 memset(dtd, 0, sizeof(*dtd));
816
817 width = mode->hdisplay;
818 height = mode->vdisplay;
819
820 /* do some mode translations */
821 h_blank_len = mode->htotal - mode->hdisplay;
822 h_sync_len = mode->hsync_end - mode->hsync_start;
823
824 v_blank_len = mode->vtotal - mode->vdisplay;
825 v_sync_len = mode->vsync_end - mode->vsync_start;
826
827 h_sync_offset = mode->hsync_start - mode->hdisplay;
828 v_sync_offset = mode->vsync_start - mode->vdisplay;
829
830 mode_clock = mode->clock;
831 mode_clock /= 10;
832 dtd->part1.clock = mode_clock;
833
834 dtd->part1.h_active = width & 0xff;
835 dtd->part1.h_blank = h_blank_len & 0xff;
836 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
837 ((h_blank_len >> 8) & 0xf);
838 dtd->part1.v_active = height & 0xff;
839 dtd->part1.v_blank = v_blank_len & 0xff;
840 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
841 ((v_blank_len >> 8) & 0xf);
842
843 dtd->part2.h_sync_off = h_sync_offset & 0xff;
844 dtd->part2.h_sync_width = h_sync_len & 0xff;
845 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
846 (v_sync_len & 0xf);
847 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
848 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
849 ((v_sync_len & 0x30) >> 4);
850
851 dtd->part2.dtd_flags = 0x18;
852 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
853 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
854 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
855 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
856 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
857 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
858
859 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
860}
861
862static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
863 const struct intel_sdvo_dtd *dtd)
864{
865 struct drm_display_mode mode = {};
866
867 mode.hdisplay = dtd->part1.h_active;
868 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
869 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
870 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
871 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
872 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
873 mode.htotal = mode.hdisplay + dtd->part1.h_blank;
874 mode.htotal += (dtd->part1.h_high & 0xf) << 8;
875
876 mode.vdisplay = dtd->part1.v_active;
877 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
878 mode.vsync_start = mode.vdisplay;
879 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
880 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
881 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
882 mode.vsync_end = mode.vsync_start +
883 (dtd->part2.v_sync_off_width & 0xf);
884 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
885 mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
886 mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
887
888 mode.clock = dtd->part1.clock * 10;
889
890 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
891 mode.flags |= DRM_MODE_FLAG_INTERLACE;
892 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
893 mode.flags |= DRM_MODE_FLAG_PHSYNC;
894 else
895 mode.flags |= DRM_MODE_FLAG_NHSYNC;
896 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
897 mode.flags |= DRM_MODE_FLAG_PVSYNC;
898 else
899 mode.flags |= DRM_MODE_FLAG_NVSYNC;
900
901 drm_mode_set_crtcinfo(&mode, 0);
902
903 drm_mode_copy(pmode, &mode);
904}
905
906static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
907{
908 struct intel_sdvo_encode encode;
909
910 BUILD_BUG_ON(sizeof(encode) != 2);
911 return intel_sdvo_get_value(intel_sdvo,
912 SDVO_CMD_GET_SUPP_ENCODE,
913 &encode, sizeof(encode));
914}
915
916static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
917 uint8_t mode)
918{
919 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
920}
921
922static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
923 uint8_t mode)
924{
925 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
926}
927
928#if 0
929static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
930{
931 int i, j;
932 uint8_t set_buf_index[2];
933 uint8_t av_split;
934 uint8_t buf_size;
935 uint8_t buf[48];
936 uint8_t *pos;
937
938 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
939
940 for (i = 0; i <= av_split; i++) {
941 set_buf_index[0] = i; set_buf_index[1] = 0;
942 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
943 set_buf_index, 2);
944 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
945 intel_sdvo_read_response(encoder, &buf_size, 1);
946
947 pos = buf;
948 for (j = 0; j <= buf_size; j += 8) {
949 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
950 NULL, 0);
951 intel_sdvo_read_response(encoder, pos, 8);
952 pos += 8;
953 }
954 }
955}
956#endif
957
958static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
959 unsigned if_index, uint8_t tx_rate,
960 const uint8_t *data, unsigned length)
961{
962 uint8_t set_buf_index[2] = { if_index, 0 };
963 uint8_t hbuf_size, tmp[8];
964 int i;
965
966 if (!intel_sdvo_set_value(intel_sdvo,
967 SDVO_CMD_SET_HBUF_INDEX,
968 set_buf_index, 2))
969 return false;
970
971 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
972 &hbuf_size, 1))
973 return false;
974
975 /* Buffer size is 0 based, hooray! */
976 hbuf_size++;
977
978 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
979 if_index, length, hbuf_size);
980
981 for (i = 0; i < hbuf_size; i += 8) {
982 memset(tmp, 0, 8);
983 if (i < length)
984 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
985
986 if (!intel_sdvo_set_value(intel_sdvo,
987 SDVO_CMD_SET_HBUF_DATA,
988 tmp, 8))
989 return false;
990 }
991
992 return intel_sdvo_set_value(intel_sdvo,
993 SDVO_CMD_SET_HBUF_TXRATE,
994 &tx_rate, 1);
995}
996
997static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
998 const struct intel_crtc_state *pipe_config)
999{
1000 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1001 union hdmi_infoframe frame;
1002 int ret;
1003 ssize_t len;
1004
1005 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1006 &pipe_config->base.adjusted_mode,
1007 false);
1008 if (ret < 0) {
1009 DRM_ERROR("couldn't fill AVI infoframe\n");
1010 return false;
1011 }
1012
1013 if (intel_sdvo->rgb_quant_range_selectable) {
1014 if (pipe_config->limited_color_range)
1015 frame.avi.quantization_range =
1016 HDMI_QUANTIZATION_RANGE_LIMITED;
1017 else
1018 frame.avi.quantization_range =
1019 HDMI_QUANTIZATION_RANGE_FULL;
1020 }
1021
1022 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1023 if (len < 0)
1024 return false;
1025
1026 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1027 SDVO_HBUF_TX_VSYNC,
1028 sdvo_data, sizeof(sdvo_data));
1029}
1030
1031static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1032 const struct drm_connector_state *conn_state)
1033{
1034 struct intel_sdvo_tv_format format;
1035 uint32_t format_map;
1036
1037 format_map = 1 << conn_state->tv.mode;
1038 memset(&format, 0, sizeof(format));
1039 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1040
1041 BUILD_BUG_ON(sizeof(format) != 6);
1042 return intel_sdvo_set_value(intel_sdvo,
1043 SDVO_CMD_SET_TV_FORMAT,
1044 &format, sizeof(format));
1045}
1046
1047static bool
1048intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1049 const struct drm_display_mode *mode)
1050{
1051 struct intel_sdvo_dtd output_dtd;
1052
1053 if (!intel_sdvo_set_target_output(intel_sdvo,
1054 intel_sdvo->attached_output))
1055 return false;
1056
1057 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1058 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1059 return false;
1060
1061 return true;
1062}
1063
1064/*
1065 * Asks the sdvo controller for the preferred input mode given the output mode.
1066 * Unfortunately we have to set up the full output mode to do that.
1067 */
1068static bool
1069intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1070 const struct drm_display_mode *mode,
1071 struct drm_display_mode *adjusted_mode)
1072{
1073 struct intel_sdvo_dtd input_dtd;
1074
1075 /* Reset the input timing to the screen. Assume always input 0. */
1076 if (!intel_sdvo_set_target_input(intel_sdvo))
1077 return false;
1078
1079 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1080 mode->clock / 10,
1081 mode->hdisplay,
1082 mode->vdisplay))
1083 return false;
1084
1085 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1086 &input_dtd))
1087 return false;
1088
1089 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1090 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1091
1092 return true;
1093}
1094
1095static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1096{
1097 unsigned dotclock = pipe_config->port_clock;
1098 struct dpll *clock = &pipe_config->dpll;
1099
1100 /*
1101 * SDVO TV has fixed PLL values depend on its clock range,
1102 * this mirrors vbios setting.
1103 */
1104 if (dotclock >= 100000 && dotclock < 140500) {
1105 clock->p1 = 2;
1106 clock->p2 = 10;
1107 clock->n = 3;
1108 clock->m1 = 16;
1109 clock->m2 = 8;
1110 } else if (dotclock >= 140500 && dotclock <= 200000) {
1111 clock->p1 = 1;
1112 clock->p2 = 10;
1113 clock->n = 6;
1114 clock->m1 = 12;
1115 clock->m2 = 8;
1116 } else {
1117 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1118 }
1119
1120 pipe_config->clock_set = true;
1121}
1122
1123static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1124 struct intel_crtc_state *pipe_config,
1125 struct drm_connector_state *conn_state)
1126{
1127 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1128 struct intel_sdvo_connector_state *intel_sdvo_state =
1129 to_intel_sdvo_connector_state(conn_state);
1130 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1131 struct drm_display_mode *mode = &pipe_config->base.mode;
1132
1133 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1134 pipe_config->pipe_bpp = 8*3;
1135
1136 if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1137 pipe_config->has_pch_encoder = true;
1138
1139 /*
1140 * We need to construct preferred input timings based on our
1141 * output timings. To do that, we have to set the output
1142 * timings, even though this isn't really the right place in
1143 * the sequence to do it. Oh well.
1144 */
1145 if (intel_sdvo->is_tv) {
1146 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1147 return false;
1148
1149 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1150 mode,
1151 adjusted_mode);
1152 pipe_config->sdvo_tv_clock = true;
1153 } else if (intel_sdvo->is_lvds) {
1154 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1155 intel_sdvo->sdvo_lvds_fixed_mode))
1156 return false;
1157
1158 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1159 mode,
1160 adjusted_mode);
1161 }
1162
1163 /*
1164 * Make the CRTC code factor in the SDVO pixel multiplier. The
1165 * SDVO device will factor out the multiplier during mode_set.
1166 */
1167 pipe_config->pixel_multiplier =
1168 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1169
1170 if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1171 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1172
1173 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1174 (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1175 pipe_config->has_audio = true;
1176
1177 if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1178 /*
1179 * See CEA-861-E - 5.1 Default Encoding Parameters
1180 *
1181 * FIXME: This bit is only valid when using TMDS encoding and 8
1182 * bit per color mode.
1183 */
1184 if (pipe_config->has_hdmi_sink &&
1185 drm_match_cea_mode(adjusted_mode) > 1)
1186 pipe_config->limited_color_range = true;
1187 } else {
1188 if (pipe_config->has_hdmi_sink &&
1189 intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1190 pipe_config->limited_color_range = true;
1191 }
1192
1193 /* Clock computation needs to happen after pixel multiplier. */
1194 if (intel_sdvo->is_tv)
1195 i9xx_adjust_sdvo_tv_clock(pipe_config);
1196
1197 /* Set user selected PAR to incoming mode's member */
1198 if (intel_sdvo->is_hdmi)
1199 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1200
1201 return true;
1202}
1203
1204#define UPDATE_PROPERTY(input, NAME) \
1205 do { \
1206 val = input; \
1207 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1208 } while (0)
1209
1210static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1211 const struct intel_sdvo_connector_state *sdvo_state)
1212{
1213 const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1214 struct intel_sdvo_connector *intel_sdvo_conn =
1215 to_intel_sdvo_connector(conn_state->connector);
1216 uint16_t val;
1217
1218 if (intel_sdvo_conn->left)
1219 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1220
1221 if (intel_sdvo_conn->top)
1222 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1223
1224 if (intel_sdvo_conn->hpos)
1225 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1226
1227 if (intel_sdvo_conn->vpos)
1228 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1229
1230 if (intel_sdvo_conn->saturation)
1231 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1232
1233 if (intel_sdvo_conn->contrast)
1234 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1235
1236 if (intel_sdvo_conn->hue)
1237 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1238
1239 if (intel_sdvo_conn->brightness)
1240 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1241
1242 if (intel_sdvo_conn->sharpness)
1243 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1244
1245 if (intel_sdvo_conn->flicker_filter)
1246 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1247
1248 if (intel_sdvo_conn->flicker_filter_2d)
1249 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1250
1251 if (intel_sdvo_conn->flicker_filter_adaptive)
1252 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1253
1254 if (intel_sdvo_conn->tv_chroma_filter)
1255 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1256
1257 if (intel_sdvo_conn->tv_luma_filter)
1258 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1259
1260 if (intel_sdvo_conn->dot_crawl)
1261 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1262
1263#undef UPDATE_PROPERTY
1264}
1265
1266static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1267 const struct intel_crtc_state *crtc_state,
1268 const struct drm_connector_state *conn_state)
1269{
1270 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1271 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1272 const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1273 const struct intel_sdvo_connector_state *sdvo_state =
1274 to_intel_sdvo_connector_state(conn_state);
1275 const struct drm_display_mode *mode = &crtc_state->base.mode;
1276 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1277 u32 sdvox;
1278 struct intel_sdvo_in_out_map in_out;
1279 struct intel_sdvo_dtd input_dtd, output_dtd;
1280 int rate;
1281
1282 intel_sdvo_update_props(intel_sdvo, sdvo_state);
1283
1284 /*
1285 * First, set the input mapping for the first input to our controlled
1286 * output. This is only correct if we're a single-input device, in
1287 * which case the first input is the output from the appropriate SDVO
1288 * channel on the motherboard. In a two-input device, the first input
1289 * will be SDVOB and the second SDVOC.
1290 */
1291 in_out.in0 = intel_sdvo->attached_output;
1292 in_out.in1 = 0;
1293
1294 intel_sdvo_set_value(intel_sdvo,
1295 SDVO_CMD_SET_IN_OUT_MAP,
1296 &in_out, sizeof(in_out));
1297
1298 /* Set the output timings to the screen */
1299 if (!intel_sdvo_set_target_output(intel_sdvo,
1300 intel_sdvo->attached_output))
1301 return;
1302
1303 /* lvds has a special fixed output timing. */
1304 if (intel_sdvo->is_lvds)
1305 intel_sdvo_get_dtd_from_mode(&output_dtd,
1306 intel_sdvo->sdvo_lvds_fixed_mode);
1307 else
1308 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1309 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1310 DRM_INFO("Setting output timings on %s failed\n",
1311 SDVO_NAME(intel_sdvo));
1312
1313 /* Set the input timing to the screen. Assume always input 0. */
1314 if (!intel_sdvo_set_target_input(intel_sdvo))
1315 return;
1316
1317 if (crtc_state->has_hdmi_sink) {
1318 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1319 intel_sdvo_set_colorimetry(intel_sdvo,
1320 SDVO_COLORIMETRY_RGB256);
1321 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1322 } else
1323 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1324
1325 if (intel_sdvo->is_tv &&
1326 !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1327 return;
1328
1329 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1330
1331 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1332 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1333 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1334 DRM_INFO("Setting input timings on %s failed\n",
1335 SDVO_NAME(intel_sdvo));
1336
1337 switch (crtc_state->pixel_multiplier) {
1338 default:
1339 WARN(1, "unknown pixel multiplier specified\n");
1340 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1341 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1342 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1343 }
1344 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1345 return;
1346
1347 /* Set the SDVO control regs. */
1348 if (INTEL_GEN(dev_priv) >= 4) {
1349 /* The real mode polarity is set by the SDVO commands, using
1350 * struct intel_sdvo_dtd. */
1351 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1352 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1353 sdvox |= HDMI_COLOR_RANGE_16_235;
1354 if (INTEL_GEN(dev_priv) < 5)
1355 sdvox |= SDVO_BORDER_ENABLE;
1356 } else {
1357 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1358 if (intel_sdvo->port == PORT_B)
1359 sdvox &= SDVOB_PRESERVE_MASK;
1360 else
1361 sdvox &= SDVOC_PRESERVE_MASK;
1362 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1363 }
1364
1365 if (HAS_PCH_CPT(dev_priv))
1366 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1367 else
1368 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1369
1370 if (crtc_state->has_audio) {
1371 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1372 sdvox |= SDVO_AUDIO_ENABLE;
1373 }
1374
1375 if (INTEL_GEN(dev_priv) >= 4) {
1376 /* done in crtc_mode_set as the dpll_md reg must be written early */
1377 } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1378 IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1379 /* done in crtc_mode_set as it lives inside the dpll register */
1380 } else {
1381 sdvox |= (crtc_state->pixel_multiplier - 1)
1382 << SDVO_PORT_MULTIPLY_SHIFT;
1383 }
1384
1385 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1386 INTEL_GEN(dev_priv) < 5)
1387 sdvox |= SDVO_STALL_SELECT;
1388 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1389}
1390
1391static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1392{
1393 struct intel_sdvo_connector *intel_sdvo_connector =
1394 to_intel_sdvo_connector(&connector->base);
1395 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1396 u16 active_outputs = 0;
1397
1398 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1399
1400 if (active_outputs & intel_sdvo_connector->output_flag)
1401 return true;
1402 else
1403 return false;
1404}
1405
1406static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1407 enum pipe *pipe)
1408{
1409 struct drm_device *dev = encoder->base.dev;
1410 struct drm_i915_private *dev_priv = to_i915(dev);
1411 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1412 u16 active_outputs = 0;
1413 u32 tmp;
1414
1415 tmp = I915_READ(intel_sdvo->sdvo_reg);
1416 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1417
1418 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1419 return false;
1420
1421 if (HAS_PCH_CPT(dev_priv))
1422 *pipe = PORT_TO_PIPE_CPT(tmp);
1423 else
1424 *pipe = PORT_TO_PIPE(tmp);
1425
1426 return true;
1427}
1428
1429static void intel_sdvo_get_config(struct intel_encoder *encoder,
1430 struct intel_crtc_state *pipe_config)
1431{
1432 struct drm_device *dev = encoder->base.dev;
1433 struct drm_i915_private *dev_priv = to_i915(dev);
1434 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1435 struct intel_sdvo_dtd dtd;
1436 int encoder_pixel_multiplier = 0;
1437 int dotclock;
1438 u32 flags = 0, sdvox;
1439 u8 val;
1440 bool ret;
1441
1442 pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1443
1444 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1445
1446 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1447 if (!ret) {
1448 /*
1449 * Some sdvo encoders are not spec compliant and don't
1450 * implement the mandatory get_timings function.
1451 */
1452 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1453 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1454 } else {
1455 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1456 flags |= DRM_MODE_FLAG_PHSYNC;
1457 else
1458 flags |= DRM_MODE_FLAG_NHSYNC;
1459
1460 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1461 flags |= DRM_MODE_FLAG_PVSYNC;
1462 else
1463 flags |= DRM_MODE_FLAG_NVSYNC;
1464 }
1465
1466 pipe_config->base.adjusted_mode.flags |= flags;
1467
1468 /*
1469 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1470 * the sdvo port register, on all other platforms it is part of the dpll
1471 * state. Since the general pipe state readout happens before the
1472 * encoder->get_config we so already have a valid pixel multplier on all
1473 * other platfroms.
1474 */
1475 if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1476 pipe_config->pixel_multiplier =
1477 ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1478 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1479 }
1480
1481 dotclock = pipe_config->port_clock;
1482
1483 if (pipe_config->pixel_multiplier)
1484 dotclock /= pipe_config->pixel_multiplier;
1485
1486 pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1487
1488 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1489 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1490 &val, 1)) {
1491 switch (val) {
1492 case SDVO_CLOCK_RATE_MULT_1X:
1493 encoder_pixel_multiplier = 1;
1494 break;
1495 case SDVO_CLOCK_RATE_MULT_2X:
1496 encoder_pixel_multiplier = 2;
1497 break;
1498 case SDVO_CLOCK_RATE_MULT_4X:
1499 encoder_pixel_multiplier = 4;
1500 break;
1501 }
1502 }
1503
1504 if (sdvox & HDMI_COLOR_RANGE_16_235)
1505 pipe_config->limited_color_range = true;
1506
1507 if (sdvox & SDVO_AUDIO_ENABLE)
1508 pipe_config->has_audio = true;
1509
1510 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1511 &val, 1)) {
1512 if (val == SDVO_ENCODE_HDMI)
1513 pipe_config->has_hdmi_sink = true;
1514 }
1515
1516 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1517 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1518 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1519}
1520
1521static void intel_disable_sdvo(struct intel_encoder *encoder,
1522 const struct intel_crtc_state *old_crtc_state,
1523 const struct drm_connector_state *conn_state)
1524{
1525 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1526 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1527 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1528 u32 temp;
1529
1530 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1531 if (0)
1532 intel_sdvo_set_encoder_power_state(intel_sdvo,
1533 DRM_MODE_DPMS_OFF);
1534
1535 temp = I915_READ(intel_sdvo->sdvo_reg);
1536
1537 temp &= ~SDVO_ENABLE;
1538 intel_sdvo_write_sdvox(intel_sdvo, temp);
1539
1540 /*
1541 * HW workaround for IBX, we need to move the port
1542 * to transcoder A after disabling it to allow the
1543 * matching DP port to be enabled on transcoder A.
1544 */
1545 if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1546 /*
1547 * We get CPU/PCH FIFO underruns on the other pipe when
1548 * doing the workaround. Sweep them under the rug.
1549 */
1550 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1551 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1552
1553 temp &= ~SDVO_PIPE_B_SELECT;
1554 temp |= SDVO_ENABLE;
1555 intel_sdvo_write_sdvox(intel_sdvo, temp);
1556
1557 temp &= ~SDVO_ENABLE;
1558 intel_sdvo_write_sdvox(intel_sdvo, temp);
1559
1560 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1561 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1562 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1563 }
1564}
1565
1566static void pch_disable_sdvo(struct intel_encoder *encoder,
1567 const struct intel_crtc_state *old_crtc_state,
1568 const struct drm_connector_state *old_conn_state)
1569{
1570}
1571
1572static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1573 const struct intel_crtc_state *old_crtc_state,
1574 const struct drm_connector_state *old_conn_state)
1575{
1576 intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1577}
1578
1579static void intel_enable_sdvo(struct intel_encoder *encoder,
1580 const struct intel_crtc_state *pipe_config,
1581 const struct drm_connector_state *conn_state)
1582{
1583 struct drm_device *dev = encoder->base.dev;
1584 struct drm_i915_private *dev_priv = to_i915(dev);
1585 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1586 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1587 u32 temp;
1588 bool input1, input2;
1589 int i;
1590 bool success;
1591
1592 temp = I915_READ(intel_sdvo->sdvo_reg);
1593 temp |= SDVO_ENABLE;
1594 intel_sdvo_write_sdvox(intel_sdvo, temp);
1595
1596 for (i = 0; i < 2; i++)
1597 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1598
1599 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1600 /*
1601 * Warn if the device reported failure to sync.
1602 *
1603 * A lot of SDVO devices fail to notify of sync, but it's
1604 * a given it the status is a success, we succeeded.
1605 */
1606 if (success && !input1) {
1607 DRM_DEBUG_KMS("First %s output reported failure to "
1608 "sync\n", SDVO_NAME(intel_sdvo));
1609 }
1610
1611 if (0)
1612 intel_sdvo_set_encoder_power_state(intel_sdvo,
1613 DRM_MODE_DPMS_ON);
1614 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1615}
1616
1617static enum drm_mode_status
1618intel_sdvo_mode_valid(struct drm_connector *connector,
1619 struct drm_display_mode *mode)
1620{
1621 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1622 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1623
1624 if (intel_sdvo->pixel_clock_min > mode->clock)
1625 return MODE_CLOCK_LOW;
1626
1627 if (intel_sdvo->pixel_clock_max < mode->clock)
1628 return MODE_CLOCK_HIGH;
1629
1630 if (mode->clock > max_dotclk)
1631 return MODE_CLOCK_HIGH;
1632
1633 if (intel_sdvo->is_lvds) {
1634 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1635 return MODE_PANEL;
1636
1637 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1638 return MODE_PANEL;
1639 }
1640
1641 return MODE_OK;
1642}
1643
1644static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1645{
1646 BUILD_BUG_ON(sizeof(*caps) != 8);
1647 if (!intel_sdvo_get_value(intel_sdvo,
1648 SDVO_CMD_GET_DEVICE_CAPS,
1649 caps, sizeof(*caps)))
1650 return false;
1651
1652 DRM_DEBUG_KMS("SDVO capabilities:\n"
1653 " vendor_id: %d\n"
1654 " device_id: %d\n"
1655 " device_rev_id: %d\n"
1656 " sdvo_version_major: %d\n"
1657 " sdvo_version_minor: %d\n"
1658 " sdvo_inputs_mask: %d\n"
1659 " smooth_scaling: %d\n"
1660 " sharp_scaling: %d\n"
1661 " up_scaling: %d\n"
1662 " down_scaling: %d\n"
1663 " stall_support: %d\n"
1664 " output_flags: %d\n",
1665 caps->vendor_id,
1666 caps->device_id,
1667 caps->device_rev_id,
1668 caps->sdvo_version_major,
1669 caps->sdvo_version_minor,
1670 caps->sdvo_inputs_mask,
1671 caps->smooth_scaling,
1672 caps->sharp_scaling,
1673 caps->up_scaling,
1674 caps->down_scaling,
1675 caps->stall_support,
1676 caps->output_flags);
1677
1678 return true;
1679}
1680
1681static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1682{
1683 struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1684 uint16_t hotplug;
1685
1686 if (!I915_HAS_HOTPLUG(dev_priv))
1687 return 0;
1688
1689 /*
1690 * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1691 * on the line.
1692 */
1693 if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1694 return 0;
1695
1696 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1697 &hotplug, sizeof(hotplug)))
1698 return 0;
1699
1700 return hotplug;
1701}
1702
1703static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1704{
1705 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1706
1707 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1708 &intel_sdvo->hotplug_active, 2);
1709}
1710
1711static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1712 struct intel_connector *connector)
1713{
1714 intel_sdvo_enable_hotplug(encoder);
1715
1716 return intel_encoder_hotplug(encoder, connector);
1717}
1718
1719static bool
1720intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1721{
1722 /* Is there more than one type of output? */
1723 return hweight16(intel_sdvo->caps.output_flags) > 1;
1724}
1725
1726static struct edid *
1727intel_sdvo_get_edid(struct drm_connector *connector)
1728{
1729 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1730 return drm_get_edid(connector, &sdvo->ddc);
1731}
1732
1733/* Mac mini hack -- use the same DDC as the analog connector */
1734static struct edid *
1735intel_sdvo_get_analog_edid(struct drm_connector *connector)
1736{
1737 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1738
1739 return drm_get_edid(connector,
1740 intel_gmbus_get_adapter(dev_priv,
1741 dev_priv->vbt.crt_ddc_pin));
1742}
1743
1744static enum drm_connector_status
1745intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1746{
1747 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1748 enum drm_connector_status status;
1749 struct edid *edid;
1750
1751 edid = intel_sdvo_get_edid(connector);
1752
1753 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1754 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1755
1756 /*
1757 * Don't use the 1 as the argument of DDC bus switch to get
1758 * the EDID. It is used for SDVO SPD ROM.
1759 */
1760 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1761 intel_sdvo->ddc_bus = ddc;
1762 edid = intel_sdvo_get_edid(connector);
1763 if (edid)
1764 break;
1765 }
1766 /*
1767 * If we found the EDID on the other bus,
1768 * assume that is the correct DDC bus.
1769 */
1770 if (edid == NULL)
1771 intel_sdvo->ddc_bus = saved_ddc;
1772 }
1773
1774 /*
1775 * When there is no edid and no monitor is connected with VGA
1776 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1777 */
1778 if (edid == NULL)
1779 edid = intel_sdvo_get_analog_edid(connector);
1780
1781 status = connector_status_unknown;
1782 if (edid != NULL) {
1783 /* DDC bus is shared, match EDID to connector type */
1784 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1785 status = connector_status_connected;
1786 if (intel_sdvo->is_hdmi) {
1787 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1788 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1789 intel_sdvo->rgb_quant_range_selectable =
1790 drm_rgb_quant_range_selectable(edid);
1791 }
1792 } else
1793 status = connector_status_disconnected;
1794 kfree(edid);
1795 }
1796
1797 return status;
1798}
1799
1800static bool
1801intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1802 struct edid *edid)
1803{
1804 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1805 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1806
1807 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1808 connector_is_digital, monitor_is_digital);
1809 return connector_is_digital == monitor_is_digital;
1810}
1811
1812static enum drm_connector_status
1813intel_sdvo_detect(struct drm_connector *connector, bool force)
1814{
1815 uint16_t response;
1816 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1817 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1818 enum drm_connector_status ret;
1819
1820 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1821 connector->base.id, connector->name);
1822
1823 if (!intel_sdvo_get_value(intel_sdvo,
1824 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1825 &response, 2))
1826 return connector_status_unknown;
1827
1828 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1829 response & 0xff, response >> 8,
1830 intel_sdvo_connector->output_flag);
1831
1832 if (response == 0)
1833 return connector_status_disconnected;
1834
1835 intel_sdvo->attached_output = response;
1836
1837 intel_sdvo->has_hdmi_monitor = false;
1838 intel_sdvo->has_hdmi_audio = false;
1839 intel_sdvo->rgb_quant_range_selectable = false;
1840
1841 if ((intel_sdvo_connector->output_flag & response) == 0)
1842 ret = connector_status_disconnected;
1843 else if (IS_TMDS(intel_sdvo_connector))
1844 ret = intel_sdvo_tmds_sink_detect(connector);
1845 else {
1846 struct edid *edid;
1847
1848 /* if we have an edid check it matches the connection */
1849 edid = intel_sdvo_get_edid(connector);
1850 if (edid == NULL)
1851 edid = intel_sdvo_get_analog_edid(connector);
1852 if (edid != NULL) {
1853 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1854 edid))
1855 ret = connector_status_connected;
1856 else
1857 ret = connector_status_disconnected;
1858
1859 kfree(edid);
1860 } else
1861 ret = connector_status_connected;
1862 }
1863
1864 /* May update encoder flag for like clock for SDVO TV, etc.*/
1865 if (ret == connector_status_connected) {
1866 intel_sdvo->is_tv = false;
1867 intel_sdvo->is_lvds = false;
1868
1869 if (response & SDVO_TV_MASK)
1870 intel_sdvo->is_tv = true;
1871 if (response & SDVO_LVDS_MASK)
1872 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1873 }
1874
1875 return ret;
1876}
1877
1878static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1879{
1880 struct edid *edid;
1881
1882 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1883 connector->base.id, connector->name);
1884
1885 /* set the bus switch and get the modes */
1886 edid = intel_sdvo_get_edid(connector);
1887
1888 /*
1889 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1890 * link between analog and digital outputs. So, if the regular SDVO
1891 * DDC fails, check to see if the analog output is disconnected, in
1892 * which case we'll look there for the digital DDC data.
1893 */
1894 if (edid == NULL)
1895 edid = intel_sdvo_get_analog_edid(connector);
1896
1897 if (edid != NULL) {
1898 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1899 edid)) {
1900 drm_mode_connector_update_edid_property(connector, edid);
1901 drm_add_edid_modes(connector, edid);
1902 }
1903
1904 kfree(edid);
1905 }
1906}
1907
1908/*
1909 * Set of SDVO TV modes.
1910 * Note! This is in reply order (see loop in get_tv_modes).
1911 * XXX: all 60Hz refresh?
1912 */
1913static const struct drm_display_mode sdvo_tv_modes[] = {
1914 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1915 416, 0, 200, 201, 232, 233, 0,
1916 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1917 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1918 416, 0, 240, 241, 272, 273, 0,
1919 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1920 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1921 496, 0, 300, 301, 332, 333, 0,
1922 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1923 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1924 736, 0, 350, 351, 382, 383, 0,
1925 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1926 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1927 736, 0, 400, 401, 432, 433, 0,
1928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1929 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1930 736, 0, 480, 481, 512, 513, 0,
1931 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1932 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1933 800, 0, 480, 481, 512, 513, 0,
1934 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1935 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1936 800, 0, 576, 577, 608, 609, 0,
1937 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1938 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1939 816, 0, 350, 351, 382, 383, 0,
1940 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1941 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1942 816, 0, 400, 401, 432, 433, 0,
1943 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1944 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1945 816, 0, 480, 481, 512, 513, 0,
1946 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1947 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1948 816, 0, 540, 541, 572, 573, 0,
1949 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1950 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1951 816, 0, 576, 577, 608, 609, 0,
1952 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1953 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1954 864, 0, 576, 577, 608, 609, 0,
1955 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1956 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1957 896, 0, 600, 601, 632, 633, 0,
1958 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1959 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1960 928, 0, 624, 625, 656, 657, 0,
1961 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1962 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1963 1016, 0, 766, 767, 798, 799, 0,
1964 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1965 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1966 1120, 0, 768, 769, 800, 801, 0,
1967 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1968 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1969 1376, 0, 1024, 1025, 1056, 1057, 0,
1970 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1971};
1972
1973static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1974{
1975 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1976 const struct drm_connector_state *conn_state = connector->state;
1977 struct intel_sdvo_sdtv_resolution_request tv_res;
1978 uint32_t reply = 0, format_map = 0;
1979 int i;
1980
1981 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1982 connector->base.id, connector->name);
1983
1984 /*
1985 * Read the list of supported input resolutions for the selected TV
1986 * format.
1987 */
1988 format_map = 1 << conn_state->tv.mode;
1989 memcpy(&tv_res, &format_map,
1990 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1991
1992 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1993 return;
1994
1995 BUILD_BUG_ON(sizeof(tv_res) != 3);
1996 if (!intel_sdvo_write_cmd(intel_sdvo,
1997 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1998 &tv_res, sizeof(tv_res)))
1999 return;
2000 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2001 return;
2002
2003 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2004 if (reply & (1 << i)) {
2005 struct drm_display_mode *nmode;
2006 nmode = drm_mode_duplicate(connector->dev,
2007 &sdvo_tv_modes[i]);
2008 if (nmode)
2009 drm_mode_probed_add(connector, nmode);
2010 }
2011}
2012
2013static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2014{
2015 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2016 struct drm_i915_private *dev_priv = to_i915(connector->dev);
2017 struct drm_display_mode *newmode;
2018
2019 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2020 connector->base.id, connector->name);
2021
2022 /*
2023 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2024 * SDVO->LVDS transcoders can't cope with the EDID mode.
2025 */
2026 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2027 newmode = drm_mode_duplicate(connector->dev,
2028 dev_priv->vbt.sdvo_lvds_vbt_mode);
2029 if (newmode != NULL) {
2030 /* Guarantee the mode is preferred */
2031 newmode->type = (DRM_MODE_TYPE_PREFERRED |
2032 DRM_MODE_TYPE_DRIVER);
2033 drm_mode_probed_add(connector, newmode);
2034 }
2035 }
2036
2037 /*
2038 * Attempt to get the mode list from DDC.
2039 * Assume that the preferred modes are
2040 * arranged in priority order.
2041 */
2042 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2043
2044 list_for_each_entry(newmode, &connector->probed_modes, head) {
2045 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
2046 intel_sdvo->sdvo_lvds_fixed_mode =
2047 drm_mode_duplicate(connector->dev, newmode);
2048
2049 intel_sdvo->is_lvds = true;
2050 break;
2051 }
2052 }
2053}
2054
2055static int intel_sdvo_get_modes(struct drm_connector *connector)
2056{
2057 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2058
2059 if (IS_TV(intel_sdvo_connector))
2060 intel_sdvo_get_tv_modes(connector);
2061 else if (IS_LVDS(intel_sdvo_connector))
2062 intel_sdvo_get_lvds_modes(connector);
2063 else
2064 intel_sdvo_get_ddc_modes(connector);
2065
2066 return !list_empty(&connector->probed_modes);
2067}
2068
2069static void intel_sdvo_destroy(struct drm_connector *connector)
2070{
2071 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2072
2073 drm_connector_cleanup(connector);
2074 kfree(intel_sdvo_connector);
2075}
2076
2077static int
2078intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2079 const struct drm_connector_state *state,
2080 struct drm_property *property,
2081 uint64_t *val)
2082{
2083 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2084 const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2085
2086 if (property == intel_sdvo_connector->tv_format) {
2087 int i;
2088
2089 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2090 if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2091 *val = i;
2092
2093 return 0;
2094 }
2095
2096 WARN_ON(1);
2097 *val = 0;
2098 } else if (property == intel_sdvo_connector->top ||
2099 property == intel_sdvo_connector->bottom)
2100 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2101 else if (property == intel_sdvo_connector->left ||
2102 property == intel_sdvo_connector->right)
2103 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2104 else if (property == intel_sdvo_connector->hpos)
2105 *val = sdvo_state->tv.hpos;
2106 else if (property == intel_sdvo_connector->vpos)
2107 *val = sdvo_state->tv.vpos;
2108 else if (property == intel_sdvo_connector->saturation)
2109 *val = state->tv.saturation;
2110 else if (property == intel_sdvo_connector->contrast)
2111 *val = state->tv.contrast;
2112 else if (property == intel_sdvo_connector->hue)
2113 *val = state->tv.hue;
2114 else if (property == intel_sdvo_connector->brightness)
2115 *val = state->tv.brightness;
2116 else if (property == intel_sdvo_connector->sharpness)
2117 *val = sdvo_state->tv.sharpness;
2118 else if (property == intel_sdvo_connector->flicker_filter)
2119 *val = sdvo_state->tv.flicker_filter;
2120 else if (property == intel_sdvo_connector->flicker_filter_2d)
2121 *val = sdvo_state->tv.flicker_filter_2d;
2122 else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2123 *val = sdvo_state->tv.flicker_filter_adaptive;
2124 else if (property == intel_sdvo_connector->tv_chroma_filter)
2125 *val = sdvo_state->tv.chroma_filter;
2126 else if (property == intel_sdvo_connector->tv_luma_filter)
2127 *val = sdvo_state->tv.luma_filter;
2128 else if (property == intel_sdvo_connector->dot_crawl)
2129 *val = sdvo_state->tv.dot_crawl;
2130 else
2131 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2132
2133 return 0;
2134}
2135
2136static int
2137intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2138 struct drm_connector_state *state,
2139 struct drm_property *property,
2140 uint64_t val)
2141{
2142 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2143 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2144
2145 if (property == intel_sdvo_connector->tv_format) {
2146 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2147
2148 if (state->crtc) {
2149 struct drm_crtc_state *crtc_state =
2150 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2151
2152 crtc_state->connectors_changed = true;
2153 }
2154 } else if (property == intel_sdvo_connector->top ||
2155 property == intel_sdvo_connector->bottom)
2156 /* Cannot set these independent from each other */
2157 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2158 else if (property == intel_sdvo_connector->left ||
2159 property == intel_sdvo_connector->right)
2160 /* Cannot set these independent from each other */
2161 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2162 else if (property == intel_sdvo_connector->hpos)
2163 sdvo_state->tv.hpos = val;
2164 else if (property == intel_sdvo_connector->vpos)
2165 sdvo_state->tv.vpos = val;
2166 else if (property == intel_sdvo_connector->saturation)
2167 state->tv.saturation = val;
2168 else if (property == intel_sdvo_connector->contrast)
2169 state->tv.contrast = val;
2170 else if (property == intel_sdvo_connector->hue)
2171 state->tv.hue = val;
2172 else if (property == intel_sdvo_connector->brightness)
2173 state->tv.brightness = val;
2174 else if (property == intel_sdvo_connector->sharpness)
2175 sdvo_state->tv.sharpness = val;
2176 else if (property == intel_sdvo_connector->flicker_filter)
2177 sdvo_state->tv.flicker_filter = val;
2178 else if (property == intel_sdvo_connector->flicker_filter_2d)
2179 sdvo_state->tv.flicker_filter_2d = val;
2180 else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2181 sdvo_state->tv.flicker_filter_adaptive = val;
2182 else if (property == intel_sdvo_connector->tv_chroma_filter)
2183 sdvo_state->tv.chroma_filter = val;
2184 else if (property == intel_sdvo_connector->tv_luma_filter)
2185 sdvo_state->tv.luma_filter = val;
2186 else if (property == intel_sdvo_connector->dot_crawl)
2187 sdvo_state->tv.dot_crawl = val;
2188 else
2189 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2190
2191 return 0;
2192}
2193
2194static int
2195intel_sdvo_connector_register(struct drm_connector *connector)
2196{
2197 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2198 int ret;
2199
2200 ret = intel_connector_register(connector);
2201 if (ret)
2202 return ret;
2203
2204 return sysfs_create_link(&connector->kdev->kobj,
2205 &sdvo->ddc.dev.kobj,
2206 sdvo->ddc.dev.kobj.name);
2207}
2208
2209static void
2210intel_sdvo_connector_unregister(struct drm_connector *connector)
2211{
2212 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2213
2214 sysfs_remove_link(&connector->kdev->kobj,
2215 sdvo->ddc.dev.kobj.name);
2216 intel_connector_unregister(connector);
2217}
2218
2219static struct drm_connector_state *
2220intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2221{
2222 struct intel_sdvo_connector_state *state;
2223
2224 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2225 if (!state)
2226 return NULL;
2227
2228 __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2229 return &state->base.base;
2230}
2231
2232static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2233 .detect = intel_sdvo_detect,
2234 .fill_modes = drm_helper_probe_single_connector_modes,
2235 .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2236 .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2237 .late_register = intel_sdvo_connector_register,
2238 .early_unregister = intel_sdvo_connector_unregister,
2239 .destroy = intel_sdvo_destroy,
2240 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2241 .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2242};
2243
2244static int intel_sdvo_atomic_check(struct drm_connector *conn,
2245 struct drm_connector_state *new_conn_state)
2246{
2247 struct drm_atomic_state *state = new_conn_state->state;
2248 struct drm_connector_state *old_conn_state =
2249 drm_atomic_get_old_connector_state(state, conn);
2250 struct intel_sdvo_connector_state *old_state =
2251 to_intel_sdvo_connector_state(old_conn_state);
2252 struct intel_sdvo_connector_state *new_state =
2253 to_intel_sdvo_connector_state(new_conn_state);
2254
2255 if (new_conn_state->crtc &&
2256 (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2257 memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2258 struct drm_crtc_state *crtc_state =
2259 drm_atomic_get_new_crtc_state(new_conn_state->state,
2260 new_conn_state->crtc);
2261
2262 crtc_state->connectors_changed = true;
2263 }
2264
2265 return intel_digital_connector_atomic_check(conn, new_conn_state);
2266}
2267
2268static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2269 .get_modes = intel_sdvo_get_modes,
2270 .mode_valid = intel_sdvo_mode_valid,
2271 .atomic_check = intel_sdvo_atomic_check,
2272};
2273
2274static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2275{
2276 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2277
2278 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2279 drm_mode_destroy(encoder->dev,
2280 intel_sdvo->sdvo_lvds_fixed_mode);
2281
2282 i2c_del_adapter(&intel_sdvo->ddc);
2283 intel_encoder_destroy(encoder);
2284}
2285
2286static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2287 .destroy = intel_sdvo_enc_destroy,
2288};
2289
2290static void
2291intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2292{
2293 uint16_t mask = 0;
2294 unsigned int num_bits;
2295
2296 /*
2297 * Make a mask of outputs less than or equal to our own priority in the
2298 * list.
2299 */
2300 switch (sdvo->controlled_output) {
2301 case SDVO_OUTPUT_LVDS1:
2302 mask |= SDVO_OUTPUT_LVDS1;
2303 case SDVO_OUTPUT_LVDS0:
2304 mask |= SDVO_OUTPUT_LVDS0;
2305 case SDVO_OUTPUT_TMDS1:
2306 mask |= SDVO_OUTPUT_TMDS1;
2307 case SDVO_OUTPUT_TMDS0:
2308 mask |= SDVO_OUTPUT_TMDS0;
2309 case SDVO_OUTPUT_RGB1:
2310 mask |= SDVO_OUTPUT_RGB1;
2311 case SDVO_OUTPUT_RGB0:
2312 mask |= SDVO_OUTPUT_RGB0;
2313 break;
2314 }
2315
2316 /* Count bits to find what number we are in the priority list. */
2317 mask &= sdvo->caps.output_flags;
2318 num_bits = hweight16(mask);
2319 /* If more than 3 outputs, default to DDC bus 3 for now. */
2320 if (num_bits > 3)
2321 num_bits = 3;
2322
2323 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2324 sdvo->ddc_bus = 1 << num_bits;
2325}
2326
2327/*
2328 * Choose the appropriate DDC bus for control bus switch command for this
2329 * SDVO output based on the controlled output.
2330 *
2331 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2332 * outputs, then LVDS outputs.
2333 */
2334static void
2335intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2336 struct intel_sdvo *sdvo)
2337{
2338 struct sdvo_device_mapping *mapping;
2339
2340 if (sdvo->port == PORT_B)
2341 mapping = &dev_priv->vbt.sdvo_mappings[0];
2342 else
2343 mapping = &dev_priv->vbt.sdvo_mappings[1];
2344
2345 if (mapping->initialized)
2346 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2347 else
2348 intel_sdvo_guess_ddc_bus(sdvo);
2349}
2350
2351static void
2352intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2353 struct intel_sdvo *sdvo)
2354{
2355 struct sdvo_device_mapping *mapping;
2356 u8 pin;
2357
2358 if (sdvo->port == PORT_B)
2359 mapping = &dev_priv->vbt.sdvo_mappings[0];
2360 else
2361 mapping = &dev_priv->vbt.sdvo_mappings[1];
2362
2363 if (mapping->initialized &&
2364 intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2365 pin = mapping->i2c_pin;
2366 else
2367 pin = GMBUS_PIN_DPB;
2368
2369 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2370
2371 /*
2372 * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2373 * our code totally fails once we start using gmbus. Hence fall back to
2374 * bit banging for now.
2375 */
2376 intel_gmbus_force_bit(sdvo->i2c, true);
2377}
2378
2379/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2380static void
2381intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2382{
2383 intel_gmbus_force_bit(sdvo->i2c, false);
2384}
2385
2386static bool
2387intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2388{
2389 return intel_sdvo_check_supp_encode(intel_sdvo);
2390}
2391
2392static u8
2393intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2394 struct intel_sdvo *sdvo)
2395{
2396 struct sdvo_device_mapping *my_mapping, *other_mapping;
2397
2398 if (sdvo->port == PORT_B) {
2399 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2400 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2401 } else {
2402 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2403 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2404 }
2405
2406 /* If the BIOS described our SDVO device, take advantage of it. */
2407 if (my_mapping->slave_addr)
2408 return my_mapping->slave_addr;
2409
2410 /*
2411 * If the BIOS only described a different SDVO device, use the
2412 * address that it isn't using.
2413 */
2414 if (other_mapping->slave_addr) {
2415 if (other_mapping->slave_addr == 0x70)
2416 return 0x72;
2417 else
2418 return 0x70;
2419 }
2420
2421 /*
2422 * No SDVO device info is found for another DVO port,
2423 * so use mapping assumption we had before BIOS parsing.
2424 */
2425 if (sdvo->port == PORT_B)
2426 return 0x70;
2427 else
2428 return 0x72;
2429}
2430
2431static int
2432intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2433 struct intel_sdvo *encoder)
2434{
2435 struct drm_connector *drm_connector;
2436 int ret;
2437
2438 drm_connector = &connector->base.base;
2439 ret = drm_connector_init(encoder->base.base.dev,
2440 drm_connector,
2441 &intel_sdvo_connector_funcs,
2442 connector->base.base.connector_type);
2443 if (ret < 0)
2444 return ret;
2445
2446 drm_connector_helper_add(drm_connector,
2447 &intel_sdvo_connector_helper_funcs);
2448
2449 connector->base.base.interlace_allowed = 1;
2450 connector->base.base.doublescan_allowed = 0;
2451 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2452 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2453
2454 intel_connector_attach_encoder(&connector->base, &encoder->base);
2455
2456 return 0;
2457}
2458
2459static void
2460intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2461 struct intel_sdvo_connector *connector)
2462{
2463 struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2464
2465 intel_attach_force_audio_property(&connector->base.base);
2466 if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2467 intel_attach_broadcast_rgb_property(&connector->base.base);
2468 }
2469 intel_attach_aspect_ratio_property(&connector->base.base);
2470 connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2471}
2472
2473static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2474{
2475 struct intel_sdvo_connector *sdvo_connector;
2476 struct intel_sdvo_connector_state *conn_state;
2477
2478 sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2479 if (!sdvo_connector)
2480 return NULL;
2481
2482 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2483 if (!conn_state) {
2484 kfree(sdvo_connector);
2485 return NULL;
2486 }
2487
2488 __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2489 &conn_state->base.base);
2490
2491 return sdvo_connector;
2492}
2493
2494static bool
2495intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2496{
2497 struct drm_encoder *encoder = &intel_sdvo->base.base;
2498 struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2499 struct drm_connector *connector;
2500 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2501 struct intel_connector *intel_connector;
2502 struct intel_sdvo_connector *intel_sdvo_connector;
2503
2504 DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2505
2506 intel_sdvo_connector = intel_sdvo_connector_alloc();
2507 if (!intel_sdvo_connector)
2508 return false;
2509
2510 if (device == 0) {
2511 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2512 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2513 } else if (device == 1) {
2514 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2515 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2516 }
2517
2518 intel_connector = &intel_sdvo_connector->base;
2519 connector = &intel_connector->base;
2520 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2521 intel_sdvo_connector->output_flag) {
2522 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2523 /*
2524 * Some SDVO devices have one-shot hotplug interrupts.
2525 * Ensure that they get re-enabled when an interrupt happens.
2526 */
2527 intel_encoder->hotplug = intel_sdvo_hotplug;
2528 intel_sdvo_enable_hotplug(intel_encoder);
2529 } else {
2530 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2531 }
2532 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2533 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2534
2535 /* gen3 doesn't do the hdmi bits in the SDVO register */
2536 if (INTEL_GEN(dev_priv) >= 4 &&
2537 intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2538 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2539 intel_sdvo->is_hdmi = true;
2540 }
2541
2542 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2543 kfree(intel_sdvo_connector);
2544 return false;
2545 }
2546
2547 if (intel_sdvo->is_hdmi)
2548 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2549
2550 return true;
2551}
2552
2553static bool
2554intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2555{
2556 struct drm_encoder *encoder = &intel_sdvo->base.base;
2557 struct drm_connector *connector;
2558 struct intel_connector *intel_connector;
2559 struct intel_sdvo_connector *intel_sdvo_connector;
2560
2561 DRM_DEBUG_KMS("initialising TV type %d\n", type);
2562
2563 intel_sdvo_connector = intel_sdvo_connector_alloc();
2564 if (!intel_sdvo_connector)
2565 return false;
2566
2567 intel_connector = &intel_sdvo_connector->base;
2568 connector = &intel_connector->base;
2569 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2570 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2571
2572 intel_sdvo->controlled_output |= type;
2573 intel_sdvo_connector->output_flag = type;
2574
2575 intel_sdvo->is_tv = true;
2576
2577 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2578 kfree(intel_sdvo_connector);
2579 return false;
2580 }
2581
2582 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2583 goto err;
2584
2585 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2586 goto err;
2587
2588 return true;
2589
2590err:
2591 intel_sdvo_destroy(connector);
2592 return false;
2593}
2594
2595static bool
2596intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2597{
2598 struct drm_encoder *encoder = &intel_sdvo->base.base;
2599 struct drm_connector *connector;
2600 struct intel_connector *intel_connector;
2601 struct intel_sdvo_connector *intel_sdvo_connector;
2602
2603 DRM_DEBUG_KMS("initialising analog device %d\n", device);
2604
2605 intel_sdvo_connector = intel_sdvo_connector_alloc();
2606 if (!intel_sdvo_connector)
2607 return false;
2608
2609 intel_connector = &intel_sdvo_connector->base;
2610 connector = &intel_connector->base;
2611 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2612 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2613 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2614
2615 if (device == 0) {
2616 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2617 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2618 } else if (device == 1) {
2619 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2620 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2621 }
2622
2623 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2624 kfree(intel_sdvo_connector);
2625 return false;
2626 }
2627
2628 return true;
2629}
2630
2631static bool
2632intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2633{
2634 struct drm_encoder *encoder = &intel_sdvo->base.base;
2635 struct drm_connector *connector;
2636 struct intel_connector *intel_connector;
2637 struct intel_sdvo_connector *intel_sdvo_connector;
2638
2639 DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2640
2641 intel_sdvo_connector = intel_sdvo_connector_alloc();
2642 if (!intel_sdvo_connector)
2643 return false;
2644
2645 intel_connector = &intel_sdvo_connector->base;
2646 connector = &intel_connector->base;
2647 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2648 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2649
2650 if (device == 0) {
2651 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2652 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2653 } else if (device == 1) {
2654 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2655 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2656 }
2657
2658 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2659 kfree(intel_sdvo_connector);
2660 return false;
2661 }
2662
2663 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2664 goto err;
2665
2666 return true;
2667
2668err:
2669 intel_sdvo_destroy(connector);
2670 return false;
2671}
2672
2673static bool
2674intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2675{
2676 intel_sdvo->is_tv = false;
2677 intel_sdvo->is_lvds = false;
2678
2679 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2680
2681 if (flags & SDVO_OUTPUT_TMDS0)
2682 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2683 return false;
2684
2685 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2686 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2687 return false;
2688
2689 /* TV has no XXX1 function block */
2690 if (flags & SDVO_OUTPUT_SVID0)
2691 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2692 return false;
2693
2694 if (flags & SDVO_OUTPUT_CVBS0)
2695 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2696 return false;
2697
2698 if (flags & SDVO_OUTPUT_YPRPB0)
2699 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2700 return false;
2701
2702 if (flags & SDVO_OUTPUT_RGB0)
2703 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2704 return false;
2705
2706 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2707 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2708 return false;
2709
2710 if (flags & SDVO_OUTPUT_LVDS0)
2711 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2712 return false;
2713
2714 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2715 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2716 return false;
2717
2718 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2719 unsigned char bytes[2];
2720
2721 intel_sdvo->controlled_output = 0;
2722 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2723 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2724 SDVO_NAME(intel_sdvo),
2725 bytes[0], bytes[1]);
2726 return false;
2727 }
2728 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2729
2730 return true;
2731}
2732
2733static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2734{
2735 struct drm_device *dev = intel_sdvo->base.base.dev;
2736 struct drm_connector *connector, *tmp;
2737
2738 list_for_each_entry_safe(connector, tmp,
2739 &dev->mode_config.connector_list, head) {
2740 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2741 drm_connector_unregister(connector);
2742 intel_sdvo_destroy(connector);
2743 }
2744 }
2745}
2746
2747static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2748 struct intel_sdvo_connector *intel_sdvo_connector,
2749 int type)
2750{
2751 struct drm_device *dev = intel_sdvo->base.base.dev;
2752 struct intel_sdvo_tv_format format;
2753 uint32_t format_map, i;
2754
2755 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2756 return false;
2757
2758 BUILD_BUG_ON(sizeof(format) != 6);
2759 if (!intel_sdvo_get_value(intel_sdvo,
2760 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2761 &format, sizeof(format)))
2762 return false;
2763
2764 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2765
2766 if (format_map == 0)
2767 return false;
2768
2769 intel_sdvo_connector->format_supported_num = 0;
2770 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2771 if (format_map & (1 << i))
2772 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2773
2774
2775 intel_sdvo_connector->tv_format =
2776 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2777 "mode", intel_sdvo_connector->format_supported_num);
2778 if (!intel_sdvo_connector->tv_format)
2779 return false;
2780
2781 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2782 drm_property_add_enum(
2783 intel_sdvo_connector->tv_format, i,
2784 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2785
2786 intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2787 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2788 intel_sdvo_connector->tv_format, 0);
2789 return true;
2790
2791}
2792
2793#define _ENHANCEMENT(state_assignment, name, NAME) do { \
2794 if (enhancements.name) { \
2795 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2796 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2797 return false; \
2798 intel_sdvo_connector->name = \
2799 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2800 if (!intel_sdvo_connector->name) return false; \
2801 state_assignment = response; \
2802 drm_object_attach_property(&connector->base, \
2803 intel_sdvo_connector->name, 0); \
2804 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2805 data_value[0], data_value[1], response); \
2806 } \
2807} while (0)
2808
2809#define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2810
2811static bool
2812intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2813 struct intel_sdvo_connector *intel_sdvo_connector,
2814 struct intel_sdvo_enhancements_reply enhancements)
2815{
2816 struct drm_device *dev = intel_sdvo->base.base.dev;
2817 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2818 struct drm_connector_state *conn_state = connector->state;
2819 struct intel_sdvo_connector_state *sdvo_state =
2820 to_intel_sdvo_connector_state(conn_state);
2821 uint16_t response, data_value[2];
2822
2823 /* when horizontal overscan is supported, Add the left/right property */
2824 if (enhancements.overscan_h) {
2825 if (!intel_sdvo_get_value(intel_sdvo,
2826 SDVO_CMD_GET_MAX_OVERSCAN_H,
2827 &data_value, 4))
2828 return false;
2829
2830 if (!intel_sdvo_get_value(intel_sdvo,
2831 SDVO_CMD_GET_OVERSCAN_H,
2832 &response, 2))
2833 return false;
2834
2835 sdvo_state->tv.overscan_h = response;
2836
2837 intel_sdvo_connector->max_hscan = data_value[0];
2838 intel_sdvo_connector->left =
2839 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2840 if (!intel_sdvo_connector->left)
2841 return false;
2842
2843 drm_object_attach_property(&connector->base,
2844 intel_sdvo_connector->left, 0);
2845
2846 intel_sdvo_connector->right =
2847 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2848 if (!intel_sdvo_connector->right)
2849 return false;
2850
2851 drm_object_attach_property(&connector->base,
2852 intel_sdvo_connector->right, 0);
2853 DRM_DEBUG_KMS("h_overscan: max %d, "
2854 "default %d, current %d\n",
2855 data_value[0], data_value[1], response);
2856 }
2857
2858 if (enhancements.overscan_v) {
2859 if (!intel_sdvo_get_value(intel_sdvo,
2860 SDVO_CMD_GET_MAX_OVERSCAN_V,
2861 &data_value, 4))
2862 return false;
2863
2864 if (!intel_sdvo_get_value(intel_sdvo,
2865 SDVO_CMD_GET_OVERSCAN_V,
2866 &response, 2))
2867 return false;
2868
2869 sdvo_state->tv.overscan_v = response;
2870
2871 intel_sdvo_connector->max_vscan = data_value[0];
2872 intel_sdvo_connector->top =
2873 drm_property_create_range(dev, 0,
2874 "top_margin", 0, data_value[0]);
2875 if (!intel_sdvo_connector->top)
2876 return false;
2877
2878 drm_object_attach_property(&connector->base,
2879 intel_sdvo_connector->top, 0);
2880
2881 intel_sdvo_connector->bottom =
2882 drm_property_create_range(dev, 0,
2883 "bottom_margin", 0, data_value[0]);
2884 if (!intel_sdvo_connector->bottom)
2885 return false;
2886
2887 drm_object_attach_property(&connector->base,
2888 intel_sdvo_connector->bottom, 0);
2889 DRM_DEBUG_KMS("v_overscan: max %d, "
2890 "default %d, current %d\n",
2891 data_value[0], data_value[1], response);
2892 }
2893
2894 ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2895 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2896 ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2897 ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2898 ENHANCEMENT(&conn_state->tv, hue, HUE);
2899 ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2900 ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2901 ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2902 ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2903 ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2904 _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2905 _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2906
2907 if (enhancements.dot_crawl) {
2908 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2909 return false;
2910
2911 sdvo_state->tv.dot_crawl = response & 0x1;
2912 intel_sdvo_connector->dot_crawl =
2913 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2914 if (!intel_sdvo_connector->dot_crawl)
2915 return false;
2916
2917 drm_object_attach_property(&connector->base,
2918 intel_sdvo_connector->dot_crawl, 0);
2919 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2920 }
2921
2922 return true;
2923}
2924
2925static bool
2926intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2927 struct intel_sdvo_connector *intel_sdvo_connector,
2928 struct intel_sdvo_enhancements_reply enhancements)
2929{
2930 struct drm_device *dev = intel_sdvo->base.base.dev;
2931 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2932 uint16_t response, data_value[2];
2933
2934 ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2935
2936 return true;
2937}
2938#undef ENHANCEMENT
2939#undef _ENHANCEMENT
2940
2941static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2942 struct intel_sdvo_connector *intel_sdvo_connector)
2943{
2944 union {
2945 struct intel_sdvo_enhancements_reply reply;
2946 uint16_t response;
2947 } enhancements;
2948
2949 BUILD_BUG_ON(sizeof(enhancements) != 2);
2950
2951 if (!intel_sdvo_get_value(intel_sdvo,
2952 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2953 &enhancements, sizeof(enhancements)) ||
2954 enhancements.response == 0) {
2955 DRM_DEBUG_KMS("No enhancement is supported\n");
2956 return true;
2957 }
2958
2959 if (IS_TV(intel_sdvo_connector))
2960 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2961 else if (IS_LVDS(intel_sdvo_connector))
2962 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2963 else
2964 return true;
2965}
2966
2967static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2968 struct i2c_msg *msgs,
2969 int num)
2970{
2971 struct intel_sdvo *sdvo = adapter->algo_data;
2972
2973 if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2974 return -EIO;
2975
2976 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2977}
2978
2979static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2980{
2981 struct intel_sdvo *sdvo = adapter->algo_data;
2982 return sdvo->i2c->algo->functionality(sdvo->i2c);
2983}
2984
2985static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2986 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2987 .functionality = intel_sdvo_ddc_proxy_func
2988};
2989
2990static void proxy_lock_bus(struct i2c_adapter *adapter,
2991 unsigned int flags)
2992{
2993 struct intel_sdvo *sdvo = adapter->algo_data;
2994 sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
2995}
2996
2997static int proxy_trylock_bus(struct i2c_adapter *adapter,
2998 unsigned int flags)
2999{
3000 struct intel_sdvo *sdvo = adapter->algo_data;
3001 return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3002}
3003
3004static void proxy_unlock_bus(struct i2c_adapter *adapter,
3005 unsigned int flags)
3006{
3007 struct intel_sdvo *sdvo = adapter->algo_data;
3008 sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3009}
3010
3011static const struct i2c_lock_operations proxy_lock_ops = {
3012 .lock_bus = proxy_lock_bus,
3013 .trylock_bus = proxy_trylock_bus,
3014 .unlock_bus = proxy_unlock_bus,
3015};
3016
3017static bool
3018intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3019 struct drm_i915_private *dev_priv)
3020{
3021 struct pci_dev *pdev = dev_priv->drm.pdev;
3022
3023 sdvo->ddc.owner = THIS_MODULE;
3024 sdvo->ddc.class = I2C_CLASS_DDC;
3025 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3026 sdvo->ddc.dev.parent = &pdev->dev;
3027 sdvo->ddc.algo_data = sdvo;
3028 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3029 sdvo->ddc.lock_ops = &proxy_lock_ops;
3030
3031 return i2c_add_adapter(&sdvo->ddc) == 0;
3032}
3033
3034static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3035 enum port port)
3036{
3037 if (HAS_PCH_SPLIT(dev_priv))
3038 WARN_ON(port != PORT_B);
3039 else
3040 WARN_ON(port != PORT_B && port != PORT_C);
3041}
3042
3043bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3044 i915_reg_t sdvo_reg, enum port port)
3045{
3046 struct intel_encoder *intel_encoder;
3047 struct intel_sdvo *intel_sdvo;
3048 int i;
3049
3050 assert_sdvo_port_valid(dev_priv, port);
3051
3052 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3053 if (!intel_sdvo)
3054 return false;
3055
3056 intel_sdvo->sdvo_reg = sdvo_reg;
3057 intel_sdvo->port = port;
3058 intel_sdvo->slave_addr =
3059 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3060 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3061 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3062 goto err_i2c_bus;
3063
3064 /* encoder type will be decided later */
3065 intel_encoder = &intel_sdvo->base;
3066 intel_encoder->type = INTEL_OUTPUT_SDVO;
3067 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3068 intel_encoder->port = port;
3069 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3070 &intel_sdvo_enc_funcs, 0,
3071 "SDVO %c", port_name(port));
3072
3073 /* Read the regs to test if we can talk to the device */
3074 for (i = 0; i < 0x40; i++) {
3075 u8 byte;
3076
3077 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3078 DRM_DEBUG_KMS("No SDVO device found on %s\n",
3079 SDVO_NAME(intel_sdvo));
3080 goto err;
3081 }
3082 }
3083
3084 intel_encoder->compute_config = intel_sdvo_compute_config;
3085 if (HAS_PCH_SPLIT(dev_priv)) {
3086 intel_encoder->disable = pch_disable_sdvo;
3087 intel_encoder->post_disable = pch_post_disable_sdvo;
3088 } else {
3089 intel_encoder->disable = intel_disable_sdvo;
3090 }
3091 intel_encoder->pre_enable = intel_sdvo_pre_enable;
3092 intel_encoder->enable = intel_enable_sdvo;
3093 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3094 intel_encoder->get_config = intel_sdvo_get_config;
3095
3096 /* In default case sdvo lvds is false */
3097 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3098 goto err;
3099
3100 if (intel_sdvo_output_setup(intel_sdvo,
3101 intel_sdvo->caps.output_flags) != true) {
3102 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3103 SDVO_NAME(intel_sdvo));
3104 /* Output_setup can leave behind connectors! */
3105 goto err_output;
3106 }
3107
3108 /*
3109 * Only enable the hotplug irq if we need it, to work around noisy
3110 * hotplug lines.
3111 */
3112 if (intel_sdvo->hotplug_active) {
3113 if (intel_sdvo->port == PORT_B)
3114 intel_encoder->hpd_pin = HPD_SDVO_B;
3115 else
3116 intel_encoder->hpd_pin = HPD_SDVO_C;
3117 }
3118
3119 /*
3120 * Cloning SDVO with anything is often impossible, since the SDVO
3121 * encoder can request a special input timing mode. And even if that's
3122 * not the case we have evidence that cloning a plain unscaled mode with
3123 * VGA doesn't really work. Furthermore the cloning flags are way too
3124 * simplistic anyway to express such constraints, so just give up on
3125 * cloning for SDVO encoders.
3126 */
3127 intel_sdvo->base.cloneable = 0;
3128
3129 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3130
3131 /* Set the input timing to the screen. Assume always input 0. */
3132 if (!intel_sdvo_set_target_input(intel_sdvo))
3133 goto err_output;
3134
3135 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3136 &intel_sdvo->pixel_clock_min,
3137 &intel_sdvo->pixel_clock_max))
3138 goto err_output;
3139
3140 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3141 "clock range %dMHz - %dMHz, "
3142 "input 1: %c, input 2: %c, "
3143 "output 1: %c, output 2: %c\n",
3144 SDVO_NAME(intel_sdvo),
3145 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3146 intel_sdvo->caps.device_rev_id,
3147 intel_sdvo->pixel_clock_min / 1000,
3148 intel_sdvo->pixel_clock_max / 1000,
3149 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3150 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3151 /* check currently supported outputs */
3152 intel_sdvo->caps.output_flags &
3153 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3154 intel_sdvo->caps.output_flags &
3155 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3156 return true;
3157
3158err_output:
3159 intel_sdvo_output_cleanup(intel_sdvo);
3160
3161err:
3162 drm_encoder_cleanup(&intel_encoder->base);
3163 i2c_del_adapter(&intel_sdvo->ddc);
3164err_i2c_bus:
3165 intel_sdvo_unselect_i2c_bus(intel_sdvo);
3166 kfree(intel_sdvo);
3167
3168 return false;
3169}