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v5.14.15
  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device tree file for Firefly Rockchip RK3288 Core board
  4 * Copyright (c) 2016 Randy Li <ayaka@soulik.info>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  5 */
  6
  7#include <dt-bindings/input/input.h>
  8#include "rk3288.dtsi"
  9
 10/ {
 11	memory@0 {
 12		device_type = "memory";
 13		reg = <0x0 0x0 0x0 0x80000000>;
 14	};
 15
 16	ext_gmac: external-gmac-clock {
 17		compatible = "fixed-clock";
 18		#clock-cells = <0>;
 19		clock-frequency = <125000000>;
 20		clock-output-names = "ext_gmac";
 21	};
 22
 23
 24	vcc_flash: flash-regulator {
 25		compatible = "regulator-fixed";
 26		regulator-name = "vcc_flash";
 27		regulator-min-microvolt = <1800000>;
 28		regulator-max-microvolt = <1800000>;
 29		vin-supply = <&vcc_io>;
 30	};
 31};
 32
 33&cpu0 {
 34	cpu0-supply = <&vdd_cpu>;
 35};
 36
 37&emmc {
 38	bus-width = <8>;
 39	cap-mmc-highspeed;
 40	disable-wp;
 41	mmc-ddr-1_8v;
 42	mmc-hs200-1_8v;
 43	non-removable;
 44	pinctrl-names = "default";
 45	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
 46	vmmc-supply = <&vcc_io>;
 47	vqmmc-supply = <&vcc_flash>;
 48	status = "okay";
 49};
 50
 51&gmac {
 52	assigned-clocks = <&cru SCLK_MAC>;
 53	assigned-clock-parents = <&ext_gmac>;
 54	clock_in_out = "input";
 55	pinctrl-names = "default";
 56	pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
 57	phy-supply = <&vcc_lan>;
 58	phy-mode = "rgmii";
 59	snps,reset-active-low;
 60	snps,reset-delays-us = <0 10000 1000000>;
 61	snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
 62	tx_delay = <0x30>;
 63	rx_delay = <0x10>;
 64	status = "okay";
 65};
 66
 67&i2c0 {
 68	clock-frequency = <400000>;
 69	status = "okay";
 70
 71	vdd_cpu: syr827@40 {
 72		compatible = "silergy,syr827";
 73		fcs,suspend-voltage-selector = <1>;
 74		reg = <0x40>;
 75		regulator-name = "vdd_cpu";
 76		regulator-min-microvolt = <850000>;
 77		regulator-max-microvolt = <1350000>;
 78		regulator-always-on;
 79		regulator-boot-on;
 80		regulator-enable-ramp-delay = <300>;
 81		regulator-ramp-delay = <8000>;
 82		vin-supply = <&vcc_sys>;
 83	};
 84
 85	vdd_gpu: syr828@41 {
 86		compatible = "silergy,syr828";
 87		fcs,suspend-voltage-selector = <1>;
 88		reg = <0x41>;
 89		regulator-name = "vdd_gpu";
 90		regulator-min-microvolt = <850000>;
 91		regulator-max-microvolt = <1350000>;
 92		regulator-always-on;
 93		vin-supply = <&vcc_sys>;
 94	};
 95
 96	act8846: act8846@5a {
 97		compatible = "active-semi,act8846";
 98		reg = <0x5a>;
 99		pinctrl-names = "default";
100		pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
101		system-power-controller;
102
103		vp1-supply = <&vcc_sys>;
104		vp2-supply = <&vcc_sys>;
105		vp3-supply = <&vcc_sys>;
106		vp4-supply = <&vcc_sys>;
107		inl1-supply = <&vcc_sys>;
108		inl2-supply = <&vcc_sys>;
109		inl3-supply = <&vcc_20>;
110
111		regulators {
112			vcc_ddr: REG1 {
113				regulator-name = "vcc_ddr";
114				regulator-min-microvolt = <1200000>;
115				regulator-max-microvolt = <1200000>;
116				regulator-always-on;
117			};
118
119			vcc_io: REG2 {
120				regulator-name = "vcc_io";
121				regulator-min-microvolt = <3300000>;
122				regulator-max-microvolt = <3300000>;
123				regulator-always-on;
124			};
125
126			vdd_log: REG3 {
127				regulator-name = "vdd_log";
128				regulator-min-microvolt = <1100000>;
129				regulator-max-microvolt = <1100000>;
130				regulator-always-on;
131			};
132
133			vcc_20: REG4 {
134				regulator-name = "vcc_20";
135				regulator-min-microvolt = <2000000>;
136				regulator-max-microvolt = <2000000>;
137				regulator-always-on;
138			};
139
140			vccio_sd: REG5 {
141				regulator-name = "vccio_sd";
142				regulator-min-microvolt = <3300000>;
143				regulator-max-microvolt = <3300000>;
144			};
145
146			vdd10_lcd: REG6 {
147				regulator-name = "vdd10_lcd";
148				regulator-min-microvolt = <1000000>;
149				regulator-max-microvolt = <1000000>;
150				regulator-always-on;
151			};
152
153			vcca_18: REG7  {
154				regulator-name = "vcca_18";
155				regulator-min-microvolt = <1800000>;
156				regulator-max-microvolt = <1800000>;
157				regulator-always-on;
158			};
159
160			vcca_33: REG8 {
161				regulator-name = "vcca_33";
162				regulator-min-microvolt = <3300000>;
163				regulator-max-microvolt = <3300000>;
164				regulator-always-on;
165			};
166
167			vcc_lan: REG9 {
168				regulator-name = "vcca_lan";
169				regulator-min-microvolt = <3300000>;
170				regulator-max-microvolt = <3300000>;
171			};
172
173			vdd_10: REG10 {
174				regulator-name = "vdd_10";
175				regulator-min-microvolt = <1000000>;
176				regulator-max-microvolt = <1000000>;
177				regulator-always-on;
178			};
179
180			vccio_wl: vcc_18: REG11 {
181				regulator-name = "vcc_18";
182				regulator-min-microvolt = <1800000>;
183				regulator-max-microvolt = <1800000>;
184			};
185
186			vcc18_lcd: REG12 {
187				regulator-name = "vcc18_lcd";
188				regulator-min-microvolt = <1800000>;
189				regulator-max-microvolt = <1800000>;
190				regulator-always-on;
191			};
192		};
193	};
194};
195
196&io_domains {
197	status = "okay";
198
199	audio-supply = <&vccio_wl>;
200	bb-supply = <&vcc_io>;
201	dvp-supply = <&dovdd_1v8>;
202	flash0-supply = <&vcc_flash>;
203	flash1-supply = <&vcc_lan>;
204	gpio30-supply = <&vcc_io>;
205	gpio1830-supply = <&vcc_io>;
206	lcdc-supply = <&vcc_io>;
207	sdcard-supply = <&vccio_sd>;
208	wifi-supply = <&vccio_wl>;
209};
210
211&pinctrl {
212	pcfg_output_high: pcfg-output-high {
213		output-high;
214	};
215
216	pcfg_output_low: pcfg-output-low {
217		output-low;
218	};
219
220	pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
221		bias-pull-up;
222		drive-strength = <12>;
223	};
224
225	act8846 {
226		pwr_hold: pwr-hold {
227			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
228		};
229
230		pmic_vsel: pmic-vsel {
231			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>;
232		};
233	};
234
235	gmac {
236		phy_int: phy-int {
237			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
238		};
239
240		phy_pmeb: phy-pmeb {
241			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
242		};
243
244		phy_rst: phy-rst {
245			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
246		};
247	};
248};
249
250&tsadc {
251	rockchip,hw-tshut-mode = <0>;
252	rockchip,hw-tshut-polarity = <0>;
253	status = "okay";
254};
255
256&vopb {
257	status = "okay";
258};
259
260&vopb_mmu {
261	status = "okay";
262};
263
264&vopl {
265	status = "okay";
266};
267
268&vopl_mmu {
269	status = "okay";
270};
271
272&wdt {
273	status = "okay";
274};
v4.17
 
  1/*
  2 * Device tree file for Firefly Rockchip RK3288 Core board
  3 * Copyright (c) 2016 Randy Li <ayaka@soulik.info>
  4 *
  5 * This file is dual-licensed: you can use it either under the terms
  6 * of the GPL or the X11 license, at your option. Note that this dual
  7 * licensing only applies to this file, and not this project as a
  8 * whole.
  9 *
 10 *  a) This file is free software; you can redistribute it and/or
 11 *     modify it under the terms of the GNU General Public License as
 12 *     published by the Free Software Foundation; either version 2 of the
 13 *     License, or (at your option) any later version.
 14 *
 15 *     This file is distributed in the hope that it will be useful,
 16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 18 *     GNU General Public License for more details.
 19 *
 20 * Or, alternatively,
 21 *
 22 *  b) Permission is hereby granted, free of charge, to any person
 23 *     obtaining a copy of this software and associated documentation
 24 *     files (the "Software"), to deal in the Software without
 25 *     restriction, including without limitation the rights to use,
 26 *     copy, modify, merge, publish, distribute, sublicense, and/or
 27 *     sell copies of the Software, and to permit persons to whom the
 28 *     Software is furnished to do so, subject to the following
 29 *     conditions:
 30 *
 31 *     The above copyright notice and this permission notice shall be
 32 *     included in all copies or substantial portions of the Software.
 33 *
 34 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 35 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 36 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 37 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 38 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 39 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 40 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 41 *     OTHER DEALINGS IN THE SOFTWARE.
 42 */
 43
 44#include <dt-bindings/input/input.h>
 45#include "rk3288.dtsi"
 46
 47/ {
 48	memory@0 {
 49		device_type = "memory";
 50		reg = <0x0 0x0 0x0 0x80000000>;
 51	};
 52
 53	ext_gmac: external-gmac-clock {
 54		compatible = "fixed-clock";
 55		#clock-cells = <0>;
 56		clock-frequency = <125000000>;
 57		clock-output-names = "ext_gmac";
 58	};
 59
 60
 61	vcc_flash: flash-regulator {
 62		compatible = "regulator-fixed";
 63		regulator-name = "vcc_flash";
 64		regulator-min-microvolt = <1800000>;
 65		regulator-max-microvolt = <1800000>;
 66		vin-supply = <&vcc_io>;
 67	};
 68};
 69
 70&cpu0 {
 71	cpu0-supply = <&vdd_cpu>;
 72};
 73
 74&emmc {
 75	bus-width = <8>;
 76	cap-mmc-highspeed;
 77	disable-wp;
 78	mmc-ddr-1_8v;
 79	mmc-hs200-1_8v;
 80	non-removable;
 81	pinctrl-names = "default";
 82	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
 83	vmmc-supply = <&vcc_io>;
 84	vqmmc-supply = <&vcc_flash>;
 85	status = "okay";
 86};
 87
 88&gmac {
 89	assigned-clocks = <&cru SCLK_MAC>;
 90	assigned-clock-parents = <&ext_gmac>;
 91	clock_in_out = "input";
 92	pinctrl-names = "default";
 93	pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
 94	phy-supply = <&vcc_lan>;
 95	phy-mode = "rgmii";
 96	snps,reset-active-low;
 97	snps,reset-delays-us = <0 10000 1000000>;
 98	snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
 99	tx_delay = <0x30>;
100	rx_delay = <0x10>;
101	status = "ok";
102};
103
104&i2c0 {
105	clock-frequency = <400000>;
106	status = "okay";
107
108	vdd_cpu: syr827@40 {
109		compatible = "silergy,syr827";
110		fcs,suspend-voltage-selector = <1>;
111		reg = <0x40>;
112		regulator-name = "vdd_cpu";
113		regulator-min-microvolt = <850000>;
114		regulator-max-microvolt = <1350000>;
115		regulator-always-on;
116		regulator-boot-on;
117		regulator-enable-ramp-delay = <300>;
118		regulator-ramp-delay = <8000>;
119		vin-supply = <&vcc_sys>;
120	};
121
122	vdd_gpu: syr828@41 {
123		compatible = "silergy,syr828";
124		fcs,suspend-voltage-selector = <1>;
125		reg = <0x41>;
126		regulator-name = "vdd_gpu";
127		regulator-min-microvolt = <850000>;
128		regulator-max-microvolt = <1350000>;
129		regulator-always-on;
130		vin-supply = <&vcc_sys>;
131	};
132
133	act8846: act8846@5a {
134		compatible = "active-semi,act8846";
135		reg = <0x5a>;
136		pinctrl-names = "default";
137		pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
138		system-power-controller;
139
140		vp1-supply = <&vcc_sys>;
141		vp2-supply = <&vcc_sys>;
142		vp3-supply = <&vcc_sys>;
143		vp4-supply = <&vcc_sys>;
144		inl1-supply = <&vcc_sys>;
145		inl2-supply = <&vcc_sys>;
146		inl3-supply = <&vcc_20>;
147
148		regulators {
149			vcc_ddr: REG1 {
150				regulator-name = "vcc_ddr";
151				regulator-min-microvolt = <1200000>;
152				regulator-max-microvolt = <1200000>;
153				regulator-always-on;
154			};
155
156			vcc_io: REG2 {
157				regulator-name = "vcc_io";
158				regulator-min-microvolt = <3300000>;
159				regulator-max-microvolt = <3300000>;
160				regulator-always-on;
161			};
162
163			vdd_log: REG3 {
164				regulator-name = "vdd_log";
165				regulator-min-microvolt = <1100000>;
166				regulator-max-microvolt = <1100000>;
167				regulator-always-on;
168			};
169
170			vcc_20: REG4 {
171				regulator-name = "vcc_20";
172				regulator-min-microvolt = <2000000>;
173				regulator-max-microvolt = <2000000>;
174				regulator-always-on;
175			};
176
177			vccio_sd: REG5 {
178				regulator-name = "vccio_sd";
179				regulator-min-microvolt = <3300000>;
180				regulator-max-microvolt = <3300000>;
181			};
182
183			vdd10_lcd: REG6 {
184				regulator-name = "vdd10_lcd";
185				regulator-min-microvolt = <1000000>;
186				regulator-max-microvolt = <1000000>;
187				regulator-always-on;
188			};
189
190			vcca_18: REG7  {
191				regulator-name = "vcca_18";
192				regulator-min-microvolt = <1800000>;
193				regulator-max-microvolt = <1800000>;
194				regulator-always-on;
195			};
196
197			vcca_33: REG8 {
198				regulator-name = "vcca_33";
199				regulator-min-microvolt = <3300000>;
200				regulator-max-microvolt = <3300000>;
201				regulator-always-on;
202			};
203
204			vcc_lan: REG9 {
205				regulator-name = "vcca_lan";
206				regulator-min-microvolt = <3300000>;
207				regulator-max-microvolt = <3300000>;
208			};
209
210			vdd_10: REG10 {
211				regulator-name = "vdd_10";
212				regulator-min-microvolt = <1000000>;
213				regulator-max-microvolt = <1000000>;
214				regulator-always-on;
215			};
216
217			vccio_wl: vcc_18: REG11 {
218				regulator-name = "vcc_18";
219				regulator-min-microvolt = <1800000>;
220				regulator-max-microvolt = <1800000>;
221			};
222
223			vcc18_lcd: REG12 {
224				regulator-name = "vcc18_lcd";
225				regulator-min-microvolt = <1800000>;
226				regulator-max-microvolt = <1800000>;
227				regulator-always-on;
228			};
229		};
230	};
231};
232
233&io_domains {
234	status = "okay";
235
236	audio-supply = <&vccio_wl>;
237	bb-supply = <&vcc_io>;
238	dvp-supply = <&dovdd_1v8>;
239	flash0-supply = <&vcc_flash>;
240	flash1-supply = <&vcc_lan>;
241	gpio30-supply = <&vcc_io>;
242	gpio1830-supply = <&vcc_io>;
243	lcdc-supply = <&vcc_io>;
244	sdcard-supply = <&vccio_sd>;
245	wifi-supply = <&vccio_wl>;
246};
247
248&pinctrl {
249	pcfg_output_high: pcfg-output-high {
250		output-high;
251	};
252
253	pcfg_output_low: pcfg-output-low {
254		output-low;
255	};
256
257	pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
258		bias-pull-up;
259		drive-strength = <12>;
260	};
261
262	act8846 {
263		pwr_hold: pwr-hold {
264			rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
265		};
266
267		pmic_vsel: pmic-vsel {
268			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
269		};
270	};
271
272	gmac {
273		phy_int: phy-int {
274			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
275		};
276
277		phy_pmeb: phy-pmeb {
278			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
279		};
280
281		phy_rst: phy-rst {
282			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
283		};
284	};
285};
286
287&tsadc {
288	rockchip,hw-tshut-mode = <0>;
289	rockchip,hw-tshut-polarity = <0>;
290	status = "okay";
291};
292
293&vopb {
294	status = "okay";
295};
296
297&vopb_mmu {
298	status = "okay";
299};
300
301&vopl {
302	status = "okay";
303};
304
305&vopl_mmu {
306	status = "okay";
307};
308
309&wdt {
310	status = "okay";
311};