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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
5 */
6
7/dts-v1/;
8
9#include "omap34xx.dtsi"
10#include <dt-bindings/input/input.h>
11
12/*
13 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
14 * for omap AES HW crypto support. When linux kernel try to access memory of AES
15 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
16 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
17 * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
18 * There is "unofficial" version of bootloader which enables AES in L3 firewall
19 * but it is not widely used and to prevent kernel crash rather AES is disabled.
20 * There is also no runtime detection code if AES is disabled in L3 firewall...
21 */
22&aes1_target {
23 status = "disabled";
24};
25
26&aes2_target {
27 status = "disabled";
28};
29
30/ {
31 model = "Nokia N900";
32 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
33
34 aliases {
35 i2c0;
36 i2c1 = &i2c1;
37 i2c2 = &i2c2;
38 i2c3 = &i2c3;
39 display0 = &lcd;
40 display1 = &tv;
41 };
42
43 cpus {
44 cpu@0 {
45 cpu0-supply = <&vcc>;
46 };
47 };
48
49 leds {
50 compatible = "gpio-leds";
51 heartbeat {
52 label = "debug::sleep";
53 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* 162 */
54 linux,default-trigger = "default-on";
55 pinctrl-names = "default";
56 pinctrl-0 = <&debug_leds>;
57 };
58 };
59
60 memory@80000000 {
61 device_type = "memory";
62 reg = <0x80000000 0x10000000>; /* 256 MB */
63 };
64
65 gpio_keys {
66 compatible = "gpio-keys";
67
68 camera_lens_cover {
69 label = "Camera Lens Cover";
70 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
71 linux,input-type = <EV_SW>;
72 linux,code = <SW_CAMERA_LENS_COVER>;
73 linux,can-disable;
74 };
75
76 camera_focus {
77 label = "Camera Focus";
78 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
79 linux,code = <KEY_CAMERA_FOCUS>;
80 linux,can-disable;
81 };
82
83 camera_capture {
84 label = "Camera Capture";
85 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
86 linux,code = <KEY_CAMERA>;
87 linux,can-disable;
88 };
89
90 lock_button {
91 label = "Lock Button";
92 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
93 linux,code = <KEY_SCREENLOCK>;
94 linux,can-disable;
95 };
96
97 keypad_slide {
98 label = "Keypad Slide";
99 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
100 linux,input-type = <EV_SW>;
101 linux,code = <SW_KEYPAD_SLIDE>;
102 linux,can-disable;
103 };
104
105 proximity_sensor {
106 label = "Proximity Sensor";
107 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
108 linux,input-type = <EV_SW>;
109 linux,code = <SW_FRONT_PROXIMITY>;
110 linux,can-disable;
111 };
112
113 machine_cover {
114 label = "Machine Cover";
115 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
116 linux,input-type = <EV_SW>;
117 linux,code = <SW_MACHINE_COVER>;
118 linux,can-disable;
119 };
120 };
121
122 isp1707: isp1707 {
123 compatible = "nxp,isp1707";
124 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
125 usb-phy = <&usb2_phy>;
126 };
127
128 tv: connector {
129 compatible = "composite-video-connector";
130 label = "tv";
131
132 port {
133 tv_connector_in: endpoint {
134 remote-endpoint = <&venc_out>;
135 };
136 };
137 };
138
139 sound: n900-audio {
140 compatible = "nokia,n900-audio";
141
142 nokia,cpu-dai = <&mcbsp2>;
143 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
144 nokia,headphone-amplifier = <&tpa6130a2>;
145
146 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
147 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
148 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
149 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
150 };
151
152 battery: n900-battery {
153 compatible = "nokia,n900-battery";
154 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
155 io-channel-names = "temp", "bsi", "vbat";
156 };
157
158 pwm9: dmtimer-pwm {
159 compatible = "ti,omap-dmtimer-pwm";
160 #pwm-cells = <3>;
161 ti,timers = <&timer9>;
162 ti,clock-source = <0x00>; /* timer_sys_ck */
163 };
164
165 ir: n900-ir {
166 compatible = "nokia,n900-ir";
167 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
168 };
169
170 rom_rng: rng {
171 compatible = "nokia,n900-rom-rng";
172 clocks = <&rng_ick>;
173 clock-names = "ick";
174 };
175
176 /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
177 vctcxo: vctcxo {
178 compatible = "fixed-clock";
179 #clock-cells = <0>;
180 clock-frequency = <38400000>;
181 };
182};
183
184&isp {
185 vdds_csib-supply = <&vaux2>;
186
187 pinctrl-names = "default";
188 pinctrl-0 = <&camera_pins>;
189
190 ports {
191 port@1 {
192 reg = <1>;
193
194 csi_isp: endpoint {
195 remote-endpoint = <&csi_cam1>;
196 bus-type = <3>; /* CCP2 */
197 clock-lanes = <1>;
198 data-lanes = <0>;
199 lane-polarity = <0 0>;
200 /* Select strobe = <1> for back camera, <0> for front camera */
201 strobe = <1>;
202 };
203 };
204 };
205};
206
207&omap3_pmx_core {
208 pinctrl-names = "default";
209
210 uart2_pins: pinmux_uart2_pins {
211 pinctrl-single,pins = <
212 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
213 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
214 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
215 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
216 >;
217 };
218
219 uart3_pins: pinmux_uart3_pins {
220 pinctrl-single,pins = <
221 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx */
222 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
223 >;
224 };
225
226 ethernet_pins: pinmux_ethernet_pins {
227 pinctrl-single,pins = <
228 OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
229 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */
230 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
231 >;
232 };
233
234 gpmc_pins: pinmux_gpmc_pins {
235 pinctrl-single,pins = <
236
237 /* address lines */
238 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
239 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
240 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
241
242 /* data lines, gpmc_d0..d7 not muxable according to TRM */
243 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
244 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
245 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
246 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
247 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
248 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
249 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
250 OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
251
252 /*
253 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
254 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
255 */
256 OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
257 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
258 >;
259 };
260
261 i2c1_pins: pinmux_i2c1_pins {
262 pinctrl-single,pins = <
263 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
264 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
265 >;
266 };
267
268 i2c2_pins: pinmux_i2c2_pins {
269 pinctrl-single,pins = <
270 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
271 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
272 >;
273 };
274
275 i2c3_pins: pinmux_i2c3_pins {
276 pinctrl-single,pins = <
277 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
278 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
279 >;
280 };
281
282 debug_leds: pinmux_debug_led_pins {
283 pinctrl-single,pins = <
284 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 */
285 >;
286 };
287
288 mcspi4_pins: pinmux_mcspi4_pins {
289 pinctrl-single,pins = <
290 OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
291 OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
292 OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
293 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
294 >;
295 };
296
297 mmc1_pins: pinmux_mmc1_pins {
298 pinctrl-single,pins = <
299 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
300 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
301 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
302 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
303 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
304 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
305 >;
306 };
307
308 mmc2_pins: pinmux_mmc2_pins {
309 pinctrl-single,pins = <
310 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
311 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
312 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
313 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
314 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
315 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
316 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
317 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
318 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
319 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
320 >;
321 };
322
323 acx565akm_pins: pinmux_acx565akm_pins {
324 pinctrl-single,pins = <
325 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
326 >;
327 };
328
329 dss_sdi_pins: pinmux_dss_sdi_pins {
330 pinctrl-single,pins = <
331 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
332 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
333 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
334 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
335
336 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
337 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
338 >;
339 };
340
341 wl1251_pins: pinmux_wl1251 {
342 pinctrl-single,pins = <
343 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
344 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
345 >;
346 };
347
348 ssi_pins: pinmux_ssi {
349 pinctrl-single,pins = <
350 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
351 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
352 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
353 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
354 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
355 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
356 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
357 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
358 >;
359 };
360
361 modem_pins: pinmux_modem {
362 pinctrl-single,pins = <
363 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
364 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* gpio 72 => ape_rst_rq */
365 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
366 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
367 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
368 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
369 >;
370 };
371
372 camera_pins: pinmux_camera {
373 pinctrl-single,pins = <
374 OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7) /* cam_hs */
375 OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7) /* cam_vs */
376 OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
377 OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7) /* cam_d4 */
378 OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6 */
379 OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7 */
380 OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0) /* cam_d8 */
381 OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0) /* cam_d9 */
382 OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7) /* cam_d10 */
383 OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7) /* cam_xclkb */
384 OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0) /* cam_strobe */
385 >;
386 };
387};
388
389&i2c1 {
390 pinctrl-names = "default";
391 pinctrl-0 = <&i2c1_pins>;
392
393 clock-frequency = <2200000>;
394
395 twl: twl@48 {
396 reg = <0x48>;
397 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
398 interrupt-parent = <&intc>;
399 };
400};
401
402#include "twl4030.dtsi"
403#include "twl4030_omap3.dtsi"
404
405&vaux1 {
406 regulator-name = "V28";
407 regulator-min-microvolt = <2800000>;
408 regulator-max-microvolt = <2800000>;
409 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
410 regulator-always-on; /* due to battery cover sensor */
411};
412
413&vaux2 {
414 regulator-name = "VCSI";
415 regulator-min-microvolt = <1800000>;
416 regulator-max-microvolt = <1800000>;
417 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
418};
419
420&vaux3 {
421 regulator-name = "VMMC2_30";
422 regulator-min-microvolt = <2800000>;
423 regulator-max-microvolt = <3000000>;
424 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
425};
426
427&vaux4 {
428 regulator-name = "VCAM_ANA_28";
429 regulator-min-microvolt = <2800000>;
430 regulator-max-microvolt = <2800000>;
431 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
432};
433
434&vmmc1 {
435 regulator-name = "VMMC1";
436 regulator-min-microvolt = <1850000>;
437 regulator-max-microvolt = <3150000>;
438 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
439};
440
441&vmmc2 {
442 regulator-name = "V28_A";
443 regulator-min-microvolt = <2800000>;
444 regulator-max-microvolt = <3000000>;
445 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
446 regulator-always-on; /* due VIO leak to AIC34 VDDs */
447};
448
449&vpll1 {
450 regulator-name = "VPLL";
451 regulator-min-microvolt = <1800000>;
452 regulator-max-microvolt = <1800000>;
453 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
454 regulator-always-on;
455};
456
457&vpll2 {
458 regulator-name = "VSDI_CSI";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <1800000>;
461 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
462 regulator-always-on;
463};
464
465&vsim {
466 regulator-name = "VMMC2_IO_18";
467 regulator-min-microvolt = <1800000>;
468 regulator-max-microvolt = <1800000>;
469 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
470};
471
472&vio {
473 regulator-name = "VIO";
474 regulator-min-microvolt = <1800000>;
475 regulator-max-microvolt = <1800000>;
476};
477
478&vintana1 {
479 regulator-name = "VINTANA1";
480 /* fixed to 1500000 */
481 regulator-always-on;
482};
483
484&vintana2 {
485 regulator-name = "VINTANA2";
486 regulator-min-microvolt = <2750000>;
487 regulator-max-microvolt = <2750000>;
488 regulator-always-on;
489};
490
491&vintdig {
492 regulator-name = "VINTDIG";
493 /* fixed to 1500000 */
494 regulator-always-on;
495};
496
497/* First two dma channels are reserved on secure omap3 */
498&sdma {
499 dma-channel-mask = <0xfffffffc>;
500};
501
502&twl {
503 twl_audio: audio {
504 compatible = "ti,twl4030-audio";
505 ti,enable-vibra = <1>;
506 };
507
508 twl_power: power {
509 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
510 ti,use_poweroff;
511 };
512};
513
514&twl_keypad {
515 linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
516 MATRIX_KEY(0x00, 0x01, KEY_O)
517 MATRIX_KEY(0x00, 0x02, KEY_P)
518 MATRIX_KEY(0x00, 0x03, KEY_COMMA)
519 MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
520 MATRIX_KEY(0x00, 0x06, KEY_A)
521 MATRIX_KEY(0x00, 0x07, KEY_S)
522
523 MATRIX_KEY(0x01, 0x00, KEY_W)
524 MATRIX_KEY(0x01, 0x01, KEY_D)
525 MATRIX_KEY(0x01, 0x02, KEY_F)
526 MATRIX_KEY(0x01, 0x03, KEY_G)
527 MATRIX_KEY(0x01, 0x04, KEY_H)
528 MATRIX_KEY(0x01, 0x05, KEY_J)
529 MATRIX_KEY(0x01, 0x06, KEY_K)
530 MATRIX_KEY(0x01, 0x07, KEY_L)
531
532 MATRIX_KEY(0x02, 0x00, KEY_E)
533 MATRIX_KEY(0x02, 0x01, KEY_DOT)
534 MATRIX_KEY(0x02, 0x02, KEY_UP)
535 MATRIX_KEY(0x02, 0x03, KEY_ENTER)
536 MATRIX_KEY(0x02, 0x05, KEY_Z)
537 MATRIX_KEY(0x02, 0x06, KEY_X)
538 MATRIX_KEY(0x02, 0x07, KEY_C)
539 MATRIX_KEY(0x02, 0x08, KEY_F9)
540
541 MATRIX_KEY(0x03, 0x00, KEY_R)
542 MATRIX_KEY(0x03, 0x01, KEY_V)
543 MATRIX_KEY(0x03, 0x02, KEY_B)
544 MATRIX_KEY(0x03, 0x03, KEY_N)
545 MATRIX_KEY(0x03, 0x04, KEY_M)
546 MATRIX_KEY(0x03, 0x05, KEY_SPACE)
547 MATRIX_KEY(0x03, 0x06, KEY_SPACE)
548 MATRIX_KEY(0x03, 0x07, KEY_LEFT)
549
550 MATRIX_KEY(0x04, 0x00, KEY_T)
551 MATRIX_KEY(0x04, 0x01, KEY_DOWN)
552 MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
553 MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
554 MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
555 MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
556 MATRIX_KEY(0x04, 0x08, KEY_F10)
557
558 MATRIX_KEY(0x05, 0x00, KEY_Y)
559 MATRIX_KEY(0x05, 0x08, KEY_F11)
560
561 MATRIX_KEY(0x06, 0x00, KEY_U)
562
563 MATRIX_KEY(0x07, 0x00, KEY_I)
564 MATRIX_KEY(0x07, 0x01, KEY_F7)
565 MATRIX_KEY(0x07, 0x02, KEY_F8)
566 >;
567};
568
569&twl_gpio {
570 ti,pullups = <0x0>;
571 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
572};
573
574&i2c2 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&i2c2_pins>;
577
578 clock-frequency = <100000>;
579
580 tlv320aic3x: tlv320aic3x@18 {
581 compatible = "ti,tlv320aic3x";
582 reg = <0x18>;
583 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
584 ai3x-gpio-func = <
585 0 /* AIC3X_GPIO1_FUNC_DISABLED */
586 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
587 >;
588
589 AVDD-supply = <&vmmc2>;
590 DRVDD-supply = <&vmmc2>;
591 IOVDD-supply = <&vio>;
592 DVDD-supply = <&vio>;
593
594 ai3x-micbias-vg = <1>;
595 };
596
597 tlv320aic3x_aux: tlv320aic3x@19 {
598 compatible = "ti,tlv320aic3x";
599 reg = <0x19>;
600 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
601
602 AVDD-supply = <&vmmc2>;
603 DRVDD-supply = <&vmmc2>;
604 IOVDD-supply = <&vio>;
605 DVDD-supply = <&vio>;
606
607 ai3x-micbias-vg = <2>;
608 };
609
610 tsl2563: tsl2563@29 {
611 compatible = "amstaos,tsl2563";
612 reg = <0x29>;
613
614 amstaos,cover-comp-gain = <16>;
615 };
616
617 adp1653: led-controller@30 {
618 compatible = "adi,adp1653";
619 reg = <0x30>;
620 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
621
622 flash {
623 flash-timeout-us = <500000>;
624 flash-max-microamp = <320000>;
625 led-max-microamp = <50000>;
626 };
627 indicator {
628 led-max-microamp = <17500>;
629 };
630 };
631
632 lp5523: lp5523@32 {
633 compatible = "national,lp5523";
634 reg = <0x32>;
635 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
636 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
637
638 chan0 {
639 chan-name = "lp5523:kb1";
640 led-cur = /bits/ 8 <50>;
641 max-cur = /bits/ 8 <100>;
642 };
643
644 chan1 {
645 chan-name = "lp5523:kb2";
646 led-cur = /bits/ 8 <50>;
647 max-cur = /bits/ 8 <100>;
648 };
649
650 chan2 {
651 chan-name = "lp5523:kb3";
652 led-cur = /bits/ 8 <50>;
653 max-cur = /bits/ 8 <100>;
654 };
655
656 chan3 {
657 chan-name = "lp5523:kb4";
658 led-cur = /bits/ 8 <50>;
659 max-cur = /bits/ 8 <100>;
660 };
661
662 chan4 {
663 chan-name = "lp5523:b";
664 led-cur = /bits/ 8 <50>;
665 max-cur = /bits/ 8 <100>;
666 };
667
668 chan5 {
669 chan-name = "lp5523:g";
670 led-cur = /bits/ 8 <50>;
671 max-cur = /bits/ 8 <100>;
672 };
673
674 chan6 {
675 chan-name = "lp5523:r";
676 led-cur = /bits/ 8 <50>;
677 max-cur = /bits/ 8 <100>;
678 };
679
680 chan7 {
681 chan-name = "lp5523:kb5";
682 led-cur = /bits/ 8 <50>;
683 max-cur = /bits/ 8 <100>;
684 };
685
686 chan8 {
687 chan-name = "lp5523:kb6";
688 led-cur = /bits/ 8 <50>;
689 max-cur = /bits/ 8 <100>;
690 };
691 };
692
693 bq27200: bq27200@55 {
694 compatible = "ti,bq27200";
695 reg = <0x55>;
696 power-supplies = <&bq24150a>;
697 };
698
699 /* Stereo headphone amplifier */
700 tpa6130a2: tpa6130a2@60 {
701 compatible = "ti,tpa6130a2";
702 reg = <0x60>;
703
704 Vdd-supply = <&vmmc2>;
705
706 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
707 };
708
709 si4713: si4713@63 {
710 compatible = "silabs,si4713";
711 reg = <0x63>;
712
713 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
714 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
715 vio-supply = <&vio>;
716 vdd-supply = <&vaux1>;
717 };
718
719 bq24150a: bq24150a@6b {
720 compatible = "ti,bq24150a";
721 reg = <0x6b>;
722
723 ti,current-limit = <100>;
724 ti,weak-battery-voltage = <3400>;
725 ti,battery-regulation-voltage = <4200>;
726 ti,charge-current = <650>;
727 ti,termination-current = <100>;
728 ti,resistor-sense = <68>;
729
730 ti,usb-charger-detection = <&isp1707>;
731 };
732};
733
734&i2c3 {
735 pinctrl-names = "default";
736 pinctrl-0 = <&i2c3_pins>;
737
738 clock-frequency = <400000>;
739
740 lis302dl: lis3lv02d@1d {
741 compatible = "st,lis3lv02d";
742 reg = <0x1d>;
743
744 Vdd-supply = <&vaux1>;
745 Vdd_IO-supply = <&vio>;
746
747 interrupt-parent = <&gpio6>;
748 interrupts = <21 20>; /* 181 and 180 */
749
750 /* click flags */
751 st,click-single-x;
752 st,click-single-y;
753 st,click-single-z;
754
755 /* Limits are 0.5g * value */
756 st,click-threshold-x = <8>;
757 st,click-threshold-y = <8>;
758 st,click-threshold-z = <10>;
759
760 /* Click must be longer than time limit */
761 st,click-time-limit = <9>;
762
763 /* Kind of debounce filter */
764 st,click-latency = <50>;
765
766 /* Interrupt line 2 for click detection */
767 st,irq2-click;
768
769 st,wakeup-x-hi;
770 st,wakeup-y-hi;
771 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
772
773 st,wakeup2-z-hi;
774 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
775
776 st,hipass1-disable;
777 st,hipass2-disable;
778
779 st,axis-x = <1>; /* LIS3_DEV_X */
780 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
781 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
782
783 st,min-limit-x = <(-32)>;
784 st,min-limit-y = <3>;
785 st,min-limit-z = <3>;
786
787 st,max-limit-x = <(-3)>;
788 st,max-limit-y = <32>;
789 st,max-limit-z = <32>;
790 };
791
792 cam1: camera@3e {
793 compatible = "toshiba,et8ek8";
794 reg = <0x3e>;
795
796 vana-supply = <&vaux4>;
797
798 clocks = <&isp 0>;
799 clock-names = "extclk";
800 clock-frequency = <9600000>;
801
802 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
803
804 lens-focus = <&ad5820>;
805
806 port {
807 csi_cam1: endpoint {
808 bus-type = <3>; /* CCP2 */
809 strobe = <1>;
810 clock-inv = <0>;
811 crc = <1>;
812
813 remote-endpoint = <&csi_isp>;
814 };
815 };
816 };
817
818 /* D/A converter for auto-focus */
819 ad5820: dac@c {
820 compatible = "adi,ad5820";
821 reg = <0x0c>;
822
823 VANA-supply = <&vaux4>;
824
825 #io-channel-cells = <0>;
826 };
827};
828
829&mmc1 {
830 pinctrl-names = "default";
831 pinctrl-0 = <&mmc1_pins>;
832 vmmc-supply = <&vmmc1>;
833 bus-width = <4>;
834};
835
836/* most boards use vaux3, only some old versions use vmmc2 instead */
837&mmc2 {
838 pinctrl-names = "default";
839 pinctrl-0 = <&mmc2_pins>;
840 vmmc-supply = <&vaux3>;
841 vqmmc-supply = <&vsim>;
842 bus-width = <8>;
843 non-removable;
844 no-sdio;
845 no-sd;
846};
847
848&mmc3 {
849 status = "disabled";
850};
851
852&gpmc {
853 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
854 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
855 pinctrl-names = "default";
856 pinctrl-0 = <&gpmc_pins>;
857
858 /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
859 onenand@0,0 {
860 #address-cells = <1>;
861 #size-cells = <1>;
862 compatible = "ti,omap2-onenand";
863 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
864
865 /*
866 * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
867 * bootloader set values when booted with v5.1
868 * (OneNAND Manufacturer: Samsung):
869 *
870 * cs0 GPMC_CS_CONFIG1: 0xfb001202
871 * cs0 GPMC_CS_CONFIG2: 0x00111100
872 * cs0 GPMC_CS_CONFIG3: 0x00020200
873 * cs0 GPMC_CS_CONFIG4: 0x11001102
874 * cs0 GPMC_CS_CONFIG5: 0x03101616
875 * cs0 GPMC_CS_CONFIG6: 0x90060000
876 */
877 gpmc,sync-read;
878 gpmc,sync-write;
879 gpmc,burst-length = <16>;
880 gpmc,burst-read;
881 gpmc,burst-wrap;
882 gpmc,burst-write;
883 gpmc,device-width = <2>;
884 gpmc,mux-add-data = <2>;
885 gpmc,cs-on-ns = <0>;
886 gpmc,cs-rd-off-ns = <102>;
887 gpmc,cs-wr-off-ns = <102>;
888 gpmc,adv-on-ns = <0>;
889 gpmc,adv-rd-off-ns = <12>;
890 gpmc,adv-wr-off-ns = <12>;
891 gpmc,oe-on-ns = <12>;
892 gpmc,oe-off-ns = <102>;
893 gpmc,we-on-ns = <0>;
894 gpmc,we-off-ns = <102>;
895 gpmc,rd-cycle-ns = <132>;
896 gpmc,wr-cycle-ns = <132>;
897 gpmc,access-ns = <96>;
898 gpmc,page-burst-access-ns = <18>;
899 gpmc,bus-turnaround-ns = <0>;
900 gpmc,cycle2cycle-delay-ns = <0>;
901 gpmc,wait-monitoring-ns = <0>;
902 gpmc,clk-activation-ns = <6>;
903 gpmc,wr-data-mux-bus-ns = <36>;
904 gpmc,wr-access-ns = <96>;
905 gpmc,sync-clk-ps = <15000>;
906
907 /*
908 * MTD partition table corresponding to Nokia's
909 * Maemo 5 (Fremantle) release.
910 */
911 partition@0 {
912 label = "bootloader";
913 reg = <0x00000000 0x00020000>;
914 read-only;
915 };
916 partition@1 {
917 label = "config";
918 reg = <0x00020000 0x00060000>;
919 };
920 partition@2 {
921 label = "log";
922 reg = <0x00080000 0x00040000>;
923 };
924 partition@3 {
925 label = "kernel";
926 reg = <0x000c0000 0x00200000>;
927 };
928 partition@4 {
929 label = "initfs";
930 reg = <0x002c0000 0x00200000>;
931 };
932 partition@5 {
933 label = "rootfs";
934 reg = <0x004c0000 0x0fb40000>;
935 };
936 };
937
938 /* Ethernet is on some early development boards and qemu */
939 ethernet@gpmc {
940 compatible = "smsc,lan91c94";
941 interrupt-parent = <&gpio2>;
942 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
943 reg = <1 0 0xf>; /* 16 byte IO range */
944 bank-width = <2>;
945 pinctrl-names = "default";
946 pinctrl-0 = <ðernet_pins>;
947 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */
948 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */
949 gpmc,device-width = <2>;
950 gpmc,sync-clk-ps = <0>;
951 gpmc,cs-on-ns = <0>;
952 gpmc,cs-rd-off-ns = <48>;
953 gpmc,cs-wr-off-ns = <24>;
954 gpmc,adv-on-ns = <0>;
955 gpmc,adv-rd-off-ns = <0>;
956 gpmc,adv-wr-off-ns = <0>;
957 gpmc,we-on-ns = <12>;
958 gpmc,we-off-ns = <18>;
959 gpmc,oe-on-ns = <12>;
960 gpmc,oe-off-ns = <48>;
961 gpmc,page-burst-access-ns = <0>;
962 gpmc,access-ns = <42>;
963 gpmc,rd-cycle-ns = <180>;
964 gpmc,wr-cycle-ns = <180>;
965 gpmc,bus-turnaround-ns = <0>;
966 gpmc,cycle2cycle-delay-ns = <0>;
967 gpmc,wait-monitoring-ns = <0>;
968 gpmc,clk-activation-ns = <0>;
969 gpmc,wr-access-ns = <0>;
970 gpmc,wr-data-mux-bus-ns = <12>;
971 };
972};
973
974&mcspi1 {
975 /*
976 * For some reason, touchscreen is necessary for screen to work at
977 * all on real hw. It works well without it on emulator.
978 *
979 * Also... order in the device tree actually matters here.
980 */
981 tsc2005@0 {
982 compatible = "ti,tsc2005";
983 spi-max-frequency = <6000000>;
984 reg = <0>;
985
986 vio-supply = <&vio>;
987
988 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
989 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
990
991 touchscreen-fuzz-x = <4>;
992 touchscreen-fuzz-y = <7>;
993 touchscreen-fuzz-pressure = <2>;
994 touchscreen-size-x = <4096>;
995 touchscreen-size-y = <4096>;
996 touchscreen-max-pressure = <2048>;
997
998 ti,x-plate-ohms = <280>;
999 ti,esd-recovery-timeout-ms = <8000>;
1000 };
1001
1002 lcd: acx565akm@2 {
1003 compatible = "sony,acx565akm";
1004 spi-max-frequency = <6000000>;
1005 reg = <2>;
1006
1007 pinctrl-names = "default";
1008 pinctrl-0 = <&acx565akm_pins>;
1009
1010 label = "lcd";
1011 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
1012
1013 port {
1014 lcd_in: endpoint {
1015 remote-endpoint = <&sdi_out>;
1016 };
1017 };
1018 };
1019};
1020
1021&mcspi4 {
1022 pinctrl-names = "default";
1023 pinctrl-0 = <&mcspi4_pins>;
1024
1025 wl1251@0 {
1026 pinctrl-names = "default";
1027 pinctrl-0 = <&wl1251_pins>;
1028
1029 vio-supply = <&vio>;
1030
1031 compatible = "ti,wl1251";
1032 reg = <0>;
1033 spi-max-frequency = <48000000>;
1034
1035 spi-cpol;
1036 spi-cpha;
1037
1038 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1039
1040 interrupt-parent = <&gpio2>;
1041 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1042
1043 clocks = <&vctcxo>;
1044 };
1045};
1046
1047/* RNG not directly accessible on n900, see omap3-rom-rng instead */
1048&rng_target {
1049 status = "disabled";
1050};
1051
1052&usb_otg_hs {
1053 interface-type = <0>;
1054 usb-phy = <&usb2_phy>;
1055 phys = <&usb2_phy>;
1056 phy-names = "usb2-phy";
1057 mode = <2>;
1058 power = <50>;
1059};
1060
1061&uart1 {
1062 status = "disabled";
1063};
1064
1065&uart2 {
1066 pinctrl-names = "default";
1067 pinctrl-0 = <&uart2_pins>;
1068
1069 bcm2048: bluetooth {
1070 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1071 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1072 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1073 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1074 clocks = <&vctcxo>;
1075 clock-names = "sysclk";
1076 };
1077};
1078
1079&uart3 {
1080 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1081 pinctrl-names = "default";
1082 pinctrl-0 = <&uart3_pins>;
1083};
1084
1085&dss {
1086 status = "okay";
1087
1088 pinctrl-names = "default";
1089 pinctrl-0 = <&dss_sdi_pins>;
1090
1091 vdds_sdi-supply = <&vaux1>;
1092
1093 ports {
1094 #address-cells = <1>;
1095 #size-cells = <0>;
1096
1097 port@1 {
1098 reg = <1>;
1099
1100 sdi_out: endpoint {
1101 remote-endpoint = <&lcd_in>;
1102 datapairs = <2>;
1103 };
1104 };
1105 };
1106};
1107
1108&venc {
1109 status = "okay";
1110
1111 vdda-supply = <&vdac>;
1112
1113 port {
1114 venc_out: endpoint {
1115 remote-endpoint = <&tv_connector_in>;
1116 ti,channels = <1>;
1117 };
1118 };
1119};
1120
1121&mcbsp2 {
1122 status = "okay";
1123};
1124
1125&ssi_port1 {
1126 pinctrl-names = "default";
1127 pinctrl-0 = <&ssi_pins>;
1128
1129 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1130
1131 modem: hsi-client {
1132 compatible = "nokia,n900-modem";
1133
1134 pinctrl-names = "default";
1135 pinctrl-0 = <&modem_pins>;
1136
1137 hsi-channel-ids = <0>, <1>, <2>, <3>;
1138 hsi-channel-names = "mcsaab-control",
1139 "speech-control",
1140 "speech-data",
1141 "mcsaab-data";
1142 hsi-speed-kbps = <55000>;
1143 hsi-mode = "frame";
1144 hsi-flow = "synchronized";
1145 hsi-arb-mode = "round-robin";
1146
1147 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1148
1149 gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>, /* 70 */
1150 <&gpio3 9 GPIO_ACTIVE_HIGH>, /* 73 */
1151 <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1152 <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1153 <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1154 gpio-names = "cmt_apeslpx",
1155 "cmt_rst_rq",
1156 "cmt_en",
1157 "cmt_rst",
1158 "cmt_bsi";
1159 };
1160};
1161
1162&ssi_port2 {
1163 status = "disabled";
1164};
1/*
2 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
3 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 (or later) as
7 * published by the Free Software Foundation.
8 */
9
10/dts-v1/;
11
12#include "omap34xx.dtsi"
13#include <dt-bindings/input/input.h>
14
15/*
16 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
17 * for omap AES HW crypto support. When linux kernel try to access memory of AES
18 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
19 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
20 * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
21 * There is "unofficial" version of bootloader which enables AES in L3 firewall
22 * but it is not widely used and to prevent kernel crash rather AES is disabled.
23 * There is also no runtime detection code if AES is disabled in L3 firewall...
24 */
25&aes {
26 status = "disabled";
27};
28
29/ {
30 model = "Nokia N900";
31 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
32
33 aliases {
34 i2c0;
35 i2c1 = &i2c1;
36 i2c2 = &i2c2;
37 i2c3 = &i2c3;
38 display0 = &lcd;
39 display1 = &tv;
40 };
41
42 cpus {
43 cpu@0 {
44 cpu0-supply = <&vcc>;
45 };
46 };
47
48 leds {
49 compatible = "gpio-leds";
50 heartbeat {
51 label = "debug::sleep";
52 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* 162 */
53 linux,default-trigger = "default-on";
54 pinctrl-names = "default";
55 pinctrl-0 = <&debug_leds>;
56 };
57 };
58
59 memory@80000000 {
60 device_type = "memory";
61 reg = <0x80000000 0x10000000>; /* 256 MB */
62 };
63
64 gpio_keys {
65 compatible = "gpio-keys";
66
67 camera_lens_cover {
68 label = "Camera Lens Cover";
69 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
70 linux,input-type = <EV_SW>;
71 linux,code = <SW_CAMERA_LENS_COVER>;
72 linux,can-disable;
73 };
74
75 camera_focus {
76 label = "Camera Focus";
77 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
78 linux,code = <KEY_CAMERA_FOCUS>;
79 linux,can-disable;
80 };
81
82 camera_capture {
83 label = "Camera Capture";
84 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
85 linux,code = <KEY_CAMERA>;
86 linux,can-disable;
87 };
88
89 lock_button {
90 label = "Lock Button";
91 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
92 linux,code = <KEY_SCREENLOCK>;
93 linux,can-disable;
94 };
95
96 keypad_slide {
97 label = "Keypad Slide";
98 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
99 linux,input-type = <EV_SW>;
100 linux,code = <SW_KEYPAD_SLIDE>;
101 linux,can-disable;
102 };
103
104 proximity_sensor {
105 label = "Proximity Sensor";
106 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
107 linux,input-type = <EV_SW>;
108 linux,code = <SW_FRONT_PROXIMITY>;
109 linux,can-disable;
110 };
111 };
112
113 isp1707: isp1707 {
114 compatible = "nxp,isp1707";
115 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
116 usb-phy = <&usb2_phy>;
117 };
118
119 tv: connector {
120 compatible = "composite-video-connector";
121 label = "tv";
122
123 port {
124 tv_connector_in: endpoint {
125 remote-endpoint = <&venc_out>;
126 };
127 };
128 };
129
130 sound: n900-audio {
131 compatible = "nokia,n900-audio";
132
133 nokia,cpu-dai = <&mcbsp2>;
134 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
135 nokia,headphone-amplifier = <&tpa6130a2>;
136
137 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
138 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
139 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
140 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
141 };
142
143 battery: n900-battery {
144 compatible = "nokia,n900-battery";
145 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
146 io-channel-names = "temp", "bsi", "vbat";
147 };
148
149 pwm9: dmtimer-pwm {
150 compatible = "ti,omap-dmtimer-pwm";
151 #pwm-cells = <3>;
152 ti,timers = <&timer9>;
153 ti,clock-source = <0x00>; /* timer_sys_ck */
154 };
155
156 ir: n900-ir {
157 compatible = "nokia,n900-ir";
158 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
159 };
160
161 /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
162 vctcxo: vctcxo {
163 compatible = "fixed-clock";
164 #clock-cells = <0>;
165 clock-frequency = <38400000>;
166 };
167};
168
169&isp {
170 vdds_csib-supply = <&vaux2>;
171
172 pinctrl-names = "default";
173 pinctrl-0 = <&camera_pins>;
174
175 ports {
176 port@1 {
177 reg = <1>;
178
179 csi_isp: endpoint {
180 remote-endpoint = <&csi_cam1>;
181 bus-type = <3>; /* CCP2 */
182 clock-lanes = <1>;
183 data-lanes = <0>;
184 lane-polarity = <0 0>;
185 /* Select strobe = <1> for back camera, <0> for front camera */
186 strobe = <1>;
187 };
188 };
189 };
190};
191
192&omap3_pmx_core {
193 pinctrl-names = "default";
194
195 uart2_pins: pinmux_uart2_pins {
196 pinctrl-single,pins = <
197 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
198 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */
199 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
200 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
201 >;
202 };
203
204 uart3_pins: pinmux_uart3_pins {
205 pinctrl-single,pins = <
206 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx */
207 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
208 >;
209 };
210
211 ethernet_pins: pinmux_ethernet_pins {
212 pinctrl-single,pins = <
213 OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
214 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */
215 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
216 >;
217 };
218
219 gpmc_pins: pinmux_gpmc_pins {
220 pinctrl-single,pins = <
221
222 /* address lines */
223 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
224 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
225 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
226
227 /* data lines, gpmc_d0..d7 not muxable according to TRM */
228 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
229 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
230 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
231 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
232 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
233 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
234 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
235 OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
236
237 /*
238 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
239 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
240 */
241 OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
242 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
243 >;
244 };
245
246 i2c1_pins: pinmux_i2c1_pins {
247 pinctrl-single,pins = <
248 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
249 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
250 >;
251 };
252
253 i2c2_pins: pinmux_i2c2_pins {
254 pinctrl-single,pins = <
255 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
256 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
257 >;
258 };
259
260 i2c3_pins: pinmux_i2c3_pins {
261 pinctrl-single,pins = <
262 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
263 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
264 >;
265 };
266
267 debug_leds: pinmux_debug_led_pins {
268 pinctrl-single,pins = <
269 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 */
270 >;
271 };
272
273 mcspi4_pins: pinmux_mcspi4_pins {
274 pinctrl-single,pins = <
275 OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
276 OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
277 OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
278 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
279 >;
280 };
281
282 mmc1_pins: pinmux_mmc1_pins {
283 pinctrl-single,pins = <
284 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
285 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
286 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
287 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
288 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
289 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
290 >;
291 };
292
293 mmc2_pins: pinmux_mmc2_pins {
294 pinctrl-single,pins = <
295 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
296 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
297 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
298 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
299 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
300 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
301 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
302 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
303 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
304 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
305 >;
306 };
307
308 acx565akm_pins: pinmux_acx565akm_pins {
309 pinctrl-single,pins = <
310 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
311 >;
312 };
313
314 dss_sdi_pins: pinmux_dss_sdi_pins {
315 pinctrl-single,pins = <
316 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
317 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
318 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
319 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
320
321 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
322 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
323 >;
324 };
325
326 wl1251_pins: pinmux_wl1251 {
327 pinctrl-single,pins = <
328 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */
329 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
330 >;
331 };
332
333 ssi_pins: pinmux_ssi {
334 pinctrl-single,pins = <
335 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
336 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
337 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */
338 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
339 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
340 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
341 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
342 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
343 >;
344 };
345
346 modem_pins: pinmux_modem {
347 pinctrl-single,pins = <
348 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */
349 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* gpio 72 => ape_rst_rq */
350 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */
351 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */
352 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */
353 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */
354 >;
355 };
356
357 camera_pins: pinmux_camera {
358 pinctrl-single,pins = <
359 OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7) /* cam_hs */
360 OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7) /* cam_vs */
361 OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
362 OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7) /* cam_d4 */
363 OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6 */
364 OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7 */
365 OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0) /* cam_d8 */
366 OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0) /* cam_d9 */
367 OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7) /* cam_d10 */
368 OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7) /* cam_xclkb */
369 OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0) /* cam_strobe */
370 >;
371 };
372};
373
374&i2c1 {
375 pinctrl-names = "default";
376 pinctrl-0 = <&i2c1_pins>;
377
378 clock-frequency = <2200000>;
379
380 twl: twl@48 {
381 reg = <0x48>;
382 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
383 interrupt-parent = <&intc>;
384 };
385};
386
387#include "twl4030.dtsi"
388#include "twl4030_omap3.dtsi"
389
390&vaux1 {
391 regulator-name = "V28";
392 regulator-min-microvolt = <2800000>;
393 regulator-max-microvolt = <2800000>;
394 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
395 regulator-always-on; /* due to battery cover sensor */
396};
397
398&vaux2 {
399 regulator-name = "VCSI";
400 regulator-min-microvolt = <1800000>;
401 regulator-max-microvolt = <1800000>;
402 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
403};
404
405&vaux3 {
406 regulator-name = "VMMC2_30";
407 regulator-min-microvolt = <2800000>;
408 regulator-max-microvolt = <3000000>;
409 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
410};
411
412&vaux4 {
413 regulator-name = "VCAM_ANA_28";
414 regulator-min-microvolt = <2800000>;
415 regulator-max-microvolt = <2800000>;
416 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
417};
418
419&vmmc1 {
420 regulator-name = "VMMC1";
421 regulator-min-microvolt = <1850000>;
422 regulator-max-microvolt = <3150000>;
423 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
424};
425
426&vmmc2 {
427 regulator-name = "V28_A";
428 regulator-min-microvolt = <2800000>;
429 regulator-max-microvolt = <3000000>;
430 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
431 regulator-always-on; /* due VIO leak to AIC34 VDDs */
432};
433
434&vpll1 {
435 regulator-name = "VPLL";
436 regulator-min-microvolt = <1800000>;
437 regulator-max-microvolt = <1800000>;
438 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
439 regulator-always-on;
440};
441
442&vpll2 {
443 regulator-name = "VSDI_CSI";
444 regulator-min-microvolt = <1800000>;
445 regulator-max-microvolt = <1800000>;
446 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
447 regulator-always-on;
448};
449
450&vsim {
451 regulator-name = "VMMC2_IO_18";
452 regulator-min-microvolt = <1800000>;
453 regulator-max-microvolt = <1800000>;
454 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
455};
456
457&vio {
458 regulator-name = "VIO";
459 regulator-min-microvolt = <1800000>;
460 regulator-max-microvolt = <1800000>;
461};
462
463&vintana1 {
464 regulator-name = "VINTANA1";
465 /* fixed to 1500000 */
466 regulator-always-on;
467};
468
469&vintana2 {
470 regulator-name = "VINTANA2";
471 regulator-min-microvolt = <2750000>;
472 regulator-max-microvolt = <2750000>;
473 regulator-always-on;
474};
475
476&vintdig {
477 regulator-name = "VINTDIG";
478 /* fixed to 1500000 */
479 regulator-always-on;
480};
481
482&twl {
483 twl_audio: audio {
484 compatible = "ti,twl4030-audio";
485 ti,enable-vibra = <1>;
486 };
487
488 twl_power: power {
489 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
490 ti,use_poweroff;
491 };
492};
493
494&twl_keypad {
495 linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
496 MATRIX_KEY(0x00, 0x01, KEY_O)
497 MATRIX_KEY(0x00, 0x02, KEY_P)
498 MATRIX_KEY(0x00, 0x03, KEY_COMMA)
499 MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
500 MATRIX_KEY(0x00, 0x06, KEY_A)
501 MATRIX_KEY(0x00, 0x07, KEY_S)
502
503 MATRIX_KEY(0x01, 0x00, KEY_W)
504 MATRIX_KEY(0x01, 0x01, KEY_D)
505 MATRIX_KEY(0x01, 0x02, KEY_F)
506 MATRIX_KEY(0x01, 0x03, KEY_G)
507 MATRIX_KEY(0x01, 0x04, KEY_H)
508 MATRIX_KEY(0x01, 0x05, KEY_J)
509 MATRIX_KEY(0x01, 0x06, KEY_K)
510 MATRIX_KEY(0x01, 0x07, KEY_L)
511
512 MATRIX_KEY(0x02, 0x00, KEY_E)
513 MATRIX_KEY(0x02, 0x01, KEY_DOT)
514 MATRIX_KEY(0x02, 0x02, KEY_UP)
515 MATRIX_KEY(0x02, 0x03, KEY_ENTER)
516 MATRIX_KEY(0x02, 0x05, KEY_Z)
517 MATRIX_KEY(0x02, 0x06, KEY_X)
518 MATRIX_KEY(0x02, 0x07, KEY_C)
519 MATRIX_KEY(0x02, 0x08, KEY_F9)
520
521 MATRIX_KEY(0x03, 0x00, KEY_R)
522 MATRIX_KEY(0x03, 0x01, KEY_V)
523 MATRIX_KEY(0x03, 0x02, KEY_B)
524 MATRIX_KEY(0x03, 0x03, KEY_N)
525 MATRIX_KEY(0x03, 0x04, KEY_M)
526 MATRIX_KEY(0x03, 0x05, KEY_SPACE)
527 MATRIX_KEY(0x03, 0x06, KEY_SPACE)
528 MATRIX_KEY(0x03, 0x07, KEY_LEFT)
529
530 MATRIX_KEY(0x04, 0x00, KEY_T)
531 MATRIX_KEY(0x04, 0x01, KEY_DOWN)
532 MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
533 MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
534 MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
535 MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
536 MATRIX_KEY(0x04, 0x08, KEY_F10)
537
538 MATRIX_KEY(0x05, 0x00, KEY_Y)
539 MATRIX_KEY(0x05, 0x08, KEY_F11)
540
541 MATRIX_KEY(0x06, 0x00, KEY_U)
542
543 MATRIX_KEY(0x07, 0x00, KEY_I)
544 MATRIX_KEY(0x07, 0x01, KEY_F7)
545 MATRIX_KEY(0x07, 0x02, KEY_F8)
546 >;
547};
548
549&twl_gpio {
550 ti,pullups = <0x0>;
551 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
552};
553
554&i2c2 {
555 pinctrl-names = "default";
556 pinctrl-0 = <&i2c2_pins>;
557
558 clock-frequency = <100000>;
559
560 tlv320aic3x: tlv320aic3x@18 {
561 compatible = "ti,tlv320aic3x";
562 reg = <0x18>;
563 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
564 ai3x-gpio-func = <
565 0 /* AIC3X_GPIO1_FUNC_DISABLED */
566 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
567 >;
568
569 AVDD-supply = <&vmmc2>;
570 DRVDD-supply = <&vmmc2>;
571 IOVDD-supply = <&vio>;
572 DVDD-supply = <&vio>;
573
574 ai3x-micbias-vg = <1>;
575 };
576
577 tlv320aic3x_aux: tlv320aic3x@19 {
578 compatible = "ti,tlv320aic3x";
579 reg = <0x19>;
580 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
581
582 AVDD-supply = <&vmmc2>;
583 DRVDD-supply = <&vmmc2>;
584 IOVDD-supply = <&vio>;
585 DVDD-supply = <&vio>;
586
587 ai3x-micbias-vg = <2>;
588 };
589
590 tsl2563: tsl2563@29 {
591 compatible = "amstaos,tsl2563";
592 reg = <0x29>;
593
594 amstaos,cover-comp-gain = <16>;
595 };
596
597 adp1653: led-controller@30 {
598 compatible = "adi,adp1653";
599 reg = <0x30>;
600 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
601
602 flash {
603 flash-timeout-us = <500000>;
604 flash-max-microamp = <320000>;
605 led-max-microamp = <50000>;
606 };
607 indicator {
608 led-max-microamp = <17500>;
609 };
610 };
611
612 lp5523: lp5523@32 {
613 compatible = "national,lp5523";
614 reg = <0x32>;
615 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
616 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
617
618 chan0 {
619 chan-name = "lp5523:kb1";
620 led-cur = /bits/ 8 <50>;
621 max-cur = /bits/ 8 <100>;
622 };
623
624 chan1 {
625 chan-name = "lp5523:kb2";
626 led-cur = /bits/ 8 <50>;
627 max-cur = /bits/ 8 <100>;
628 };
629
630 chan2 {
631 chan-name = "lp5523:kb3";
632 led-cur = /bits/ 8 <50>;
633 max-cur = /bits/ 8 <100>;
634 };
635
636 chan3 {
637 chan-name = "lp5523:kb4";
638 led-cur = /bits/ 8 <50>;
639 max-cur = /bits/ 8 <100>;
640 };
641
642 chan4 {
643 chan-name = "lp5523:b";
644 led-cur = /bits/ 8 <50>;
645 max-cur = /bits/ 8 <100>;
646 };
647
648 chan5 {
649 chan-name = "lp5523:g";
650 led-cur = /bits/ 8 <50>;
651 max-cur = /bits/ 8 <100>;
652 };
653
654 chan6 {
655 chan-name = "lp5523:r";
656 led-cur = /bits/ 8 <50>;
657 max-cur = /bits/ 8 <100>;
658 };
659
660 chan7 {
661 chan-name = "lp5523:kb5";
662 led-cur = /bits/ 8 <50>;
663 max-cur = /bits/ 8 <100>;
664 };
665
666 chan8 {
667 chan-name = "lp5523:kb6";
668 led-cur = /bits/ 8 <50>;
669 max-cur = /bits/ 8 <100>;
670 };
671 };
672
673 bq27200: bq27200@55 {
674 compatible = "ti,bq27200";
675 reg = <0x55>;
676 power-supplies = <&bq24150a>;
677 };
678
679 /* Stereo headphone amplifier */
680 tpa6130a2: tpa6130a2@60 {
681 compatible = "ti,tpa6130a2";
682 reg = <0x60>;
683
684 Vdd-supply = <&vmmc2>;
685
686 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
687 };
688
689 si4713: si4713@63 {
690 compatible = "silabs,si4713";
691 reg = <0x63>;
692
693 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
694 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
695 vio-supply = <&vio>;
696 vdd-supply = <&vaux1>;
697 };
698
699 bq24150a: bq24150a@6b {
700 compatible = "ti,bq24150a";
701 reg = <0x6b>;
702
703 ti,current-limit = <100>;
704 ti,weak-battery-voltage = <3400>;
705 ti,battery-regulation-voltage = <4200>;
706 ti,charge-current = <650>;
707 ti,termination-current = <100>;
708 ti,resistor-sense = <68>;
709
710 ti,usb-charger-detection = <&isp1707>;
711 };
712};
713
714&i2c3 {
715 pinctrl-names = "default";
716 pinctrl-0 = <&i2c3_pins>;
717
718 clock-frequency = <400000>;
719
720 lis302dl: lis3lv02d@1d {
721 compatible = "st,lis3lv02d";
722 reg = <0x1d>;
723
724 Vdd-supply = <&vaux1>;
725 Vdd_IO-supply = <&vio>;
726
727 interrupt-parent = <&gpio6>;
728 interrupts = <21 20>; /* 181 and 180 */
729
730 /* click flags */
731 st,click-single-x;
732 st,click-single-y;
733 st,click-single-z;
734
735 /* Limits are 0.5g * value */
736 st,click-threshold-x = <8>;
737 st,click-threshold-y = <8>;
738 st,click-threshold-z = <10>;
739
740 /* Click must be longer than time limit */
741 st,click-time-limit = <9>;
742
743 /* Kind of debounce filter */
744 st,click-latency = <50>;
745
746 /* Interrupt line 2 for click detection */
747 st,irq2-click;
748
749 st,wakeup-x-hi;
750 st,wakeup-y-hi;
751 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
752
753 st,wakeup2-z-hi;
754 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
755
756 st,hipass1-disable;
757 st,hipass2-disable;
758
759 st,axis-x = <1>; /* LIS3_DEV_X */
760 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
761 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
762
763 st,min-limit-x = <(-32)>;
764 st,min-limit-y = <3>;
765 st,min-limit-z = <3>;
766
767 st,max-limit-x = <(-3)>;
768 st,max-limit-y = <32>;
769 st,max-limit-z = <32>;
770 };
771
772 cam1: camera@3e {
773 compatible = "toshiba,et8ek8";
774 reg = <0x3e>;
775
776 vana-supply = <&vaux4>;
777
778 clocks = <&isp 0>;
779 clock-names = "extclk";
780 clock-frequency = <9600000>;
781
782 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
783
784 lens-focus = <&ad5820>;
785
786 port {
787 csi_cam1: endpoint {
788 bus-type = <3>; /* CCP2 */
789 strobe = <1>;
790 clock-inv = <0>;
791 crc = <1>;
792
793 remote-endpoint = <&csi_isp>;
794 };
795 };
796 };
797
798 /* D/A converter for auto-focus */
799 ad5820: dac@c {
800 compatible = "adi,ad5820";
801 reg = <0x0c>;
802
803 VANA-supply = <&vaux4>;
804
805 #io-channel-cells = <0>;
806 };
807};
808
809&mmc1 {
810 pinctrl-names = "default";
811 pinctrl-0 = <&mmc1_pins>;
812 vmmc-supply = <&vmmc1>;
813 bus-width = <4>;
814 /* For debugging, it is often good idea to remove this GPIO.
815 It means you can remove back cover (to reboot by removing
816 battery) and still use the MMC card. */
817 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
818};
819
820/* most boards use vaux3, only some old versions use vmmc2 instead */
821&mmc2 {
822 pinctrl-names = "default";
823 pinctrl-0 = <&mmc2_pins>;
824 vmmc-supply = <&vaux3>;
825 vqmmc-supply = <&vsim>;
826 bus-width = <8>;
827 non-removable;
828 no-sdio;
829 no-sd;
830};
831
832&mmc3 {
833 status = "disabled";
834};
835
836&gpmc {
837 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
838 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
839 pinctrl-names = "default";
840 pinctrl-0 = <&gpmc_pins>;
841
842 /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
843 onenand@0,0 {
844 #address-cells = <1>;
845 #size-cells = <1>;
846 compatible = "ti,omap2-onenand";
847 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
848
849 gpmc,sync-read;
850 gpmc,sync-write;
851 gpmc,burst-length = <16>;
852 gpmc,burst-read;
853 gpmc,burst-wrap;
854 gpmc,burst-write;
855 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
856 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
857 gpmc,cs-on-ns = <0>;
858 gpmc,cs-rd-off-ns = <87>;
859 gpmc,cs-wr-off-ns = <87>;
860 gpmc,adv-on-ns = <0>;
861 gpmc,adv-rd-off-ns = <10>;
862 gpmc,adv-wr-off-ns = <10>;
863 gpmc,oe-on-ns = <15>;
864 gpmc,oe-off-ns = <87>;
865 gpmc,we-on-ns = <0>;
866 gpmc,we-off-ns = <87>;
867 gpmc,rd-cycle-ns = <112>;
868 gpmc,wr-cycle-ns = <112>;
869 gpmc,access-ns = <81>;
870 gpmc,page-burst-access-ns = <15>;
871 gpmc,bus-turnaround-ns = <0>;
872 gpmc,cycle2cycle-delay-ns = <0>;
873 gpmc,wait-monitoring-ns = <0>;
874 gpmc,clk-activation-ns = <5>;
875 gpmc,wr-data-mux-bus-ns = <30>;
876 gpmc,wr-access-ns = <81>;
877 gpmc,sync-clk-ps = <15000>;
878
879 /*
880 * MTD partition table corresponding to Nokia's
881 * Maemo 5 (Fremantle) release.
882 */
883 partition@0 {
884 label = "bootloader";
885 reg = <0x00000000 0x00020000>;
886 read-only;
887 };
888 partition@1 {
889 label = "config";
890 reg = <0x00020000 0x00060000>;
891 };
892 partition@2 {
893 label = "log";
894 reg = <0x00080000 0x00040000>;
895 };
896 partition@3 {
897 label = "kernel";
898 reg = <0x000c0000 0x00200000>;
899 };
900 partition@4 {
901 label = "initfs";
902 reg = <0x002c0000 0x00200000>;
903 };
904 partition@5 {
905 label = "rootfs";
906 reg = <0x004c0000 0x0fb40000>;
907 };
908 };
909
910 /* Ethernet is on some early development boards and qemu */
911 ethernet@gpmc {
912 compatible = "smsc,lan91c94";
913 interrupt-parent = <&gpio2>;
914 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
915 reg = <1 0 0xf>; /* 16 byte IO range */
916 bank-width = <2>;
917 pinctrl-names = "default";
918 pinctrl-0 = <ðernet_pins>;
919 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */
920 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */
921 gpmc,device-width = <2>;
922 gpmc,sync-clk-ps = <0>;
923 gpmc,cs-on-ns = <0>;
924 gpmc,cs-rd-off-ns = <48>;
925 gpmc,cs-wr-off-ns = <24>;
926 gpmc,adv-on-ns = <0>;
927 gpmc,adv-rd-off-ns = <0>;
928 gpmc,adv-wr-off-ns = <0>;
929 gpmc,we-on-ns = <12>;
930 gpmc,we-off-ns = <18>;
931 gpmc,oe-on-ns = <12>;
932 gpmc,oe-off-ns = <48>;
933 gpmc,page-burst-access-ns = <0>;
934 gpmc,access-ns = <42>;
935 gpmc,rd-cycle-ns = <180>;
936 gpmc,wr-cycle-ns = <180>;
937 gpmc,bus-turnaround-ns = <0>;
938 gpmc,cycle2cycle-delay-ns = <0>;
939 gpmc,wait-monitoring-ns = <0>;
940 gpmc,clk-activation-ns = <0>;
941 gpmc,wr-access-ns = <0>;
942 gpmc,wr-data-mux-bus-ns = <12>;
943 };
944};
945
946&mcspi1 {
947 /*
948 * For some reason, touchscreen is necessary for screen to work at
949 * all on real hw. It works well without it on emulator.
950 *
951 * Also... order in the device tree actually matters here.
952 */
953 tsc2005@0 {
954 compatible = "ti,tsc2005";
955 spi-max-frequency = <6000000>;
956 reg = <0>;
957
958 vio-supply = <&vio>;
959
960 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
961 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
962
963 touchscreen-fuzz-x = <4>;
964 touchscreen-fuzz-y = <7>;
965 touchscreen-fuzz-pressure = <2>;
966 touchscreen-size-x = <4096>;
967 touchscreen-size-y = <4096>;
968 touchscreen-max-pressure = <2048>;
969
970 ti,x-plate-ohms = <280>;
971 ti,esd-recovery-timeout-ms = <8000>;
972 };
973
974 lcd: acx565akm@2 {
975 compatible = "sony,acx565akm";
976 spi-max-frequency = <6000000>;
977 reg = <2>;
978
979 pinctrl-names = "default";
980 pinctrl-0 = <&acx565akm_pins>;
981
982 label = "lcd";
983 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
984
985 port {
986 lcd_in: endpoint {
987 remote-endpoint = <&sdi_out>;
988 };
989 };
990 };
991};
992
993&mcspi4 {
994 pinctrl-names = "default";
995 pinctrl-0 = <&mcspi4_pins>;
996
997 wl1251@0 {
998 pinctrl-names = "default";
999 pinctrl-0 = <&wl1251_pins>;
1000
1001 vio-supply = <&vio>;
1002
1003 compatible = "ti,wl1251";
1004 reg = <0>;
1005 spi-max-frequency = <48000000>;
1006
1007 spi-cpol;
1008 spi-cpha;
1009
1010 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1011
1012 interrupt-parent = <&gpio2>;
1013 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1014
1015 clocks = <&vctcxo>;
1016 };
1017};
1018
1019&usb_otg_hs {
1020 interface-type = <0>;
1021 usb-phy = <&usb2_phy>;
1022 phys = <&usb2_phy>;
1023 phy-names = "usb2-phy";
1024 mode = <2>;
1025 power = <50>;
1026};
1027
1028&uart1 {
1029 status = "disabled";
1030};
1031
1032&uart2 {
1033 pinctrl-names = "default";
1034 pinctrl-0 = <&uart2_pins>;
1035
1036 bcm2048: bluetooth {
1037 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1038 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1039 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1040 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1041 clocks = <&vctcxo>;
1042 clock-names = "sysclk";
1043 };
1044};
1045
1046&uart3 {
1047 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1048 pinctrl-names = "default";
1049 pinctrl-0 = <&uart3_pins>;
1050};
1051
1052&dss {
1053 status = "ok";
1054
1055 pinctrl-names = "default";
1056 pinctrl-0 = <&dss_sdi_pins>;
1057
1058 vdds_sdi-supply = <&vaux1>;
1059
1060 ports {
1061 #address-cells = <1>;
1062 #size-cells = <0>;
1063
1064 port@1 {
1065 reg = <1>;
1066
1067 sdi_out: endpoint {
1068 remote-endpoint = <&lcd_in>;
1069 datapairs = <2>;
1070 };
1071 };
1072 };
1073};
1074
1075&venc {
1076 status = "ok";
1077
1078 vdda-supply = <&vdac>;
1079
1080 port {
1081 venc_out: endpoint {
1082 remote-endpoint = <&tv_connector_in>;
1083 ti,channels = <1>;
1084 };
1085 };
1086};
1087
1088&mcbsp2 {
1089 status = "ok";
1090};
1091
1092&ssi_port1 {
1093 pinctrl-names = "default";
1094 pinctrl-0 = <&ssi_pins>;
1095
1096 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1097
1098 modem: hsi-client {
1099 compatible = "nokia,n900-modem";
1100
1101 pinctrl-names = "default";
1102 pinctrl-0 = <&modem_pins>;
1103
1104 hsi-channel-ids = <0>, <1>, <2>, <3>;
1105 hsi-channel-names = "mcsaab-control",
1106 "speech-control",
1107 "speech-data",
1108 "mcsaab-data";
1109 hsi-speed-kbps = <55000>;
1110 hsi-mode = "frame";
1111 hsi-flow = "synchronized";
1112 hsi-arb-mode = "round-robin";
1113
1114 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1115
1116 gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>, /* 70 */
1117 <&gpio3 9 GPIO_ACTIVE_HIGH>, /* 73 */
1118 <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1119 <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1120 <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1121 gpio-names = "cmt_apeslpx",
1122 "cmt_rst_rq",
1123 "cmt_en",
1124 "cmt_rst",
1125 "cmt_bsi";
1126 };
1127};
1128
1129&ssi_port2 {
1130 status = "disabled";
1131};