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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 *
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 */
7
8#include <dt-bindings/pinctrl/at91.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/clock/at91.h>
12
13/ {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 ssc2 = &ssc2;
33 };
34
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 cpu@0 {
40 compatible = "arm,arm926ej-s";
41 device_type = "cpu";
42 reg = <0>;
43 };
44 };
45
46 memory@20000000 {
47 device_type = "memory";
48 reg = <0x20000000 0x08000000>;
49 };
50
51 clocks {
52 main_xtal: main_xtal {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <0>;
56 };
57
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63 };
64
65 sram: sram@300000 {
66 compatible = "mmio-sram";
67 reg = <0x00300000 0x28000>;
68 #address-cells = <1>;
69 #size-cells = <1>;
70 ranges = <0 0x00300000 0x28000>;
71 };
72
73 ahb {
74 compatible = "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 ranges;
78
79 usb0: ohci@500000 {
80 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
81 reg = <0x00500000 0x100000>;
82 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
83 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
84 clock-names = "ohci_clk", "hclk", "uhpck";
85 status = "disabled";
86 };
87
88 fb0: fb@600000 {
89 compatible = "atmel,at91sam9261-lcdc";
90 reg = <0x00600000 0x1000>;
91 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_fb>;
94 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
95 clock-names = "lcdc_clk", "hclk";
96 status = "disabled";
97 };
98
99 ebi: ebi@10000000 {
100 compatible = "atmel,at91sam9261-ebi";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 atmel,smc = <&smc>;
104 atmel,matrix = <&matrix>;
105 reg = <0x10000000 0x80000000>;
106 ranges = <0x0 0x0 0x10000000 0x10000000
107 0x1 0x0 0x20000000 0x10000000
108 0x2 0x0 0x30000000 0x10000000
109 0x3 0x0 0x40000000 0x10000000
110 0x4 0x0 0x50000000 0x10000000
111 0x5 0x0 0x60000000 0x10000000
112 0x6 0x0 0x70000000 0x10000000
113 0x7 0x0 0x80000000 0x10000000>;
114 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
115 status = "disabled";
116
117 nand_controller: nand-controller {
118 compatible = "atmel,at91sam9261-nand-controller";
119 #address-cells = <2>;
120 #size-cells = <1>;
121 ranges;
122 status = "disabled";
123 };
124 };
125
126 apb {
127 compatible = "simple-bus";
128 #address-cells = <1>;
129 #size-cells = <1>;
130 ranges;
131
132 tcb0: timer@fffa0000 {
133 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134 #address-cells = <1>;
135 #size-cells = <0>;
136 reg = <0xfffa0000 0x100>;
137 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
138 <18 IRQ_TYPE_LEVEL_HIGH 0>,
139 <19 IRQ_TYPE_LEVEL_HIGH 0>;
140 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
141 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
142 };
143
144 usb1: gadget@fffa4000 {
145 compatible = "atmel,at91sam9261-udc";
146 reg = <0xfffa4000 0x4000>;
147 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
148 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
149 clock-names = "pclk", "hclk";
150 atmel,matrix = <&matrix>;
151 status = "disabled";
152 };
153
154 mmc0: mmc@fffa8000 {
155 compatible = "atmel,hsmci";
156 reg = <0xfffa8000 0x600>;
157 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
163 clock-names = "mci_clk";
164 status = "disabled";
165 };
166
167 i2c0: i2c@fffac000 {
168 compatible = "atmel,at91sam9261-i2c";
169 pinctrl-names = "default";
170 pinctrl-0 = <&pinctrl_i2c_twi>;
171 reg = <0xfffac000 0x100>;
172 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
173 #address-cells = <1>;
174 #size-cells = <0>;
175 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
176 status = "disabled";
177 };
178
179 usart0: serial@fffb0000 {
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xfffb0000 0x200>;
182 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
183 atmel,use-dma-rx;
184 atmel,use-dma-tx;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_usart0>;
187 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
188 clock-names = "usart";
189 status = "disabled";
190 };
191
192 usart1: serial@fffb4000 {
193 compatible = "atmel,at91sam9260-usart";
194 reg = <0xfffb4000 0x200>;
195 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
196 atmel,use-dma-rx;
197 atmel,use-dma-tx;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_usart1>;
200 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
201 clock-names = "usart";
202 status = "disabled";
203 };
204
205 usart2: serial@fffb8000{
206 compatible = "atmel,at91sam9260-usart";
207 reg = <0xfffb8000 0x200>;
208 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
209 atmel,use-dma-rx;
210 atmel,use-dma-tx;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_usart2>;
213 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
214 clock-names = "usart";
215 status = "disabled";
216 };
217
218 ssc0: ssc@fffbc000 {
219 compatible = "atmel,at91rm9200-ssc";
220 reg = <0xfffbc000 0x4000>;
221 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
224 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
225 clock-names = "pclk";
226 status = "disabled";
227 };
228
229 ssc1: ssc@fffc0000 {
230 compatible = "atmel,at91rm9200-ssc";
231 reg = <0xfffc0000 0x4000>;
232 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
235 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
236 clock-names = "pclk";
237 status = "disabled";
238 };
239
240 ssc2: ssc@fffc4000 {
241 compatible = "atmel,at91rm9200-ssc";
242 reg = <0xfffc4000 0x4000>;
243 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
246 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
247 clock-names = "pclk";
248 status = "disabled";
249 };
250
251 spi0: spi@fffc8000 {
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "atmel,at91rm9200-spi";
255 reg = <0xfffc8000 0x200>;
256 cs-gpios = <0>, <0>, <0>, <0>;
257 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_spi0>;
260 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
261 clock-names = "spi_clk";
262 status = "disabled";
263 };
264
265 spi1: spi@fffcc000 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "atmel,at91rm9200-spi";
269 reg = <0xfffcc000 0x200>;
270 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_spi1>;
273 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
274 clock-names = "spi_clk";
275 status = "disabled";
276 };
277
278 ramc: ramc@ffffea00 {
279 compatible = "atmel,at91sam9260-sdramc";
280 reg = <0xffffea00 0x200>;
281 };
282
283 smc: smc@ffffec00 {
284 compatible = "atmel,at91sam9260-smc", "syscon";
285 reg = <0xffffec00 0x200>;
286 };
287
288 matrix: matrix@ffffee00 {
289 compatible = "atmel,at91sam9261-matrix", "syscon";
290 reg = <0xffffee00 0x200>;
291 };
292
293 aic: interrupt-controller@fffff000 {
294 #interrupt-cells = <3>;
295 compatible = "atmel,at91rm9200-aic";
296 interrupt-controller;
297 reg = <0xfffff000 0x200>;
298 atmel,external-irqs = <29 30 31>;
299 };
300
301 dbgu: serial@fffff200 {
302 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
303 reg = <0xfffff200 0x200>;
304 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_dbgu>;
307 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
308 clock-names = "usart";
309 status = "disabled";
310 };
311
312 pinctrl@fffff400 {
313 #address-cells = <1>;
314 #size-cells = <1>;
315 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
316 ranges = <0xfffff400 0xfffff400 0x600>;
317
318 atmel,mux-mask =
319 /* A B */
320 <0xffffffff 0xfffffff7>, /* pioA */
321 <0xffffffff 0xfffffff4>, /* pioB */
322 <0xffffffff 0xffffff07>; /* pioC */
323
324 /* shared pinctrl settings */
325 dbgu {
326 pinctrl_dbgu: dbgu-0 {
327 atmel,pins =
328 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
329 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
330 };
331 };
332
333 usart0 {
334 pinctrl_usart0: usart0-0 {
335 atmel,pins =
336 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
337 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
338 };
339
340 pinctrl_usart0_rts: usart0_rts-0 {
341 atmel,pins =
342 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
343 };
344
345 pinctrl_usart0_cts: usart0_cts-0 {
346 atmel,pins =
347 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
348 };
349 };
350
351 usart1 {
352 pinctrl_usart1: usart1-0 {
353 atmel,pins =
354 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
355 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
356 };
357
358 pinctrl_usart1_rts: usart1_rts-0 {
359 atmel,pins =
360 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
361 };
362
363 pinctrl_usart1_cts: usart1_cts-0 {
364 atmel,pins =
365 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
366 };
367 };
368
369 usart2 {
370 pinctrl_usart2: usart2-0 {
371 atmel,pins =
372 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
373 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
374 };
375
376 pinctrl_usart2_rts: usart2_rts-0 {
377 atmel,pins =
378 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
379 };
380
381 pinctrl_usart2_cts: usart2_cts-0 {
382 atmel,pins =
383 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 };
385 };
386
387 nand {
388 pinctrl_nand_rb: nand-rb-0 {
389 atmel,pins =
390 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
391 };
392
393 pinctrl_nand_cs: nand-cs-0 {
394 atmel,pins =
395 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
396 };
397 };
398
399 mmc0 {
400 pinctrl_mmc0_clk: mmc0_clk-0 {
401 atmel,pins =
402 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
403 };
404
405 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
406 atmel,pins =
407 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
408 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
409 };
410
411 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
412 atmel,pins =
413 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
414 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
415 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
416 };
417 };
418
419 ssc0 {
420 pinctrl_ssc0_tx: ssc0_tx-0 {
421 atmel,pins =
422 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
423 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
424 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_ssc0_rx: ssc0_rx-0 {
428 atmel,pins =
429 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
430 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
431 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 };
433 };
434
435 ssc1 {
436 pinctrl_ssc1_tx: ssc1_tx-0 {
437 atmel,pins =
438 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
439 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
440 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
441 };
442
443 pinctrl_ssc1_rx: ssc1_rx-0 {
444 atmel,pins =
445 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
446 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
447 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
448 };
449 };
450
451 ssc2 {
452 pinctrl_ssc2_tx: ssc2_tx-0 {
453 atmel,pins =
454 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
455 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
456 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
457 };
458
459 pinctrl_ssc2_rx: ssc2_rx-0 {
460 atmel,pins =
461 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
462 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
463 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
465 };
466
467 spi0 {
468 pinctrl_spi0: spi0-0 {
469 atmel,pins =
470 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
471 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
472 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
473 };
474 };
475
476 spi1 {
477 pinctrl_spi1: spi1-0 {
478 atmel,pins =
479 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
480 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
481 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
482 };
483 };
484
485 tcb0 {
486 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
487 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 };
489
490 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
491 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 };
493
494 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
495 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 };
497
498 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
499 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500 };
501
502 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
503 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
504 };
505
506 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
507 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
508 };
509
510 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
511 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
512 };
513
514 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
515 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
516 };
517
518 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
519 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
520 };
521 };
522
523 i2c0 {
524 pinctrl_i2c_bitbang: i2c-0-bitbang {
525 atmel,pins =
526 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
527 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
528 };
529 pinctrl_i2c_twi: i2c-0-twi {
530 atmel,pins =
531 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
532 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
533 };
534 };
535
536 fb {
537 pinctrl_fb: fb-0 {
538 atmel,pins =
539 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
540 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
541 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
542 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
543 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
544 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
550 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
551 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
552 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
553 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
554 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
555 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
556 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
557 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
558 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
559 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
560 };
561 };
562
563 pioA: gpio@fffff400 {
564 compatible = "atmel,at91rm9200-gpio";
565 reg = <0xfffff400 0x200>;
566 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
567 #gpio-cells = <2>;
568 gpio-controller;
569 interrupt-controller;
570 #interrupt-cells = <2>;
571 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
572 };
573
574 pioB: gpio@fffff600 {
575 compatible = "atmel,at91rm9200-gpio";
576 reg = <0xfffff600 0x200>;
577 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
578 #gpio-cells = <2>;
579 gpio-controller;
580 interrupt-controller;
581 #interrupt-cells = <2>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
583 };
584
585 pioC: gpio@fffff800 {
586 compatible = "atmel,at91rm9200-gpio";
587 reg = <0xfffff800 0x200>;
588 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
589 #gpio-cells = <2>;
590 gpio-controller;
591 interrupt-controller;
592 #interrupt-cells = <2>;
593 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
594 };
595 };
596
597 pmc: pmc@fffffc00 {
598 compatible = "atmel,at91sam9261-pmc", "syscon";
599 reg = <0xfffffc00 0x100>;
600 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
601 #clock-cells = <2>;
602 clocks = <&slow_xtal>, <&main_xtal>;
603 clock-names = "slow_xtal", "main_xtal";
604 };
605
606 rstc@fffffd00 {
607 compatible = "atmel,at91sam9260-rstc";
608 reg = <0xfffffd00 0x10>;
609 clocks = <&slow_xtal>;
610 };
611
612 shdwc@fffffd10 {
613 compatible = "atmel,at91sam9260-shdwc";
614 reg = <0xfffffd10 0x10>;
615 clocks = <&slow_xtal>;
616 };
617
618 pit: timer@fffffd30 {
619 compatible = "atmel,at91sam9260-pit";
620 reg = <0xfffffd30 0xf>;
621 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
622 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
623 };
624
625 rtc@fffffd20 {
626 compatible = "atmel,at91sam9260-rtt";
627 reg = <0xfffffd20 0x10>;
628 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
629 clocks = <&slow_xtal>;
630 status = "disabled";
631 };
632
633 watchdog@fffffd40 {
634 compatible = "atmel,at91sam9260-wdt";
635 reg = <0xfffffd40 0x10>;
636 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
637 clocks = <&slow_xtal>;
638 status = "disabled";
639 };
640
641 gpbr: syscon@fffffd50 {
642 compatible = "atmel,at91sam9260-gpbr", "syscon";
643 reg = <0xfffffd50 0x10>;
644 status = "disabled";
645 };
646 };
647 };
648
649 i2c-gpio-0 {
650 compatible = "i2c-gpio";
651 pinctrl-names = "default";
652 pinctrl-0 = <&pinctrl_i2c_bitbang>;
653 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
654 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
655 i2c-gpio,sda-open-drain;
656 i2c-gpio,scl-open-drain;
657 i2c-gpio,delay-us = <2>; /* ~100 kHz */
658 #address-cells = <1>;
659 #size-cells = <0>;
660 status = "disabled";
661 };
662};
1/*
2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3 *
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 ssc2 = &ssc2;
33 };
34
35 cpus {
36 #address-cells = <0>;
37 #size-cells = <0>;
38
39 cpu {
40 compatible = "arm,arm926ej-s";
41 device_type = "cpu";
42 };
43 };
44
45 memory {
46 reg = <0x20000000 0x08000000>;
47 };
48
49 clocks {
50 main_xtal: main_xtal {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61 };
62
63 sram: sram@300000 {
64 compatible = "mmio-sram";
65 reg = <0x00300000 0x28000>;
66 };
67
68 ahb {
69 compatible = "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 ranges;
73
74 usb0: ohci@500000 {
75 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
76 reg = <0x00500000 0x100000>;
77 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
78 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
79 clock-names = "ohci_clk", "hclk", "uhpck";
80 status = "disabled";
81 };
82
83 fb0: fb@600000 {
84 compatible = "atmel,at91sam9261-lcdc";
85 reg = <0x00600000 0x1000>;
86 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_fb>;
89 clocks = <&lcd_clk>, <&hclk1>;
90 clock-names = "lcdc_clk", "hclk";
91 status = "disabled";
92 };
93
94 ebi: ebi@10000000 {
95 compatible = "atmel,at91sam9261-ebi";
96 #address-cells = <2>;
97 #size-cells = <1>;
98 atmel,smc = <&smc>;
99 atmel,matrix = <&matrix>;
100 reg = <0x10000000 0x80000000>;
101 ranges = <0x0 0x0 0x10000000 0x10000000
102 0x1 0x0 0x20000000 0x10000000
103 0x2 0x0 0x30000000 0x10000000
104 0x3 0x0 0x40000000 0x10000000
105 0x4 0x0 0x50000000 0x10000000
106 0x5 0x0 0x60000000 0x10000000
107 0x6 0x0 0x70000000 0x10000000
108 0x7 0x0 0x80000000 0x10000000>;
109 clocks = <&mck>;
110 status = "disabled";
111
112 nand_controller: nand-controller {
113 compatible = "atmel,at91sam9261-nand-controller";
114 #address-cells = <2>;
115 #size-cells = <1>;
116 ranges;
117 status = "disabled";
118 };
119 };
120
121 apb {
122 compatible = "simple-bus";
123 #address-cells = <1>;
124 #size-cells = <1>;
125 ranges;
126
127 tcb0: timer@fffa0000 {
128 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
129 #address-cells = <1>;
130 #size-cells = <0>;
131 reg = <0xfffa0000 0x100>;
132 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
133 <18 IRQ_TYPE_LEVEL_HIGH 0>,
134 <19 IRQ_TYPE_LEVEL_HIGH 0>;
135 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
136 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
137 };
138
139 usb1: gadget@fffa4000 {
140 compatible = "atmel,at91sam9261-udc";
141 reg = <0xfffa4000 0x4000>;
142 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
143 clocks = <&udc_clk>, <&udpck>;
144 clock-names = "pclk", "hclk";
145 atmel,matrix = <&matrix>;
146 status = "disabled";
147 };
148
149 mmc0: mmc@fffa8000 {
150 compatible = "atmel,hsmci";
151 reg = <0xfffa8000 0x600>;
152 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 clocks = <&mci0_clk>;
158 clock-names = "mci_clk";
159 status = "disabled";
160 };
161
162 i2c0: i2c@fffac000 {
163 compatible = "atmel,at91sam9261-i2c";
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c_twi>;
166 reg = <0xfffac000 0x100>;
167 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
168 #address-cells = <1>;
169 #size-cells = <0>;
170 clocks = <&twi0_clk>;
171 status = "disabled";
172 };
173
174 usart0: serial@fffb0000 {
175 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfffb0000 0x200>;
177 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
178 atmel,use-dma-rx;
179 atmel,use-dma-tx;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_usart0>;
182 clocks = <&usart0_clk>;
183 clock-names = "usart";
184 status = "disabled";
185 };
186
187 usart1: serial@fffb4000 {
188 compatible = "atmel,at91sam9260-usart";
189 reg = <0xfffb4000 0x200>;
190 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
191 atmel,use-dma-rx;
192 atmel,use-dma-tx;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_usart1>;
195 clocks = <&usart1_clk>;
196 clock-names = "usart";
197 status = "disabled";
198 };
199
200 usart2: serial@fffb8000{
201 compatible = "atmel,at91sam9260-usart";
202 reg = <0xfffb8000 0x200>;
203 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
204 atmel,use-dma-rx;
205 atmel,use-dma-tx;
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_usart2>;
208 clocks = <&usart2_clk>;
209 clock-names = "usart";
210 status = "disabled";
211 };
212
213 ssc0: ssc@fffbc000 {
214 compatible = "atmel,at91rm9200-ssc";
215 reg = <0xfffbc000 0x4000>;
216 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
219 clocks = <&ssc0_clk>;
220 clock-names = "pclk";
221 status = "disabled";
222 };
223
224 ssc1: ssc@fffc0000 {
225 compatible = "atmel,at91rm9200-ssc";
226 reg = <0xfffc0000 0x4000>;
227 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
230 clocks = <&ssc1_clk>;
231 clock-names = "pclk";
232 status = "disabled";
233 };
234
235 ssc2: ssc@fffc4000 {
236 compatible = "atmel,at91rm9200-ssc";
237 reg = <0xfffc4000 0x4000>;
238 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
241 clocks = <&ssc2_clk>;
242 clock-names = "pclk";
243 status = "disabled";
244 };
245
246 spi0: spi@fffc8000 {
247 #address-cells = <1>;
248 #size-cells = <0>;
249 compatible = "atmel,at91rm9200-spi";
250 reg = <0xfffc8000 0x200>;
251 cs-gpios = <0>, <0>, <0>, <0>;
252 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_spi0>;
255 clocks = <&spi0_clk>;
256 clock-names = "spi_clk";
257 status = "disabled";
258 };
259
260 spi1: spi@fffcc000 {
261 #address-cells = <1>;
262 #size-cells = <0>;
263 compatible = "atmel,at91rm9200-spi";
264 reg = <0xfffcc000 0x200>;
265 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_spi1>;
268 clocks = <&spi1_clk>;
269 clock-names = "spi_clk";
270 status = "disabled";
271 };
272
273 ramc: ramc@ffffea00 {
274 compatible = "atmel,at91sam9260-sdramc";
275 reg = <0xffffea00 0x200>;
276 };
277
278 smc: smc@ffffec00 {
279 compatible = "atmel,at91sam9260-smc", "syscon";
280 reg = <0xffffec00 0x200>;
281 };
282
283 matrix: matrix@ffffee00 {
284 compatible = "atmel,at91sam9261-matrix", "syscon";
285 reg = <0xffffee00 0x200>;
286 };
287
288 aic: interrupt-controller@fffff000 {
289 #interrupt-cells = <3>;
290 compatible = "atmel,at91rm9200-aic";
291 interrupt-controller;
292 reg = <0xfffff000 0x200>;
293 atmel,external-irqs = <29 30 31>;
294 };
295
296 dbgu: serial@fffff200 {
297 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
298 reg = <0xfffff200 0x200>;
299 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_dbgu>;
302 clocks = <&mck>;
303 clock-names = "usart";
304 status = "disabled";
305 };
306
307 pinctrl@fffff400 {
308 #address-cells = <1>;
309 #size-cells = <1>;
310 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
311 ranges = <0xfffff400 0xfffff400 0x600>;
312
313 atmel,mux-mask =
314 /* A B */
315 <0xffffffff 0xfffffff7>, /* pioA */
316 <0xffffffff 0xfffffff4>, /* pioB */
317 <0xffffffff 0xffffff07>; /* pioC */
318
319 /* shared pinctrl settings */
320 dbgu {
321 pinctrl_dbgu: dbgu-0 {
322 atmel,pins =
323 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
324 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
325 };
326 };
327
328 usart0 {
329 pinctrl_usart0: usart0-0 {
330 atmel,pins =
331 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
332 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
333 };
334
335 pinctrl_usart0_rts: usart0_rts-0 {
336 atmel,pins =
337 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
338 };
339
340 pinctrl_usart0_cts: usart0_cts-0 {
341 atmel,pins =
342 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
343 };
344 };
345
346 usart1 {
347 pinctrl_usart1: usart1-0 {
348 atmel,pins =
349 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
350 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
351 };
352
353 pinctrl_usart1_rts: usart1_rts-0 {
354 atmel,pins =
355 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
356 };
357
358 pinctrl_usart1_cts: usart1_cts-0 {
359 atmel,pins =
360 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
361 };
362 };
363
364 usart2 {
365 pinctrl_usart2: usart2-0 {
366 atmel,pins =
367 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
368 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
369 };
370
371 pinctrl_usart2_rts: usart2_rts-0 {
372 atmel,pins =
373 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
374 };
375
376 pinctrl_usart2_cts: usart2_cts-0 {
377 atmel,pins =
378 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
379 };
380 };
381
382 nand {
383 pinctrl_nand_rb: nand-rb-0 {
384 atmel,pins =
385 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
386 };
387
388 pinctrl_nand_cs: nand-cs-0 {
389 atmel,pins =
390 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
391 };
392 };
393
394 mmc0 {
395 pinctrl_mmc0_clk: mmc0_clk-0 {
396 atmel,pins =
397 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
398 };
399
400 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
401 atmel,pins =
402 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
403 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
404 };
405
406 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
407 atmel,pins =
408 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
409 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
410 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
411 };
412 };
413
414 ssc0 {
415 pinctrl_ssc0_tx: ssc0_tx-0 {
416 atmel,pins =
417 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
418 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
419 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
420 };
421
422 pinctrl_ssc0_rx: ssc0_rx-0 {
423 atmel,pins =
424 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
425 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
426 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
427 };
428 };
429
430 ssc1 {
431 pinctrl_ssc1_tx: ssc1_tx-0 {
432 atmel,pins =
433 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
434 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
435 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436 };
437
438 pinctrl_ssc1_rx: ssc1_rx-0 {
439 atmel,pins =
440 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
441 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
442 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
443 };
444 };
445
446 ssc2 {
447 pinctrl_ssc2_tx: ssc2_tx-0 {
448 atmel,pins =
449 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
450 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
451 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
452 };
453
454 pinctrl_ssc2_rx: ssc2_rx-0 {
455 atmel,pins =
456 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
457 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
458 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
459 };
460 };
461
462 spi0 {
463 pinctrl_spi0: spi0-0 {
464 atmel,pins =
465 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
466 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
467 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
468 };
469 };
470
471 spi1 {
472 pinctrl_spi1: spi1-0 {
473 atmel,pins =
474 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
475 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
476 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
477 };
478 };
479
480 tcb0 {
481 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
482 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483 };
484
485 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
486 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
487 };
488
489 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
490 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
491 };
492
493 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
494 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
495 };
496
497 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
498 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
499 };
500
501 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
502 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 };
504
505 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
506 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
507 };
508
509 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
510 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
511 };
512
513 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
514 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
515 };
516 };
517
518 i2c0 {
519 pinctrl_i2c_bitbang: i2c-0-bitbang {
520 atmel,pins =
521 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
522 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
523 };
524 pinctrl_i2c_twi: i2c-0-twi {
525 atmel,pins =
526 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
527 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
528 };
529 };
530
531 fb {
532 pinctrl_fb: fb-0 {
533 atmel,pins =
534 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
535 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
536 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
537 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
538 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
539 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
540 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
541 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
542 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
543 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
544 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
550 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
551 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
552 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
553 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
554 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
555 };
556 };
557
558 pioA: gpio@fffff400 {
559 compatible = "atmel,at91rm9200-gpio";
560 reg = <0xfffff400 0x200>;
561 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
562 #gpio-cells = <2>;
563 gpio-controller;
564 interrupt-controller;
565 #interrupt-cells = <2>;
566 clocks = <&pioA_clk>;
567 };
568
569 pioB: gpio@fffff600 {
570 compatible = "atmel,at91rm9200-gpio";
571 reg = <0xfffff600 0x200>;
572 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
573 #gpio-cells = <2>;
574 gpio-controller;
575 interrupt-controller;
576 #interrupt-cells = <2>;
577 clocks = <&pioB_clk>;
578 };
579
580 pioC: gpio@fffff800 {
581 compatible = "atmel,at91rm9200-gpio";
582 reg = <0xfffff800 0x200>;
583 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
584 #gpio-cells = <2>;
585 gpio-controller;
586 interrupt-controller;
587 #interrupt-cells = <2>;
588 clocks = <&pioC_clk>;
589 };
590 };
591
592 pmc: pmc@fffffc00 {
593 compatible = "atmel,at91rm9200-pmc", "syscon";
594 reg = <0xfffffc00 0x100>;
595 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
596 interrupt-controller;
597 #address-cells = <1>;
598 #size-cells = <0>;
599 #interrupt-cells = <1>;
600
601 main_osc: main_osc {
602 compatible = "atmel,at91rm9200-clk-main-osc";
603 #clock-cells = <0>;
604 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
605 clocks = <&main_xtal>;
606 };
607
608 main: mainck {
609 compatible = "atmel,at91rm9200-clk-main";
610 #clock-cells = <0>;
611 clocks = <&main_osc>;
612 };
613
614 plla: pllack {
615 compatible = "atmel,at91rm9200-clk-pll";
616 #clock-cells = <0>;
617 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
618 clocks = <&main>;
619 reg = <0>;
620 atmel,clk-input-range = <1000000 32000000>;
621 #atmel,pll-clk-output-range-cells = <4>;
622 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
623 <190000000 240000000 2 1>;
624 };
625
626 pllb: pllbck {
627 compatible = "atmel,at91rm9200-clk-pll";
628 #clock-cells = <0>;
629 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
630 clocks = <&main>;
631 reg = <1>;
632 atmel,clk-input-range = <1000000 5000000>;
633 #atmel,pll-clk-output-range-cells = <4>;
634 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
635 };
636
637 mck: masterck {
638 compatible = "atmel,at91rm9200-clk-master";
639 #clock-cells = <0>;
640 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
641 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
642 atmel,clk-output-range = <0 94000000>;
643 atmel,clk-divisors = <1 2 4 0>;
644 };
645
646 usb: usbck {
647 compatible = "atmel,at91rm9200-clk-usb";
648 #clock-cells = <0>;
649 atmel,clk-divisors = <1 2 4 0>;
650 clocks = <&pllb>;
651 };
652
653 prog: progck {
654 compatible = "atmel,at91rm9200-clk-programmable";
655 #address-cells = <1>;
656 #size-cells = <0>;
657 interrupt-parent = <&pmc>;
658 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
659
660 prog0: prog0 {
661 #clock-cells = <0>;
662 reg = <0>;
663 interrupts = <AT91_PMC_PCKRDY(0)>;
664 };
665
666 prog1: prog1 {
667 #clock-cells = <0>;
668 reg = <1>;
669 interrupts = <AT91_PMC_PCKRDY(1)>;
670 };
671
672 prog2: prog2 {
673 #clock-cells = <0>;
674 reg = <2>;
675 interrupts = <AT91_PMC_PCKRDY(2)>;
676 };
677
678 prog3: prog3 {
679 #clock-cells = <0>;
680 reg = <3>;
681 interrupts = <AT91_PMC_PCKRDY(3)>;
682 };
683 };
684
685 systemck {
686 compatible = "atmel,at91rm9200-clk-system";
687 #address-cells = <1>;
688 #size-cells = <0>;
689
690 uhpck: uhpck {
691 #clock-cells = <0>;
692 reg = <6>;
693 clocks = <&usb>;
694 };
695
696 udpck: udpck {
697 #clock-cells = <0>;
698 reg = <7>;
699 clocks = <&usb>;
700 };
701
702 pck0: pck0 {
703 #clock-cells = <0>;
704 reg = <8>;
705 clocks = <&prog0>;
706 };
707
708 pck1: pck1 {
709 #clock-cells = <0>;
710 reg = <9>;
711 clocks = <&prog1>;
712 };
713
714 pck2: pck2 {
715 #clock-cells = <0>;
716 reg = <10>;
717 clocks = <&prog2>;
718 };
719
720 pck3: pck3 {
721 #clock-cells = <0>;
722 reg = <11>;
723 clocks = <&prog3>;
724 };
725
726 hclk0: hclk0 {
727 #clock-cells = <0>;
728 reg = <16>;
729 clocks = <&mck>;
730 };
731
732 hclk1: hclk1 {
733 #clock-cells = <0>;
734 reg = <17>;
735 clocks = <&mck>;
736 };
737 };
738
739 periphck {
740 compatible = "atmel,at91rm9200-clk-peripheral";
741 #address-cells = <1>;
742 #size-cells = <0>;
743 clocks = <&mck>;
744
745 pioA_clk: pioA_clk {
746 #clock-cells = <0>;
747 reg = <2>;
748 };
749
750 pioB_clk: pioB_clk {
751 #clock-cells = <0>;
752 reg = <3>;
753 };
754
755 pioC_clk: pioC_clk {
756 #clock-cells = <0>;
757 reg = <4>;
758 };
759
760 usart0_clk: usart0_clk {
761 #clock-cells = <0>;
762 reg = <6>;
763 };
764
765 usart1_clk: usart1_clk {
766 #clock-cells = <0>;
767 reg = <7>;
768 };
769
770 usart2_clk: usart2_clk {
771 #clock-cells = <0>;
772 reg = <8>;
773 };
774
775 mci0_clk: mci0_clk {
776 #clock-cells = <0>;
777 reg = <9>;
778 };
779
780 udc_clk: udc_clk {
781 #clock-cells = <0>;
782 reg = <10>;
783 };
784
785 twi0_clk: twi0_clk {
786 reg = <11>;
787 #clock-cells = <0>;
788 };
789
790 spi0_clk: spi0_clk {
791 #clock-cells = <0>;
792 reg = <12>;
793 };
794
795 spi1_clk: spi1_clk {
796 #clock-cells = <0>;
797 reg = <13>;
798 };
799
800 ssc0_clk: ssc0_clk {
801 #clock-cells = <0>;
802 reg = <14>;
803 };
804
805 ssc1_clk: ssc1_clk {
806 #clock-cells = <0>;
807 reg = <15>;
808 };
809
810 ssc2_clk: ssc2_clk {
811 #clock-cells = <0>;
812 reg = <16>;
813 };
814
815 tc0_clk: tc0_clk {
816 #clock-cells = <0>;
817 reg = <17>;
818 };
819
820 tc1_clk: tc1_clk {
821 #clock-cells = <0>;
822 reg = <18>;
823 };
824
825 tc2_clk: tc2_clk {
826 #clock-cells = <0>;
827 reg = <19>;
828 };
829
830 ohci_clk: ohci_clk {
831 #clock-cells = <0>;
832 reg = <20>;
833 };
834
835 lcd_clk: lcd_clk {
836 #clock-cells = <0>;
837 reg = <21>;
838 };
839 };
840 };
841
842 rstc@fffffd00 {
843 compatible = "atmel,at91sam9260-rstc";
844 reg = <0xfffffd00 0x10>;
845 clocks = <&slow_xtal>;
846 };
847
848 shdwc@fffffd10 {
849 compatible = "atmel,at91sam9260-shdwc";
850 reg = <0xfffffd10 0x10>;
851 clocks = <&slow_xtal>;
852 };
853
854 pit: timer@fffffd30 {
855 compatible = "atmel,at91sam9260-pit";
856 reg = <0xfffffd30 0xf>;
857 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
858 clocks = <&mck>;
859 };
860
861 rtc@fffffd20 {
862 compatible = "atmel,at91sam9260-rtt";
863 reg = <0xfffffd20 0x10>;
864 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
865 clocks = <&slow_xtal>;
866 status = "disabled";
867 };
868
869 watchdog@fffffd40 {
870 compatible = "atmel,at91sam9260-wdt";
871 reg = <0xfffffd40 0x10>;
872 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
873 clocks = <&slow_xtal>;
874 status = "disabled";
875 };
876
877 gpbr: syscon@fffffd50 {
878 compatible = "atmel,at91sam9260-gpbr", "syscon";
879 reg = <0xfffffd50 0x10>;
880 status = "disabled";
881 };
882 };
883 };
884
885 i2c-gpio-0 {
886 compatible = "i2c-gpio";
887 pinctrl-names = "default";
888 pinctrl-0 = <&pinctrl_i2c_bitbang>;
889 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
890 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
891 i2c-gpio,sda-open-drain;
892 i2c-gpio,scl-open-drain;
893 i2c-gpio,delay-us = <2>; /* ~100 kHz */
894 #address-cells = <1>;
895 #size-cells = <0>;
896 status = "disabled";
897 };
898};