1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
 
 
 
 
 4 */
 5/dts-v1/;
 6
 7/include/ "skeleton.dtsi"
 8
 9/ {
10	model = "snps,nsim";
11	compatible = "snps,nsim";
12	#address-cells = <1>;
13	#size-cells = <1>;
14	interrupt-parent = <&core_intc>;
15
16	chosen {
17		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1";
18	};
19
20	aliases {
21		serial0 = &uart0;
22	};
23
24	fpga {
25		compatible = "simple-bus";
26		#address-cells = <1>;
27		#size-cells = <1>;
28
29		/* child and parent address space 1:1 mapped */
30		ranges;
31
32		core_clk: core_clk {
33			#clock-cells = <0>;
34			compatible = "fixed-clock";
35			clock-frequency = <80000000>;
36		};
37
38		core_intc: interrupt-controller {
39			compatible = "snps,arc700-intc";
40			interrupt-controller;
41			#interrupt-cells = <1>;
42		};
43
44		uart0: serial@f0000000 {
45			compatible = "ns16550a";
46			reg = <0xf0000000 0x2000>;
47			interrupts = <24>;
48			clock-frequency = <50000000>;
49			baud = <115200>;
50			reg-shift = <2>;
51			reg-io-width = <4>;
52			no-loopback-test = <1>;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
53		};
54
55		arcpct0: pct {
56			compatible = "snps,arc700-pct";
57		};
58	};
59};

 
 1/*
 2 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License version 2 as
 6 * published by the Free Software Foundation.
 7 */
 8/dts-v1/;
 9
10/include/ "skeleton.dtsi"
11
12/ {
13	model = "snps,nsim";
14	compatible = "snps,nsim";
15	#address-cells = <1>;
16	#size-cells = <1>;
17	interrupt-parent = <&core_intc>;
18
19	chosen {
20		bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
21	};
22
23	aliases {
24		serial0 = &arcuart0;
25	};
26
27	fpga {
28		compatible = "simple-bus";
29		#address-cells = <1>;
30		#size-cells = <1>;
31
32		/* child and parent address space 1:1 mapped */
33		ranges;
34
35		core_clk: core_clk {
36			#clock-cells = <0>;
37			compatible = "fixed-clock";
38			clock-frequency = <80000000>;
39		};
40
41		core_intc: interrupt-controller {
42			compatible = "snps,arc700-intc";
43			interrupt-controller;
44			#interrupt-cells = <1>;
45		};
46
47		arcuart0: serial@c0fc1000 {
48			compatible = "snps,arc-uart";
49			reg = <0xc0fc1000 0x100>;
50			interrupts = <5>;
51			clock-frequency = <80000000>;
52			current-speed = <115200>;
53			status = "okay";
54		};
55
56		ethernet@c0fc2000 {
57			compatible = "snps,arc-emac";
58			reg = <0xc0fc2000 0x3c>;
59			interrupts = <6>;
60			mac-address = [ 00 11 22 33 44 55 ];
61			clock-frequency = <80000000>;
62			max-speed = <100>;
63			phy = <&phy0>;
64
65			#address-cells = <1>;
66			#size-cells = <0>;
67			phy0: ethernet-phy@0 {
68				reg = <1>;
69			};
70		};
71
72		arcpct0: pct {
73			compatible = "snps,arc700-pct";
74		};
75	};
76};