1/* SPDX-License-Identifier: MIT */
 2#ifndef __NVKM_PMU_H__
 3#define __NVKM_PMU_H__
 4#include <core/subdev.h>
 5#include <core/falcon.h>
 6
 7struct nvkm_pmu {
 8	const struct nvkm_pmu_func *func;
 9	struct nvkm_subdev subdev;
10	struct nvkm_falcon falcon;
11
12	struct nvkm_falcon_qmgr *qmgr;
13	struct nvkm_falcon_cmdq *hpq;
14	struct nvkm_falcon_cmdq *lpq;
15	struct nvkm_falcon_msgq *msgq;
16	bool initmsg_received;
17
18	struct completion wpr_ready;
19
20	struct {
21		struct mutex mutex;
22		u32 base;
23		u32 size;
24	} send;
25
26	struct {
27		u32 base;
28		u32 size;
29
30		struct work_struct work;
31		wait_queue_head_t wait;
32		u32 process;
33		u32 message;
34		u32 data[2];
35	} recv;
36};
37
38int nvkm_pmu_send(struct nvkm_pmu *, u32 reply[2], u32 process,
39		  u32 message, u32 data0, u32 data1);
40void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable);
41bool nvkm_pmu_fan_controlled(struct nvkm_device *);
42
43int gt215_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
44int gf100_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
45int gf119_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
46int gk104_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
47int gk110_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
48int gk208_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
49int gk20a_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
50int gm107_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
51int gm200_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
52int gm20b_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
53int gp102_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
54int gp10b_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **);
55
56/* interface to MEMX process running on PMU */
57struct nvkm_memx;
58int  nvkm_memx_init(struct nvkm_pmu *, struct nvkm_memx **);
59int  nvkm_memx_fini(struct nvkm_memx **, bool exec);
60void nvkm_memx_wr32(struct nvkm_memx *, u32 addr, u32 data);
61void nvkm_memx_wait(struct nvkm_memx *, u32 addr, u32 mask, u32 data, u32 nsec);
62void nvkm_memx_nsec(struct nvkm_memx *, u32 nsec);
63void nvkm_memx_wait_vblank(struct nvkm_memx *);
64void nvkm_memx_train(struct nvkm_memx *);
65int  nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
66void nvkm_memx_block(struct nvkm_memx *);
67void nvkm_memx_unblock(struct nvkm_memx *);
68#endif

 1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef __NVKM_PMU_H__
 3#define __NVKM_PMU_H__
 4#include <core/subdev.h>
 5#include <engine/falcon.h>
 6
 7struct nvkm_pmu {
 8	const struct nvkm_pmu_func *func;
 9	struct nvkm_subdev subdev;
10	struct nvkm_falcon *falcon;
11	struct nvkm_msgqueue *queue;
 
 
 
 
 
 
 
12
13	struct {
 
14		u32 base;
15		u32 size;
16	} send;
17
18	struct {
19		u32 base;
20		u32 size;
21
22		struct work_struct work;
23		wait_queue_head_t wait;
24		u32 process;
25		u32 message;
26		u32 data[2];
27	} recv;
28};
29
30int nvkm_pmu_send(struct nvkm_pmu *, u32 reply[2], u32 process,
31		  u32 message, u32 data0, u32 data1);
32void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable);
 
33
34int gt215_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
35int gf100_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
36int gf119_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
37int gk104_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
38int gk110_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
39int gk208_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
40int gk20a_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
41int gm107_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
42int gm20b_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
43int gp100_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
44int gp102_pmu_new(struct nvkm_device *, int, struct nvkm_pmu **);
 
45
46/* interface to MEMX process running on PMU */
47struct nvkm_memx;
48int  nvkm_memx_init(struct nvkm_pmu *, struct nvkm_memx **);
49int  nvkm_memx_fini(struct nvkm_memx **, bool exec);
50void nvkm_memx_wr32(struct nvkm_memx *, u32 addr, u32 data);
51void nvkm_memx_wait(struct nvkm_memx *, u32 addr, u32 mask, u32 data, u32 nsec);
52void nvkm_memx_nsec(struct nvkm_memx *, u32 nsec);
53void nvkm_memx_wait_vblank(struct nvkm_memx *);
54void nvkm_memx_train(struct nvkm_memx *);
55int  nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
56void nvkm_memx_block(struct nvkm_memx *);
57void nvkm_memx_unblock(struct nvkm_memx *);
58#endif