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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
4 *
5 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 */
7
8#include <linux/io.h>
9#include <linux/delay.h>
10#include <linux/interrupt.h>
11#include <linux/init.h>
12#include <linux/pci.h>
13#include <linux/slab.h>
14#include <linux/module.h>
15#include <linux/mutex.h>
16#include <sound/core.h>
17#include <sound/pcm.h>
18#include <sound/pcm_params.h>
19#include <sound/info.h>
20#include <sound/ac97_codec.h>
21#include <sound/initval.h>
22
23MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
24MODULE_DESCRIPTION("ATI IXP AC97 controller");
25MODULE_LICENSE("GPL");
26
27static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
28static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
29static int ac97_clock = 48000;
30static char *ac97_quirk;
31static bool spdif_aclink = 1;
32static int ac97_codec = -1;
33
34module_param(index, int, 0444);
35MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
36module_param(id, charp, 0444);
37MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
38module_param(ac97_clock, int, 0444);
39MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
40module_param(ac97_quirk, charp, 0444);
41MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
42module_param(ac97_codec, int, 0444);
43MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
44module_param(spdif_aclink, bool, 0444);
45MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
46
47/* just for backward compatibility */
48static bool enable;
49module_param(enable, bool, 0444);
50
51
52/*
53 */
54
55#define ATI_REG_ISR 0x00 /* interrupt source */
56#define ATI_REG_ISR_IN_XRUN (1U<<0)
57#define ATI_REG_ISR_IN_STATUS (1U<<1)
58#define ATI_REG_ISR_OUT_XRUN (1U<<2)
59#define ATI_REG_ISR_OUT_STATUS (1U<<3)
60#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
61#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
62#define ATI_REG_ISR_PHYS_INTR (1U<<8)
63#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
64#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
65#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
66#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
67#define ATI_REG_ISR_NEW_FRAME (1U<<13)
68
69#define ATI_REG_IER 0x04 /* interrupt enable */
70#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
71#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
72#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
73#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
74#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
75#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
76#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
77#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
78#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
79#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
80#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
81#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
82#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
83
84#define ATI_REG_CMD 0x08 /* command */
85#define ATI_REG_CMD_POWERDOWN (1U<<0)
86#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
87#define ATI_REG_CMD_SEND_EN (1U<<2)
88#define ATI_REG_CMD_STATUS_MEM (1U<<3)
89#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
90#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
91#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
92#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
93#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
94#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
95#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
96#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
97#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
98#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
99#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
100#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
101#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
102#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
103#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
104#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
105#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
106#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
107#define ATI_REG_CMD_PACKED_DIS (1U<<24)
108#define ATI_REG_CMD_BURST_EN (1U<<25)
109#define ATI_REG_CMD_PANIC_EN (1U<<26)
110#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
111#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
112#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
113#define ATI_REG_CMD_AC_SYNC (1U<<30)
114#define ATI_REG_CMD_AC_RESET (1U<<31)
115
116#define ATI_REG_PHYS_OUT_ADDR 0x0c
117#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
118#define ATI_REG_PHYS_OUT_RW (1U<<2)
119#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
120#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
121#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
122
123#define ATI_REG_PHYS_IN_ADDR 0x10
124#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
125#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
126#define ATI_REG_PHYS_IN_DATA_SHIFT 16
127
128#define ATI_REG_SLOTREQ 0x14
129
130#define ATI_REG_COUNTER 0x18
131#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
132#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
133
134#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
135
136#define ATI_REG_IN_DMA_LINKPTR 0x20
137#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
138#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
139#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
140#define ATI_REG_IN_DMA_DT_SIZE 0x30
141
142#define ATI_REG_OUT_DMA_SLOT 0x34
143#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
144#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
145#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
146#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
147
148#define ATI_REG_OUT_DMA_LINKPTR 0x38
149#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
150#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
151#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
152#define ATI_REG_OUT_DMA_DT_SIZE 0x48
153
154#define ATI_REG_SPDF_CMD 0x4c
155#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
156#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
157#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
158
159#define ATI_REG_SPDF_DMA_LINKPTR 0x50
160#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
161#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
162#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
163#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
164
165#define ATI_REG_MODEM_MIRROR 0x7c
166#define ATI_REG_AUDIO_MIRROR 0x80
167
168#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
169#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
170
171#define ATI_REG_FIFO_FLUSH 0x88
172#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
173#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
174
175/* LINKPTR */
176#define ATI_REG_LINKPTR_EN (1U<<0)
177
178/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
179#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
180#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
181#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
182#define ATI_REG_DMA_STATE (7U<<26)
183
184
185#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
186
187
188struct atiixp;
189
190/*
191 * DMA packate descriptor
192 */
193
194struct atiixp_dma_desc {
195 __le32 addr; /* DMA buffer address */
196 u16 status; /* status bits */
197 u16 size; /* size of the packet in dwords */
198 __le32 next; /* address of the next packet descriptor */
199};
200
201/*
202 * stream enum
203 */
204enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
205enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
206enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
207
208#define NUM_ATI_CODECS 3
209
210
211/*
212 * constants and callbacks for each DMA type
213 */
214struct atiixp_dma_ops {
215 int type; /* ATI_DMA_XXX */
216 unsigned int llp_offset; /* LINKPTR offset */
217 unsigned int dt_cur; /* DT_CUR offset */
218 /* called from open callback */
219 void (*enable_dma)(struct atiixp *chip, int on);
220 /* called from trigger (START/STOP) */
221 void (*enable_transfer)(struct atiixp *chip, int on);
222 /* called from trigger (STOP only) */
223 void (*flush_dma)(struct atiixp *chip);
224};
225
226/*
227 * DMA stream
228 */
229struct atiixp_dma {
230 const struct atiixp_dma_ops *ops;
231 struct snd_dma_buffer desc_buf;
232 struct snd_pcm_substream *substream; /* assigned PCM substream */
233 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
234 unsigned int period_bytes, periods;
235 int opened;
236 int running;
237 int suspended;
238 int pcm_open_flag;
239 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
240 unsigned int saved_curptr;
241};
242
243/*
244 * ATI IXP chip
245 */
246struct atiixp {
247 struct snd_card *card;
248 struct pci_dev *pci;
249
250 unsigned long addr;
251 void __iomem *remap_addr;
252 int irq;
253
254 struct snd_ac97_bus *ac97_bus;
255 struct snd_ac97 *ac97[NUM_ATI_CODECS];
256
257 spinlock_t reg_lock;
258
259 struct atiixp_dma dmas[NUM_ATI_DMAS];
260 struct ac97_pcm *pcms[NUM_ATI_PCMS];
261 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
262
263 int max_channels; /* max. channels for PCM out */
264
265 unsigned int codec_not_ready_bits; /* for codec detection */
266
267 int spdif_over_aclink; /* passed from the module option */
268 struct mutex open_mutex; /* playback open mutex */
269};
270
271
272/*
273 */
274static const struct pci_device_id snd_atiixp_ids[] = {
275 { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */
276 { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */
277 { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */
278 { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */
279 { 0, }
280};
281
282MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
283
284static const struct snd_pci_quirk atiixp_quirks[] = {
285 SND_PCI_QUIRK(0x105b, 0x0c81, "Foxconn RC4107MA-RS2", 0),
286 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
287 { } /* terminator */
288};
289
290/*
291 * lowlevel functions
292 */
293
294/*
295 * update the bits of the given register.
296 * return 1 if the bits changed.
297 */
298static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
299 unsigned int mask, unsigned int value)
300{
301 void __iomem *addr = chip->remap_addr + reg;
302 unsigned int data, old_data;
303 old_data = data = readl(addr);
304 data &= ~mask;
305 data |= value;
306 if (old_data == data)
307 return 0;
308 writel(data, addr);
309 return 1;
310}
311
312/*
313 * macros for easy use
314 */
315#define atiixp_write(chip,reg,value) \
316 writel(value, chip->remap_addr + ATI_REG_##reg)
317#define atiixp_read(chip,reg) \
318 readl(chip->remap_addr + ATI_REG_##reg)
319#define atiixp_update(chip,reg,mask,val) \
320 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
321
322/*
323 * handling DMA packets
324 *
325 * we allocate a linear buffer for the DMA, and split it to each packet.
326 * in a future version, a scatter-gather buffer should be implemented.
327 */
328
329#define ATI_DESC_LIST_SIZE \
330 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
331
332/*
333 * build packets ring for the given buffer size.
334 *
335 * IXP handles the buffer descriptors, which are connected as a linked
336 * list. although we can change the list dynamically, in this version,
337 * a static RING of buffer descriptors is used.
338 *
339 * the ring is built in this function, and is set up to the hardware.
340 */
341static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
342 struct snd_pcm_substream *substream,
343 unsigned int periods,
344 unsigned int period_bytes)
345{
346 unsigned int i;
347 u32 addr, desc_addr;
348 unsigned long flags;
349
350 if (periods > ATI_MAX_DESCRIPTORS)
351 return -ENOMEM;
352
353 if (dma->desc_buf.area == NULL) {
354 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
355 &chip->pci->dev,
356 ATI_DESC_LIST_SIZE,
357 &dma->desc_buf) < 0)
358 return -ENOMEM;
359 dma->period_bytes = dma->periods = 0; /* clear */
360 }
361
362 if (dma->periods == periods && dma->period_bytes == period_bytes)
363 return 0;
364
365 /* reset DMA before changing the descriptor table */
366 spin_lock_irqsave(&chip->reg_lock, flags);
367 writel(0, chip->remap_addr + dma->ops->llp_offset);
368 dma->ops->enable_dma(chip, 0);
369 dma->ops->enable_dma(chip, 1);
370 spin_unlock_irqrestore(&chip->reg_lock, flags);
371
372 /* fill the entries */
373 addr = (u32)substream->runtime->dma_addr;
374 desc_addr = (u32)dma->desc_buf.addr;
375 for (i = 0; i < periods; i++) {
376 struct atiixp_dma_desc *desc;
377 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
378 desc->addr = cpu_to_le32(addr);
379 desc->status = 0;
380 desc->size = period_bytes >> 2; /* in dwords */
381 desc_addr += sizeof(struct atiixp_dma_desc);
382 if (i == periods - 1)
383 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
384 else
385 desc->next = cpu_to_le32(desc_addr);
386 addr += period_bytes;
387 }
388
389 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
390 chip->remap_addr + dma->ops->llp_offset);
391
392 dma->period_bytes = period_bytes;
393 dma->periods = periods;
394
395 return 0;
396}
397
398/*
399 * remove the ring buffer and release it if assigned
400 */
401static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
402 struct snd_pcm_substream *substream)
403{
404 if (dma->desc_buf.area) {
405 writel(0, chip->remap_addr + dma->ops->llp_offset);
406 snd_dma_free_pages(&dma->desc_buf);
407 dma->desc_buf.area = NULL;
408 }
409}
410
411/*
412 * AC97 interface
413 */
414static int snd_atiixp_acquire_codec(struct atiixp *chip)
415{
416 int timeout = 1000;
417
418 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
419 if (! timeout--) {
420 dev_warn(chip->card->dev, "codec acquire timeout\n");
421 return -EBUSY;
422 }
423 udelay(1);
424 }
425 return 0;
426}
427
428static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
429{
430 unsigned int data;
431 int timeout;
432
433 if (snd_atiixp_acquire_codec(chip) < 0)
434 return 0xffff;
435 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
436 ATI_REG_PHYS_OUT_ADDR_EN |
437 ATI_REG_PHYS_OUT_RW |
438 codec;
439 atiixp_write(chip, PHYS_OUT_ADDR, data);
440 if (snd_atiixp_acquire_codec(chip) < 0)
441 return 0xffff;
442 timeout = 1000;
443 do {
444 data = atiixp_read(chip, PHYS_IN_ADDR);
445 if (data & ATI_REG_PHYS_IN_READ_FLAG)
446 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
447 udelay(1);
448 } while (--timeout);
449 /* time out may happen during reset */
450 if (reg < 0x7c)
451 dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg);
452 return 0xffff;
453}
454
455
456static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
457 unsigned short reg, unsigned short val)
458{
459 unsigned int data;
460
461 if (snd_atiixp_acquire_codec(chip) < 0)
462 return;
463 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
464 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
465 ATI_REG_PHYS_OUT_ADDR_EN | codec;
466 atiixp_write(chip, PHYS_OUT_ADDR, data);
467}
468
469
470static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
471 unsigned short reg)
472{
473 struct atiixp *chip = ac97->private_data;
474 return snd_atiixp_codec_read(chip, ac97->num, reg);
475
476}
477
478static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
479 unsigned short val)
480{
481 struct atiixp *chip = ac97->private_data;
482 snd_atiixp_codec_write(chip, ac97->num, reg, val);
483}
484
485/*
486 * reset AC link
487 */
488static int snd_atiixp_aclink_reset(struct atiixp *chip)
489{
490 int timeout;
491
492 /* reset powerdoewn */
493 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
494 udelay(10);
495
496 /* perform a software reset */
497 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
498 atiixp_read(chip, CMD);
499 udelay(10);
500 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
501
502 timeout = 10;
503 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
504 /* do a hard reset */
505 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
506 ATI_REG_CMD_AC_SYNC);
507 atiixp_read(chip, CMD);
508 mdelay(1);
509 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
510 if (!--timeout) {
511 dev_err(chip->card->dev, "codec reset timeout\n");
512 break;
513 }
514 }
515
516 /* deassert RESET and assert SYNC to make sure */
517 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
518 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
519
520 return 0;
521}
522
523#ifdef CONFIG_PM_SLEEP
524static int snd_atiixp_aclink_down(struct atiixp *chip)
525{
526 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
527 // return -EBUSY;
528 atiixp_update(chip, CMD,
529 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
530 ATI_REG_CMD_POWERDOWN);
531 return 0;
532}
533#endif
534
535/*
536 * auto-detection of codecs
537 *
538 * the IXP chip can generate interrupts for the non-existing codecs.
539 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
540 * even if all three codecs are connected.
541 */
542
543#define ALL_CODEC_NOT_READY \
544 (ATI_REG_ISR_CODEC0_NOT_READY |\
545 ATI_REG_ISR_CODEC1_NOT_READY |\
546 ATI_REG_ISR_CODEC2_NOT_READY)
547#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
548
549static int ac97_probing_bugs(struct pci_dev *pci)
550{
551 const struct snd_pci_quirk *q;
552
553 q = snd_pci_quirk_lookup(pci, atiixp_quirks);
554 if (q) {
555 dev_dbg(&pci->dev, "atiixp quirk for %s. Forcing codec %d\n",
556 snd_pci_quirk_name(q), q->value);
557 return q->value;
558 }
559 /* this hardware doesn't need workarounds. Probe for codec */
560 return -1;
561}
562
563static int snd_atiixp_codec_detect(struct atiixp *chip)
564{
565 int timeout;
566
567 chip->codec_not_ready_bits = 0;
568 if (ac97_codec == -1)
569 ac97_codec = ac97_probing_bugs(chip->pci);
570 if (ac97_codec >= 0) {
571 chip->codec_not_ready_bits |=
572 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
573 return 0;
574 }
575
576 atiixp_write(chip, IER, CODEC_CHECK_BITS);
577 /* wait for the interrupts */
578 timeout = 50;
579 while (timeout-- > 0) {
580 mdelay(1);
581 if (chip->codec_not_ready_bits)
582 break;
583 }
584 atiixp_write(chip, IER, 0); /* disable irqs */
585
586 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
587 dev_err(chip->card->dev, "no codec detected!\n");
588 return -ENXIO;
589 }
590 return 0;
591}
592
593
594/*
595 * enable DMA and irqs
596 */
597static int snd_atiixp_chip_start(struct atiixp *chip)
598{
599 unsigned int reg;
600
601 /* set up spdif, enable burst mode */
602 reg = atiixp_read(chip, CMD);
603 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
604 reg |= ATI_REG_CMD_BURST_EN;
605 atiixp_write(chip, CMD, reg);
606
607 reg = atiixp_read(chip, SPDF_CMD);
608 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
609 atiixp_write(chip, SPDF_CMD, reg);
610
611 /* clear all interrupt source */
612 atiixp_write(chip, ISR, 0xffffffff);
613 /* enable irqs */
614 atiixp_write(chip, IER,
615 ATI_REG_IER_IO_STATUS_EN |
616 ATI_REG_IER_IN_XRUN_EN |
617 ATI_REG_IER_OUT_XRUN_EN |
618 ATI_REG_IER_SPDF_XRUN_EN |
619 ATI_REG_IER_SPDF_STATUS_EN);
620 return 0;
621}
622
623
624/*
625 * disable DMA and IRQs
626 */
627static int snd_atiixp_chip_stop(struct atiixp *chip)
628{
629 /* clear interrupt source */
630 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
631 /* disable irqs */
632 atiixp_write(chip, IER, 0);
633 return 0;
634}
635
636
637/*
638 * PCM section
639 */
640
641/*
642 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
643 * position. when SG-buffer is implemented, the offset must be calculated
644 * correctly...
645 */
646static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
647{
648 struct atiixp *chip = snd_pcm_substream_chip(substream);
649 struct snd_pcm_runtime *runtime = substream->runtime;
650 struct atiixp_dma *dma = runtime->private_data;
651 unsigned int curptr;
652 int timeout = 1000;
653
654 while (timeout--) {
655 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
656 if (curptr < dma->buf_addr)
657 continue;
658 curptr -= dma->buf_addr;
659 if (curptr >= dma->buf_bytes)
660 continue;
661 return bytes_to_frames(runtime, curptr);
662 }
663 dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n",
664 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
665 return 0;
666}
667
668/*
669 * XRUN detected, and stop the PCM substream
670 */
671static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
672{
673 if (! dma->substream || ! dma->running)
674 return;
675 dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type);
676 snd_pcm_stop_xrun(dma->substream);
677}
678
679/*
680 * the period ack. update the substream.
681 */
682static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
683{
684 if (! dma->substream || ! dma->running)
685 return;
686 snd_pcm_period_elapsed(dma->substream);
687}
688
689/* set BUS_BUSY interrupt bit if any DMA is running */
690/* call with spinlock held */
691static void snd_atiixp_check_bus_busy(struct atiixp *chip)
692{
693 unsigned int bus_busy;
694 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
695 ATI_REG_CMD_RECEIVE_EN |
696 ATI_REG_CMD_SPDF_OUT_EN))
697 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
698 else
699 bus_busy = 0;
700 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
701}
702
703/* common trigger callback
704 * calling the lowlevel callbacks in it
705 */
706static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
707{
708 struct atiixp *chip = snd_pcm_substream_chip(substream);
709 struct atiixp_dma *dma = substream->runtime->private_data;
710 int err = 0;
711
712 if (snd_BUG_ON(!dma->ops->enable_transfer ||
713 !dma->ops->flush_dma))
714 return -EINVAL;
715
716 spin_lock(&chip->reg_lock);
717 switch (cmd) {
718 case SNDRV_PCM_TRIGGER_START:
719 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
720 case SNDRV_PCM_TRIGGER_RESUME:
721 if (dma->running && dma->suspended &&
722 cmd == SNDRV_PCM_TRIGGER_RESUME)
723 writel(dma->saved_curptr, chip->remap_addr +
724 dma->ops->dt_cur);
725 dma->ops->enable_transfer(chip, 1);
726 dma->running = 1;
727 dma->suspended = 0;
728 break;
729 case SNDRV_PCM_TRIGGER_STOP:
730 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
731 case SNDRV_PCM_TRIGGER_SUSPEND:
732 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
733 if (dma->running && dma->suspended)
734 dma->saved_curptr = readl(chip->remap_addr +
735 dma->ops->dt_cur);
736 dma->ops->enable_transfer(chip, 0);
737 dma->running = 0;
738 break;
739 default:
740 err = -EINVAL;
741 break;
742 }
743 if (! err) {
744 snd_atiixp_check_bus_busy(chip);
745 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
746 dma->ops->flush_dma(chip);
747 snd_atiixp_check_bus_busy(chip);
748 }
749 }
750 spin_unlock(&chip->reg_lock);
751 return err;
752}
753
754
755/*
756 * lowlevel callbacks for each DMA type
757 *
758 * every callback is supposed to be called in chip->reg_lock spinlock
759 */
760
761/* flush FIFO of analog OUT DMA */
762static void atiixp_out_flush_dma(struct atiixp *chip)
763{
764 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
765}
766
767/* enable/disable analog OUT DMA */
768static void atiixp_out_enable_dma(struct atiixp *chip, int on)
769{
770 unsigned int data;
771 data = atiixp_read(chip, CMD);
772 if (on) {
773 if (data & ATI_REG_CMD_OUT_DMA_EN)
774 return;
775 atiixp_out_flush_dma(chip);
776 data |= ATI_REG_CMD_OUT_DMA_EN;
777 } else
778 data &= ~ATI_REG_CMD_OUT_DMA_EN;
779 atiixp_write(chip, CMD, data);
780}
781
782/* start/stop transfer over OUT DMA */
783static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
784{
785 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
786 on ? ATI_REG_CMD_SEND_EN : 0);
787}
788
789/* enable/disable analog IN DMA */
790static void atiixp_in_enable_dma(struct atiixp *chip, int on)
791{
792 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
793 on ? ATI_REG_CMD_IN_DMA_EN : 0);
794}
795
796/* start/stop analog IN DMA */
797static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
798{
799 if (on) {
800 unsigned int data = atiixp_read(chip, CMD);
801 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
802 data |= ATI_REG_CMD_RECEIVE_EN;
803#if 0 /* FIXME: this causes the endless loop */
804 /* wait until slot 3/4 are finished */
805 while ((atiixp_read(chip, COUNTER) &
806 ATI_REG_COUNTER_SLOT) != 5)
807 ;
808#endif
809 atiixp_write(chip, CMD, data);
810 }
811 } else
812 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
813}
814
815/* flush FIFO of analog IN DMA */
816static void atiixp_in_flush_dma(struct atiixp *chip)
817{
818 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
819}
820
821/* enable/disable SPDIF OUT DMA */
822static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
823{
824 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
825 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
826}
827
828/* start/stop SPDIF OUT DMA */
829static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
830{
831 unsigned int data;
832 data = atiixp_read(chip, CMD);
833 if (on)
834 data |= ATI_REG_CMD_SPDF_OUT_EN;
835 else
836 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
837 atiixp_write(chip, CMD, data);
838}
839
840/* flush FIFO of SPDIF OUT DMA */
841static void atiixp_spdif_flush_dma(struct atiixp *chip)
842{
843 int timeout;
844
845 /* DMA off, transfer on */
846 atiixp_spdif_enable_dma(chip, 0);
847 atiixp_spdif_enable_transfer(chip, 1);
848
849 timeout = 100;
850 do {
851 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
852 break;
853 udelay(1);
854 } while (timeout-- > 0);
855
856 atiixp_spdif_enable_transfer(chip, 0);
857}
858
859/* set up slots and formats for SPDIF OUT */
860static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
861{
862 struct atiixp *chip = snd_pcm_substream_chip(substream);
863
864 spin_lock_irq(&chip->reg_lock);
865 if (chip->spdif_over_aclink) {
866 unsigned int data;
867 /* enable slots 10/11 */
868 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
869 ATI_REG_CMD_SPDF_CONFIG_01);
870 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
871 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
872 ATI_REG_OUT_DMA_SLOT_BIT(11);
873 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
874 atiixp_write(chip, OUT_DMA_SLOT, data);
875 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
876 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
877 ATI_REG_CMD_INTERLEAVE_OUT : 0);
878 } else {
879 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
880 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
881 }
882 spin_unlock_irq(&chip->reg_lock);
883 return 0;
884}
885
886/* set up slots and formats for analog OUT */
887static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
888{
889 struct atiixp *chip = snd_pcm_substream_chip(substream);
890 unsigned int data;
891
892 spin_lock_irq(&chip->reg_lock);
893 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
894 switch (substream->runtime->channels) {
895 case 8:
896 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
897 ATI_REG_OUT_DMA_SLOT_BIT(11);
898 fallthrough;
899 case 6:
900 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
901 ATI_REG_OUT_DMA_SLOT_BIT(8);
902 fallthrough;
903 case 4:
904 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
905 ATI_REG_OUT_DMA_SLOT_BIT(9);
906 fallthrough;
907 default:
908 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
909 ATI_REG_OUT_DMA_SLOT_BIT(4);
910 break;
911 }
912
913 /* set output threshold */
914 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
915 atiixp_write(chip, OUT_DMA_SLOT, data);
916
917 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
918 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
919 ATI_REG_CMD_INTERLEAVE_OUT : 0);
920
921 /*
922 * enable 6 channel re-ordering bit if needed
923 */
924 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
925 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
926
927 spin_unlock_irq(&chip->reg_lock);
928 return 0;
929}
930
931/* set up slots and formats for analog IN */
932static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
933{
934 struct atiixp *chip = snd_pcm_substream_chip(substream);
935
936 spin_lock_irq(&chip->reg_lock);
937 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
938 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
939 ATI_REG_CMD_INTERLEAVE_IN : 0);
940 spin_unlock_irq(&chip->reg_lock);
941 return 0;
942}
943
944/*
945 * hw_params - allocate the buffer and set up buffer descriptors
946 */
947static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
948 struct snd_pcm_hw_params *hw_params)
949{
950 struct atiixp *chip = snd_pcm_substream_chip(substream);
951 struct atiixp_dma *dma = substream->runtime->private_data;
952 int err;
953
954 dma->buf_addr = substream->runtime->dma_addr;
955 dma->buf_bytes = params_buffer_bytes(hw_params);
956
957 err = atiixp_build_dma_packets(chip, dma, substream,
958 params_periods(hw_params),
959 params_period_bytes(hw_params));
960 if (err < 0)
961 return err;
962
963 if (dma->ac97_pcm_type >= 0) {
964 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
965 /* PCM is bound to AC97 codec(s)
966 * set up the AC97 codecs
967 */
968 if (dma->pcm_open_flag) {
969 snd_ac97_pcm_close(pcm);
970 dma->pcm_open_flag = 0;
971 }
972 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
973 params_channels(hw_params),
974 pcm->r[0].slots);
975 if (err >= 0)
976 dma->pcm_open_flag = 1;
977 }
978
979 return err;
980}
981
982static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
983{
984 struct atiixp *chip = snd_pcm_substream_chip(substream);
985 struct atiixp_dma *dma = substream->runtime->private_data;
986
987 if (dma->pcm_open_flag) {
988 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
989 snd_ac97_pcm_close(pcm);
990 dma->pcm_open_flag = 0;
991 }
992 atiixp_clear_dma_packets(chip, dma, substream);
993 return 0;
994}
995
996
997/*
998 * pcm hardware definition, identical for all DMA types
999 */
1000static const struct snd_pcm_hardware snd_atiixp_pcm_hw =
1001{
1002 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1003 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1004 SNDRV_PCM_INFO_PAUSE |
1005 SNDRV_PCM_INFO_RESUME |
1006 SNDRV_PCM_INFO_MMAP_VALID),
1007 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1008 .rates = SNDRV_PCM_RATE_48000,
1009 .rate_min = 48000,
1010 .rate_max = 48000,
1011 .channels_min = 2,
1012 .channels_max = 2,
1013 .buffer_bytes_max = 256 * 1024,
1014 .period_bytes_min = 32,
1015 .period_bytes_max = 128 * 1024,
1016 .periods_min = 2,
1017 .periods_max = ATI_MAX_DESCRIPTORS,
1018};
1019
1020static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1021 struct atiixp_dma *dma, int pcm_type)
1022{
1023 struct atiixp *chip = snd_pcm_substream_chip(substream);
1024 struct snd_pcm_runtime *runtime = substream->runtime;
1025 int err;
1026
1027 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1028 return -EINVAL;
1029
1030 if (dma->opened)
1031 return -EBUSY;
1032 dma->substream = substream;
1033 runtime->hw = snd_atiixp_pcm_hw;
1034 dma->ac97_pcm_type = pcm_type;
1035 if (pcm_type >= 0) {
1036 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1037 snd_pcm_limit_hw_rates(runtime);
1038 } else {
1039 /* direct SPDIF */
1040 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1041 }
1042 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
1043 if (err < 0)
1044 return err;
1045 runtime->private_data = dma;
1046
1047 /* enable DMA bits */
1048 spin_lock_irq(&chip->reg_lock);
1049 dma->ops->enable_dma(chip, 1);
1050 spin_unlock_irq(&chip->reg_lock);
1051 dma->opened = 1;
1052
1053 return 0;
1054}
1055
1056static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1057 struct atiixp_dma *dma)
1058{
1059 struct atiixp *chip = snd_pcm_substream_chip(substream);
1060 /* disable DMA bits */
1061 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1062 return -EINVAL;
1063 spin_lock_irq(&chip->reg_lock);
1064 dma->ops->enable_dma(chip, 0);
1065 spin_unlock_irq(&chip->reg_lock);
1066 dma->substream = NULL;
1067 dma->opened = 0;
1068 return 0;
1069}
1070
1071/*
1072 */
1073static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1074{
1075 struct atiixp *chip = snd_pcm_substream_chip(substream);
1076 int err;
1077
1078 mutex_lock(&chip->open_mutex);
1079 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1080 mutex_unlock(&chip->open_mutex);
1081 if (err < 0)
1082 return err;
1083 substream->runtime->hw.channels_max = chip->max_channels;
1084 if (chip->max_channels > 2)
1085 /* channels must be even */
1086 snd_pcm_hw_constraint_step(substream->runtime, 0,
1087 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1088 return 0;
1089}
1090
1091static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1092{
1093 struct atiixp *chip = snd_pcm_substream_chip(substream);
1094 int err;
1095 mutex_lock(&chip->open_mutex);
1096 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1097 mutex_unlock(&chip->open_mutex);
1098 return err;
1099}
1100
1101static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1102{
1103 struct atiixp *chip = snd_pcm_substream_chip(substream);
1104 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1105}
1106
1107static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1108{
1109 struct atiixp *chip = snd_pcm_substream_chip(substream);
1110 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1111}
1112
1113static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1114{
1115 struct atiixp *chip = snd_pcm_substream_chip(substream);
1116 int err;
1117 mutex_lock(&chip->open_mutex);
1118 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1119 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1120 else
1121 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1122 mutex_unlock(&chip->open_mutex);
1123 return err;
1124}
1125
1126static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1127{
1128 struct atiixp *chip = snd_pcm_substream_chip(substream);
1129 int err;
1130 mutex_lock(&chip->open_mutex);
1131 if (chip->spdif_over_aclink)
1132 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1133 else
1134 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1135 mutex_unlock(&chip->open_mutex);
1136 return err;
1137}
1138
1139/* AC97 playback */
1140static const struct snd_pcm_ops snd_atiixp_playback_ops = {
1141 .open = snd_atiixp_playback_open,
1142 .close = snd_atiixp_playback_close,
1143 .hw_params = snd_atiixp_pcm_hw_params,
1144 .hw_free = snd_atiixp_pcm_hw_free,
1145 .prepare = snd_atiixp_playback_prepare,
1146 .trigger = snd_atiixp_pcm_trigger,
1147 .pointer = snd_atiixp_pcm_pointer,
1148};
1149
1150/* AC97 capture */
1151static const struct snd_pcm_ops snd_atiixp_capture_ops = {
1152 .open = snd_atiixp_capture_open,
1153 .close = snd_atiixp_capture_close,
1154 .hw_params = snd_atiixp_pcm_hw_params,
1155 .hw_free = snd_atiixp_pcm_hw_free,
1156 .prepare = snd_atiixp_capture_prepare,
1157 .trigger = snd_atiixp_pcm_trigger,
1158 .pointer = snd_atiixp_pcm_pointer,
1159};
1160
1161/* SPDIF playback */
1162static const struct snd_pcm_ops snd_atiixp_spdif_ops = {
1163 .open = snd_atiixp_spdif_open,
1164 .close = snd_atiixp_spdif_close,
1165 .hw_params = snd_atiixp_pcm_hw_params,
1166 .hw_free = snd_atiixp_pcm_hw_free,
1167 .prepare = snd_atiixp_spdif_prepare,
1168 .trigger = snd_atiixp_pcm_trigger,
1169 .pointer = snd_atiixp_pcm_pointer,
1170};
1171
1172static const struct ac97_pcm atiixp_pcm_defs[] = {
1173 /* front PCM */
1174 {
1175 .exclusive = 1,
1176 .r = { {
1177 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1178 (1 << AC97_SLOT_PCM_RIGHT) |
1179 (1 << AC97_SLOT_PCM_CENTER) |
1180 (1 << AC97_SLOT_PCM_SLEFT) |
1181 (1 << AC97_SLOT_PCM_SRIGHT) |
1182 (1 << AC97_SLOT_LFE)
1183 }
1184 }
1185 },
1186 /* PCM IN #1 */
1187 {
1188 .stream = 1,
1189 .exclusive = 1,
1190 .r = { {
1191 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1192 (1 << AC97_SLOT_PCM_RIGHT)
1193 }
1194 }
1195 },
1196 /* S/PDIF OUT (optional) */
1197 {
1198 .exclusive = 1,
1199 .spdif = 1,
1200 .r = { {
1201 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1202 (1 << AC97_SLOT_SPDIF_RIGHT2)
1203 }
1204 }
1205 },
1206};
1207
1208static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1209 .type = ATI_DMA_PLAYBACK,
1210 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1211 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1212 .enable_dma = atiixp_out_enable_dma,
1213 .enable_transfer = atiixp_out_enable_transfer,
1214 .flush_dma = atiixp_out_flush_dma,
1215};
1216
1217static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1218 .type = ATI_DMA_CAPTURE,
1219 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1220 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1221 .enable_dma = atiixp_in_enable_dma,
1222 .enable_transfer = atiixp_in_enable_transfer,
1223 .flush_dma = atiixp_in_flush_dma,
1224};
1225
1226static const struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1227 .type = ATI_DMA_SPDIF,
1228 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1229 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1230 .enable_dma = atiixp_spdif_enable_dma,
1231 .enable_transfer = atiixp_spdif_enable_transfer,
1232 .flush_dma = atiixp_spdif_flush_dma,
1233};
1234
1235
1236static int snd_atiixp_pcm_new(struct atiixp *chip)
1237{
1238 struct snd_pcm *pcm;
1239 struct snd_pcm_chmap *chmap;
1240 struct snd_ac97_bus *pbus = chip->ac97_bus;
1241 int err, i, num_pcms;
1242
1243 /* initialize constants */
1244 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1245 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1246 if (! chip->spdif_over_aclink)
1247 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1248
1249 /* assign AC97 pcm */
1250 if (chip->spdif_over_aclink)
1251 num_pcms = 3;
1252 else
1253 num_pcms = 2;
1254 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1255 if (err < 0)
1256 return err;
1257 for (i = 0; i < num_pcms; i++)
1258 chip->pcms[i] = &pbus->pcms[i];
1259
1260 chip->max_channels = 2;
1261 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1262 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1263 chip->max_channels = 6;
1264 else
1265 chip->max_channels = 4;
1266 }
1267
1268 /* PCM #0: analog I/O */
1269 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1270 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1271 if (err < 0)
1272 return err;
1273 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1274 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1275 pcm->private_data = chip;
1276 strcpy(pcm->name, "ATI IXP AC97");
1277 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1278
1279 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1280 &chip->pci->dev, 64*1024, 128*1024);
1281
1282 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1283 snd_pcm_alt_chmaps, chip->max_channels, 0,
1284 &chmap);
1285 if (err < 0)
1286 return err;
1287 chmap->channel_mask = SND_PCM_CHMAP_MASK_2468;
1288 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1289
1290 /* no SPDIF support on codec? */
1291 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1292 return 0;
1293
1294 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1295 if (chip->pcms[ATI_PCM_SPDIF])
1296 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1297
1298 /* PCM #1: spdif playback */
1299 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1300 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1301 if (err < 0)
1302 return err;
1303 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1304 pcm->private_data = chip;
1305 if (chip->spdif_over_aclink)
1306 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1307 else
1308 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1309 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1310
1311 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1312 &chip->pci->dev, 64*1024, 128*1024);
1313
1314 /* pre-select AC97 SPDIF slots 10/11 */
1315 for (i = 0; i < NUM_ATI_CODECS; i++) {
1316 if (chip->ac97[i])
1317 snd_ac97_update_bits(chip->ac97[i],
1318 AC97_EXTENDED_STATUS,
1319 0x03 << 4, 0x03 << 4);
1320 }
1321
1322 return 0;
1323}
1324
1325
1326
1327/*
1328 * interrupt handler
1329 */
1330static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1331{
1332 struct atiixp *chip = dev_id;
1333 unsigned int status;
1334
1335 status = atiixp_read(chip, ISR);
1336
1337 if (! status)
1338 return IRQ_NONE;
1339
1340 /* process audio DMA */
1341 if (status & ATI_REG_ISR_OUT_XRUN)
1342 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1343 else if (status & ATI_REG_ISR_OUT_STATUS)
1344 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1345 if (status & ATI_REG_ISR_IN_XRUN)
1346 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1347 else if (status & ATI_REG_ISR_IN_STATUS)
1348 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1349 if (! chip->spdif_over_aclink) {
1350 if (status & ATI_REG_ISR_SPDF_XRUN)
1351 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1352 else if (status & ATI_REG_ISR_SPDF_STATUS)
1353 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1354 }
1355
1356 /* for codec detection */
1357 if (status & CODEC_CHECK_BITS) {
1358 unsigned int detected;
1359 detected = status & CODEC_CHECK_BITS;
1360 spin_lock(&chip->reg_lock);
1361 chip->codec_not_ready_bits |= detected;
1362 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1363 spin_unlock(&chip->reg_lock);
1364 }
1365
1366 /* ack */
1367 atiixp_write(chip, ISR, status);
1368
1369 return IRQ_HANDLED;
1370}
1371
1372
1373/*
1374 * ac97 mixer section
1375 */
1376
1377static const struct ac97_quirk ac97_quirks[] = {
1378 {
1379 .subvendor = 0x103c,
1380 .subdevice = 0x006b,
1381 .name = "HP Pavilion ZV5030US",
1382 .type = AC97_TUNE_MUTE_LED
1383 },
1384 {
1385 .subvendor = 0x103c,
1386 .subdevice = 0x308b,
1387 .name = "HP nx6125",
1388 .type = AC97_TUNE_MUTE_LED
1389 },
1390 {
1391 .subvendor = 0x103c,
1392 .subdevice = 0x3091,
1393 .name = "unknown HP",
1394 .type = AC97_TUNE_MUTE_LED
1395 },
1396 { } /* terminator */
1397};
1398
1399static int snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1400 const char *quirk_override)
1401{
1402 struct snd_ac97_bus *pbus;
1403 struct snd_ac97_template ac97;
1404 int i, err;
1405 int codec_count;
1406 static const struct snd_ac97_bus_ops ops = {
1407 .write = snd_atiixp_ac97_write,
1408 .read = snd_atiixp_ac97_read,
1409 };
1410 static const unsigned int codec_skip[NUM_ATI_CODECS] = {
1411 ATI_REG_ISR_CODEC0_NOT_READY,
1412 ATI_REG_ISR_CODEC1_NOT_READY,
1413 ATI_REG_ISR_CODEC2_NOT_READY,
1414 };
1415
1416 if (snd_atiixp_codec_detect(chip) < 0)
1417 return -ENXIO;
1418
1419 err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus);
1420 if (err < 0)
1421 return err;
1422 pbus->clock = clock;
1423 chip->ac97_bus = pbus;
1424
1425 codec_count = 0;
1426 for (i = 0; i < NUM_ATI_CODECS; i++) {
1427 if (chip->codec_not_ready_bits & codec_skip[i])
1428 continue;
1429 memset(&ac97, 0, sizeof(ac97));
1430 ac97.private_data = chip;
1431 ac97.pci = chip->pci;
1432 ac97.num = i;
1433 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1434 if (! chip->spdif_over_aclink)
1435 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1436 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i]);
1437 if (err < 0) {
1438 chip->ac97[i] = NULL; /* to be sure */
1439 dev_dbg(chip->card->dev,
1440 "codec %d not available for audio\n", i);
1441 continue;
1442 }
1443 codec_count++;
1444 }
1445
1446 if (! codec_count) {
1447 dev_err(chip->card->dev, "no codec available\n");
1448 return -ENODEV;
1449 }
1450
1451 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1452
1453 return 0;
1454}
1455
1456
1457#ifdef CONFIG_PM_SLEEP
1458/*
1459 * power management
1460 */
1461static int snd_atiixp_suspend(struct device *dev)
1462{
1463 struct snd_card *card = dev_get_drvdata(dev);
1464 struct atiixp *chip = card->private_data;
1465 int i;
1466
1467 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1468 for (i = 0; i < NUM_ATI_CODECS; i++)
1469 snd_ac97_suspend(chip->ac97[i]);
1470 snd_atiixp_aclink_down(chip);
1471 snd_atiixp_chip_stop(chip);
1472 return 0;
1473}
1474
1475static int snd_atiixp_resume(struct device *dev)
1476{
1477 struct snd_card *card = dev_get_drvdata(dev);
1478 struct atiixp *chip = card->private_data;
1479 int i;
1480
1481 snd_atiixp_aclink_reset(chip);
1482 snd_atiixp_chip_start(chip);
1483
1484 for (i = 0; i < NUM_ATI_CODECS; i++)
1485 snd_ac97_resume(chip->ac97[i]);
1486
1487 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1488 if (chip->pcmdevs[i]) {
1489 struct atiixp_dma *dma = &chip->dmas[i];
1490 if (dma->substream && dma->suspended) {
1491 dma->ops->enable_dma(chip, 1);
1492 dma->substream->ops->prepare(dma->substream);
1493 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1494 chip->remap_addr + dma->ops->llp_offset);
1495 }
1496 }
1497
1498 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1499 return 0;
1500}
1501
1502static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume);
1503#define SND_ATIIXP_PM_OPS &snd_atiixp_pm
1504#else
1505#define SND_ATIIXP_PM_OPS NULL
1506#endif /* CONFIG_PM_SLEEP */
1507
1508
1509/*
1510 * proc interface for register dump
1511 */
1512
1513static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1514 struct snd_info_buffer *buffer)
1515{
1516 struct atiixp *chip = entry->private_data;
1517 int i;
1518
1519 for (i = 0; i < 256; i += 4)
1520 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1521}
1522
1523static void snd_atiixp_proc_init(struct atiixp *chip)
1524{
1525 snd_card_ro_proc_new(chip->card, "atiixp", chip, snd_atiixp_proc_read);
1526}
1527
1528
1529/*
1530 * destructor
1531 */
1532
1533static int snd_atiixp_free(struct atiixp *chip)
1534{
1535 if (chip->irq < 0)
1536 goto __hw_end;
1537 snd_atiixp_chip_stop(chip);
1538
1539 __hw_end:
1540 if (chip->irq >= 0)
1541 free_irq(chip->irq, chip);
1542 iounmap(chip->remap_addr);
1543 pci_release_regions(chip->pci);
1544 pci_disable_device(chip->pci);
1545 kfree(chip);
1546 return 0;
1547}
1548
1549static int snd_atiixp_dev_free(struct snd_device *device)
1550{
1551 struct atiixp *chip = device->device_data;
1552 return snd_atiixp_free(chip);
1553}
1554
1555/*
1556 * constructor for chip instance
1557 */
1558static int snd_atiixp_create(struct snd_card *card,
1559 struct pci_dev *pci,
1560 struct atiixp **r_chip)
1561{
1562 static const struct snd_device_ops ops = {
1563 .dev_free = snd_atiixp_dev_free,
1564 };
1565 struct atiixp *chip;
1566 int err;
1567
1568 err = pci_enable_device(pci);
1569 if (err < 0)
1570 return err;
1571
1572 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1573 if (chip == NULL) {
1574 pci_disable_device(pci);
1575 return -ENOMEM;
1576 }
1577
1578 spin_lock_init(&chip->reg_lock);
1579 mutex_init(&chip->open_mutex);
1580 chip->card = card;
1581 chip->pci = pci;
1582 chip->irq = -1;
1583 err = pci_request_regions(pci, "ATI IXP AC97");
1584 if (err < 0) {
1585 pci_disable_device(pci);
1586 kfree(chip);
1587 return err;
1588 }
1589 chip->addr = pci_resource_start(pci, 0);
1590 chip->remap_addr = pci_ioremap_bar(pci, 0);
1591 if (chip->remap_addr == NULL) {
1592 dev_err(card->dev, "AC'97 space ioremap problem\n");
1593 snd_atiixp_free(chip);
1594 return -EIO;
1595 }
1596
1597 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
1598 KBUILD_MODNAME, chip)) {
1599 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1600 snd_atiixp_free(chip);
1601 return -EBUSY;
1602 }
1603 chip->irq = pci->irq;
1604 card->sync_irq = chip->irq;
1605 pci_set_master(pci);
1606
1607 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1608 if (err < 0) {
1609 snd_atiixp_free(chip);
1610 return err;
1611 }
1612
1613 *r_chip = chip;
1614 return 0;
1615}
1616
1617
1618static int snd_atiixp_probe(struct pci_dev *pci,
1619 const struct pci_device_id *pci_id)
1620{
1621 struct snd_card *card;
1622 struct atiixp *chip;
1623 int err;
1624
1625 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
1626 if (err < 0)
1627 return err;
1628
1629 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1630 strcpy(card->shortname, "ATI IXP");
1631 err = snd_atiixp_create(card, pci, &chip);
1632 if (err < 0)
1633 goto __error;
1634 card->private_data = chip;
1635
1636 err = snd_atiixp_aclink_reset(chip);
1637 if (err < 0)
1638 goto __error;
1639
1640 chip->spdif_over_aclink = spdif_aclink;
1641
1642 err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk);
1643 if (err < 0)
1644 goto __error;
1645
1646 err = snd_atiixp_pcm_new(chip);
1647 if (err < 0)
1648 goto __error;
1649
1650 snd_atiixp_proc_init(chip);
1651
1652 snd_atiixp_chip_start(chip);
1653
1654 snprintf(card->longname, sizeof(card->longname),
1655 "%s rev %x with %s at %#lx, irq %i", card->shortname,
1656 pci->revision,
1657 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1658 chip->addr, chip->irq);
1659
1660 err = snd_card_register(card);
1661 if (err < 0)
1662 goto __error;
1663
1664 pci_set_drvdata(pci, card);
1665 return 0;
1666
1667 __error:
1668 snd_card_free(card);
1669 return err;
1670}
1671
1672static void snd_atiixp_remove(struct pci_dev *pci)
1673{
1674 snd_card_free(pci_get_drvdata(pci));
1675}
1676
1677static struct pci_driver atiixp_driver = {
1678 .name = KBUILD_MODNAME,
1679 .id_table = snd_atiixp_ids,
1680 .probe = snd_atiixp_probe,
1681 .remove = snd_atiixp_remove,
1682 .driver = {
1683 .pm = SND_ATIIXP_PM_OPS,
1684 },
1685};
1686
1687module_pci_driver(atiixp_driver);
1/*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <asm/io.h>
23#include <linux/delay.h>
24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/pci.h>
27#include <linux/slab.h>
28#include <linux/module.h>
29#include <linux/mutex.h>
30#include <sound/core.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/info.h>
34#include <sound/ac97_codec.h>
35#include <sound/initval.h>
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("ATI IXP AC97 controller");
39MODULE_LICENSE("GPL");
40MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}");
41
42static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
44static int ac97_clock = 48000;
45static char *ac97_quirk;
46static bool spdif_aclink = 1;
47static int ac97_codec = -1;
48
49module_param(index, int, 0444);
50MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
51module_param(id, charp, 0444);
52MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
53module_param(ac97_clock, int, 0444);
54MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
55module_param(ac97_quirk, charp, 0444);
56MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
57module_param(ac97_codec, int, 0444);
58MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
59module_param(spdif_aclink, bool, 0444);
60MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
61
62/* just for backward compatibility */
63static bool enable;
64module_param(enable, bool, 0444);
65
66
67/*
68 */
69
70#define ATI_REG_ISR 0x00 /* interrupt source */
71#define ATI_REG_ISR_IN_XRUN (1U<<0)
72#define ATI_REG_ISR_IN_STATUS (1U<<1)
73#define ATI_REG_ISR_OUT_XRUN (1U<<2)
74#define ATI_REG_ISR_OUT_STATUS (1U<<3)
75#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
76#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
77#define ATI_REG_ISR_PHYS_INTR (1U<<8)
78#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
79#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
80#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
81#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
82#define ATI_REG_ISR_NEW_FRAME (1U<<13)
83
84#define ATI_REG_IER 0x04 /* interrupt enable */
85#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
86#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
87#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
88#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
89#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
90#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
91#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
92#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
93#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
94#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
95#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
96#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
97#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
98
99#define ATI_REG_CMD 0x08 /* command */
100#define ATI_REG_CMD_POWERDOWN (1U<<0)
101#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
102#define ATI_REG_CMD_SEND_EN (1U<<2)
103#define ATI_REG_CMD_STATUS_MEM (1U<<3)
104#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
105#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
106#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
107#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
108#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
109#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
110#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
111#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
112#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
113#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
114#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
115#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
116#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
117#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
118#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
119#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
120#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
121#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
122#define ATI_REG_CMD_PACKED_DIS (1U<<24)
123#define ATI_REG_CMD_BURST_EN (1U<<25)
124#define ATI_REG_CMD_PANIC_EN (1U<<26)
125#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
126#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
127#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
128#define ATI_REG_CMD_AC_SYNC (1U<<30)
129#define ATI_REG_CMD_AC_RESET (1U<<31)
130
131#define ATI_REG_PHYS_OUT_ADDR 0x0c
132#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
133#define ATI_REG_PHYS_OUT_RW (1U<<2)
134#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
135#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
136#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
137
138#define ATI_REG_PHYS_IN_ADDR 0x10
139#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
140#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
141#define ATI_REG_PHYS_IN_DATA_SHIFT 16
142
143#define ATI_REG_SLOTREQ 0x14
144
145#define ATI_REG_COUNTER 0x18
146#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
147#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
148
149#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
150
151#define ATI_REG_IN_DMA_LINKPTR 0x20
152#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
153#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
154#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
155#define ATI_REG_IN_DMA_DT_SIZE 0x30
156
157#define ATI_REG_OUT_DMA_SLOT 0x34
158#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
159#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
160#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
161#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
162
163#define ATI_REG_OUT_DMA_LINKPTR 0x38
164#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
165#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
166#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
167#define ATI_REG_OUT_DMA_DT_SIZE 0x48
168
169#define ATI_REG_SPDF_CMD 0x4c
170#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
171#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
172#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
173
174#define ATI_REG_SPDF_DMA_LINKPTR 0x50
175#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
176#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
177#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
178#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
179
180#define ATI_REG_MODEM_MIRROR 0x7c
181#define ATI_REG_AUDIO_MIRROR 0x80
182
183#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
184#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
185
186#define ATI_REG_FIFO_FLUSH 0x88
187#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
188#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
189
190/* LINKPTR */
191#define ATI_REG_LINKPTR_EN (1U<<0)
192
193/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
194#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
195#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
196#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
197#define ATI_REG_DMA_STATE (7U<<26)
198
199
200#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
201
202
203struct atiixp;
204
205/*
206 * DMA packate descriptor
207 */
208
209struct atiixp_dma_desc {
210 u32 addr; /* DMA buffer address */
211 u16 status; /* status bits */
212 u16 size; /* size of the packet in dwords */
213 u32 next; /* address of the next packet descriptor */
214};
215
216/*
217 * stream enum
218 */
219enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
220enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
221enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
222
223#define NUM_ATI_CODECS 3
224
225
226/*
227 * constants and callbacks for each DMA type
228 */
229struct atiixp_dma_ops {
230 int type; /* ATI_DMA_XXX */
231 unsigned int llp_offset; /* LINKPTR offset */
232 unsigned int dt_cur; /* DT_CUR offset */
233 /* called from open callback */
234 void (*enable_dma)(struct atiixp *chip, int on);
235 /* called from trigger (START/STOP) */
236 void (*enable_transfer)(struct atiixp *chip, int on);
237 /* called from trigger (STOP only) */
238 void (*flush_dma)(struct atiixp *chip);
239};
240
241/*
242 * DMA stream
243 */
244struct atiixp_dma {
245 const struct atiixp_dma_ops *ops;
246 struct snd_dma_buffer desc_buf;
247 struct snd_pcm_substream *substream; /* assigned PCM substream */
248 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
249 unsigned int period_bytes, periods;
250 int opened;
251 int running;
252 int suspended;
253 int pcm_open_flag;
254 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
255 unsigned int saved_curptr;
256};
257
258/*
259 * ATI IXP chip
260 */
261struct atiixp {
262 struct snd_card *card;
263 struct pci_dev *pci;
264
265 unsigned long addr;
266 void __iomem *remap_addr;
267 int irq;
268
269 struct snd_ac97_bus *ac97_bus;
270 struct snd_ac97 *ac97[NUM_ATI_CODECS];
271
272 spinlock_t reg_lock;
273
274 struct atiixp_dma dmas[NUM_ATI_DMAS];
275 struct ac97_pcm *pcms[NUM_ATI_PCMS];
276 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
277
278 int max_channels; /* max. channels for PCM out */
279
280 unsigned int codec_not_ready_bits; /* for codec detection */
281
282 int spdif_over_aclink; /* passed from the module option */
283 struct mutex open_mutex; /* playback open mutex */
284};
285
286
287/*
288 */
289static DEFINE_PCI_DEVICE_TABLE(snd_atiixp_ids) = {
290 { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */
291 { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */
292 { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */
293 { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */
294 { 0, }
295};
296
297MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
298
299static struct snd_pci_quirk atiixp_quirks[] = {
300 SND_PCI_QUIRK(0x105b, 0x0c81, "Foxconn RC4107MA-RS2", 0),
301 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
302 { } /* terminator */
303};
304
305/*
306 * lowlevel functions
307 */
308
309/*
310 * update the bits of the given register.
311 * return 1 if the bits changed.
312 */
313static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
314 unsigned int mask, unsigned int value)
315{
316 void __iomem *addr = chip->remap_addr + reg;
317 unsigned int data, old_data;
318 old_data = data = readl(addr);
319 data &= ~mask;
320 data |= value;
321 if (old_data == data)
322 return 0;
323 writel(data, addr);
324 return 1;
325}
326
327/*
328 * macros for easy use
329 */
330#define atiixp_write(chip,reg,value) \
331 writel(value, chip->remap_addr + ATI_REG_##reg)
332#define atiixp_read(chip,reg) \
333 readl(chip->remap_addr + ATI_REG_##reg)
334#define atiixp_update(chip,reg,mask,val) \
335 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
336
337/*
338 * handling DMA packets
339 *
340 * we allocate a linear buffer for the DMA, and split it to each packet.
341 * in a future version, a scatter-gather buffer should be implemented.
342 */
343
344#define ATI_DESC_LIST_SIZE \
345 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
346
347/*
348 * build packets ring for the given buffer size.
349 *
350 * IXP handles the buffer descriptors, which are connected as a linked
351 * list. although we can change the list dynamically, in this version,
352 * a static RING of buffer descriptors is used.
353 *
354 * the ring is built in this function, and is set up to the hardware.
355 */
356static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
357 struct snd_pcm_substream *substream,
358 unsigned int periods,
359 unsigned int period_bytes)
360{
361 unsigned int i;
362 u32 addr, desc_addr;
363 unsigned long flags;
364
365 if (periods > ATI_MAX_DESCRIPTORS)
366 return -ENOMEM;
367
368 if (dma->desc_buf.area == NULL) {
369 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
370 snd_dma_pci_data(chip->pci),
371 ATI_DESC_LIST_SIZE,
372 &dma->desc_buf) < 0)
373 return -ENOMEM;
374 dma->period_bytes = dma->periods = 0; /* clear */
375 }
376
377 if (dma->periods == periods && dma->period_bytes == period_bytes)
378 return 0;
379
380 /* reset DMA before changing the descriptor table */
381 spin_lock_irqsave(&chip->reg_lock, flags);
382 writel(0, chip->remap_addr + dma->ops->llp_offset);
383 dma->ops->enable_dma(chip, 0);
384 dma->ops->enable_dma(chip, 1);
385 spin_unlock_irqrestore(&chip->reg_lock, flags);
386
387 /* fill the entries */
388 addr = (u32)substream->runtime->dma_addr;
389 desc_addr = (u32)dma->desc_buf.addr;
390 for (i = 0; i < periods; i++) {
391 struct atiixp_dma_desc *desc;
392 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
393 desc->addr = cpu_to_le32(addr);
394 desc->status = 0;
395 desc->size = period_bytes >> 2; /* in dwords */
396 desc_addr += sizeof(struct atiixp_dma_desc);
397 if (i == periods - 1)
398 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
399 else
400 desc->next = cpu_to_le32(desc_addr);
401 addr += period_bytes;
402 }
403
404 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
405 chip->remap_addr + dma->ops->llp_offset);
406
407 dma->period_bytes = period_bytes;
408 dma->periods = periods;
409
410 return 0;
411}
412
413/*
414 * remove the ring buffer and release it if assigned
415 */
416static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
417 struct snd_pcm_substream *substream)
418{
419 if (dma->desc_buf.area) {
420 writel(0, chip->remap_addr + dma->ops->llp_offset);
421 snd_dma_free_pages(&dma->desc_buf);
422 dma->desc_buf.area = NULL;
423 }
424}
425
426/*
427 * AC97 interface
428 */
429static int snd_atiixp_acquire_codec(struct atiixp *chip)
430{
431 int timeout = 1000;
432
433 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
434 if (! timeout--) {
435 dev_warn(chip->card->dev, "codec acquire timeout\n");
436 return -EBUSY;
437 }
438 udelay(1);
439 }
440 return 0;
441}
442
443static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
444{
445 unsigned int data;
446 int timeout;
447
448 if (snd_atiixp_acquire_codec(chip) < 0)
449 return 0xffff;
450 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
451 ATI_REG_PHYS_OUT_ADDR_EN |
452 ATI_REG_PHYS_OUT_RW |
453 codec;
454 atiixp_write(chip, PHYS_OUT_ADDR, data);
455 if (snd_atiixp_acquire_codec(chip) < 0)
456 return 0xffff;
457 timeout = 1000;
458 do {
459 data = atiixp_read(chip, PHYS_IN_ADDR);
460 if (data & ATI_REG_PHYS_IN_READ_FLAG)
461 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
462 udelay(1);
463 } while (--timeout);
464 /* time out may happen during reset */
465 if (reg < 0x7c)
466 dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg);
467 return 0xffff;
468}
469
470
471static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
472 unsigned short reg, unsigned short val)
473{
474 unsigned int data;
475
476 if (snd_atiixp_acquire_codec(chip) < 0)
477 return;
478 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
479 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
480 ATI_REG_PHYS_OUT_ADDR_EN | codec;
481 atiixp_write(chip, PHYS_OUT_ADDR, data);
482}
483
484
485static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
486 unsigned short reg)
487{
488 struct atiixp *chip = ac97->private_data;
489 return snd_atiixp_codec_read(chip, ac97->num, reg);
490
491}
492
493static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
494 unsigned short val)
495{
496 struct atiixp *chip = ac97->private_data;
497 snd_atiixp_codec_write(chip, ac97->num, reg, val);
498}
499
500/*
501 * reset AC link
502 */
503static int snd_atiixp_aclink_reset(struct atiixp *chip)
504{
505 int timeout;
506
507 /* reset powerdoewn */
508 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
509 udelay(10);
510
511 /* perform a software reset */
512 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
513 atiixp_read(chip, CMD);
514 udelay(10);
515 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
516
517 timeout = 10;
518 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
519 /* do a hard reset */
520 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
521 ATI_REG_CMD_AC_SYNC);
522 atiixp_read(chip, CMD);
523 mdelay(1);
524 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
525 if (!--timeout) {
526 dev_err(chip->card->dev, "codec reset timeout\n");
527 break;
528 }
529 }
530
531 /* deassert RESET and assert SYNC to make sure */
532 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
533 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
534
535 return 0;
536}
537
538#ifdef CONFIG_PM_SLEEP
539static int snd_atiixp_aclink_down(struct atiixp *chip)
540{
541 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
542 // return -EBUSY;
543 atiixp_update(chip, CMD,
544 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
545 ATI_REG_CMD_POWERDOWN);
546 return 0;
547}
548#endif
549
550/*
551 * auto-detection of codecs
552 *
553 * the IXP chip can generate interrupts for the non-existing codecs.
554 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
555 * even if all three codecs are connected.
556 */
557
558#define ALL_CODEC_NOT_READY \
559 (ATI_REG_ISR_CODEC0_NOT_READY |\
560 ATI_REG_ISR_CODEC1_NOT_READY |\
561 ATI_REG_ISR_CODEC2_NOT_READY)
562#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
563
564static int ac97_probing_bugs(struct pci_dev *pci)
565{
566 const struct snd_pci_quirk *q;
567
568 q = snd_pci_quirk_lookup(pci, atiixp_quirks);
569 if (q) {
570 dev_dbg(&pci->dev, "atiixp quirk for %s. Forcing codec %d\n",
571 snd_pci_quirk_name(q), q->value);
572 return q->value;
573 }
574 /* this hardware doesn't need workarounds. Probe for codec */
575 return -1;
576}
577
578static int snd_atiixp_codec_detect(struct atiixp *chip)
579{
580 int timeout;
581
582 chip->codec_not_ready_bits = 0;
583 if (ac97_codec == -1)
584 ac97_codec = ac97_probing_bugs(chip->pci);
585 if (ac97_codec >= 0) {
586 chip->codec_not_ready_bits |=
587 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
588 return 0;
589 }
590
591 atiixp_write(chip, IER, CODEC_CHECK_BITS);
592 /* wait for the interrupts */
593 timeout = 50;
594 while (timeout-- > 0) {
595 mdelay(1);
596 if (chip->codec_not_ready_bits)
597 break;
598 }
599 atiixp_write(chip, IER, 0); /* disable irqs */
600
601 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
602 dev_err(chip->card->dev, "no codec detected!\n");
603 return -ENXIO;
604 }
605 return 0;
606}
607
608
609/*
610 * enable DMA and irqs
611 */
612static int snd_atiixp_chip_start(struct atiixp *chip)
613{
614 unsigned int reg;
615
616 /* set up spdif, enable burst mode */
617 reg = atiixp_read(chip, CMD);
618 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
619 reg |= ATI_REG_CMD_BURST_EN;
620 atiixp_write(chip, CMD, reg);
621
622 reg = atiixp_read(chip, SPDF_CMD);
623 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
624 atiixp_write(chip, SPDF_CMD, reg);
625
626 /* clear all interrupt source */
627 atiixp_write(chip, ISR, 0xffffffff);
628 /* enable irqs */
629 atiixp_write(chip, IER,
630 ATI_REG_IER_IO_STATUS_EN |
631 ATI_REG_IER_IN_XRUN_EN |
632 ATI_REG_IER_OUT_XRUN_EN |
633 ATI_REG_IER_SPDF_XRUN_EN |
634 ATI_REG_IER_SPDF_STATUS_EN);
635 return 0;
636}
637
638
639/*
640 * disable DMA and IRQs
641 */
642static int snd_atiixp_chip_stop(struct atiixp *chip)
643{
644 /* clear interrupt source */
645 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
646 /* disable irqs */
647 atiixp_write(chip, IER, 0);
648 return 0;
649}
650
651
652/*
653 * PCM section
654 */
655
656/*
657 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
658 * position. when SG-buffer is implemented, the offset must be calculated
659 * correctly...
660 */
661static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
662{
663 struct atiixp *chip = snd_pcm_substream_chip(substream);
664 struct snd_pcm_runtime *runtime = substream->runtime;
665 struct atiixp_dma *dma = runtime->private_data;
666 unsigned int curptr;
667 int timeout = 1000;
668
669 while (timeout--) {
670 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
671 if (curptr < dma->buf_addr)
672 continue;
673 curptr -= dma->buf_addr;
674 if (curptr >= dma->buf_bytes)
675 continue;
676 return bytes_to_frames(runtime, curptr);
677 }
678 dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n",
679 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
680 return 0;
681}
682
683/*
684 * XRUN detected, and stop the PCM substream
685 */
686static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
687{
688 if (! dma->substream || ! dma->running)
689 return;
690 dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type);
691 snd_pcm_stream_lock(dma->substream);
692 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
693 snd_pcm_stream_unlock(dma->substream);
694}
695
696/*
697 * the period ack. update the substream.
698 */
699static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
700{
701 if (! dma->substream || ! dma->running)
702 return;
703 snd_pcm_period_elapsed(dma->substream);
704}
705
706/* set BUS_BUSY interrupt bit if any DMA is running */
707/* call with spinlock held */
708static void snd_atiixp_check_bus_busy(struct atiixp *chip)
709{
710 unsigned int bus_busy;
711 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
712 ATI_REG_CMD_RECEIVE_EN |
713 ATI_REG_CMD_SPDF_OUT_EN))
714 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
715 else
716 bus_busy = 0;
717 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
718}
719
720/* common trigger callback
721 * calling the lowlevel callbacks in it
722 */
723static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
724{
725 struct atiixp *chip = snd_pcm_substream_chip(substream);
726 struct atiixp_dma *dma = substream->runtime->private_data;
727 int err = 0;
728
729 if (snd_BUG_ON(!dma->ops->enable_transfer ||
730 !dma->ops->flush_dma))
731 return -EINVAL;
732
733 spin_lock(&chip->reg_lock);
734 switch (cmd) {
735 case SNDRV_PCM_TRIGGER_START:
736 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
737 case SNDRV_PCM_TRIGGER_RESUME:
738 dma->ops->enable_transfer(chip, 1);
739 dma->running = 1;
740 dma->suspended = 0;
741 break;
742 case SNDRV_PCM_TRIGGER_STOP:
743 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
744 case SNDRV_PCM_TRIGGER_SUSPEND:
745 dma->ops->enable_transfer(chip, 0);
746 dma->running = 0;
747 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
748 break;
749 default:
750 err = -EINVAL;
751 break;
752 }
753 if (! err) {
754 snd_atiixp_check_bus_busy(chip);
755 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
756 dma->ops->flush_dma(chip);
757 snd_atiixp_check_bus_busy(chip);
758 }
759 }
760 spin_unlock(&chip->reg_lock);
761 return err;
762}
763
764
765/*
766 * lowlevel callbacks for each DMA type
767 *
768 * every callback is supposed to be called in chip->reg_lock spinlock
769 */
770
771/* flush FIFO of analog OUT DMA */
772static void atiixp_out_flush_dma(struct atiixp *chip)
773{
774 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
775}
776
777/* enable/disable analog OUT DMA */
778static void atiixp_out_enable_dma(struct atiixp *chip, int on)
779{
780 unsigned int data;
781 data = atiixp_read(chip, CMD);
782 if (on) {
783 if (data & ATI_REG_CMD_OUT_DMA_EN)
784 return;
785 atiixp_out_flush_dma(chip);
786 data |= ATI_REG_CMD_OUT_DMA_EN;
787 } else
788 data &= ~ATI_REG_CMD_OUT_DMA_EN;
789 atiixp_write(chip, CMD, data);
790}
791
792/* start/stop transfer over OUT DMA */
793static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
794{
795 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
796 on ? ATI_REG_CMD_SEND_EN : 0);
797}
798
799/* enable/disable analog IN DMA */
800static void atiixp_in_enable_dma(struct atiixp *chip, int on)
801{
802 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
803 on ? ATI_REG_CMD_IN_DMA_EN : 0);
804}
805
806/* start/stop analog IN DMA */
807static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
808{
809 if (on) {
810 unsigned int data = atiixp_read(chip, CMD);
811 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
812 data |= ATI_REG_CMD_RECEIVE_EN;
813#if 0 /* FIXME: this causes the endless loop */
814 /* wait until slot 3/4 are finished */
815 while ((atiixp_read(chip, COUNTER) &
816 ATI_REG_COUNTER_SLOT) != 5)
817 ;
818#endif
819 atiixp_write(chip, CMD, data);
820 }
821 } else
822 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
823}
824
825/* flush FIFO of analog IN DMA */
826static void atiixp_in_flush_dma(struct atiixp *chip)
827{
828 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
829}
830
831/* enable/disable SPDIF OUT DMA */
832static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
833{
834 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
835 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
836}
837
838/* start/stop SPDIF OUT DMA */
839static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
840{
841 unsigned int data;
842 data = atiixp_read(chip, CMD);
843 if (on)
844 data |= ATI_REG_CMD_SPDF_OUT_EN;
845 else
846 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
847 atiixp_write(chip, CMD, data);
848}
849
850/* flush FIFO of SPDIF OUT DMA */
851static void atiixp_spdif_flush_dma(struct atiixp *chip)
852{
853 int timeout;
854
855 /* DMA off, transfer on */
856 atiixp_spdif_enable_dma(chip, 0);
857 atiixp_spdif_enable_transfer(chip, 1);
858
859 timeout = 100;
860 do {
861 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
862 break;
863 udelay(1);
864 } while (timeout-- > 0);
865
866 atiixp_spdif_enable_transfer(chip, 0);
867}
868
869/* set up slots and formats for SPDIF OUT */
870static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
871{
872 struct atiixp *chip = snd_pcm_substream_chip(substream);
873
874 spin_lock_irq(&chip->reg_lock);
875 if (chip->spdif_over_aclink) {
876 unsigned int data;
877 /* enable slots 10/11 */
878 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
879 ATI_REG_CMD_SPDF_CONFIG_01);
880 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
881 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
882 ATI_REG_OUT_DMA_SLOT_BIT(11);
883 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
884 atiixp_write(chip, OUT_DMA_SLOT, data);
885 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
886 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
887 ATI_REG_CMD_INTERLEAVE_OUT : 0);
888 } else {
889 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
890 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
891 }
892 spin_unlock_irq(&chip->reg_lock);
893 return 0;
894}
895
896/* set up slots and formats for analog OUT */
897static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
898{
899 struct atiixp *chip = snd_pcm_substream_chip(substream);
900 unsigned int data;
901
902 spin_lock_irq(&chip->reg_lock);
903 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
904 switch (substream->runtime->channels) {
905 case 8:
906 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
907 ATI_REG_OUT_DMA_SLOT_BIT(11);
908 /* fallthru */
909 case 6:
910 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
911 ATI_REG_OUT_DMA_SLOT_BIT(8);
912 /* fallthru */
913 case 4:
914 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
915 ATI_REG_OUT_DMA_SLOT_BIT(9);
916 /* fallthru */
917 default:
918 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
919 ATI_REG_OUT_DMA_SLOT_BIT(4);
920 break;
921 }
922
923 /* set output threshold */
924 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
925 atiixp_write(chip, OUT_DMA_SLOT, data);
926
927 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
928 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
929 ATI_REG_CMD_INTERLEAVE_OUT : 0);
930
931 /*
932 * enable 6 channel re-ordering bit if needed
933 */
934 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
935 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
936
937 spin_unlock_irq(&chip->reg_lock);
938 return 0;
939}
940
941/* set up slots and formats for analog IN */
942static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
943{
944 struct atiixp *chip = snd_pcm_substream_chip(substream);
945
946 spin_lock_irq(&chip->reg_lock);
947 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
948 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
949 ATI_REG_CMD_INTERLEAVE_IN : 0);
950 spin_unlock_irq(&chip->reg_lock);
951 return 0;
952}
953
954/*
955 * hw_params - allocate the buffer and set up buffer descriptors
956 */
957static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
958 struct snd_pcm_hw_params *hw_params)
959{
960 struct atiixp *chip = snd_pcm_substream_chip(substream);
961 struct atiixp_dma *dma = substream->runtime->private_data;
962 int err;
963
964 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
965 if (err < 0)
966 return err;
967 dma->buf_addr = substream->runtime->dma_addr;
968 dma->buf_bytes = params_buffer_bytes(hw_params);
969
970 err = atiixp_build_dma_packets(chip, dma, substream,
971 params_periods(hw_params),
972 params_period_bytes(hw_params));
973 if (err < 0)
974 return err;
975
976 if (dma->ac97_pcm_type >= 0) {
977 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
978 /* PCM is bound to AC97 codec(s)
979 * set up the AC97 codecs
980 */
981 if (dma->pcm_open_flag) {
982 snd_ac97_pcm_close(pcm);
983 dma->pcm_open_flag = 0;
984 }
985 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
986 params_channels(hw_params),
987 pcm->r[0].slots);
988 if (err >= 0)
989 dma->pcm_open_flag = 1;
990 }
991
992 return err;
993}
994
995static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
996{
997 struct atiixp *chip = snd_pcm_substream_chip(substream);
998 struct atiixp_dma *dma = substream->runtime->private_data;
999
1000 if (dma->pcm_open_flag) {
1001 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
1002 snd_ac97_pcm_close(pcm);
1003 dma->pcm_open_flag = 0;
1004 }
1005 atiixp_clear_dma_packets(chip, dma, substream);
1006 snd_pcm_lib_free_pages(substream);
1007 return 0;
1008}
1009
1010
1011/*
1012 * pcm hardware definition, identical for all DMA types
1013 */
1014static struct snd_pcm_hardware snd_atiixp_pcm_hw =
1015{
1016 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1017 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1018 SNDRV_PCM_INFO_PAUSE |
1019 SNDRV_PCM_INFO_RESUME |
1020 SNDRV_PCM_INFO_MMAP_VALID),
1021 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1022 .rates = SNDRV_PCM_RATE_48000,
1023 .rate_min = 48000,
1024 .rate_max = 48000,
1025 .channels_min = 2,
1026 .channels_max = 2,
1027 .buffer_bytes_max = 256 * 1024,
1028 .period_bytes_min = 32,
1029 .period_bytes_max = 128 * 1024,
1030 .periods_min = 2,
1031 .periods_max = ATI_MAX_DESCRIPTORS,
1032};
1033
1034static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1035 struct atiixp_dma *dma, int pcm_type)
1036{
1037 struct atiixp *chip = snd_pcm_substream_chip(substream);
1038 struct snd_pcm_runtime *runtime = substream->runtime;
1039 int err;
1040
1041 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1042 return -EINVAL;
1043
1044 if (dma->opened)
1045 return -EBUSY;
1046 dma->substream = substream;
1047 runtime->hw = snd_atiixp_pcm_hw;
1048 dma->ac97_pcm_type = pcm_type;
1049 if (pcm_type >= 0) {
1050 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1051 snd_pcm_limit_hw_rates(runtime);
1052 } else {
1053 /* direct SPDIF */
1054 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1055 }
1056 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1057 return err;
1058 runtime->private_data = dma;
1059
1060 /* enable DMA bits */
1061 spin_lock_irq(&chip->reg_lock);
1062 dma->ops->enable_dma(chip, 1);
1063 spin_unlock_irq(&chip->reg_lock);
1064 dma->opened = 1;
1065
1066 return 0;
1067}
1068
1069static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1070 struct atiixp_dma *dma)
1071{
1072 struct atiixp *chip = snd_pcm_substream_chip(substream);
1073 /* disable DMA bits */
1074 if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1075 return -EINVAL;
1076 spin_lock_irq(&chip->reg_lock);
1077 dma->ops->enable_dma(chip, 0);
1078 spin_unlock_irq(&chip->reg_lock);
1079 dma->substream = NULL;
1080 dma->opened = 0;
1081 return 0;
1082}
1083
1084/*
1085 */
1086static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1087{
1088 struct atiixp *chip = snd_pcm_substream_chip(substream);
1089 int err;
1090
1091 mutex_lock(&chip->open_mutex);
1092 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1093 mutex_unlock(&chip->open_mutex);
1094 if (err < 0)
1095 return err;
1096 substream->runtime->hw.channels_max = chip->max_channels;
1097 if (chip->max_channels > 2)
1098 /* channels must be even */
1099 snd_pcm_hw_constraint_step(substream->runtime, 0,
1100 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1101 return 0;
1102}
1103
1104static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1105{
1106 struct atiixp *chip = snd_pcm_substream_chip(substream);
1107 int err;
1108 mutex_lock(&chip->open_mutex);
1109 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1110 mutex_unlock(&chip->open_mutex);
1111 return err;
1112}
1113
1114static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1115{
1116 struct atiixp *chip = snd_pcm_substream_chip(substream);
1117 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1118}
1119
1120static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1121{
1122 struct atiixp *chip = snd_pcm_substream_chip(substream);
1123 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1124}
1125
1126static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1127{
1128 struct atiixp *chip = snd_pcm_substream_chip(substream);
1129 int err;
1130 mutex_lock(&chip->open_mutex);
1131 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1132 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1133 else
1134 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1135 mutex_unlock(&chip->open_mutex);
1136 return err;
1137}
1138
1139static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1140{
1141 struct atiixp *chip = snd_pcm_substream_chip(substream);
1142 int err;
1143 mutex_lock(&chip->open_mutex);
1144 if (chip->spdif_over_aclink)
1145 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1146 else
1147 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1148 mutex_unlock(&chip->open_mutex);
1149 return err;
1150}
1151
1152/* AC97 playback */
1153static struct snd_pcm_ops snd_atiixp_playback_ops = {
1154 .open = snd_atiixp_playback_open,
1155 .close = snd_atiixp_playback_close,
1156 .ioctl = snd_pcm_lib_ioctl,
1157 .hw_params = snd_atiixp_pcm_hw_params,
1158 .hw_free = snd_atiixp_pcm_hw_free,
1159 .prepare = snd_atiixp_playback_prepare,
1160 .trigger = snd_atiixp_pcm_trigger,
1161 .pointer = snd_atiixp_pcm_pointer,
1162};
1163
1164/* AC97 capture */
1165static struct snd_pcm_ops snd_atiixp_capture_ops = {
1166 .open = snd_atiixp_capture_open,
1167 .close = snd_atiixp_capture_close,
1168 .ioctl = snd_pcm_lib_ioctl,
1169 .hw_params = snd_atiixp_pcm_hw_params,
1170 .hw_free = snd_atiixp_pcm_hw_free,
1171 .prepare = snd_atiixp_capture_prepare,
1172 .trigger = snd_atiixp_pcm_trigger,
1173 .pointer = snd_atiixp_pcm_pointer,
1174};
1175
1176/* SPDIF playback */
1177static struct snd_pcm_ops snd_atiixp_spdif_ops = {
1178 .open = snd_atiixp_spdif_open,
1179 .close = snd_atiixp_spdif_close,
1180 .ioctl = snd_pcm_lib_ioctl,
1181 .hw_params = snd_atiixp_pcm_hw_params,
1182 .hw_free = snd_atiixp_pcm_hw_free,
1183 .prepare = snd_atiixp_spdif_prepare,
1184 .trigger = snd_atiixp_pcm_trigger,
1185 .pointer = snd_atiixp_pcm_pointer,
1186};
1187
1188static struct ac97_pcm atiixp_pcm_defs[] = {
1189 /* front PCM */
1190 {
1191 .exclusive = 1,
1192 .r = { {
1193 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1194 (1 << AC97_SLOT_PCM_RIGHT) |
1195 (1 << AC97_SLOT_PCM_CENTER) |
1196 (1 << AC97_SLOT_PCM_SLEFT) |
1197 (1 << AC97_SLOT_PCM_SRIGHT) |
1198 (1 << AC97_SLOT_LFE)
1199 }
1200 }
1201 },
1202 /* PCM IN #1 */
1203 {
1204 .stream = 1,
1205 .exclusive = 1,
1206 .r = { {
1207 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1208 (1 << AC97_SLOT_PCM_RIGHT)
1209 }
1210 }
1211 },
1212 /* S/PDIF OUT (optional) */
1213 {
1214 .exclusive = 1,
1215 .spdif = 1,
1216 .r = { {
1217 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1218 (1 << AC97_SLOT_SPDIF_RIGHT2)
1219 }
1220 }
1221 },
1222};
1223
1224static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1225 .type = ATI_DMA_PLAYBACK,
1226 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1227 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1228 .enable_dma = atiixp_out_enable_dma,
1229 .enable_transfer = atiixp_out_enable_transfer,
1230 .flush_dma = atiixp_out_flush_dma,
1231};
1232
1233static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1234 .type = ATI_DMA_CAPTURE,
1235 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1236 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1237 .enable_dma = atiixp_in_enable_dma,
1238 .enable_transfer = atiixp_in_enable_transfer,
1239 .flush_dma = atiixp_in_flush_dma,
1240};
1241
1242static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1243 .type = ATI_DMA_SPDIF,
1244 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1245 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1246 .enable_dma = atiixp_spdif_enable_dma,
1247 .enable_transfer = atiixp_spdif_enable_transfer,
1248 .flush_dma = atiixp_spdif_flush_dma,
1249};
1250
1251
1252static int snd_atiixp_pcm_new(struct atiixp *chip)
1253{
1254 struct snd_pcm *pcm;
1255 struct snd_pcm_chmap *chmap;
1256 struct snd_ac97_bus *pbus = chip->ac97_bus;
1257 int err, i, num_pcms;
1258
1259 /* initialize constants */
1260 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1261 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1262 if (! chip->spdif_over_aclink)
1263 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1264
1265 /* assign AC97 pcm */
1266 if (chip->spdif_over_aclink)
1267 num_pcms = 3;
1268 else
1269 num_pcms = 2;
1270 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1271 if (err < 0)
1272 return err;
1273 for (i = 0; i < num_pcms; i++)
1274 chip->pcms[i] = &pbus->pcms[i];
1275
1276 chip->max_channels = 2;
1277 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1278 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1279 chip->max_channels = 6;
1280 else
1281 chip->max_channels = 4;
1282 }
1283
1284 /* PCM #0: analog I/O */
1285 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1286 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1287 if (err < 0)
1288 return err;
1289 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1290 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1291 pcm->private_data = chip;
1292 strcpy(pcm->name, "ATI IXP AC97");
1293 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1294
1295 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1296 snd_dma_pci_data(chip->pci),
1297 64*1024, 128*1024);
1298
1299 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1300 snd_pcm_alt_chmaps, chip->max_channels, 0,
1301 &chmap);
1302 if (err < 0)
1303 return err;
1304 chmap->channel_mask = SND_PCM_CHMAP_MASK_2468;
1305 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1306
1307 /* no SPDIF support on codec? */
1308 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1309 return 0;
1310
1311 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1312 if (chip->pcms[ATI_PCM_SPDIF])
1313 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1314
1315 /* PCM #1: spdif playback */
1316 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1317 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1318 if (err < 0)
1319 return err;
1320 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1321 pcm->private_data = chip;
1322 if (chip->spdif_over_aclink)
1323 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1324 else
1325 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1326 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1327
1328 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1329 snd_dma_pci_data(chip->pci),
1330 64*1024, 128*1024);
1331
1332 /* pre-select AC97 SPDIF slots 10/11 */
1333 for (i = 0; i < NUM_ATI_CODECS; i++) {
1334 if (chip->ac97[i])
1335 snd_ac97_update_bits(chip->ac97[i],
1336 AC97_EXTENDED_STATUS,
1337 0x03 << 4, 0x03 << 4);
1338 }
1339
1340 return 0;
1341}
1342
1343
1344
1345/*
1346 * interrupt handler
1347 */
1348static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1349{
1350 struct atiixp *chip = dev_id;
1351 unsigned int status;
1352
1353 status = atiixp_read(chip, ISR);
1354
1355 if (! status)
1356 return IRQ_NONE;
1357
1358 /* process audio DMA */
1359 if (status & ATI_REG_ISR_OUT_XRUN)
1360 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1361 else if (status & ATI_REG_ISR_OUT_STATUS)
1362 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1363 if (status & ATI_REG_ISR_IN_XRUN)
1364 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1365 else if (status & ATI_REG_ISR_IN_STATUS)
1366 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1367 if (! chip->spdif_over_aclink) {
1368 if (status & ATI_REG_ISR_SPDF_XRUN)
1369 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1370 else if (status & ATI_REG_ISR_SPDF_STATUS)
1371 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1372 }
1373
1374 /* for codec detection */
1375 if (status & CODEC_CHECK_BITS) {
1376 unsigned int detected;
1377 detected = status & CODEC_CHECK_BITS;
1378 spin_lock(&chip->reg_lock);
1379 chip->codec_not_ready_bits |= detected;
1380 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1381 spin_unlock(&chip->reg_lock);
1382 }
1383
1384 /* ack */
1385 atiixp_write(chip, ISR, status);
1386
1387 return IRQ_HANDLED;
1388}
1389
1390
1391/*
1392 * ac97 mixer section
1393 */
1394
1395static struct ac97_quirk ac97_quirks[] = {
1396 {
1397 .subvendor = 0x103c,
1398 .subdevice = 0x006b,
1399 .name = "HP Pavilion ZV5030US",
1400 .type = AC97_TUNE_MUTE_LED
1401 },
1402 {
1403 .subvendor = 0x103c,
1404 .subdevice = 0x308b,
1405 .name = "HP nx6125",
1406 .type = AC97_TUNE_MUTE_LED
1407 },
1408 {
1409 .subvendor = 0x103c,
1410 .subdevice = 0x3091,
1411 .name = "unknown HP",
1412 .type = AC97_TUNE_MUTE_LED
1413 },
1414 { } /* terminator */
1415};
1416
1417static int snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1418 const char *quirk_override)
1419{
1420 struct snd_ac97_bus *pbus;
1421 struct snd_ac97_template ac97;
1422 int i, err;
1423 int codec_count;
1424 static struct snd_ac97_bus_ops ops = {
1425 .write = snd_atiixp_ac97_write,
1426 .read = snd_atiixp_ac97_read,
1427 };
1428 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1429 ATI_REG_ISR_CODEC0_NOT_READY,
1430 ATI_REG_ISR_CODEC1_NOT_READY,
1431 ATI_REG_ISR_CODEC2_NOT_READY,
1432 };
1433
1434 if (snd_atiixp_codec_detect(chip) < 0)
1435 return -ENXIO;
1436
1437 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1438 return err;
1439 pbus->clock = clock;
1440 chip->ac97_bus = pbus;
1441
1442 codec_count = 0;
1443 for (i = 0; i < NUM_ATI_CODECS; i++) {
1444 if (chip->codec_not_ready_bits & codec_skip[i])
1445 continue;
1446 memset(&ac97, 0, sizeof(ac97));
1447 ac97.private_data = chip;
1448 ac97.pci = chip->pci;
1449 ac97.num = i;
1450 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1451 if (! chip->spdif_over_aclink)
1452 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1453 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1454 chip->ac97[i] = NULL; /* to be sure */
1455 dev_dbg(chip->card->dev,
1456 "codec %d not available for audio\n", i);
1457 continue;
1458 }
1459 codec_count++;
1460 }
1461
1462 if (! codec_count) {
1463 dev_err(chip->card->dev, "no codec available\n");
1464 return -ENODEV;
1465 }
1466
1467 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1468
1469 return 0;
1470}
1471
1472
1473#ifdef CONFIG_PM_SLEEP
1474/*
1475 * power management
1476 */
1477static int snd_atiixp_suspend(struct device *dev)
1478{
1479 struct pci_dev *pci = to_pci_dev(dev);
1480 struct snd_card *card = dev_get_drvdata(dev);
1481 struct atiixp *chip = card->private_data;
1482 int i;
1483
1484 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1485 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1486 if (chip->pcmdevs[i]) {
1487 struct atiixp_dma *dma = &chip->dmas[i];
1488 if (dma->substream && dma->running)
1489 dma->saved_curptr = readl(chip->remap_addr +
1490 dma->ops->dt_cur);
1491 snd_pcm_suspend_all(chip->pcmdevs[i]);
1492 }
1493 for (i = 0; i < NUM_ATI_CODECS; i++)
1494 snd_ac97_suspend(chip->ac97[i]);
1495 snd_atiixp_aclink_down(chip);
1496 snd_atiixp_chip_stop(chip);
1497
1498 pci_disable_device(pci);
1499 pci_save_state(pci);
1500 pci_set_power_state(pci, PCI_D3hot);
1501 return 0;
1502}
1503
1504static int snd_atiixp_resume(struct device *dev)
1505{
1506 struct pci_dev *pci = to_pci_dev(dev);
1507 struct snd_card *card = dev_get_drvdata(dev);
1508 struct atiixp *chip = card->private_data;
1509 int i;
1510
1511 pci_set_power_state(pci, PCI_D0);
1512 pci_restore_state(pci);
1513 if (pci_enable_device(pci) < 0) {
1514 dev_err(dev, "pci_enable_device failed, disabling device\n");
1515 snd_card_disconnect(card);
1516 return -EIO;
1517 }
1518 pci_set_master(pci);
1519
1520 snd_atiixp_aclink_reset(chip);
1521 snd_atiixp_chip_start(chip);
1522
1523 for (i = 0; i < NUM_ATI_CODECS; i++)
1524 snd_ac97_resume(chip->ac97[i]);
1525
1526 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1527 if (chip->pcmdevs[i]) {
1528 struct atiixp_dma *dma = &chip->dmas[i];
1529 if (dma->substream && dma->suspended) {
1530 dma->ops->enable_dma(chip, 1);
1531 dma->substream->ops->prepare(dma->substream);
1532 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1533 chip->remap_addr + dma->ops->llp_offset);
1534 writel(dma->saved_curptr, chip->remap_addr +
1535 dma->ops->dt_cur);
1536 }
1537 }
1538
1539 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1540 return 0;
1541}
1542
1543static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume);
1544#define SND_ATIIXP_PM_OPS &snd_atiixp_pm
1545#else
1546#define SND_ATIIXP_PM_OPS NULL
1547#endif /* CONFIG_PM_SLEEP */
1548
1549
1550#ifdef CONFIG_PROC_FS
1551/*
1552 * proc interface for register dump
1553 */
1554
1555static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1556 struct snd_info_buffer *buffer)
1557{
1558 struct atiixp *chip = entry->private_data;
1559 int i;
1560
1561 for (i = 0; i < 256; i += 4)
1562 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1563}
1564
1565static void snd_atiixp_proc_init(struct atiixp *chip)
1566{
1567 struct snd_info_entry *entry;
1568
1569 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1570 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
1571}
1572#else /* !CONFIG_PROC_FS */
1573#define snd_atiixp_proc_init(chip)
1574#endif
1575
1576
1577/*
1578 * destructor
1579 */
1580
1581static int snd_atiixp_free(struct atiixp *chip)
1582{
1583 if (chip->irq < 0)
1584 goto __hw_end;
1585 snd_atiixp_chip_stop(chip);
1586
1587 __hw_end:
1588 if (chip->irq >= 0)
1589 free_irq(chip->irq, chip);
1590 if (chip->remap_addr)
1591 iounmap(chip->remap_addr);
1592 pci_release_regions(chip->pci);
1593 pci_disable_device(chip->pci);
1594 kfree(chip);
1595 return 0;
1596}
1597
1598static int snd_atiixp_dev_free(struct snd_device *device)
1599{
1600 struct atiixp *chip = device->device_data;
1601 return snd_atiixp_free(chip);
1602}
1603
1604/*
1605 * constructor for chip instance
1606 */
1607static int snd_atiixp_create(struct snd_card *card,
1608 struct pci_dev *pci,
1609 struct atiixp **r_chip)
1610{
1611 static struct snd_device_ops ops = {
1612 .dev_free = snd_atiixp_dev_free,
1613 };
1614 struct atiixp *chip;
1615 int err;
1616
1617 if ((err = pci_enable_device(pci)) < 0)
1618 return err;
1619
1620 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1621 if (chip == NULL) {
1622 pci_disable_device(pci);
1623 return -ENOMEM;
1624 }
1625
1626 spin_lock_init(&chip->reg_lock);
1627 mutex_init(&chip->open_mutex);
1628 chip->card = card;
1629 chip->pci = pci;
1630 chip->irq = -1;
1631 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1632 pci_disable_device(pci);
1633 kfree(chip);
1634 return err;
1635 }
1636 chip->addr = pci_resource_start(pci, 0);
1637 chip->remap_addr = pci_ioremap_bar(pci, 0);
1638 if (chip->remap_addr == NULL) {
1639 dev_err(card->dev, "AC'97 space ioremap problem\n");
1640 snd_atiixp_free(chip);
1641 return -EIO;
1642 }
1643
1644 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
1645 KBUILD_MODNAME, chip)) {
1646 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1647 snd_atiixp_free(chip);
1648 return -EBUSY;
1649 }
1650 chip->irq = pci->irq;
1651 pci_set_master(pci);
1652 synchronize_irq(chip->irq);
1653
1654 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1655 snd_atiixp_free(chip);
1656 return err;
1657 }
1658
1659 *r_chip = chip;
1660 return 0;
1661}
1662
1663
1664static int snd_atiixp_probe(struct pci_dev *pci,
1665 const struct pci_device_id *pci_id)
1666{
1667 struct snd_card *card;
1668 struct atiixp *chip;
1669 int err;
1670
1671 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
1672 if (err < 0)
1673 return err;
1674
1675 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1676 strcpy(card->shortname, "ATI IXP");
1677 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1678 goto __error;
1679 card->private_data = chip;
1680
1681 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1682 goto __error;
1683
1684 chip->spdif_over_aclink = spdif_aclink;
1685
1686 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1687 goto __error;
1688
1689 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1690 goto __error;
1691
1692 snd_atiixp_proc_init(chip);
1693
1694 snd_atiixp_chip_start(chip);
1695
1696 snprintf(card->longname, sizeof(card->longname),
1697 "%s rev %x with %s at %#lx, irq %i", card->shortname,
1698 pci->revision,
1699 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1700 chip->addr, chip->irq);
1701
1702 if ((err = snd_card_register(card)) < 0)
1703 goto __error;
1704
1705 pci_set_drvdata(pci, card);
1706 return 0;
1707
1708 __error:
1709 snd_card_free(card);
1710 return err;
1711}
1712
1713static void snd_atiixp_remove(struct pci_dev *pci)
1714{
1715 snd_card_free(pci_get_drvdata(pci));
1716}
1717
1718static struct pci_driver atiixp_driver = {
1719 .name = KBUILD_MODNAME,
1720 .id_table = snd_atiixp_ids,
1721 .probe = snd_atiixp_probe,
1722 .remove = snd_atiixp_remove,
1723 .driver = {
1724 .pm = SND_ATIIXP_PM_OPS,
1725 },
1726};
1727
1728module_pci_driver(atiixp_driver);