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v5.14.15
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * SBC8548 Device Tree Source
  4 *
  5 * Copyright 2007 Wind River Systems Inc.
  6 *
  7 * Paul Gortmaker (see MAINTAINERS for contact information)
 
 
 
 
 
  8 */
  9
 10
 11/dts-v1/;
 12
 13/include/ "sbc8548-pre.dtsi"
 14
 15/{
 16	localbus@e0000000 {
 17		#address-cells = <2>;
 18		#size-cells = <1>;
 19		compatible = "simple-bus";
 20		reg = <0xe0000000 0x5000>;
 21		interrupt-parent = <&mpic>;
 22
 23		ranges = <0x0 0x0 0xff800000 0x00800000		/*8MB Flash*/
 24			  0x3 0x0 0xf0000000 0x04000000		/*64MB SDRAM*/
 25			  0x4 0x0 0xf4000000 0x04000000 	/*64MB SDRAM*/
 26			  0x5 0x0 0xf8000000 0x00b10000		/* EPLD */
 27			  0x6 0x0 0xec000000 0x04000000>;	/*64MB Flash*/
 28
 29
 30		flash@0,0 {
 31			#address-cells = <1>;
 32			#size-cells = <1>;
 33			compatible = "intel,JS28F640", "cfi-flash";
 34			reg = <0x0 0x0 0x800000>;
 35			bank-width = <1>;
 36			device-width = <1>;
 37			partition@0 {
 38				label = "space";
 39				/* FF800000 -> FFF9FFFF */
 40				reg = <0x00000000 0x007a0000>;
 41			};
 42			partition@7a0000 {
 43				label = "bootloader";
 44				/* FFFA0000 -> FFFFFFFF */
 45				reg = <0x007a0000 0x00060000>;
 46				read-only;
 47			};
 48		};
 49
 50		epld@5,0 {
 51			compatible = "wrs,epld-localbus";
 52			#address-cells = <2>;
 53			#size-cells = <1>;
 54			reg = <0x5 0x0 0x00b10000>;
 55			ranges = <
 56				0x0 0x0 0x5 0x000000 0x1fff	/* LED */
 57				0x1 0x0 0x5 0x100000 0x1fff	/* Switches */
 58				0x3 0x0 0x5 0x300000 0x1fff	/* HW Rev. */
 59				0xb 0x0	0x5 0xb00000 0x1fff	/* EEPROM */
 60			>;
 61
 62			led@0,0 {
 63				compatible = "led";
 64				reg = <0x0 0x0 0x1fff>;
 65			};
 66
 67			switches@1,0 {
 68				compatible = "switches";
 69				reg = <0x1 0x0 0x1fff>;
 70			};
 71
 72			hw-rev@3,0 {
 73				compatible = "hw-rev";
 74				reg = <0x3 0x0 0x1fff>;
 75			};
 76
 77			eeprom@b,0 {
 78				compatible = "eeprom";
 79				reg = <0xb 0 0x1fff>;
 80			};
 81
 82		};
 83
 84		alt-flash@6,0 {
 85			#address-cells = <1>;
 86			#size-cells = <1>;
 87			reg = <0x6 0x0 0x04000000>;
 88			compatible = "intel,JS28F128", "cfi-flash";
 89			bank-width = <4>;
 90			device-width = <1>;
 91			partition@0 {
 92				label = "space";
 93				/* EC000000 -> EFEFFFFF */
 94				reg = <0x00000000 0x03f00000>;
 95			};
 96			partition@3f00000 {
 97				label = "bootloader";
 98				/* EFF00000 -> EFFFFFFF */
 99				reg = <0x03f00000 0x00100000>;
100				read-only;
101			};
102                };
103        };
104};
105
106/include/ "sbc8548-post.dtsi"
v3.15
 
  1/*
  2 * SBC8548 Device Tree Source
  3 *
  4 * Copyright 2007 Wind River Systems Inc.
  5 *
  6 * Paul Gortmaker (see MAINTAINERS for contact information)
  7 *
  8 * This program is free software; you can redistribute  it and/or modify it
  9 * under  the terms of  the GNU General  Public License as published by the
 10 * Free Software Foundation;  either version 2 of the  License, or (at your
 11 * option) any later version.
 12 */
 13
 14
 15/dts-v1/;
 16
 17/include/ "sbc8548-pre.dtsi"
 18
 19/{
 20	localbus@e0000000 {
 21		#address-cells = <2>;
 22		#size-cells = <1>;
 23		compatible = "simple-bus";
 24		reg = <0xe0000000 0x5000>;
 25		interrupt-parent = <&mpic>;
 26
 27		ranges = <0x0 0x0 0xff800000 0x00800000		/*8MB Flash*/
 28			  0x3 0x0 0xf0000000 0x04000000		/*64MB SDRAM*/
 29			  0x4 0x0 0xf4000000 0x04000000 	/*64MB SDRAM*/
 30			  0x5 0x0 0xf8000000 0x00b10000		/* EPLD */
 31			  0x6 0x0 0xec000000 0x04000000>;	/*64MB Flash*/
 32
 33
 34		flash@0,0 {
 35			#address-cells = <1>;
 36			#size-cells = <1>;
 37			compatible = "intel,JS28F640", "cfi-flash";
 38			reg = <0x0 0x0 0x800000>;
 39			bank-width = <1>;
 40			device-width = <1>;
 41			partition@0x0 {
 42				label = "space";
 43				/* FF800000 -> FFF9FFFF */
 44				reg = <0x00000000 0x007a0000>;
 45			};
 46			partition@0x7a0000 {
 47				label = "bootloader";
 48				/* FFFA0000 -> FFFFFFFF */
 49				reg = <0x007a0000 0x00060000>;
 50				read-only;
 51			};
 52		};
 53
 54		epld@5,0 {
 55			compatible = "wrs,epld-localbus";
 56			#address-cells = <2>;
 57			#size-cells = <1>;
 58			reg = <0x5 0x0 0x00b10000>;
 59			ranges = <
 60				0x0 0x0 0x5 0x000000 0x1fff	/* LED */
 61				0x1 0x0 0x5 0x100000 0x1fff	/* Switches */
 62				0x3 0x0 0x5 0x300000 0x1fff	/* HW Rev. */
 63				0xb 0x0	0x5 0xb00000 0x1fff	/* EEPROM */
 64			>;
 65
 66			led@0,0 {
 67				compatible = "led";
 68				reg = <0x0 0x0 0x1fff>;
 69			};
 70
 71			switches@1,0 {
 72				compatible = "switches";
 73				reg = <0x1 0x0 0x1fff>;
 74			};
 75
 76			hw-rev@3,0 {
 77				compatible = "hw-rev";
 78				reg = <0x3 0x0 0x1fff>;
 79			};
 80
 81			eeprom@b,0 {
 82				compatible = "eeprom";
 83				reg = <0xb 0 0x1fff>;
 84			};
 85
 86		};
 87
 88		alt-flash@6,0 {
 89			#address-cells = <1>;
 90			#size-cells = <1>;
 91			reg = <0x6 0x0 0x04000000>;
 92			compatible = "intel,JS28F128", "cfi-flash";
 93			bank-width = <4>;
 94			device-width = <1>;
 95			partition@0x0 {
 96				label = "space";
 97				/* EC000000 -> EFEFFFFF */
 98				reg = <0x00000000 0x03f00000>;
 99			};
100			partition@0x03f00000 {
101				label = "bootloader";
102				/* EFF00000 -> EFFFFFFF */
103				reg = <0x03f00000 0x00100000>;
104				read-only;
105			};
106                };
107        };
108};
109
110/include/ "sbc8548-post.dtsi"