1/*
  2 * P5040DS Device Tree Source
  3 *
  4 * Copyright 2012 Freescale Semiconductor Inc.
  5 *
  6 * Redistribution and use in source and binary forms, with or without
  7 * modification, are permitted provided that the following conditions are met:
  8 *     * Redistributions of source code must retain the above copyright
  9 *       notice, this list of conditions and the following disclaimer.
 10 *     * Redistributions in binary form must reproduce the above copyright
 11 *       notice, this list of conditions and the following disclaimer in the
 12 *       documentation and/or other materials provided with the distribution.
 13 *     * Neither the name of Freescale Semiconductor nor the
 14 *       names of its contributors may be used to endorse or promote products
 15 *       derived from this software without specific prior written permission.
 16 *
 17 *
 18 * ALTERNATIVELY, this software may be distributed under the terms of the
 19 * GNU General Public License ("GPL") as published by the Free Software
 20 * Foundation, either version 2 of that License or (at your option) any
 21 * later version.
 22 *
 23 * This software is provided by Freescale Semiconductor "as is" and any
 24 * express or implied warranties, including, but not limited to, the implied
 25 * warranties of merchantability and fitness for a particular purpose are
 26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
 27 * direct, indirect, incidental, special, exemplary, or consequential damages
 28 * (including, but not limited to, procurement of substitute goods or services;
 29 * loss of use, data, or profits; or business interruption) however caused and
 30 * on any theory of liability, whether in contract, strict liability, or tort
 31 * (including negligence or otherwise) arising in any way out of the use of this
 32 * software, even if advised of the possibility of such damage.
 33 */
 34
 35/include/ "fsl/p5040si-pre.dtsi"
 36
 37/ {
 38	model = "fsl,P5040DS";
 39	compatible = "fsl,P5040DS";
 40	#address-cells = <2>;
 41	#size-cells = <2>;
 42	interrupt-parent = <&mpic>;
 43
 44	memory {
 45		device_type = "memory";
 46	};
 47
 48	dcsr: dcsr@f00000000 {
 49		ranges = <0x00000000 0xf 0x00000000 0x01008000>;
 50	};
 51
 52	soc: soc@ffe000000 {
 53		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 54		reg = <0xf 0xfe000000 0 0x00001000>;
 55		spi@110000 {
 56			flash@0 {
 57				#address-cells = <1>;
 58				#size-cells = <1>;
 59				compatible = "spansion,s25sl12801";
 60				reg = <0>;
 61				spi-max-frequency = <40000000>; /* input clock */
 62				partition@u-boot {
 63					label = "u-boot";
 64					reg = <0x00000000 0x00100000>;
 65				};
 66				partition@kernel {
 67					label = "kernel";
 68					reg = <0x00100000 0x00500000>;
 69				};
 70				partition@dtb {
 71					label = "dtb";
 72					reg = <0x00600000 0x00100000>;
 73				};
 74				partition@fs {
 75					label = "file system";
 76					reg = <0x00700000 0x00900000>;
 77				};
 78			};
 79		};
 80
 81		i2c@118100 {
 82			eeprom@51 {
 83				compatible = "at24,24c256";
 84				reg = <0x51>;
 85			};
 86			eeprom@52 {
 87				compatible = "at24,24c256";
 88				reg = <0x52>;
 89			};
 90		};
 91
 92		i2c@119100 {
 93			rtc@68 {
 94				compatible = "dallas,ds3232";
 95				reg = <0x68>;
 96				interrupts = <0x1 0x1 0 0>;
 97			};
 98			adt7461@4c {
 99				compatible = "adi,adt7461";
100				reg = <0x4c>;
101			};
102		};
103	};
104
105	lbc: localbus@ffe124000 {
106		reg = <0xf 0xfe124000 0 0x1000>;
107		ranges = <0 0 0xf 0xe8000000 0x08000000
108			  2 0 0xf 0xffa00000 0x00040000
109			  3 0 0xf 0xffdf0000 0x00008000>;
110
111		flash@0,0 {
112			compatible = "cfi-flash";
113			reg = <0 0 0x08000000>;
114			bank-width = <2>;
115			device-width = <2>;
116		};
117
118		nand@2,0 {
119			#address-cells = <1>;
120			#size-cells = <1>;
121			compatible = "fsl,elbc-fcm-nand";
122			reg = <0x2 0x0 0x40000>;
123
124			partition@0 {
125				label = "NAND U-Boot Image";
126				reg = <0x0 0x02000000>;
127			};
128
129			partition@2000000 {
130				label = "NAND Root File System";
131				reg = <0x02000000 0x10000000>;
132			};
133
134			partition@12000000 {
135				label = "NAND Compressed RFS Image";
136				reg = <0x12000000 0x08000000>;
137			};
138
139			partition@1a000000 {
140				label = "NAND Linux Kernel Image";
141				reg = <0x1a000000 0x04000000>;
142			};
143
144			partition@1e000000 {
145				label = "NAND DTB Image";
146				reg = <0x1e000000 0x01000000>;
147			};
148
149			partition@1f000000 {
150				label = "NAND Writable User area";
151				reg = <0x1f000000 0x01000000>;
152			};
153		};
154
155		board-control@3,0 {
156			compatible = "fsl,p5040ds-fpga", "fsl,fpga-ngpixis";
157			reg = <3 0 0x40>;
158		};
159	};
160
161	pci0: pcie@ffe200000 {
162		reg = <0xf 0xfe200000 0 0x1000>;
163		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
164			  0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
165		pcie@0 {
166			ranges = <0x02000000 0 0xe0000000
167				  0x02000000 0 0xe0000000
168				  0 0x20000000
169
170				  0x01000000 0 0x00000000
171				  0x01000000 0 0x00000000
172				  0 0x00010000>;
173		};
174	};
175
176	pci1: pcie@ffe201000 {
177		reg = <0xf 0xfe201000 0 0x1000>;
178		ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
179			  0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
180		pcie@0 {
181			ranges = <0x02000000 0 0xe0000000
182				  0x02000000 0 0xe0000000
183				  0 0x20000000
184
185				  0x01000000 0 0x00000000
186				  0x01000000 0 0x00000000
187				  0 0x00010000>;
188		};
189	};
190
191	pci2: pcie@ffe202000 {
192		reg = <0xf 0xfe202000 0 0x1000>;
193		ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
194			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
195		pcie@0 {
196			ranges = <0x02000000 0 0xe0000000
197				  0x02000000 0 0xe0000000
198				  0 0x20000000
199
200				  0x01000000 0 0x00000000
201				  0x01000000 0 0x00000000
202				  0 0x00010000>;
203		};
204	};
205};
206
207/include/ "fsl/p5040si-post.dtsi"