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  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * CPU Microcode Update Driver for Linux
  4 *
  5 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
  6 *	      2006	Shaohua Li <shaohua.li@intel.com>
  7 *	      2013-2016	Borislav Petkov <bp@alien8.de>
  8 *
  9 * X86 CPU microcode early update for Linux:
 10 *
 11 *	Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
 12 *			   H Peter Anvin" <hpa@zytor.com>
 13 *		  (C) 2015 Borislav Petkov <bp@alien8.de>
 14 *
 15 * This driver allows to upgrade microcode on x86 processors.
 16 */
 17
 18#define pr_fmt(fmt) "microcode: " fmt
 19
 20#include <linux/platform_device.h>
 21#include <linux/stop_machine.h>
 22#include <linux/syscore_ops.h>
 23#include <linux/miscdevice.h>
 24#include <linux/capability.h>
 25#include <linux/firmware.h>
 26#include <linux/kernel.h>
 27#include <linux/delay.h>
 28#include <linux/mutex.h>
 29#include <linux/cpu.h>
 30#include <linux/nmi.h>
 31#include <linux/fs.h>
 32#include <linux/mm.h>
 33
 34#include <asm/microcode_intel.h>
 35#include <asm/cpu_device_id.h>
 36#include <asm/microcode_amd.h>
 37#include <asm/perf_event.h>
 38#include <asm/microcode.h>
 39#include <asm/processor.h>
 40#include <asm/cmdline.h>
 41#include <asm/setup.h>
 42
 43#define DRIVER_VERSION	"2.2"
 44
 45static struct microcode_ops	*microcode_ops;
 46static bool dis_ucode_ldr = true;
 47
 48bool initrd_gone;
 49
 50LIST_HEAD(microcode_cache);
 51
 52/*
 53 * Synchronization.
 54 *
 55 * All non cpu-hotplug-callback call sites use:
 56 *
 57 * - microcode_mutex to synchronize with each other;
 58 * - get/put_online_cpus() to synchronize with
 59 *   the cpu-hotplug-callback call sites.
 60 *
 61 * We guarantee that only a single cpu is being
 62 * updated at any particular moment of time.
 63 */
 64static DEFINE_MUTEX(microcode_mutex);
 65
 66struct ucode_cpu_info		ucode_cpu_info[NR_CPUS];
 67
 68struct cpu_info_ctx {
 69	struct cpu_signature	*cpu_sig;
 70	int			err;
 71};
 72
 73/*
 74 * Those patch levels cannot be updated to newer ones and thus should be final.
 75 */
 76static u32 final_levels[] = {
 77	0x01000098,
 78	0x0100009f,
 79	0x010000af,
 80	0, /* T-101 terminator */
 81};
 82
 83/*
 84 * Check the current patch level on this CPU.
 85 *
 86 * Returns:
 87 *  - true: if update should stop
 88 *  - false: otherwise
 89 */
 90static bool amd_check_current_patch_level(void)
 91{
 92	u32 lvl, dummy, i;
 93	u32 *levels;
 94
 95	native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
 96
 97	if (IS_ENABLED(CONFIG_X86_32))
 98		levels = (u32 *)__pa_nodebug(&final_levels);
 99	else
100		levels = final_levels;
101
102	for (i = 0; levels[i]; i++) {
103		if (lvl == levels[i])
104			return true;
105	}
106	return false;
107}
108
109static bool __init check_loader_disabled_bsp(void)
110{
111	static const char *__dis_opt_str = "dis_ucode_ldr";
112
113#ifdef CONFIG_X86_32
114	const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
115	const char *option  = (const char *)__pa_nodebug(__dis_opt_str);
116	bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);
117
118#else /* CONFIG_X86_64 */
119	const char *cmdline = boot_command_line;
120	const char *option  = __dis_opt_str;
121	bool *res = &dis_ucode_ldr;
122#endif
123
124	/*
125	 * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not
126	 * completely accurate as xen pv guests don't see that CPUID bit set but
127	 * that's good enough as they don't land on the BSP path anyway.
128	 */
129	if (native_cpuid_ecx(1) & BIT(31))
130		return *res;
131
132	if (x86_cpuid_vendor() == X86_VENDOR_AMD) {
133		if (amd_check_current_patch_level())
134			return *res;
135	}
136
137	if (cmdline_find_option_bool(cmdline, option) <= 0)
138		*res = false;
139
140	return *res;
141}
142
143extern struct builtin_fw __start_builtin_fw[];
144extern struct builtin_fw __end_builtin_fw[];
145
146bool get_builtin_firmware(struct cpio_data *cd, const char *name)
147{
148	struct builtin_fw *b_fw;
149
150	for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) {
151		if (!strcmp(name, b_fw->name)) {
152			cd->size = b_fw->size;
153			cd->data = b_fw->data;
154			return true;
155		}
156	}
157	return false;
158}
159
160void __init load_ucode_bsp(void)
161{
162	unsigned int cpuid_1_eax;
163	bool intel = true;
164
165	if (!have_cpuid_p())
166		return;
167
168	cpuid_1_eax = native_cpuid_eax(1);
169
170	switch (x86_cpuid_vendor()) {
171	case X86_VENDOR_INTEL:
172		if (x86_family(cpuid_1_eax) < 6)
173			return;
174		break;
175
176	case X86_VENDOR_AMD:
177		if (x86_family(cpuid_1_eax) < 0x10)
178			return;
179		intel = false;
180		break;
181
182	default:
183		return;
184	}
185
186	if (check_loader_disabled_bsp())
187		return;
188
189	if (intel)
190		load_ucode_intel_bsp();
191	else
192		load_ucode_amd_bsp(cpuid_1_eax);
193}
194
195static bool check_loader_disabled_ap(void)
196{
197#ifdef CONFIG_X86_32
198	return *((bool *)__pa_nodebug(&dis_ucode_ldr));
199#else
200	return dis_ucode_ldr;
201#endif
202}
203
204void load_ucode_ap(void)
205{
206	unsigned int cpuid_1_eax;
207
208	if (check_loader_disabled_ap())
209		return;
210
211	cpuid_1_eax = native_cpuid_eax(1);
212
213	switch (x86_cpuid_vendor()) {
214	case X86_VENDOR_INTEL:
215		if (x86_family(cpuid_1_eax) >= 6)
216			load_ucode_intel_ap();
217		break;
218	case X86_VENDOR_AMD:
219		if (x86_family(cpuid_1_eax) >= 0x10)
220			load_ucode_amd_ap(cpuid_1_eax);
221		break;
222	default:
223		break;
224	}
225}
226
227static int __init save_microcode_in_initrd(void)
228{
229	struct cpuinfo_x86 *c = &boot_cpu_data;
230	int ret = -EINVAL;
231
232	switch (c->x86_vendor) {
233	case X86_VENDOR_INTEL:
234		if (c->x86 >= 6)
235			ret = save_microcode_in_initrd_intel();
236		break;
237	case X86_VENDOR_AMD:
238		if (c->x86 >= 0x10)
239			ret = save_microcode_in_initrd_amd(cpuid_eax(1));
240		break;
241	default:
242		break;
243	}
244
245	initrd_gone = true;
246
247	return ret;
248}
249
250struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa)
251{
252#ifdef CONFIG_BLK_DEV_INITRD
253	unsigned long start = 0;
254	size_t size;
255
256#ifdef CONFIG_X86_32
257	struct boot_params *params;
258
259	if (use_pa)
260		params = (struct boot_params *)__pa_nodebug(&boot_params);
261	else
262		params = &boot_params;
263
264	size = params->hdr.ramdisk_size;
265
266	/*
267	 * Set start only if we have an initrd image. We cannot use initrd_start
268	 * because it is not set that early yet.
269	 */
270	if (size)
271		start = params->hdr.ramdisk_image;
272
273# else /* CONFIG_X86_64 */
274	size  = (unsigned long)boot_params.ext_ramdisk_size << 32;
275	size |= boot_params.hdr.ramdisk_size;
276
277	if (size) {
278		start  = (unsigned long)boot_params.ext_ramdisk_image << 32;
279		start |= boot_params.hdr.ramdisk_image;
280
281		start += PAGE_OFFSET;
282	}
283# endif
284
285	/*
286	 * Fixup the start address: after reserve_initrd() runs, initrd_start
287	 * has the virtual address of the beginning of the initrd. It also
288	 * possibly relocates the ramdisk. In either case, initrd_start contains
289	 * the updated address so use that instead.
290	 *
291	 * initrd_gone is for the hotplug case where we've thrown out initrd
292	 * already.
293	 */
294	if (!use_pa) {
295		if (initrd_gone)
296			return (struct cpio_data){ NULL, 0, "" };
297		if (initrd_start)
298			start = initrd_start;
299	} else {
300		/*
301		 * The picture with physical addresses is a bit different: we
302		 * need to get the *physical* address to which the ramdisk was
303		 * relocated, i.e., relocated_ramdisk (not initrd_start) and
304		 * since we're running from physical addresses, we need to access
305		 * relocated_ramdisk through its *physical* address too.
306		 */
307		u64 *rr = (u64 *)__pa_nodebug(&relocated_ramdisk);
308		if (*rr)
309			start = *rr;
310	}
311
312	return find_cpio_data(path, (void *)start, size, NULL);
313#else /* !CONFIG_BLK_DEV_INITRD */
314	return (struct cpio_data){ NULL, 0, "" };
315#endif
316}
317
318void reload_early_microcode(void)
319{
320	int vendor, family;
321
322	vendor = x86_cpuid_vendor();
323	family = x86_cpuid_family();
324
325	switch (vendor) {
326	case X86_VENDOR_INTEL:
327		if (family >= 6)
328			reload_ucode_intel();
329		break;
330	case X86_VENDOR_AMD:
331		if (family >= 0x10)
332			reload_ucode_amd();
333		break;
334	default:
335		break;
336	}
337}
338
339static void collect_cpu_info_local(void *arg)
340{
341	struct cpu_info_ctx *ctx = arg;
342
343	ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
344						   ctx->cpu_sig);
345}
346
347static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
348{
349	struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
350	int ret;
351
352	ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
353	if (!ret)
354		ret = ctx.err;
355
356	return ret;
357}
358
359static int collect_cpu_info(int cpu)
360{
361	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
362	int ret;
363
364	memset(uci, 0, sizeof(*uci));
365
366	ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
367	if (!ret)
368		uci->valid = 1;
369
370	return ret;
371}
372
373static void apply_microcode_local(void *arg)
374{
375	enum ucode_state *err = arg;
376
377	*err = microcode_ops->apply_microcode(smp_processor_id());
378}
379
380static int apply_microcode_on_target(int cpu)
381{
382	enum ucode_state err;
383	int ret;
384
385	ret = smp_call_function_single(cpu, apply_microcode_local, &err, 1);
386	if (!ret) {
387		if (err == UCODE_ERROR)
388			ret = 1;
389	}
390	return ret;
391}
392
393#ifdef CONFIG_MICROCODE_OLD_INTERFACE
394static int do_microcode_update(const void __user *buf, size_t size)
395{
396	int error = 0;
397	int cpu;
398
399	for_each_online_cpu(cpu) {
400		struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
401		enum ucode_state ustate;
402
403		if (!uci->valid)
404			continue;
405
406		ustate = microcode_ops->request_microcode_user(cpu, buf, size);
407		if (ustate == UCODE_ERROR) {
408			error = -1;
409			break;
410		} else if (ustate == UCODE_NEW) {
411			apply_microcode_on_target(cpu);
412		}
413	}
414
415	return error;
416}
417
418static int microcode_open(struct inode *inode, struct file *file)
419{
420	return capable(CAP_SYS_RAWIO) ? stream_open(inode, file) : -EPERM;
421}
422
423static ssize_t microcode_write(struct file *file, const char __user *buf,
424			       size_t len, loff_t *ppos)
425{
426	ssize_t ret = -EINVAL;
427	unsigned long nr_pages = totalram_pages();
428
429	if ((len >> PAGE_SHIFT) > nr_pages) {
430		pr_err("too much data (max %ld pages)\n", nr_pages);
431		return ret;
432	}
433
434	get_online_cpus();
435	mutex_lock(&microcode_mutex);
436
437	if (do_microcode_update(buf, len) == 0)
438		ret = (ssize_t)len;
439
440	if (ret > 0)
441		perf_check_microcode();
442
443	mutex_unlock(&microcode_mutex);
444	put_online_cpus();
445
446	return ret;
447}
448
449static const struct file_operations microcode_fops = {
450	.owner			= THIS_MODULE,
451	.write			= microcode_write,
452	.open			= microcode_open,
453	.llseek		= no_llseek,
454};
455
456static struct miscdevice microcode_dev = {
457	.minor			= MICROCODE_MINOR,
458	.name			= "microcode",
459	.nodename		= "cpu/microcode",
460	.fops			= &microcode_fops,
461};
462
463static int __init microcode_dev_init(void)
464{
465	int error;
466
467	error = misc_register(&microcode_dev);
468	if (error) {
469		pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR);
470		return error;
471	}
472
473	return 0;
474}
475
476static void __exit microcode_dev_exit(void)
477{
478	misc_deregister(&microcode_dev);
479}
480#else
481#define microcode_dev_init()	0
482#define microcode_dev_exit()	do { } while (0)
483#endif
484
485/* fake device for request_firmware */
486static struct platform_device	*microcode_pdev;
487
488/*
489 * Late loading dance. Why the heavy-handed stomp_machine effort?
490 *
491 * - HT siblings must be idle and not execute other code while the other sibling
492 *   is loading microcode in order to avoid any negative interactions caused by
493 *   the loading.
494 *
495 * - In addition, microcode update on the cores must be serialized until this
496 *   requirement can be relaxed in the future. Right now, this is conservative
497 *   and good.
498 */
499#define SPINUNIT 100 /* 100 nsec */
500
501static int check_online_cpus(void)
502{
503	unsigned int cpu;
504
505	/*
506	 * Make sure all CPUs are online.  It's fine for SMT to be disabled if
507	 * all the primary threads are still online.
508	 */
509	for_each_present_cpu(cpu) {
510		if (topology_is_primary_thread(cpu) && !cpu_online(cpu)) {
511			pr_err("Not all CPUs online, aborting microcode update.\n");
512			return -EINVAL;
513		}
514	}
515
516	return 0;
517}
518
519static atomic_t late_cpus_in;
520static atomic_t late_cpus_out;
521
522static int __wait_for_cpus(atomic_t *t, long long timeout)
523{
524	int all_cpus = num_online_cpus();
525
526	atomic_inc(t);
527
528	while (atomic_read(t) < all_cpus) {
529		if (timeout < SPINUNIT) {
530			pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n",
531				all_cpus - atomic_read(t));
532			return 1;
533		}
534
535		ndelay(SPINUNIT);
536		timeout -= SPINUNIT;
537
538		touch_nmi_watchdog();
539	}
540	return 0;
541}
542
543/*
544 * Returns:
545 * < 0 - on error
546 *   0 - success (no update done or microcode was updated)
547 */
548static int __reload_late(void *info)
549{
550	int cpu = smp_processor_id();
551	enum ucode_state err;
552	int ret = 0;
553
554	/*
555	 * Wait for all CPUs to arrive. A load will not be attempted unless all
556	 * CPUs show up.
557	 * */
558	if (__wait_for_cpus(&late_cpus_in, NSEC_PER_SEC))
559		return -1;
560
561	/*
562	 * On an SMT system, it suffices to load the microcode on one sibling of
563	 * the core because the microcode engine is shared between the threads.
564	 * Synchronization still needs to take place so that no concurrent
565	 * loading attempts happen on multiple threads of an SMT core. See
566	 * below.
567	 */
568	if (cpumask_first(topology_sibling_cpumask(cpu)) == cpu)
569		apply_microcode_local(&err);
570	else
571		goto wait_for_siblings;
572
573	if (err >= UCODE_NFOUND) {
574		if (err == UCODE_ERROR)
575			pr_warn("Error reloading microcode on CPU %d\n", cpu);
576
577		ret = -1;
578	}
579
580wait_for_siblings:
581	if (__wait_for_cpus(&late_cpus_out, NSEC_PER_SEC))
582		panic("Timeout during microcode update!\n");
583
584	/*
585	 * At least one thread has completed update on each core.
586	 * For others, simply call the update to make sure the
587	 * per-cpu cpuinfo can be updated with right microcode
588	 * revision.
589	 */
590	if (cpumask_first(topology_sibling_cpumask(cpu)) != cpu)
591		apply_microcode_local(&err);
592
593	return ret;
594}
595
596/*
597 * Reload microcode late on all CPUs. Wait for a sec until they
598 * all gather together.
599 */
600static int microcode_reload_late(void)
601{
602	int ret;
603
604	atomic_set(&late_cpus_in,  0);
605	atomic_set(&late_cpus_out, 0);
606
607	ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);
608	if (ret == 0)
609		microcode_check();
610
611	pr_info("Reload completed, microcode revision: 0x%x\n", boot_cpu_data.microcode);
612
613	return ret;
614}
615
616static ssize_t reload_store(struct device *dev,
617			    struct device_attribute *attr,
618			    const char *buf, size_t size)
619{
620	enum ucode_state tmp_ret = UCODE_OK;
621	int bsp = boot_cpu_data.cpu_index;
622	unsigned long val;
623	ssize_t ret = 0;
624
625	ret = kstrtoul(buf, 0, &val);
626	if (ret)
627		return ret;
628
629	if (val != 1)
630		return size;
631
632	get_online_cpus();
633
634	ret = check_online_cpus();
635	if (ret)
636		goto put;
637
638	tmp_ret = microcode_ops->request_microcode_fw(bsp, &microcode_pdev->dev, true);
639	if (tmp_ret != UCODE_NEW)
640		goto put;
641
642	mutex_lock(&microcode_mutex);
643	ret = microcode_reload_late();
644	mutex_unlock(&microcode_mutex);
645
646put:
647	put_online_cpus();
648
649	if (ret == 0)
650		ret = size;
651
652	return ret;
653}
654
655static ssize_t version_show(struct device *dev,
656			struct device_attribute *attr, char *buf)
657{
658	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
659
660	return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
661}
662
663static ssize_t pf_show(struct device *dev,
664			struct device_attribute *attr, char *buf)
665{
666	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
667
668	return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
669}
670
671static DEVICE_ATTR_WO(reload);
672static DEVICE_ATTR(version, 0444, version_show, NULL);
673static DEVICE_ATTR(processor_flags, 0444, pf_show, NULL);
674
675static struct attribute *mc_default_attrs[] = {
676	&dev_attr_version.attr,
677	&dev_attr_processor_flags.attr,
678	NULL
679};
680
681static const struct attribute_group mc_attr_group = {
682	.attrs			= mc_default_attrs,
683	.name			= "microcode",
684};
685
686static void microcode_fini_cpu(int cpu)
687{
688	if (microcode_ops->microcode_fini_cpu)
689		microcode_ops->microcode_fini_cpu(cpu);
690}
691
692static enum ucode_state microcode_resume_cpu(int cpu)
693{
694	if (apply_microcode_on_target(cpu))
695		return UCODE_ERROR;
696
697	pr_debug("CPU%d updated upon resume\n", cpu);
698
699	return UCODE_OK;
700}
701
702static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
703{
704	enum ucode_state ustate;
705	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
706
707	if (uci->valid)
708		return UCODE_OK;
709
710	if (collect_cpu_info(cpu))
711		return UCODE_ERROR;
712
713	/* --dimm. Trigger a delayed update? */
714	if (system_state != SYSTEM_RUNNING)
715		return UCODE_NFOUND;
716
717	ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev, refresh_fw);
718	if (ustate == UCODE_NEW) {
719		pr_debug("CPU%d updated upon init\n", cpu);
720		apply_microcode_on_target(cpu);
721	}
722
723	return ustate;
724}
725
726static enum ucode_state microcode_update_cpu(int cpu)
727{
728	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
729
730	/* Refresh CPU microcode revision after resume. */
731	collect_cpu_info(cpu);
732
733	if (uci->valid)
734		return microcode_resume_cpu(cpu);
735
736	return microcode_init_cpu(cpu, false);
737}
738
739static int mc_device_add(struct device *dev, struct subsys_interface *sif)
740{
741	int err, cpu = dev->id;
742
743	if (!cpu_online(cpu))
744		return 0;
745
746	pr_debug("CPU%d added\n", cpu);
747
748	err = sysfs_create_group(&dev->kobj, &mc_attr_group);
749	if (err)
750		return err;
751
752	if (microcode_init_cpu(cpu, true) == UCODE_ERROR)
753		return -EINVAL;
754
755	return err;
756}
757
758static void mc_device_remove(struct device *dev, struct subsys_interface *sif)
759{
760	int cpu = dev->id;
761
762	if (!cpu_online(cpu))
763		return;
764
765	pr_debug("CPU%d removed\n", cpu);
766	microcode_fini_cpu(cpu);
767	sysfs_remove_group(&dev->kobj, &mc_attr_group);
768}
769
770static struct subsys_interface mc_cpu_interface = {
771	.name			= "microcode",
772	.subsys			= &cpu_subsys,
773	.add_dev		= mc_device_add,
774	.remove_dev		= mc_device_remove,
775};
776
777/**
778 * mc_bp_resume - Update boot CPU microcode during resume.
779 */
780static void mc_bp_resume(void)
781{
782	int cpu = smp_processor_id();
783	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
784
785	if (uci->valid && uci->mc)
786		microcode_ops->apply_microcode(cpu);
787	else if (!uci->mc)
788		reload_early_microcode();
789}
790
791static struct syscore_ops mc_syscore_ops = {
792	.resume			= mc_bp_resume,
793};
794
795static int mc_cpu_starting(unsigned int cpu)
796{
797	microcode_update_cpu(cpu);
798	pr_debug("CPU%d added\n", cpu);
799	return 0;
800}
801
802static int mc_cpu_online(unsigned int cpu)
803{
804	struct device *dev = get_cpu_device(cpu);
805
806	if (sysfs_create_group(&dev->kobj, &mc_attr_group))
807		pr_err("Failed to create group for CPU%d\n", cpu);
808	return 0;
809}
810
811static int mc_cpu_down_prep(unsigned int cpu)
812{
813	struct device *dev;
814
815	dev = get_cpu_device(cpu);
816	/* Suspend is in progress, only remove the interface */
817	sysfs_remove_group(&dev->kobj, &mc_attr_group);
818	pr_debug("CPU%d removed\n", cpu);
819
820	return 0;
821}
822
823static struct attribute *cpu_root_microcode_attrs[] = {
824	&dev_attr_reload.attr,
825	NULL
826};
827
828static const struct attribute_group cpu_root_microcode_group = {
829	.name  = "microcode",
830	.attrs = cpu_root_microcode_attrs,
831};
832
833static int __init microcode_init(void)
834{
835	struct cpuinfo_x86 *c = &boot_cpu_data;
836	int error;
837
838	if (dis_ucode_ldr)
839		return -EINVAL;
840
841	if (c->x86_vendor == X86_VENDOR_INTEL)
842		microcode_ops = init_intel_microcode();
843	else if (c->x86_vendor == X86_VENDOR_AMD)
844		microcode_ops = init_amd_microcode();
845	else
846		pr_err("no support for this CPU vendor\n");
847
848	if (!microcode_ops)
849		return -ENODEV;
850
851	microcode_pdev = platform_device_register_simple("microcode", -1,
852							 NULL, 0);
853	if (IS_ERR(microcode_pdev))
854		return PTR_ERR(microcode_pdev);
855
856	get_online_cpus();
857	mutex_lock(&microcode_mutex);
858
859	error = subsys_interface_register(&mc_cpu_interface);
860	if (!error)
861		perf_check_microcode();
862	mutex_unlock(&microcode_mutex);
863	put_online_cpus();
864
865	if (error)
866		goto out_pdev;
867
868	error = sysfs_create_group(&cpu_subsys.dev_root->kobj,
869				   &cpu_root_microcode_group);
870
871	if (error) {
872		pr_err("Error creating microcode group!\n");
873		goto out_driver;
874	}
875
876	error = microcode_dev_init();
877	if (error)
878		goto out_ucode_group;
879
880	register_syscore_ops(&mc_syscore_ops);
881	cpuhp_setup_state_nocalls(CPUHP_AP_MICROCODE_LOADER, "x86/microcode:starting",
882				  mc_cpu_starting, NULL);
883	cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
884				  mc_cpu_online, mc_cpu_down_prep);
885
886	pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);
887
888	return 0;
889
890 out_ucode_group:
891	sysfs_remove_group(&cpu_subsys.dev_root->kobj,
892			   &cpu_root_microcode_group);
893
894 out_driver:
895	get_online_cpus();
896	mutex_lock(&microcode_mutex);
897
898	subsys_interface_unregister(&mc_cpu_interface);
899
900	mutex_unlock(&microcode_mutex);
901	put_online_cpus();
902
903 out_pdev:
904	platform_device_unregister(microcode_pdev);
905	return error;
906
907}
908fs_initcall(save_microcode_in_initrd);
909late_initcall(microcode_init);