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1/* SPDX-License-Identifier: GPL-2.0 */
2#include <linux/sh_intc.h>
3#include <linux/irq.h>
4#include <linux/irqdomain.h>
5#include <linux/list.h>
6#include <linux/kernel.h>
7#include <linux/types.h>
8#include <linux/radix-tree.h>
9#include <linux/device.h>
10
11#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
12 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
13 ((addr_e) << 16) | ((addr_d << 24)))
14
15#define _INTC_SHIFT(h) (h & 0x1f)
16#define _INTC_WIDTH(h) ((h >> 5) & 0xf)
17#define _INTC_FN(h) ((h >> 9) & 0xf)
18#define _INTC_MODE(h) ((h >> 13) & 0x7)
19#define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
20#define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
21
22#ifdef CONFIG_SMP
23#define IS_SMP(x) (x.smp)
24#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
25#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
26#else
27#define IS_SMP(x) 0
28#define INTC_REG(d, x, c) (d->reg[(x)])
29#define SMP_NR(d, x) 1
30#endif
31
32struct intc_handle_int {
33 unsigned int irq;
34 unsigned long handle;
35};
36
37struct intc_window {
38 phys_addr_t phys;
39 void __iomem *virt;
40 unsigned long size;
41};
42
43struct intc_map_entry {
44 intc_enum enum_id;
45 struct intc_desc_int *desc;
46};
47
48struct intc_subgroup_entry {
49 unsigned int pirq;
50 intc_enum enum_id;
51 unsigned long handle;
52};
53
54struct intc_desc_int {
55 struct list_head list;
56 struct device dev;
57 struct radix_tree_root tree;
58 raw_spinlock_t lock;
59 unsigned int index;
60 unsigned long *reg;
61#ifdef CONFIG_SMP
62 unsigned long *smp;
63#endif
64 unsigned int nr_reg;
65 struct intc_handle_int *prio;
66 unsigned int nr_prio;
67 struct intc_handle_int *sense;
68 unsigned int nr_sense;
69 struct intc_window *window;
70 unsigned int nr_windows;
71 struct irq_domain *domain;
72 struct irq_chip chip;
73 bool skip_suspend;
74};
75
76
77enum {
78 REG_FN_ERR = 0,
79 REG_FN_TEST_BASE = 1,
80 REG_FN_WRITE_BASE = 5,
81 REG_FN_MODIFY_BASE = 9
82};
83
84enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
85 MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */
86 MODE_DUAL_REG, /* Two registers, set bit to enable / disable */
87 MODE_PRIO_REG, /* Priority value written to enable interrupt */
88 MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */
89};
90
91static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
92{
93 struct irq_chip *chip = irq_get_chip(irq);
94
95 return container_of(chip, struct intc_desc_int, chip);
96}
97
98/*
99 * Grumble.
100 */
101static inline void activate_irq(int irq)
102{
103 irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
104}
105
106static inline int intc_handle_int_cmp(const void *a, const void *b)
107{
108 const struct intc_handle_int *_a = a;
109 const struct intc_handle_int *_b = b;
110
111 return _a->irq - _b->irq;
112}
113
114/* access.c */
115extern unsigned long
116(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
117
118extern unsigned long
119(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
120 unsigned long (*fn)(unsigned long,
121 unsigned long, unsigned long),
122 unsigned int irq);
123extern unsigned long
124(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
125 unsigned long (*fn)(unsigned long,
126 unsigned long, unsigned long),
127 unsigned int irq);
128extern unsigned long
129(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
130 unsigned long (*fn)(unsigned long,
131 unsigned long, unsigned long),
132 unsigned int irq);
133
134unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
135unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
136unsigned int intc_set_field_from_handle(unsigned int value,
137 unsigned int field_value,
138 unsigned int handle);
139unsigned long intc_get_field_from_handle(unsigned int value,
140 unsigned int handle);
141
142/* balancing.c */
143#ifdef CONFIG_INTC_BALANCING
144void intc_balancing_enable(unsigned int irq);
145void intc_balancing_disable(unsigned int irq);
146void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
147 struct intc_desc_int *d, intc_enum id);
148#else
149static inline void intc_balancing_enable(unsigned int irq) { }
150static inline void intc_balancing_disable(unsigned int irq) { }
151static inline void
152intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
153 struct intc_desc_int *d, intc_enum id) { }
154#endif
155
156/* chip.c */
157extern struct irq_chip intc_irq_chip;
158void _intc_enable(struct irq_data *data, unsigned long handle);
159
160/* core.c */
161extern struct list_head intc_list;
162extern raw_spinlock_t intc_big_lock;
163extern struct bus_type intc_subsys;
164
165unsigned int intc_get_dfl_prio_level(void);
166unsigned int intc_get_prio_level(unsigned int irq);
167void intc_set_prio_level(unsigned int irq, unsigned int level);
168
169/* handle.c */
170unsigned int intc_get_mask_handle(struct intc_desc *desc,
171 struct intc_desc_int *d,
172 intc_enum enum_id, int do_grps);
173unsigned int intc_get_prio_handle(struct intc_desc *desc,
174 struct intc_desc_int *d,
175 intc_enum enum_id, int do_grps);
176unsigned int intc_get_sense_handle(struct intc_desc *desc,
177 struct intc_desc_int *d,
178 intc_enum enum_id);
179void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
180 struct intc_desc_int *d, intc_enum id);
181unsigned long intc_get_ack_handle(unsigned int irq);
182void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
183 intc_enum enum_id, int enable);
184
185/* irqdomain.c */
186void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw);
187
188/* virq.c */
189void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
190void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
191struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);
1#include <linux/sh_intc.h>
2#include <linux/irq.h>
3#include <linux/list.h>
4#include <linux/kernel.h>
5#include <linux/types.h>
6#include <linux/radix-tree.h>
7#include <linux/sysdev.h>
8
9#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
10 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
11 ((addr_e) << 16) | ((addr_d << 24)))
12
13#define _INTC_SHIFT(h) (h & 0x1f)
14#define _INTC_WIDTH(h) ((h >> 5) & 0xf)
15#define _INTC_FN(h) ((h >> 9) & 0xf)
16#define _INTC_MODE(h) ((h >> 13) & 0x7)
17#define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
18#define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
19
20#ifdef CONFIG_SMP
21#define IS_SMP(x) (x.smp)
22#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
23#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
24#else
25#define IS_SMP(x) 0
26#define INTC_REG(d, x, c) (d->reg[(x)])
27#define SMP_NR(d, x) 1
28#endif
29
30struct intc_handle_int {
31 unsigned int irq;
32 unsigned long handle;
33};
34
35struct intc_window {
36 phys_addr_t phys;
37 void __iomem *virt;
38 unsigned long size;
39};
40
41struct intc_map_entry {
42 intc_enum enum_id;
43 struct intc_desc_int *desc;
44};
45
46struct intc_subgroup_entry {
47 unsigned int pirq;
48 intc_enum enum_id;
49 unsigned long handle;
50};
51
52struct intc_desc_int {
53 struct list_head list;
54 struct sys_device sysdev;
55 struct radix_tree_root tree;
56 raw_spinlock_t lock;
57 unsigned int index;
58 unsigned long *reg;
59#ifdef CONFIG_SMP
60 unsigned long *smp;
61#endif
62 unsigned int nr_reg;
63 struct intc_handle_int *prio;
64 unsigned int nr_prio;
65 struct intc_handle_int *sense;
66 unsigned int nr_sense;
67 struct intc_window *window;
68 unsigned int nr_windows;
69 struct irq_chip chip;
70};
71
72
73enum {
74 REG_FN_ERR = 0,
75 REG_FN_TEST_BASE = 1,
76 REG_FN_WRITE_BASE = 5,
77 REG_FN_MODIFY_BASE = 9
78};
79
80enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
81 MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */
82 MODE_DUAL_REG, /* Two registers, set bit to enable / disable */
83 MODE_PRIO_REG, /* Priority value written to enable interrupt */
84 MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */
85};
86
87static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
88{
89 struct irq_chip *chip = irq_get_chip(irq);
90
91 return container_of(chip, struct intc_desc_int, chip);
92}
93
94/*
95 * Grumble.
96 */
97static inline void activate_irq(int irq)
98{
99#ifdef CONFIG_ARM
100 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
101 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
102 */
103 set_irq_flags(irq, IRQF_VALID);
104#else
105 /* same effect on other architectures */
106 irq_set_noprobe(irq);
107#endif
108}
109
110/* access.c */
111extern unsigned long
112(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
113
114extern unsigned long
115(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
116 unsigned long (*fn)(unsigned long,
117 unsigned long, unsigned long),
118 unsigned int irq);
119extern unsigned long
120(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
121 unsigned long (*fn)(unsigned long,
122 unsigned long, unsigned long),
123 unsigned int irq);
124extern unsigned long
125(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
126 unsigned long (*fn)(unsigned long,
127 unsigned long, unsigned long),
128 unsigned int irq);
129
130unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
131unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
132unsigned int intc_set_field_from_handle(unsigned int value,
133 unsigned int field_value,
134 unsigned int handle);
135unsigned long intc_get_field_from_handle(unsigned int value,
136 unsigned int handle);
137
138/* balancing.c */
139#ifdef CONFIG_INTC_BALANCING
140void intc_balancing_enable(unsigned int irq);
141void intc_balancing_disable(unsigned int irq);
142void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
143 struct intc_desc_int *d, intc_enum id);
144#else
145static inline void intc_balancing_enable(unsigned int irq) { }
146static inline void intc_balancing_disable(unsigned int irq) { }
147static inline void
148intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
149 struct intc_desc_int *d, intc_enum id) { }
150#endif
151
152/* chip.c */
153extern struct irq_chip intc_irq_chip;
154void _intc_enable(struct irq_data *data, unsigned long handle);
155
156/* core.c */
157extern struct list_head intc_list;
158extern raw_spinlock_t intc_big_lock;
159extern unsigned int nr_intc_controllers;
160extern struct sysdev_class intc_sysdev_class;
161
162unsigned int intc_get_dfl_prio_level(void);
163unsigned int intc_get_prio_level(unsigned int irq);
164void intc_set_prio_level(unsigned int irq, unsigned int level);
165
166/* handle.c */
167unsigned int intc_get_mask_handle(struct intc_desc *desc,
168 struct intc_desc_int *d,
169 intc_enum enum_id, int do_grps);
170unsigned int intc_get_prio_handle(struct intc_desc *desc,
171 struct intc_desc_int *d,
172 intc_enum enum_id, int do_grps);
173unsigned int intc_get_sense_handle(struct intc_desc *desc,
174 struct intc_desc_int *d,
175 intc_enum enum_id);
176void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
177 struct intc_desc_int *d, intc_enum id);
178unsigned long intc_get_ack_handle(unsigned int irq);
179void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
180 intc_enum enum_id, int enable);
181
182/* virq.c */
183void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
184void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
185struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);