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1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/apple-gmux.h>
26#include <linux/console.h>
27#include <linux/delay.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30#include <linux/pm_runtime.h>
31#include <linux/vgaarb.h>
32#include <linux/vga_switcheroo.h>
33
34#include "drmP.h"
35#include "drm_crtc_helper.h"
36
37#include <core/gpuobj.h>
38#include <core/option.h>
39#include <core/pci.h>
40#include <core/tegra.h>
41
42#include <nvif/class.h>
43#include <nvif/cl0002.h>
44#include <nvif/cla06f.h>
45#include <nvif/if0004.h>
46
47#include "nouveau_drm.h"
48#include "nouveau_dma.h"
49#include "nouveau_ttm.h"
50#include "nouveau_gem.h"
51#include "nouveau_vga.h"
52#include "nouveau_hwmon.h"
53#include "nouveau_acpi.h"
54#include "nouveau_bios.h"
55#include "nouveau_ioctl.h"
56#include "nouveau_abi16.h"
57#include "nouveau_fbcon.h"
58#include "nouveau_fence.h"
59#include "nouveau_debugfs.h"
60#include "nouveau_usif.h"
61#include "nouveau_connector.h"
62#include "nouveau_platform.h"
63
64MODULE_PARM_DESC(config, "option string to pass to driver core");
65static char *nouveau_config;
66module_param_named(config, nouveau_config, charp, 0400);
67
68MODULE_PARM_DESC(debug, "debug string to pass to driver core");
69static char *nouveau_debug;
70module_param_named(debug, nouveau_debug, charp, 0400);
71
72MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
73static int nouveau_noaccel = 0;
74module_param_named(noaccel, nouveau_noaccel, int, 0400);
75
76MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
77 "0 = disabled, 1 = enabled, 2 = headless)");
78int nouveau_modeset = -1;
79module_param_named(modeset, nouveau_modeset, int, 0400);
80
81MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
82int nouveau_runtime_pm = -1;
83module_param_named(runpm, nouveau_runtime_pm, int, 0400);
84
85static struct drm_driver driver_stub;
86static struct drm_driver driver_pci;
87static struct drm_driver driver_platform;
88
89static u64
90nouveau_pci_name(struct pci_dev *pdev)
91{
92 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
93 name |= pdev->bus->number << 16;
94 name |= PCI_SLOT(pdev->devfn) << 8;
95 return name | PCI_FUNC(pdev->devfn);
96}
97
98static u64
99nouveau_platform_name(struct platform_device *platformdev)
100{
101 return platformdev->id;
102}
103
104static u64
105nouveau_name(struct drm_device *dev)
106{
107 if (dev->pdev)
108 return nouveau_pci_name(dev->pdev);
109 else
110 return nouveau_platform_name(dev->platformdev);
111}
112
113static int
114nouveau_cli_create(struct drm_device *dev, const char *sname,
115 int size, void **pcli)
116{
117 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
118 int ret;
119 if (cli) {
120 snprintf(cli->name, sizeof(cli->name), "%s", sname);
121 cli->dev = dev;
122
123 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
124 nouveau_config, nouveau_debug,
125 &cli->base);
126 if (ret == 0) {
127 mutex_init(&cli->mutex);
128 usif_client_init(cli);
129 }
130 return ret;
131 }
132 return -ENOMEM;
133}
134
135static void
136nouveau_cli_destroy(struct nouveau_cli *cli)
137{
138 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
139 nvif_client_fini(&cli->base);
140 usif_client_fini(cli);
141 kfree(cli);
142}
143
144static void
145nouveau_accel_fini(struct nouveau_drm *drm)
146{
147 nouveau_channel_idle(drm->channel);
148 nvif_object_fini(&drm->ntfy);
149 nvkm_gpuobj_del(&drm->notify);
150 nvif_notify_fini(&drm->flip);
151 nvif_object_fini(&drm->nvsw);
152 nouveau_channel_del(&drm->channel);
153
154 nouveau_channel_idle(drm->cechan);
155 nvif_object_fini(&drm->ttm.copy);
156 nouveau_channel_del(&drm->cechan);
157
158 if (drm->fence)
159 nouveau_fence(drm)->dtor(drm);
160}
161
162static void
163nouveau_accel_init(struct nouveau_drm *drm)
164{
165 struct nvif_device *device = &drm->device;
166 struct nvif_sclass *sclass;
167 u32 arg0, arg1;
168 int ret, i, n;
169
170 if (nouveau_noaccel)
171 return;
172
173 /* initialise synchronisation routines */
174 /*XXX: this is crap, but the fence/channel stuff is a little
175 * backwards in some places. this will be fixed.
176 */
177 ret = n = nvif_object_sclass_get(&device->object, &sclass);
178 if (ret < 0)
179 return;
180
181 for (ret = -ENOSYS, i = 0; i < n; i++) {
182 switch (sclass[i].oclass) {
183 case NV03_CHANNEL_DMA:
184 ret = nv04_fence_create(drm);
185 break;
186 case NV10_CHANNEL_DMA:
187 ret = nv10_fence_create(drm);
188 break;
189 case NV17_CHANNEL_DMA:
190 case NV40_CHANNEL_DMA:
191 ret = nv17_fence_create(drm);
192 break;
193 case NV50_CHANNEL_GPFIFO:
194 ret = nv50_fence_create(drm);
195 break;
196 case G82_CHANNEL_GPFIFO:
197 ret = nv84_fence_create(drm);
198 break;
199 case FERMI_CHANNEL_GPFIFO:
200 case KEPLER_CHANNEL_GPFIFO_A:
201 case KEPLER_CHANNEL_GPFIFO_B:
202 case MAXWELL_CHANNEL_GPFIFO_A:
203 ret = nvc0_fence_create(drm);
204 break;
205 default:
206 break;
207 }
208 }
209
210 nvif_object_sclass_put(&sclass);
211 if (ret) {
212 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
213 nouveau_accel_fini(drm);
214 return;
215 }
216
217 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
218 ret = nouveau_channel_new(drm, &drm->device,
219 NVA06F_V0_ENGINE_CE0 |
220 NVA06F_V0_ENGINE_CE1,
221 0, &drm->cechan);
222 if (ret)
223 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
224
225 arg0 = NVA06F_V0_ENGINE_GR;
226 arg1 = 1;
227 } else
228 if (device->info.chipset >= 0xa3 &&
229 device->info.chipset != 0xaa &&
230 device->info.chipset != 0xac) {
231 ret = nouveau_channel_new(drm, &drm->device,
232 NvDmaFB, NvDmaTT, &drm->cechan);
233 if (ret)
234 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
235
236 arg0 = NvDmaFB;
237 arg1 = NvDmaTT;
238 } else {
239 arg0 = NvDmaFB;
240 arg1 = NvDmaTT;
241 }
242
243 ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
244 if (ret) {
245 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
246 nouveau_accel_fini(drm);
247 return;
248 }
249
250 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
251 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
252 if (ret == 0) {
253 ret = RING_SPACE(drm->channel, 2);
254 if (ret == 0) {
255 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
256 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
257 OUT_RING (drm->channel, NVDRM_NVSW);
258 } else
259 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
260 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
261 OUT_RING (drm->channel, 0x001f0000);
262 }
263 }
264
265 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
266 false, NV04_NVSW_NTFY_UEVENT,
267 NULL, 0, 0, &drm->flip);
268 if (ret == 0)
269 ret = nvif_notify_get(&drm->flip);
270 if (ret) {
271 nouveau_accel_fini(drm);
272 return;
273 }
274 }
275
276 if (ret) {
277 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
278 nouveau_accel_fini(drm);
279 return;
280 }
281
282 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
283 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
284 NULL, &drm->notify);
285 if (ret) {
286 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
287 nouveau_accel_fini(drm);
288 return;
289 }
290
291 ret = nvif_object_init(&drm->channel->user, NvNotify0,
292 NV_DMA_IN_MEMORY,
293 &(struct nv_dma_v0) {
294 .target = NV_DMA_V0_TARGET_VRAM,
295 .access = NV_DMA_V0_ACCESS_RDWR,
296 .start = drm->notify->addr,
297 .limit = drm->notify->addr + 31
298 }, sizeof(struct nv_dma_v0),
299 &drm->ntfy);
300 if (ret) {
301 nouveau_accel_fini(drm);
302 return;
303 }
304 }
305
306
307 nouveau_bo_move_init(drm);
308}
309
310static int nouveau_drm_probe(struct pci_dev *pdev,
311 const struct pci_device_id *pent)
312{
313 struct nvkm_device *device;
314 struct apertures_struct *aper;
315 bool boot = false;
316 int ret;
317
318 /*
319 * apple-gmux is needed on dual GPU MacBook Pro
320 * to probe the panel if we're the inactive GPU.
321 */
322 if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
323 apple_gmux_present() && pdev != vga_default_device() &&
324 !vga_switcheroo_handler_flags())
325 return -EPROBE_DEFER;
326
327 /* remove conflicting drivers (vesafb, efifb etc) */
328 aper = alloc_apertures(3);
329 if (!aper)
330 return -ENOMEM;
331
332 aper->ranges[0].base = pci_resource_start(pdev, 1);
333 aper->ranges[0].size = pci_resource_len(pdev, 1);
334 aper->count = 1;
335
336 if (pci_resource_len(pdev, 2)) {
337 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
338 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
339 aper->count++;
340 }
341
342 if (pci_resource_len(pdev, 3)) {
343 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
344 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
345 aper->count++;
346 }
347
348#ifdef CONFIG_X86
349 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
350#endif
351 if (nouveau_modeset != 2)
352 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
353 kfree(aper);
354
355 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
356 true, true, ~0ULL, &device);
357 if (ret)
358 return ret;
359
360 pci_set_master(pdev);
361
362 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
363 if (ret) {
364 nvkm_device_del(&device);
365 return ret;
366 }
367
368 return 0;
369}
370
371#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
372
373static void
374nouveau_get_hdmi_dev(struct nouveau_drm *drm)
375{
376 struct pci_dev *pdev = drm->dev->pdev;
377
378 if (!pdev) {
379 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
380 drm->hdmi_device = NULL;
381 return;
382 }
383
384 /* subfunction one is a hdmi audio device? */
385 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
386 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
387
388 if (!drm->hdmi_device) {
389 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
390 return;
391 }
392
393 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
394 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
395 pci_dev_put(drm->hdmi_device);
396 drm->hdmi_device = NULL;
397 return;
398 }
399}
400
401static int
402nouveau_drm_load(struct drm_device *dev, unsigned long flags)
403{
404 struct nouveau_drm *drm;
405 int ret;
406
407 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
408 if (ret)
409 return ret;
410
411 dev->dev_private = drm;
412 drm->dev = dev;
413 nvxx_client(&drm->client.base)->debug =
414 nvkm_dbgopt(nouveau_debug, "DRM");
415
416 INIT_LIST_HEAD(&drm->clients);
417 spin_lock_init(&drm->tile.lock);
418
419 nouveau_get_hdmi_dev(drm);
420
421 ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
422 &(struct nv_device_v0) {
423 .device = ~0,
424 }, sizeof(struct nv_device_v0),
425 &drm->device);
426 if (ret)
427 goto fail_device;
428
429 dev->irq_enabled = true;
430
431 /* workaround an odd issue on nvc1 by disabling the device's
432 * nosnoop capability. hopefully won't cause issues until a
433 * better fix is found - assuming there is one...
434 */
435 if (drm->device.info.chipset == 0xc1)
436 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
437
438 nouveau_vga_init(drm);
439
440 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
441 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
442 0x1000, NULL, &drm->client.vm);
443 if (ret)
444 goto fail_device;
445
446 nvxx_client(&drm->client.base)->vm = drm->client.vm;
447 }
448
449 ret = nouveau_ttm_init(drm);
450 if (ret)
451 goto fail_ttm;
452
453 ret = nouveau_bios_init(dev);
454 if (ret)
455 goto fail_bios;
456
457 ret = nouveau_display_create(dev);
458 if (ret)
459 goto fail_dispctor;
460
461 if (dev->mode_config.num_crtc) {
462 ret = nouveau_display_init(dev);
463 if (ret)
464 goto fail_dispinit;
465 }
466
467 nouveau_debugfs_init(drm);
468 nouveau_hwmon_init(dev);
469 nouveau_accel_init(drm);
470 nouveau_fbcon_init(dev);
471
472 if (nouveau_runtime_pm != 0) {
473 pm_runtime_use_autosuspend(dev->dev);
474 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
475 pm_runtime_set_active(dev->dev);
476 pm_runtime_allow(dev->dev);
477 pm_runtime_mark_last_busy(dev->dev);
478 pm_runtime_put(dev->dev);
479 }
480 return 0;
481
482fail_dispinit:
483 nouveau_display_destroy(dev);
484fail_dispctor:
485 nouveau_bios_takedown(dev);
486fail_bios:
487 nouveau_ttm_fini(drm);
488fail_ttm:
489 nouveau_vga_fini(drm);
490fail_device:
491 nvif_device_fini(&drm->device);
492 nouveau_cli_destroy(&drm->client);
493 return ret;
494}
495
496static int
497nouveau_drm_unload(struct drm_device *dev)
498{
499 struct nouveau_drm *drm = nouveau_drm(dev);
500
501 pm_runtime_get_sync(dev->dev);
502 nouveau_fbcon_fini(dev);
503 nouveau_accel_fini(drm);
504 nouveau_hwmon_fini(dev);
505 nouveau_debugfs_fini(drm);
506
507 if (dev->mode_config.num_crtc)
508 nouveau_display_fini(dev);
509 nouveau_display_destroy(dev);
510
511 nouveau_bios_takedown(dev);
512
513 nouveau_ttm_fini(drm);
514 nouveau_vga_fini(drm);
515
516 nvif_device_fini(&drm->device);
517 if (drm->hdmi_device)
518 pci_dev_put(drm->hdmi_device);
519 nouveau_cli_destroy(&drm->client);
520 return 0;
521}
522
523void
524nouveau_drm_device_remove(struct drm_device *dev)
525{
526 struct nouveau_drm *drm = nouveau_drm(dev);
527 struct nvkm_client *client;
528 struct nvkm_device *device;
529
530 dev->irq_enabled = false;
531 client = nvxx_client(&drm->client.base);
532 device = nvkm_device_find(client->device);
533 drm_put_dev(dev);
534
535 nvkm_device_del(&device);
536}
537
538static void
539nouveau_drm_remove(struct pci_dev *pdev)
540{
541 struct drm_device *dev = pci_get_drvdata(pdev);
542
543 nouveau_drm_device_remove(dev);
544}
545
546static int
547nouveau_do_suspend(struct drm_device *dev, bool runtime)
548{
549 struct nouveau_drm *drm = nouveau_drm(dev);
550 struct nouveau_cli *cli;
551 int ret;
552
553 if (dev->mode_config.num_crtc) {
554 NV_INFO(drm, "suspending console...\n");
555 nouveau_fbcon_set_suspend(dev, 1);
556 NV_INFO(drm, "suspending display...\n");
557 ret = nouveau_display_suspend(dev, runtime);
558 if (ret)
559 return ret;
560 }
561
562 NV_INFO(drm, "evicting buffers...\n");
563 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
564
565 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
566 if (drm->cechan) {
567 ret = nouveau_channel_idle(drm->cechan);
568 if (ret)
569 goto fail_display;
570 }
571
572 if (drm->channel) {
573 ret = nouveau_channel_idle(drm->channel);
574 if (ret)
575 goto fail_display;
576 }
577
578 NV_INFO(drm, "suspending client object trees...\n");
579 if (drm->fence && nouveau_fence(drm)->suspend) {
580 if (!nouveau_fence(drm)->suspend(drm)) {
581 ret = -ENOMEM;
582 goto fail_display;
583 }
584 }
585
586 list_for_each_entry(cli, &drm->clients, head) {
587 ret = nvif_client_suspend(&cli->base);
588 if (ret)
589 goto fail_client;
590 }
591
592 NV_INFO(drm, "suspending kernel object tree...\n");
593 ret = nvif_client_suspend(&drm->client.base);
594 if (ret)
595 goto fail_client;
596
597 return 0;
598
599fail_client:
600 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
601 nvif_client_resume(&cli->base);
602 }
603
604 if (drm->fence && nouveau_fence(drm)->resume)
605 nouveau_fence(drm)->resume(drm);
606
607fail_display:
608 if (dev->mode_config.num_crtc) {
609 NV_INFO(drm, "resuming display...\n");
610 nouveau_display_resume(dev, runtime);
611 }
612 return ret;
613}
614
615static int
616nouveau_do_resume(struct drm_device *dev, bool runtime)
617{
618 struct nouveau_drm *drm = nouveau_drm(dev);
619 struct nouveau_cli *cli;
620
621 NV_INFO(drm, "resuming kernel object tree...\n");
622 nvif_client_resume(&drm->client.base);
623
624 NV_INFO(drm, "resuming client object trees...\n");
625 if (drm->fence && nouveau_fence(drm)->resume)
626 nouveau_fence(drm)->resume(drm);
627
628 list_for_each_entry(cli, &drm->clients, head) {
629 nvif_client_resume(&cli->base);
630 }
631
632 nouveau_run_vbios_init(dev);
633
634 if (dev->mode_config.num_crtc) {
635 NV_INFO(drm, "resuming display...\n");
636 nouveau_display_resume(dev, runtime);
637 NV_INFO(drm, "resuming console...\n");
638 nouveau_fbcon_set_suspend(dev, 0);
639 }
640
641 return 0;
642}
643
644int
645nouveau_pmops_suspend(struct device *dev)
646{
647 struct pci_dev *pdev = to_pci_dev(dev);
648 struct drm_device *drm_dev = pci_get_drvdata(pdev);
649 int ret;
650
651 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
652 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
653 return 0;
654
655 ret = nouveau_do_suspend(drm_dev, false);
656 if (ret)
657 return ret;
658
659 pci_save_state(pdev);
660 pci_disable_device(pdev);
661 pci_set_power_state(pdev, PCI_D3hot);
662 udelay(200);
663 return 0;
664}
665
666int
667nouveau_pmops_resume(struct device *dev)
668{
669 struct pci_dev *pdev = to_pci_dev(dev);
670 struct drm_device *drm_dev = pci_get_drvdata(pdev);
671 int ret;
672
673 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
674 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
675 return 0;
676
677 pci_set_power_state(pdev, PCI_D0);
678 pci_restore_state(pdev);
679 ret = pci_enable_device(pdev);
680 if (ret)
681 return ret;
682 pci_set_master(pdev);
683
684 return nouveau_do_resume(drm_dev, false);
685}
686
687static int
688nouveau_pmops_freeze(struct device *dev)
689{
690 struct pci_dev *pdev = to_pci_dev(dev);
691 struct drm_device *drm_dev = pci_get_drvdata(pdev);
692 return nouveau_do_suspend(drm_dev, false);
693}
694
695static int
696nouveau_pmops_thaw(struct device *dev)
697{
698 struct pci_dev *pdev = to_pci_dev(dev);
699 struct drm_device *drm_dev = pci_get_drvdata(pdev);
700 return nouveau_do_resume(drm_dev, false);
701}
702
703static int
704nouveau_pmops_runtime_suspend(struct device *dev)
705{
706 struct pci_dev *pdev = to_pci_dev(dev);
707 struct drm_device *drm_dev = pci_get_drvdata(pdev);
708 int ret;
709
710 if (nouveau_runtime_pm == 0) {
711 pm_runtime_forbid(dev);
712 return -EBUSY;
713 }
714
715 /* are we optimus enabled? */
716 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
717 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
718 pm_runtime_forbid(dev);
719 return -EBUSY;
720 }
721
722 drm_kms_helper_poll_disable(drm_dev);
723 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
724 nouveau_switcheroo_optimus_dsm();
725 ret = nouveau_do_suspend(drm_dev, true);
726 pci_save_state(pdev);
727 pci_disable_device(pdev);
728 pci_ignore_hotplug(pdev);
729 pci_set_power_state(pdev, PCI_D3cold);
730 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
731 return ret;
732}
733
734static int
735nouveau_pmops_runtime_resume(struct device *dev)
736{
737 struct pci_dev *pdev = to_pci_dev(dev);
738 struct drm_device *drm_dev = pci_get_drvdata(pdev);
739 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
740 int ret;
741
742 if (nouveau_runtime_pm == 0)
743 return -EINVAL;
744
745 pci_set_power_state(pdev, PCI_D0);
746 pci_restore_state(pdev);
747 ret = pci_enable_device(pdev);
748 if (ret)
749 return ret;
750 pci_set_master(pdev);
751
752 ret = nouveau_do_resume(drm_dev, true);
753 drm_kms_helper_poll_enable(drm_dev);
754 /* do magic */
755 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
756 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
757 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
758 return ret;
759}
760
761static int
762nouveau_pmops_runtime_idle(struct device *dev)
763{
764 struct pci_dev *pdev = to_pci_dev(dev);
765 struct drm_device *drm_dev = pci_get_drvdata(pdev);
766 struct nouveau_drm *drm = nouveau_drm(drm_dev);
767 struct drm_crtc *crtc;
768
769 if (nouveau_runtime_pm == 0) {
770 pm_runtime_forbid(dev);
771 return -EBUSY;
772 }
773
774 /* are we optimus enabled? */
775 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
776 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
777 pm_runtime_forbid(dev);
778 return -EBUSY;
779 }
780
781 /* if we have a hdmi audio device - make sure it has a driver loaded */
782 if (drm->hdmi_device) {
783 if (!drm->hdmi_device->driver) {
784 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
785 pm_runtime_mark_last_busy(dev);
786 return -EBUSY;
787 }
788 }
789
790 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
791 if (crtc->enabled) {
792 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
793 return -EBUSY;
794 }
795 }
796 pm_runtime_mark_last_busy(dev);
797 pm_runtime_autosuspend(dev);
798 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
799 return 1;
800}
801
802static int
803nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
804{
805 struct nouveau_drm *drm = nouveau_drm(dev);
806 struct nouveau_cli *cli;
807 char name[32], tmpname[TASK_COMM_LEN];
808 int ret;
809
810 /* need to bring up power immediately if opening device */
811 ret = pm_runtime_get_sync(dev->dev);
812 if (ret < 0 && ret != -EACCES)
813 return ret;
814
815 get_task_comm(tmpname, current);
816 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
817
818 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
819
820 if (ret)
821 goto out_suspend;
822
823 cli->base.super = false;
824
825 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
826 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
827 0x1000, NULL, &cli->vm);
828 if (ret) {
829 nouveau_cli_destroy(cli);
830 goto out_suspend;
831 }
832
833 nvxx_client(&cli->base)->vm = cli->vm;
834 }
835
836 fpriv->driver_priv = cli;
837
838 mutex_lock(&drm->client.mutex);
839 list_add(&cli->head, &drm->clients);
840 mutex_unlock(&drm->client.mutex);
841
842out_suspend:
843 pm_runtime_mark_last_busy(dev->dev);
844 pm_runtime_put_autosuspend(dev->dev);
845
846 return ret;
847}
848
849static void
850nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
851{
852 struct nouveau_cli *cli = nouveau_cli(fpriv);
853 struct nouveau_drm *drm = nouveau_drm(dev);
854
855 pm_runtime_get_sync(dev->dev);
856
857 mutex_lock(&cli->mutex);
858 if (cli->abi16)
859 nouveau_abi16_fini(cli->abi16);
860 mutex_unlock(&cli->mutex);
861
862 mutex_lock(&drm->client.mutex);
863 list_del(&cli->head);
864 mutex_unlock(&drm->client.mutex);
865
866}
867
868static void
869nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
870{
871 struct nouveau_cli *cli = nouveau_cli(fpriv);
872 nouveau_cli_destroy(cli);
873 pm_runtime_mark_last_busy(dev->dev);
874 pm_runtime_put_autosuspend(dev->dev);
875}
876
877static const struct drm_ioctl_desc
878nouveau_ioctls[] = {
879 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
880 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
881 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
882 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
883 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
884 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
885 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
886 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
887 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
888 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
889 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
890 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
891};
892
893long
894nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
895{
896 struct drm_file *filp = file->private_data;
897 struct drm_device *dev = filp->minor->dev;
898 long ret;
899
900 ret = pm_runtime_get_sync(dev->dev);
901 if (ret < 0 && ret != -EACCES)
902 return ret;
903
904 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
905 case DRM_NOUVEAU_NVIF:
906 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
907 break;
908 default:
909 ret = drm_ioctl(file, cmd, arg);
910 break;
911 }
912
913 pm_runtime_mark_last_busy(dev->dev);
914 pm_runtime_put_autosuspend(dev->dev);
915 return ret;
916}
917
918static const struct file_operations
919nouveau_driver_fops = {
920 .owner = THIS_MODULE,
921 .open = drm_open,
922 .release = drm_release,
923 .unlocked_ioctl = nouveau_drm_ioctl,
924 .mmap = nouveau_ttm_mmap,
925 .poll = drm_poll,
926 .read = drm_read,
927#if defined(CONFIG_COMPAT)
928 .compat_ioctl = nouveau_compat_ioctl,
929#endif
930 .llseek = noop_llseek,
931};
932
933static struct drm_driver
934driver_stub = {
935 .driver_features =
936 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
937 DRIVER_KMS_LEGACY_CONTEXT,
938
939 .load = nouveau_drm_load,
940 .unload = nouveau_drm_unload,
941 .open = nouveau_drm_open,
942 .preclose = nouveau_drm_preclose,
943 .postclose = nouveau_drm_postclose,
944 .lastclose = nouveau_vga_lastclose,
945
946#if defined(CONFIG_DEBUG_FS)
947 .debugfs_init = nouveau_drm_debugfs_init,
948 .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
949#endif
950
951 .get_vblank_counter = drm_vblank_no_hw_counter,
952 .enable_vblank = nouveau_display_vblank_enable,
953 .disable_vblank = nouveau_display_vblank_disable,
954 .get_scanout_position = nouveau_display_scanoutpos,
955 .get_vblank_timestamp = nouveau_display_vblstamp,
956
957 .ioctls = nouveau_ioctls,
958 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
959 .fops = &nouveau_driver_fops,
960
961 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
962 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
963 .gem_prime_export = drm_gem_prime_export,
964 .gem_prime_import = drm_gem_prime_import,
965 .gem_prime_pin = nouveau_gem_prime_pin,
966 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
967 .gem_prime_unpin = nouveau_gem_prime_unpin,
968 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
969 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
970 .gem_prime_vmap = nouveau_gem_prime_vmap,
971 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
972
973 .gem_free_object = nouveau_gem_object_del,
974 .gem_open_object = nouveau_gem_object_open,
975 .gem_close_object = nouveau_gem_object_close,
976
977 .dumb_create = nouveau_display_dumb_create,
978 .dumb_map_offset = nouveau_display_dumb_map_offset,
979 .dumb_destroy = drm_gem_dumb_destroy,
980
981 .name = DRIVER_NAME,
982 .desc = DRIVER_DESC,
983#ifdef GIT_REVISION
984 .date = GIT_REVISION,
985#else
986 .date = DRIVER_DATE,
987#endif
988 .major = DRIVER_MAJOR,
989 .minor = DRIVER_MINOR,
990 .patchlevel = DRIVER_PATCHLEVEL,
991};
992
993static struct pci_device_id
994nouveau_drm_pci_table[] = {
995 {
996 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
997 .class = PCI_BASE_CLASS_DISPLAY << 16,
998 .class_mask = 0xff << 16,
999 },
1000 {
1001 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1002 .class = PCI_BASE_CLASS_DISPLAY << 16,
1003 .class_mask = 0xff << 16,
1004 },
1005 {}
1006};
1007
1008static void nouveau_display_options(void)
1009{
1010 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1011
1012 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1013 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1014 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1015 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1016 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1017 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1018 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1019 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1020 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1021 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1022}
1023
1024static const struct dev_pm_ops nouveau_pm_ops = {
1025 .suspend = nouveau_pmops_suspend,
1026 .resume = nouveau_pmops_resume,
1027 .freeze = nouveau_pmops_freeze,
1028 .thaw = nouveau_pmops_thaw,
1029 .poweroff = nouveau_pmops_freeze,
1030 .restore = nouveau_pmops_resume,
1031 .runtime_suspend = nouveau_pmops_runtime_suspend,
1032 .runtime_resume = nouveau_pmops_runtime_resume,
1033 .runtime_idle = nouveau_pmops_runtime_idle,
1034};
1035
1036static struct pci_driver
1037nouveau_drm_pci_driver = {
1038 .name = "nouveau",
1039 .id_table = nouveau_drm_pci_table,
1040 .probe = nouveau_drm_probe,
1041 .remove = nouveau_drm_remove,
1042 .driver.pm = &nouveau_pm_ops,
1043};
1044
1045struct drm_device *
1046nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1047 struct platform_device *pdev,
1048 struct nvkm_device **pdevice)
1049{
1050 struct drm_device *drm;
1051 int err;
1052
1053 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1054 true, true, ~0ULL, pdevice);
1055 if (err)
1056 goto err_free;
1057
1058 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1059 if (!drm) {
1060 err = -ENOMEM;
1061 goto err_free;
1062 }
1063
1064 drm->platformdev = pdev;
1065 platform_set_drvdata(pdev, drm);
1066
1067 return drm;
1068
1069err_free:
1070 nvkm_device_del(pdevice);
1071
1072 return ERR_PTR(err);
1073}
1074
1075static int __init
1076nouveau_drm_init(void)
1077{
1078 driver_pci = driver_stub;
1079 driver_pci.set_busid = drm_pci_set_busid;
1080 driver_platform = driver_stub;
1081 driver_platform.set_busid = drm_platform_set_busid;
1082
1083 nouveau_display_options();
1084
1085 if (nouveau_modeset == -1) {
1086#ifdef CONFIG_VGA_CONSOLE
1087 if (vgacon_text_force())
1088 nouveau_modeset = 0;
1089#endif
1090 }
1091
1092 if (!nouveau_modeset)
1093 return 0;
1094
1095#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1096 platform_driver_register(&nouveau_platform_driver);
1097#endif
1098
1099 nouveau_register_dsm_handler();
1100 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
1101}
1102
1103static void __exit
1104nouveau_drm_exit(void)
1105{
1106 if (!nouveau_modeset)
1107 return;
1108
1109 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
1110 nouveau_unregister_dsm_handler();
1111
1112#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1113 platform_driver_unregister(&nouveau_platform_driver);
1114#endif
1115}
1116
1117module_init(nouveau_drm_init);
1118module_exit(nouveau_drm_exit);
1119
1120MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1121MODULE_AUTHOR(DRIVER_AUTHOR);
1122MODULE_DESCRIPTION(DRIVER_DESC);
1123MODULE_LICENSE("GPL and additional rights");
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/delay.h>
26#include <linux/module.h>
27#include <linux/pci.h>
28#include <linux/pm_runtime.h>
29#include <linux/vga_switcheroo.h>
30#include <linux/mmu_notifier.h>
31#include <linux/dynamic_debug.h>
32
33#include <drm/drm_aperture.h>
34#include <drm/drm_drv.h>
35#include <drm/drm_fbdev_generic.h>
36#include <drm/drm_gem_ttm_helper.h>
37#include <drm/drm_ioctl.h>
38#include <drm/drm_vblank.h>
39
40#include <core/gpuobj.h>
41#include <core/option.h>
42#include <core/pci.h>
43#include <core/tegra.h>
44
45#include <nvif/driver.h>
46#include <nvif/fifo.h>
47#include <nvif/push006c.h>
48#include <nvif/user.h>
49
50#include <nvif/class.h>
51#include <nvif/cl0002.h>
52
53#include "nouveau_drv.h"
54#include "nouveau_dma.h"
55#include "nouveau_ttm.h"
56#include "nouveau_gem.h"
57#include "nouveau_vga.h"
58#include "nouveau_led.h"
59#include "nouveau_hwmon.h"
60#include "nouveau_acpi.h"
61#include "nouveau_bios.h"
62#include "nouveau_ioctl.h"
63#include "nouveau_abi16.h"
64#include "nouveau_fence.h"
65#include "nouveau_debugfs.h"
66#include "nouveau_usif.h"
67#include "nouveau_connector.h"
68#include "nouveau_platform.h"
69#include "nouveau_svm.h"
70#include "nouveau_dmem.h"
71#include "nouveau_exec.h"
72#include "nouveau_uvmm.h"
73#include "nouveau_sched.h"
74
75DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
76 "DRM_UT_CORE",
77 "DRM_UT_DRIVER",
78 "DRM_UT_KMS",
79 "DRM_UT_PRIME",
80 "DRM_UT_ATOMIC",
81 "DRM_UT_VBL",
82 "DRM_UT_STATE",
83 "DRM_UT_LEASE",
84 "DRM_UT_DP",
85 "DRM_UT_DRMRES");
86
87MODULE_PARM_DESC(config, "option string to pass to driver core");
88static char *nouveau_config;
89module_param_named(config, nouveau_config, charp, 0400);
90
91MODULE_PARM_DESC(debug, "debug string to pass to driver core");
92static char *nouveau_debug;
93module_param_named(debug, nouveau_debug, charp, 0400);
94
95MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
96static int nouveau_noaccel = 0;
97module_param_named(noaccel, nouveau_noaccel, int, 0400);
98
99MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
100 "0 = disabled, 1 = enabled, 2 = headless)");
101int nouveau_modeset = -1;
102module_param_named(modeset, nouveau_modeset, int, 0400);
103
104MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
105static int nouveau_atomic = 0;
106module_param_named(atomic, nouveau_atomic, int, 0400);
107
108MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
109static int nouveau_runtime_pm = -1;
110module_param_named(runpm, nouveau_runtime_pm, int, 0400);
111
112static struct drm_driver driver_stub;
113static struct drm_driver driver_pci;
114static struct drm_driver driver_platform;
115
116static u64
117nouveau_pci_name(struct pci_dev *pdev)
118{
119 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
120 name |= pdev->bus->number << 16;
121 name |= PCI_SLOT(pdev->devfn) << 8;
122 return name | PCI_FUNC(pdev->devfn);
123}
124
125static u64
126nouveau_platform_name(struct platform_device *platformdev)
127{
128 return platformdev->id;
129}
130
131static u64
132nouveau_name(struct drm_device *dev)
133{
134 if (dev_is_pci(dev->dev))
135 return nouveau_pci_name(to_pci_dev(dev->dev));
136 else
137 return nouveau_platform_name(to_platform_device(dev->dev));
138}
139
140static inline bool
141nouveau_cli_work_ready(struct dma_fence *fence)
142{
143 bool ret = true;
144
145 spin_lock_irq(fence->lock);
146 if (!dma_fence_is_signaled_locked(fence))
147 ret = false;
148 spin_unlock_irq(fence->lock);
149
150 if (ret == true)
151 dma_fence_put(fence);
152 return ret;
153}
154
155static void
156nouveau_cli_work(struct work_struct *w)
157{
158 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
159 struct nouveau_cli_work *work, *wtmp;
160 mutex_lock(&cli->lock);
161 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
162 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
163 list_del(&work->head);
164 work->func(work);
165 }
166 }
167 mutex_unlock(&cli->lock);
168}
169
170static void
171nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
172{
173 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
174 schedule_work(&work->cli->work);
175}
176
177void
178nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
179 struct nouveau_cli_work *work)
180{
181 work->fence = dma_fence_get(fence);
182 work->cli = cli;
183 mutex_lock(&cli->lock);
184 list_add_tail(&work->head, &cli->worker);
185 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
186 nouveau_cli_work_fence(fence, &work->cb);
187 mutex_unlock(&cli->lock);
188}
189
190static void
191nouveau_cli_fini(struct nouveau_cli *cli)
192{
193 struct nouveau_uvmm *uvmm = nouveau_cli_uvmm_locked(cli);
194
195 /* All our channels are dead now, which means all the fences they
196 * own are signalled, and all callback functions have been called.
197 *
198 * So, after flushing the workqueue, there should be nothing left.
199 */
200 flush_work(&cli->work);
201 WARN_ON(!list_empty(&cli->worker));
202
203 usif_client_fini(cli);
204 if (cli->sched)
205 nouveau_sched_destroy(&cli->sched);
206 if (uvmm)
207 nouveau_uvmm_fini(uvmm);
208 nouveau_vmm_fini(&cli->svm);
209 nouveau_vmm_fini(&cli->vmm);
210 nvif_mmu_dtor(&cli->mmu);
211 nvif_device_dtor(&cli->device);
212 mutex_lock(&cli->drm->master.lock);
213 nvif_client_dtor(&cli->base);
214 mutex_unlock(&cli->drm->master.lock);
215}
216
217static int
218nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
219 struct nouveau_cli *cli)
220{
221 static const struct nvif_mclass
222 mems[] = {
223 { NVIF_CLASS_MEM_GF100, -1 },
224 { NVIF_CLASS_MEM_NV50 , -1 },
225 { NVIF_CLASS_MEM_NV04 , -1 },
226 {}
227 };
228 static const struct nvif_mclass
229 mmus[] = {
230 { NVIF_CLASS_MMU_GF100, -1 },
231 { NVIF_CLASS_MMU_NV50 , -1 },
232 { NVIF_CLASS_MMU_NV04 , -1 },
233 {}
234 };
235 static const struct nvif_mclass
236 vmms[] = {
237 { NVIF_CLASS_VMM_GP100, -1 },
238 { NVIF_CLASS_VMM_GM200, -1 },
239 { NVIF_CLASS_VMM_GF100, -1 },
240 { NVIF_CLASS_VMM_NV50 , -1 },
241 { NVIF_CLASS_VMM_NV04 , -1 },
242 {}
243 };
244 u64 device = nouveau_name(drm->dev);
245 int ret;
246
247 snprintf(cli->name, sizeof(cli->name), "%s", sname);
248 cli->drm = drm;
249 mutex_init(&cli->mutex);
250 usif_client_init(cli);
251
252 INIT_WORK(&cli->work, nouveau_cli_work);
253 INIT_LIST_HEAD(&cli->worker);
254 mutex_init(&cli->lock);
255
256 if (cli == &drm->master) {
257 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
258 cli->name, device, &cli->base);
259 } else {
260 mutex_lock(&drm->master.lock);
261 ret = nvif_client_ctor(&drm->master.base, cli->name, device,
262 &cli->base);
263 mutex_unlock(&drm->master.lock);
264 }
265 if (ret) {
266 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
267 goto done;
268 }
269
270 ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE,
271 &(struct nv_device_v0) {
272 .device = ~0,
273 .priv = true,
274 }, sizeof(struct nv_device_v0),
275 &cli->device);
276 if (ret) {
277 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
278 goto done;
279 }
280
281 ret = nvif_mclass(&cli->device.object, mmus);
282 if (ret < 0) {
283 NV_PRINTK(err, cli, "No supported MMU class\n");
284 goto done;
285 }
286
287 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass,
288 &cli->mmu);
289 if (ret) {
290 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
291 goto done;
292 }
293
294 ret = nvif_mclass(&cli->mmu.object, vmms);
295 if (ret < 0) {
296 NV_PRINTK(err, cli, "No supported VMM class\n");
297 goto done;
298 }
299
300 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
301 if (ret) {
302 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
303 goto done;
304 }
305
306 ret = nvif_mclass(&cli->mmu.object, mems);
307 if (ret < 0) {
308 NV_PRINTK(err, cli, "No supported MEM class\n");
309 goto done;
310 }
311
312 cli->mem = &mems[ret];
313
314 /* Don't pass in the (shared) sched_wq in order to let
315 * nouveau_sched_create() create a dedicated one for VM_BIND jobs.
316 *
317 * This is required to ensure that for VM_BIND jobs free_job() work and
318 * run_job() work can always run concurrently and hence, free_job() work
319 * can never stall run_job() work. For EXEC jobs we don't have this
320 * requirement, since EXEC job's free_job() does not require to take any
321 * locks which indirectly or directly are held for allocations
322 * elsewhere.
323 */
324 ret = nouveau_sched_create(&cli->sched, drm, NULL, 1);
325 if (ret)
326 goto done;
327
328 return 0;
329done:
330 if (ret)
331 nouveau_cli_fini(cli);
332 return ret;
333}
334
335static void
336nouveau_accel_ce_fini(struct nouveau_drm *drm)
337{
338 nouveau_channel_idle(drm->cechan);
339 nvif_object_dtor(&drm->ttm.copy);
340 nouveau_channel_del(&drm->cechan);
341}
342
343static void
344nouveau_accel_ce_init(struct nouveau_drm *drm)
345{
346 struct nvif_device *device = &drm->client.device;
347 u64 runm;
348 int ret = 0;
349
350 /* Allocate channel that has access to a (preferably async) copy
351 * engine, to use for TTM buffer moves.
352 */
353 runm = nvif_fifo_runlist_ce(device);
354 if (!runm) {
355 NV_DEBUG(drm, "no ce runlist\n");
356 return;
357 }
358
359 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->cechan);
360 if (ret)
361 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
362}
363
364static void
365nouveau_accel_gr_fini(struct nouveau_drm *drm)
366{
367 nouveau_channel_idle(drm->channel);
368 nvif_object_dtor(&drm->ntfy);
369 nvkm_gpuobj_del(&drm->notify);
370 nouveau_channel_del(&drm->channel);
371}
372
373static void
374nouveau_accel_gr_init(struct nouveau_drm *drm)
375{
376 struct nvif_device *device = &drm->client.device;
377 u64 runm;
378 int ret;
379
380 /* Allocate channel that has access to the graphics engine. */
381 runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);
382 if (!runm) {
383 NV_DEBUG(drm, "no gr runlist\n");
384 return;
385 }
386
387 ret = nouveau_channel_new(drm, device, false, runm, NvDmaFB, NvDmaTT, &drm->channel);
388 if (ret) {
389 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
390 nouveau_accel_gr_fini(drm);
391 return;
392 }
393
394 /* A SW class is used on pre-NV50 HW to assist with handling the
395 * synchronisation of page flips, as well as to implement fences
396 * on TNT/TNT2 HW that lacks any kind of support in host.
397 */
398 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
399 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
400 NVDRM_NVSW, nouveau_abi16_swclass(drm),
401 NULL, 0, &drm->channel->nvsw);
402
403 if (ret == 0 && device->info.chipset >= 0x11) {
404 ret = nvif_object_ctor(&drm->channel->user, "drmBlit",
405 0x005f, 0x009f,
406 NULL, 0, &drm->channel->blit);
407 }
408
409 if (ret == 0) {
410 struct nvif_push *push = drm->channel->chan.push;
411 ret = PUSH_WAIT(push, 8);
412 if (ret == 0) {
413 if (device->info.chipset >= 0x11) {
414 PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle);
415 PUSH_NVSQ(push, NV09F, 0x0120, 0,
416 0x0124, 1,
417 0x0128, 2);
418 }
419 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
420 }
421 }
422
423 if (ret) {
424 NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret);
425 nouveau_accel_gr_fini(drm);
426 return;
427 }
428 }
429
430 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
431 * even if notification is never requested, so, allocate a ctxdma on
432 * any GPU where it's possible we'll end up using M2MF for BO moves.
433 */
434 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
435 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
436 &drm->notify);
437 if (ret) {
438 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
439 nouveau_accel_gr_fini(drm);
440 return;
441 }
442
443 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
444 NvNotify0, NV_DMA_IN_MEMORY,
445 &(struct nv_dma_v0) {
446 .target = NV_DMA_V0_TARGET_VRAM,
447 .access = NV_DMA_V0_ACCESS_RDWR,
448 .start = drm->notify->addr,
449 .limit = drm->notify->addr + 31
450 }, sizeof(struct nv_dma_v0),
451 &drm->ntfy);
452 if (ret) {
453 nouveau_accel_gr_fini(drm);
454 return;
455 }
456 }
457}
458
459static void
460nouveau_accel_fini(struct nouveau_drm *drm)
461{
462 nouveau_accel_ce_fini(drm);
463 nouveau_accel_gr_fini(drm);
464 if (drm->fence)
465 nouveau_fence(drm)->dtor(drm);
466 nouveau_channels_fini(drm);
467}
468
469static void
470nouveau_accel_init(struct nouveau_drm *drm)
471{
472 struct nvif_device *device = &drm->client.device;
473 struct nvif_sclass *sclass;
474 int ret, i, n;
475
476 if (nouveau_noaccel)
477 return;
478
479 /* Initialise global support for channels, and synchronisation. */
480 ret = nouveau_channels_init(drm);
481 if (ret)
482 return;
483
484 /*XXX: this is crap, but the fence/channel stuff is a little
485 * backwards in some places. this will be fixed.
486 */
487 ret = n = nvif_object_sclass_get(&device->object, &sclass);
488 if (ret < 0)
489 return;
490
491 for (ret = -ENOSYS, i = 0; i < n; i++) {
492 switch (sclass[i].oclass) {
493 case NV03_CHANNEL_DMA:
494 ret = nv04_fence_create(drm);
495 break;
496 case NV10_CHANNEL_DMA:
497 ret = nv10_fence_create(drm);
498 break;
499 case NV17_CHANNEL_DMA:
500 case NV40_CHANNEL_DMA:
501 ret = nv17_fence_create(drm);
502 break;
503 case NV50_CHANNEL_GPFIFO:
504 ret = nv50_fence_create(drm);
505 break;
506 case G82_CHANNEL_GPFIFO:
507 ret = nv84_fence_create(drm);
508 break;
509 case FERMI_CHANNEL_GPFIFO:
510 case KEPLER_CHANNEL_GPFIFO_A:
511 case KEPLER_CHANNEL_GPFIFO_B:
512 case MAXWELL_CHANNEL_GPFIFO_A:
513 case PASCAL_CHANNEL_GPFIFO_A:
514 case VOLTA_CHANNEL_GPFIFO_A:
515 case TURING_CHANNEL_GPFIFO_A:
516 case AMPERE_CHANNEL_GPFIFO_A:
517 case AMPERE_CHANNEL_GPFIFO_B:
518 ret = nvc0_fence_create(drm);
519 break;
520 default:
521 break;
522 }
523 }
524
525 nvif_object_sclass_put(&sclass);
526 if (ret) {
527 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
528 nouveau_accel_fini(drm);
529 return;
530 }
531
532 /* Volta requires access to a doorbell register for kickoff. */
533 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
534 ret = nvif_user_ctor(device, "drmUsermode");
535 if (ret)
536 return;
537 }
538
539 /* Allocate channels we need to support various functions. */
540 nouveau_accel_gr_init(drm);
541 nouveau_accel_ce_init(drm);
542
543 /* Initialise accelerated TTM buffer moves. */
544 nouveau_bo_move_init(drm);
545}
546
547static void __printf(2, 3)
548nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
549{
550 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
551 struct va_format vaf;
552 va_list va;
553
554 va_start(va, fmt);
555 vaf.fmt = fmt;
556 vaf.va = &va;
557 NV_ERROR(drm, "%pV", &vaf);
558 va_end(va);
559}
560
561static void __printf(2, 3)
562nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
563{
564 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
565 struct va_format vaf;
566 va_list va;
567
568 va_start(va, fmt);
569 vaf.fmt = fmt;
570 vaf.va = &va;
571 NV_DEBUG(drm, "%pV", &vaf);
572 va_end(va);
573}
574
575static const struct nvif_parent_func
576nouveau_parent = {
577 .debugf = nouveau_drm_debugf,
578 .errorf = nouveau_drm_errorf,
579};
580
581static int
582nouveau_drm_device_init(struct drm_device *dev)
583{
584 struct nouveau_drm *drm;
585 int ret;
586
587 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
588 return -ENOMEM;
589 dev->dev_private = drm;
590 drm->dev = dev;
591
592 nvif_parent_ctor(&nouveau_parent, &drm->parent);
593 drm->master.base.object.parent = &drm->parent;
594
595 drm->sched_wq = alloc_workqueue("nouveau_sched_wq_shared", 0,
596 WQ_MAX_ACTIVE);
597 if (!drm->sched_wq) {
598 ret = -ENOMEM;
599 goto fail_alloc;
600 }
601
602 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
603 if (ret)
604 goto fail_wq;
605
606 ret = nouveau_cli_init(drm, "DRM", &drm->client);
607 if (ret)
608 goto fail_master;
609
610 nvxx_client(&drm->client.base)->debug =
611 nvkm_dbgopt(nouveau_debug, "DRM");
612
613 INIT_LIST_HEAD(&drm->clients);
614 mutex_init(&drm->clients_lock);
615 spin_lock_init(&drm->tile.lock);
616
617 /* workaround an odd issue on nvc1 by disabling the device's
618 * nosnoop capability. hopefully won't cause issues until a
619 * better fix is found - assuming there is one...
620 */
621 if (drm->client.device.info.chipset == 0xc1)
622 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
623
624 nouveau_vga_init(drm);
625
626 ret = nouveau_ttm_init(drm);
627 if (ret)
628 goto fail_ttm;
629
630 ret = nouveau_bios_init(dev);
631 if (ret)
632 goto fail_bios;
633
634 nouveau_accel_init(drm);
635
636 ret = nouveau_display_create(dev);
637 if (ret)
638 goto fail_dispctor;
639
640 if (dev->mode_config.num_crtc) {
641 ret = nouveau_display_init(dev, false, false);
642 if (ret)
643 goto fail_dispinit;
644 }
645
646 nouveau_debugfs_init(drm);
647 nouveau_hwmon_init(dev);
648 nouveau_svm_init(drm);
649 nouveau_dmem_init(drm);
650 nouveau_led_init(dev);
651
652 if (nouveau_pmops_runtime()) {
653 pm_runtime_use_autosuspend(dev->dev);
654 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
655 pm_runtime_set_active(dev->dev);
656 pm_runtime_allow(dev->dev);
657 pm_runtime_mark_last_busy(dev->dev);
658 pm_runtime_put(dev->dev);
659 }
660
661 return 0;
662fail_dispinit:
663 nouveau_display_destroy(dev);
664fail_dispctor:
665 nouveau_accel_fini(drm);
666 nouveau_bios_takedown(dev);
667fail_bios:
668 nouveau_ttm_fini(drm);
669fail_ttm:
670 nouveau_vga_fini(drm);
671 nouveau_cli_fini(&drm->client);
672fail_master:
673 nouveau_cli_fini(&drm->master);
674fail_wq:
675 destroy_workqueue(drm->sched_wq);
676fail_alloc:
677 nvif_parent_dtor(&drm->parent);
678 kfree(drm);
679 return ret;
680}
681
682static void
683nouveau_drm_device_fini(struct drm_device *dev)
684{
685 struct nouveau_cli *cli, *temp_cli;
686 struct nouveau_drm *drm = nouveau_drm(dev);
687
688 if (nouveau_pmops_runtime()) {
689 pm_runtime_get_sync(dev->dev);
690 pm_runtime_forbid(dev->dev);
691 }
692
693 nouveau_led_fini(dev);
694 nouveau_dmem_fini(drm);
695 nouveau_svm_fini(drm);
696 nouveau_hwmon_fini(dev);
697 nouveau_debugfs_fini(drm);
698
699 if (dev->mode_config.num_crtc)
700 nouveau_display_fini(dev, false, false);
701 nouveau_display_destroy(dev);
702
703 nouveau_accel_fini(drm);
704 nouveau_bios_takedown(dev);
705
706 nouveau_ttm_fini(drm);
707 nouveau_vga_fini(drm);
708
709 /*
710 * There may be existing clients from as-yet unclosed files. For now,
711 * clean them up here rather than deferring until the file is closed,
712 * but this likely not correct if we want to support hot-unplugging
713 * properly.
714 */
715 mutex_lock(&drm->clients_lock);
716 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) {
717 list_del(&cli->head);
718 mutex_lock(&cli->mutex);
719 if (cli->abi16)
720 nouveau_abi16_fini(cli->abi16);
721 mutex_unlock(&cli->mutex);
722 nouveau_cli_fini(cli);
723 kfree(cli);
724 }
725 mutex_unlock(&drm->clients_lock);
726
727 nouveau_cli_fini(&drm->client);
728 nouveau_cli_fini(&drm->master);
729 destroy_workqueue(drm->sched_wq);
730 nvif_parent_dtor(&drm->parent);
731 mutex_destroy(&drm->clients_lock);
732 kfree(drm);
733}
734
735/*
736 * On some Intel PCIe bridge controllers doing a
737 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
738 * Skipping the intermediate D3hot step seems to make it work again. This is
739 * probably caused by not meeting the expectation the involved AML code has
740 * when the GPU is put into D3hot state before invoking it.
741 *
742 * This leads to various manifestations of this issue:
743 * - AML code execution to power on the GPU hits an infinite loop (as the
744 * code waits on device memory to change).
745 * - kernel crashes, as all PCI reads return -1, which most code isn't able
746 * to handle well enough.
747 *
748 * In all cases dmesg will contain at least one line like this:
749 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
750 * followed by a lot of nouveau timeouts.
751 *
752 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
753 * documented PCI config space register 0x248 of the Intel PCIe bridge
754 * controller (0x1901) in order to change the state of the PCIe link between
755 * the PCIe port and the GPU. There are alternative code paths using other
756 * registers, which seem to work fine (executed pre Windows 8):
757 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
758 * - 0xb0 bit 0x10 (link disable)
759 * Changing the conditions inside the firmware by poking into the relevant
760 * addresses does resolve the issue, but it seemed to be ACPI private memory
761 * and not any device accessible memory at all, so there is no portable way of
762 * changing the conditions.
763 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
764 *
765 * The only systems where this behavior can be seen are hybrid graphics laptops
766 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
767 * this issue only occurs in combination with listed Intel PCIe bridge
768 * controllers and the mentioned GPUs or other devices as well.
769 *
770 * documentation on the PCIe bridge controller can be found in the
771 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
772 * Section "12 PCI Express* Controller (x16) Registers"
773 */
774
775static void quirk_broken_nv_runpm(struct pci_dev *pdev)
776{
777 struct drm_device *dev = pci_get_drvdata(pdev);
778 struct nouveau_drm *drm = nouveau_drm(dev);
779 struct pci_dev *bridge = pci_upstream_bridge(pdev);
780
781 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
782 return;
783
784 switch (bridge->device) {
785 case 0x1901:
786 drm->old_pm_cap = pdev->pm_cap;
787 pdev->pm_cap = 0;
788 NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
789 break;
790 }
791}
792
793static int nouveau_drm_probe(struct pci_dev *pdev,
794 const struct pci_device_id *pent)
795{
796 struct nvkm_device *device;
797 struct drm_device *drm_dev;
798 int ret;
799
800 if (vga_switcheroo_client_probe_defer(pdev))
801 return -EPROBE_DEFER;
802
803 /* We need to check that the chipset is supported before booting
804 * fbdev off the hardware, as there's no way to put it back.
805 */
806 ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
807 true, false, 0, &device);
808 if (ret)
809 return ret;
810
811 nvkm_device_del(&device);
812
813 /* Remove conflicting drivers (vesafb, efifb etc). */
814 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &driver_pci);
815 if (ret)
816 return ret;
817
818 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
819 true, true, ~0ULL, &device);
820 if (ret)
821 return ret;
822
823 pci_set_master(pdev);
824
825 if (nouveau_atomic)
826 driver_pci.driver_features |= DRIVER_ATOMIC;
827
828 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
829 if (IS_ERR(drm_dev)) {
830 ret = PTR_ERR(drm_dev);
831 goto fail_nvkm;
832 }
833
834 ret = pci_enable_device(pdev);
835 if (ret)
836 goto fail_drm;
837
838 pci_set_drvdata(pdev, drm_dev);
839
840 ret = nouveau_drm_device_init(drm_dev);
841 if (ret)
842 goto fail_pci;
843
844 ret = drm_dev_register(drm_dev, pent->driver_data);
845 if (ret)
846 goto fail_drm_dev_init;
847
848 if (nouveau_drm(drm_dev)->client.device.info.ram_size <= 32 * 1024 * 1024)
849 drm_fbdev_generic_setup(drm_dev, 8);
850 else
851 drm_fbdev_generic_setup(drm_dev, 32);
852
853 quirk_broken_nv_runpm(pdev);
854 return 0;
855
856fail_drm_dev_init:
857 nouveau_drm_device_fini(drm_dev);
858fail_pci:
859 pci_disable_device(pdev);
860fail_drm:
861 drm_dev_put(drm_dev);
862fail_nvkm:
863 nvkm_device_del(&device);
864 return ret;
865}
866
867void
868nouveau_drm_device_remove(struct drm_device *dev)
869{
870 struct nouveau_drm *drm = nouveau_drm(dev);
871 struct nvkm_client *client;
872 struct nvkm_device *device;
873
874 drm_dev_unplug(dev);
875
876 client = nvxx_client(&drm->client.base);
877 device = nvkm_device_find(client->device);
878
879 nouveau_drm_device_fini(dev);
880 drm_dev_put(dev);
881 nvkm_device_del(&device);
882}
883
884static void
885nouveau_drm_remove(struct pci_dev *pdev)
886{
887 struct drm_device *dev = pci_get_drvdata(pdev);
888 struct nouveau_drm *drm = nouveau_drm(dev);
889
890 /* revert our workaround */
891 if (drm->old_pm_cap)
892 pdev->pm_cap = drm->old_pm_cap;
893 nouveau_drm_device_remove(dev);
894 pci_disable_device(pdev);
895}
896
897static int
898nouveau_do_suspend(struct drm_device *dev, bool runtime)
899{
900 struct nouveau_drm *drm = nouveau_drm(dev);
901 struct ttm_resource_manager *man;
902 int ret;
903
904 nouveau_svm_suspend(drm);
905 nouveau_dmem_suspend(drm);
906 nouveau_led_suspend(dev);
907
908 if (dev->mode_config.num_crtc) {
909 NV_DEBUG(drm, "suspending display...\n");
910 ret = nouveau_display_suspend(dev, runtime);
911 if (ret)
912 return ret;
913 }
914
915 NV_DEBUG(drm, "evicting buffers...\n");
916
917 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM);
918 ttm_resource_manager_evict_all(&drm->ttm.bdev, man);
919
920 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
921 if (drm->cechan) {
922 ret = nouveau_channel_idle(drm->cechan);
923 if (ret)
924 goto fail_display;
925 }
926
927 if (drm->channel) {
928 ret = nouveau_channel_idle(drm->channel);
929 if (ret)
930 goto fail_display;
931 }
932
933 NV_DEBUG(drm, "suspending fence...\n");
934 if (drm->fence && nouveau_fence(drm)->suspend) {
935 if (!nouveau_fence(drm)->suspend(drm)) {
936 ret = -ENOMEM;
937 goto fail_display;
938 }
939 }
940
941 NV_DEBUG(drm, "suspending object tree...\n");
942 ret = nvif_client_suspend(&drm->master.base);
943 if (ret)
944 goto fail_client;
945
946 return 0;
947
948fail_client:
949 if (drm->fence && nouveau_fence(drm)->resume)
950 nouveau_fence(drm)->resume(drm);
951
952fail_display:
953 if (dev->mode_config.num_crtc) {
954 NV_DEBUG(drm, "resuming display...\n");
955 nouveau_display_resume(dev, runtime);
956 }
957 return ret;
958}
959
960static int
961nouveau_do_resume(struct drm_device *dev, bool runtime)
962{
963 int ret = 0;
964 struct nouveau_drm *drm = nouveau_drm(dev);
965
966 NV_DEBUG(drm, "resuming object tree...\n");
967 ret = nvif_client_resume(&drm->master.base);
968 if (ret) {
969 NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
970 return ret;
971 }
972
973 NV_DEBUG(drm, "resuming fence...\n");
974 if (drm->fence && nouveau_fence(drm)->resume)
975 nouveau_fence(drm)->resume(drm);
976
977 nouveau_run_vbios_init(dev);
978
979 if (dev->mode_config.num_crtc) {
980 NV_DEBUG(drm, "resuming display...\n");
981 nouveau_display_resume(dev, runtime);
982 }
983
984 nouveau_led_resume(dev);
985 nouveau_dmem_resume(drm);
986 nouveau_svm_resume(drm);
987 return 0;
988}
989
990int
991nouveau_pmops_suspend(struct device *dev)
992{
993 struct pci_dev *pdev = to_pci_dev(dev);
994 struct drm_device *drm_dev = pci_get_drvdata(pdev);
995 int ret;
996
997 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
998 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
999 return 0;
1000
1001 ret = nouveau_do_suspend(drm_dev, false);
1002 if (ret)
1003 return ret;
1004
1005 pci_save_state(pdev);
1006 pci_disable_device(pdev);
1007 pci_set_power_state(pdev, PCI_D3hot);
1008 udelay(200);
1009 return 0;
1010}
1011
1012int
1013nouveau_pmops_resume(struct device *dev)
1014{
1015 struct pci_dev *pdev = to_pci_dev(dev);
1016 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1017 int ret;
1018
1019 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
1020 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
1021 return 0;
1022
1023 pci_set_power_state(pdev, PCI_D0);
1024 pci_restore_state(pdev);
1025 ret = pci_enable_device(pdev);
1026 if (ret)
1027 return ret;
1028 pci_set_master(pdev);
1029
1030 ret = nouveau_do_resume(drm_dev, false);
1031
1032 /* Monitors may have been connected / disconnected during suspend */
1033 nouveau_display_hpd_resume(drm_dev);
1034
1035 return ret;
1036}
1037
1038static int
1039nouveau_pmops_freeze(struct device *dev)
1040{
1041 struct pci_dev *pdev = to_pci_dev(dev);
1042 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1043 return nouveau_do_suspend(drm_dev, false);
1044}
1045
1046static int
1047nouveau_pmops_thaw(struct device *dev)
1048{
1049 struct pci_dev *pdev = to_pci_dev(dev);
1050 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1051 return nouveau_do_resume(drm_dev, false);
1052}
1053
1054bool
1055nouveau_pmops_runtime(void)
1056{
1057 if (nouveau_runtime_pm == -1)
1058 return nouveau_is_optimus() || nouveau_is_v1_dsm();
1059 return nouveau_runtime_pm == 1;
1060}
1061
1062static int
1063nouveau_pmops_runtime_suspend(struct device *dev)
1064{
1065 struct pci_dev *pdev = to_pci_dev(dev);
1066 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1067 int ret;
1068
1069 if (!nouveau_pmops_runtime()) {
1070 pm_runtime_forbid(dev);
1071 return -EBUSY;
1072 }
1073
1074 nouveau_switcheroo_optimus_dsm();
1075 ret = nouveau_do_suspend(drm_dev, true);
1076 pci_save_state(pdev);
1077 pci_disable_device(pdev);
1078 pci_ignore_hotplug(pdev);
1079 pci_set_power_state(pdev, PCI_D3cold);
1080 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1081 return ret;
1082}
1083
1084static int
1085nouveau_pmops_runtime_resume(struct device *dev)
1086{
1087 struct pci_dev *pdev = to_pci_dev(dev);
1088 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1089 struct nouveau_drm *drm = nouveau_drm(drm_dev);
1090 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1091 int ret;
1092
1093 if (!nouveau_pmops_runtime()) {
1094 pm_runtime_forbid(dev);
1095 return -EBUSY;
1096 }
1097
1098 pci_set_power_state(pdev, PCI_D0);
1099 pci_restore_state(pdev);
1100 ret = pci_enable_device(pdev);
1101 if (ret)
1102 return ret;
1103 pci_set_master(pdev);
1104
1105 ret = nouveau_do_resume(drm_dev, true);
1106 if (ret) {
1107 NV_ERROR(drm, "resume failed with: %d\n", ret);
1108 return ret;
1109 }
1110
1111 /* do magic */
1112 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1113 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1114
1115 /* Monitors may have been connected / disconnected during suspend */
1116 nouveau_display_hpd_resume(drm_dev);
1117
1118 return ret;
1119}
1120
1121static int
1122nouveau_pmops_runtime_idle(struct device *dev)
1123{
1124 if (!nouveau_pmops_runtime()) {
1125 pm_runtime_forbid(dev);
1126 return -EBUSY;
1127 }
1128
1129 pm_runtime_mark_last_busy(dev);
1130 pm_runtime_autosuspend(dev);
1131 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1132 return 1;
1133}
1134
1135static int
1136nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1137{
1138 struct nouveau_drm *drm = nouveau_drm(dev);
1139 struct nouveau_cli *cli;
1140 char name[32], tmpname[TASK_COMM_LEN];
1141 int ret;
1142
1143 /* need to bring up power immediately if opening device */
1144 ret = pm_runtime_get_sync(dev->dev);
1145 if (ret < 0 && ret != -EACCES) {
1146 pm_runtime_put_autosuspend(dev->dev);
1147 return ret;
1148 }
1149
1150 get_task_comm(tmpname, current);
1151 rcu_read_lock();
1152 snprintf(name, sizeof(name), "%s[%d]",
1153 tmpname, pid_nr(rcu_dereference(fpriv->pid)));
1154 rcu_read_unlock();
1155
1156 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1157 ret = -ENOMEM;
1158 goto done;
1159 }
1160
1161 ret = nouveau_cli_init(drm, name, cli);
1162 if (ret)
1163 goto done;
1164
1165 fpriv->driver_priv = cli;
1166
1167 mutex_lock(&drm->clients_lock);
1168 list_add(&cli->head, &drm->clients);
1169 mutex_unlock(&drm->clients_lock);
1170
1171done:
1172 if (ret && cli) {
1173 nouveau_cli_fini(cli);
1174 kfree(cli);
1175 }
1176
1177 pm_runtime_mark_last_busy(dev->dev);
1178 pm_runtime_put_autosuspend(dev->dev);
1179 return ret;
1180}
1181
1182static void
1183nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1184{
1185 struct nouveau_cli *cli = nouveau_cli(fpriv);
1186 struct nouveau_drm *drm = nouveau_drm(dev);
1187 int dev_index;
1188
1189 /*
1190 * The device is gone, and as it currently stands all clients are
1191 * cleaned up in the removal codepath. In the future this may change
1192 * so that we can support hot-unplugging, but for now we immediately
1193 * return to avoid a double-free situation.
1194 */
1195 if (!drm_dev_enter(dev, &dev_index))
1196 return;
1197
1198 pm_runtime_get_sync(dev->dev);
1199
1200 mutex_lock(&cli->mutex);
1201 if (cli->abi16)
1202 nouveau_abi16_fini(cli->abi16);
1203 mutex_unlock(&cli->mutex);
1204
1205 mutex_lock(&drm->clients_lock);
1206 list_del(&cli->head);
1207 mutex_unlock(&drm->clients_lock);
1208
1209 nouveau_cli_fini(cli);
1210 kfree(cli);
1211 pm_runtime_mark_last_busy(dev->dev);
1212 pm_runtime_put_autosuspend(dev->dev);
1213 drm_dev_exit(dev_index);
1214}
1215
1216static const struct drm_ioctl_desc
1217nouveau_ioctls[] = {
1218 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1219 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1220 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1221 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1222 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1223 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1224 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1225 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1226 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1227 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1228 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1229 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1230 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1231 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1232 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_INIT, nouveau_uvmm_ioctl_vm_init, DRM_RENDER_ALLOW),
1233 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_BIND, nouveau_uvmm_ioctl_vm_bind, DRM_RENDER_ALLOW),
1234 DRM_IOCTL_DEF_DRV(NOUVEAU_EXEC, nouveau_exec_ioctl_exec, DRM_RENDER_ALLOW),
1235};
1236
1237long
1238nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1239{
1240 struct drm_file *filp = file->private_data;
1241 struct drm_device *dev = filp->minor->dev;
1242 long ret;
1243
1244 ret = pm_runtime_get_sync(dev->dev);
1245 if (ret < 0 && ret != -EACCES) {
1246 pm_runtime_put_autosuspend(dev->dev);
1247 return ret;
1248 }
1249
1250 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1251 case DRM_NOUVEAU_NVIF:
1252 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1253 break;
1254 default:
1255 ret = drm_ioctl(file, cmd, arg);
1256 break;
1257 }
1258
1259 pm_runtime_mark_last_busy(dev->dev);
1260 pm_runtime_put_autosuspend(dev->dev);
1261 return ret;
1262}
1263
1264static const struct file_operations
1265nouveau_driver_fops = {
1266 .owner = THIS_MODULE,
1267 .open = drm_open,
1268 .release = drm_release,
1269 .unlocked_ioctl = nouveau_drm_ioctl,
1270 .mmap = drm_gem_mmap,
1271 .poll = drm_poll,
1272 .read = drm_read,
1273#if defined(CONFIG_COMPAT)
1274 .compat_ioctl = nouveau_compat_ioctl,
1275#endif
1276 .llseek = noop_llseek,
1277};
1278
1279static struct drm_driver
1280driver_stub = {
1281 .driver_features = DRIVER_GEM |
1282 DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE |
1283 DRIVER_GEM_GPUVA |
1284 DRIVER_MODESET |
1285 DRIVER_RENDER,
1286 .open = nouveau_drm_open,
1287 .postclose = nouveau_drm_postclose,
1288 .lastclose = nouveau_vga_lastclose,
1289
1290#if defined(CONFIG_DEBUG_FS)
1291 .debugfs_init = nouveau_drm_debugfs_init,
1292#endif
1293
1294 .ioctls = nouveau_ioctls,
1295 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1296 .fops = &nouveau_driver_fops,
1297
1298 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1299
1300 .dumb_create = nouveau_display_dumb_create,
1301 .dumb_map_offset = drm_gem_ttm_dumb_map_offset,
1302
1303 .name = DRIVER_NAME,
1304 .desc = DRIVER_DESC,
1305#ifdef GIT_REVISION
1306 .date = GIT_REVISION,
1307#else
1308 .date = DRIVER_DATE,
1309#endif
1310 .major = DRIVER_MAJOR,
1311 .minor = DRIVER_MINOR,
1312 .patchlevel = DRIVER_PATCHLEVEL,
1313};
1314
1315static struct pci_device_id
1316nouveau_drm_pci_table[] = {
1317 {
1318 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1319 .class = PCI_BASE_CLASS_DISPLAY << 16,
1320 .class_mask = 0xff << 16,
1321 },
1322 {
1323 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1324 .class = PCI_BASE_CLASS_DISPLAY << 16,
1325 .class_mask = 0xff << 16,
1326 },
1327 {}
1328};
1329
1330static void nouveau_display_options(void)
1331{
1332 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1333
1334 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1335 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1336 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1337 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1338 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1339 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1340 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1341 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1342 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1343 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1344}
1345
1346static const struct dev_pm_ops nouveau_pm_ops = {
1347 .suspend = nouveau_pmops_suspend,
1348 .resume = nouveau_pmops_resume,
1349 .freeze = nouveau_pmops_freeze,
1350 .thaw = nouveau_pmops_thaw,
1351 .poweroff = nouveau_pmops_freeze,
1352 .restore = nouveau_pmops_resume,
1353 .runtime_suspend = nouveau_pmops_runtime_suspend,
1354 .runtime_resume = nouveau_pmops_runtime_resume,
1355 .runtime_idle = nouveau_pmops_runtime_idle,
1356};
1357
1358static struct pci_driver
1359nouveau_drm_pci_driver = {
1360 .name = "nouveau",
1361 .id_table = nouveau_drm_pci_table,
1362 .probe = nouveau_drm_probe,
1363 .remove = nouveau_drm_remove,
1364 .driver.pm = &nouveau_pm_ops,
1365};
1366
1367struct drm_device *
1368nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1369 struct platform_device *pdev,
1370 struct nvkm_device **pdevice)
1371{
1372 struct drm_device *drm;
1373 int err;
1374
1375 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1376 true, true, ~0ULL, pdevice);
1377 if (err)
1378 goto err_free;
1379
1380 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1381 if (IS_ERR(drm)) {
1382 err = PTR_ERR(drm);
1383 goto err_free;
1384 }
1385
1386 err = nouveau_drm_device_init(drm);
1387 if (err)
1388 goto err_put;
1389
1390 platform_set_drvdata(pdev, drm);
1391
1392 return drm;
1393
1394err_put:
1395 drm_dev_put(drm);
1396err_free:
1397 nvkm_device_del(pdevice);
1398
1399 return ERR_PTR(err);
1400}
1401
1402static int __init
1403nouveau_drm_init(void)
1404{
1405 driver_pci = driver_stub;
1406 driver_platform = driver_stub;
1407
1408 nouveau_display_options();
1409
1410 if (nouveau_modeset == -1) {
1411 if (drm_firmware_drivers_only())
1412 nouveau_modeset = 0;
1413 }
1414
1415 if (!nouveau_modeset)
1416 return 0;
1417
1418#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1419 platform_driver_register(&nouveau_platform_driver);
1420#endif
1421
1422 nouveau_register_dsm_handler();
1423 nouveau_backlight_ctor();
1424
1425#ifdef CONFIG_PCI
1426 return pci_register_driver(&nouveau_drm_pci_driver);
1427#else
1428 return 0;
1429#endif
1430}
1431
1432static void __exit
1433nouveau_drm_exit(void)
1434{
1435 if (!nouveau_modeset)
1436 return;
1437
1438#ifdef CONFIG_PCI
1439 pci_unregister_driver(&nouveau_drm_pci_driver);
1440#endif
1441 nouveau_backlight_dtor();
1442 nouveau_unregister_dsm_handler();
1443
1444#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1445 platform_driver_unregister(&nouveau_platform_driver);
1446#endif
1447 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1448 mmu_notifier_synchronize();
1449}
1450
1451module_init(nouveau_drm_init);
1452module_exit(nouveau_drm_exit);
1453
1454MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1455MODULE_AUTHOR(DRIVER_AUTHOR);
1456MODULE_DESCRIPTION(DRIVER_DESC);
1457MODULE_LICENSE("GPL and additional rights");