1/*
   2 * Copyright © 2006 Intel Corporation
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice (including the next
  12 * paragraph) shall be included in all copies or substantial portions of the
  13 * Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21 * SOFTWARE.
  22 *
  23 * Authors:
  24 *    Eric Anholt <eric@anholt.net>
  25 *
  26 */
  27
  28#include <drm/display/drm_dp_helper.h>
  29#include <drm/display/drm_dsc_helper.h>
  30#include <drm/drm_edid.h>
  31
  32#include "i915_drv.h"
  33#include "i915_reg.h"
  34#include "intel_display.h"
  35#include "intel_display_types.h"
  36#include "intel_gmbus.h"
  37
  38#define _INTEL_BIOS_PRIVATE
  39#include "intel_vbt_defs.h"
  40
  41/**
  42 * DOC: Video BIOS Table (VBT)
  43 *
  44 * The Video BIOS Table, or VBT, provides platform and board specific
  45 * configuration information to the driver that is not discoverable or available
  46 * through other means. The configuration is mostly related to display
  47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
  48 * the PCI ROM.
  49 *
  50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
  51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
  52 * contain the actual configuration information. The VBT Header, and thus the
  53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
  54 * BDB Header. The data blocks are concatenated after the BDB Header. The data
  55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
  56 * data. (Block 53, the MIPI Sequence Block is an exception.)
  57 *
  58 * The driver parses the VBT during load. The relevant information is stored in
  59 * driver private data for ease of use, and the actual VBT is not read after
  60 * that.
  61 */
  62
  63/* Wrapper for VBT child device config */
  64struct intel_bios_encoder_data {
  65	struct drm_i915_private *i915;
  66
  67	struct child_device_config child;
  68	struct dsc_compression_parameters_entry *dsc;
  69	struct list_head node;
  70};
  71
  72#define	SLAVE_ADDR1	0x70
  73#define	SLAVE_ADDR2	0x72
  74
  75/* Get BDB block size given a pointer to Block ID. */
  76static u32 _get_blocksize(const u8 *block_base)
  77{
  78	/* The MIPI Sequence Block v3+ has a separate size field. */
  79	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
  80		return *((const u32 *)(block_base + 4));
  81	else
  82		return *((const u16 *)(block_base + 1));
  83}
  84
  85/* Get BDB block size give a pointer to data after Block ID and Block Size. */
  86static u32 get_blocksize(const void *block_data)
  87{
  88	return _get_blocksize(block_data - 3);
  89}
  90
  91static const void *
  92find_raw_section(const void *_bdb, enum bdb_block_id section_id)
  93{
  94	const struct bdb_header *bdb = _bdb;
  95	const u8 *base = _bdb;
  96	int index = 0;
  97	u32 total, current_size;
  98	enum bdb_block_id current_id;
  99
 100	/* skip to first section */
 101	index += bdb->header_size;
 102	total = bdb->bdb_size;
 103
 104	/* walk the sections looking for section_id */
 105	while (index + 3 < total) {
 106		current_id = *(base + index);
 107		current_size = _get_blocksize(base + index);
 108		index += 3;
 109
 110		if (index + current_size > total)
 111			return NULL;
 112
 113		if (current_id == section_id)
 114			return base + index;
 115
 116		index += current_size;
 117	}
 118
 119	return NULL;
 120}
 121
 122/*
 123 * Offset from the start of BDB to the start of the
 124 * block data (just past the block header).
 125 */
 126static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
 127{
 128	const void *block;
 129
 130	block = find_raw_section(bdb, section_id);
 131	if (!block)
 132		return 0;
 133
 134	return block - bdb;
 135}
 136
 137struct bdb_block_entry {
 138	struct list_head node;
 139	enum bdb_block_id section_id;
 140	u8 data[];
 141};
 142
 143static const void *
 144bdb_find_section(struct drm_i915_private *i915,
 145		 enum bdb_block_id section_id)
 146{
 147	struct bdb_block_entry *entry;
 148
 149	list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
 150		if (entry->section_id == section_id)
 151			return entry->data + 3;
 152	}
 153
 154	return NULL;
 155}
 156
 157static const struct {
 158	enum bdb_block_id section_id;
 159	size_t min_size;
 160} bdb_blocks[] = {
 161	{ .section_id = BDB_GENERAL_FEATURES,
 162	  .min_size = sizeof(struct bdb_general_features), },
 163	{ .section_id = BDB_GENERAL_DEFINITIONS,
 164	  .min_size = sizeof(struct bdb_general_definitions), },
 165	{ .section_id = BDB_PSR,
 166	  .min_size = sizeof(struct bdb_psr), },
 167	{ .section_id = BDB_DRIVER_FEATURES,
 168	  .min_size = sizeof(struct bdb_driver_features), },
 169	{ .section_id = BDB_SDVO_LVDS_OPTIONS,
 170	  .min_size = sizeof(struct bdb_sdvo_lvds_options), },
 171	{ .section_id = BDB_SDVO_PANEL_DTDS,
 172	  .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
 173	{ .section_id = BDB_EDP,
 174	  .min_size = sizeof(struct bdb_edp), },
 175	{ .section_id = BDB_LVDS_OPTIONS,
 176	  .min_size = sizeof(struct bdb_lvds_options), },
 177	/*
 178	 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
 179	 * so keep the two ordered.
 180	 */
 181	{ .section_id = BDB_LVDS_LFP_DATA_PTRS,
 182	  .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
 183	{ .section_id = BDB_LVDS_LFP_DATA,
 184	  .min_size = 0, /* special case */ },
 185	{ .section_id = BDB_LVDS_BACKLIGHT,
 186	  .min_size = sizeof(struct bdb_lfp_backlight_data), },
 187	{ .section_id = BDB_LFP_POWER,
 188	  .min_size = sizeof(struct bdb_lfp_power), },
 189	{ .section_id = BDB_MIPI_CONFIG,
 190	  .min_size = sizeof(struct bdb_mipi_config), },
 191	{ .section_id = BDB_MIPI_SEQUENCE,
 192	  .min_size = sizeof(struct bdb_mipi_sequence) },
 193	{ .section_id = BDB_COMPRESSION_PARAMETERS,
 194	  .min_size = sizeof(struct bdb_compression_parameters), },
 195	{ .section_id = BDB_GENERIC_DTD,
 196	  .min_size = sizeof(struct bdb_generic_dtd), },
 197};
 198
 199static size_t lfp_data_min_size(struct drm_i915_private *i915)
 200{
 201	const struct bdb_lvds_lfp_data_ptrs *ptrs;
 202	size_t size;
 203
 204	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
 205	if (!ptrs)
 206		return 0;
 207
 208	size = sizeof(struct bdb_lvds_lfp_data);
 209	if (ptrs->panel_name.table_size)
 210		size = max(size, ptrs->panel_name.offset +
 211			   sizeof(struct bdb_lvds_lfp_data_tail));
 212
 213	return size;
 214}
 215
 216static bool validate_lfp_data_ptrs(const void *bdb,
 217				   const struct bdb_lvds_lfp_data_ptrs *ptrs)
 218{
 219	int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
 220	int data_block_size, lfp_data_size;
 221	const void *data_block;
 222	int i;
 223
 224	data_block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
 225	if (!data_block)
 226		return false;
 227
 228	data_block_size = get_blocksize(data_block);
 229	if (data_block_size == 0)
 230		return false;
 231
 232	/* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
 233	if (ptrs->lvds_entries != 3)
 234		return false;
 235
 236	fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
 237	dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
 238	panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
 239	panel_name_size = ptrs->panel_name.table_size;
 240
 241	/* fp_timing has variable size */
 242	if (fp_timing_size < 32 ||
 243	    dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
 244	    panel_pnp_id_size != sizeof(struct lvds_pnp_id))
 245		return false;
 246
 247	/* panel_name is not present in old VBTs */
 248	if (panel_name_size != 0 &&
 249	    panel_name_size != sizeof(struct lvds_lfp_panel_name))
 250		return false;
 251
 252	lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
 253	if (16 * lfp_data_size > data_block_size)
 254		return false;
 255
 256	/* make sure the table entries have uniform size */
 257	for (i = 1; i < 16; i++) {
 258		if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
 259		    ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
 260		    ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
 261			return false;
 262
 263		if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
 264		    ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
 265		    ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
 266			return false;
 267	}
 268
 269	/*
 270	 * Except for vlv/chv machines all real VBTs seem to have 6
 271	 * unaccounted bytes in the fp_timing table. And it doesn't
 272	 * appear to be a really intentional hole as the fp_timing
 273	 * 0xffff terminator is always within those 6 missing bytes.
 274	 */
 275	if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
 276		fp_timing_size += 6;
 277
 278	if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
 279		return false;
 280
 281	if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
 282	    ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
 283	    ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
 284		return false;
 285
 286	/* make sure the tables fit inside the data block */
 287	for (i = 0; i < 16; i++) {
 288		if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
 289		    ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
 290		    ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
 291			return false;
 292	}
 293
 294	if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
 295		return false;
 296
 297	/* make sure fp_timing terminators are present at expected locations */
 298	for (i = 0; i < 16; i++) {
 299		const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
 300			fp_timing_size - 2;
 301
 302		if (*t != 0xffff)
 303			return false;
 304	}
 305
 306	return true;
 307}
 308
 309/* make the data table offsets relative to the data block */
 310static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
 311{
 312	struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
 313	u32 offset;
 314	int i;
 315
 316	offset = raw_block_offset(bdb, BDB_LVDS_LFP_DATA);
 317
 318	for (i = 0; i < 16; i++) {
 319		if (ptrs->ptr[i].fp_timing.offset < offset ||
 320		    ptrs->ptr[i].dvo_timing.offset < offset ||
 321		    ptrs->ptr[i].panel_pnp_id.offset < offset)
 322			return false;
 323
 324		ptrs->ptr[i].fp_timing.offset -= offset;
 325		ptrs->ptr[i].dvo_timing.offset -= offset;
 326		ptrs->ptr[i].panel_pnp_id.offset -= offset;
 327	}
 328
 329	if (ptrs->panel_name.table_size) {
 330		if (ptrs->panel_name.offset < offset)
 331			return false;
 332
 333		ptrs->panel_name.offset -= offset;
 334	}
 335
 336	return validate_lfp_data_ptrs(bdb, ptrs);
 337}
 338
 339static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
 340			     int table_size, int total_size)
 341{
 342	if (total_size < table_size)
 343		return total_size;
 344
 345	table->table_size = table_size;
 346	table->offset = total_size - table_size;
 347
 348	return total_size - table_size;
 349}
 350
 351static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
 352			      const struct lvds_lfp_data_ptr_table *prev,
 353			      int size)
 354{
 355	next->table_size = prev->table_size;
 356	next->offset = prev->offset + size;
 357}
 358
 359static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
 360				    const void *bdb)
 361{
 362	int i, size, table_size, block_size, offset, fp_timing_size;
 363	struct bdb_lvds_lfp_data_ptrs *ptrs;
 364	const void *block;
 365	void *ptrs_block;
 366
 367	/*
 368	 * The hardcoded fp_timing_size is only valid for
 369	 * modernish VBTs. All older VBTs definitely should
 370	 * include block 41 and thus we don't need to
 371	 * generate one.
 372	 */
 373	if (i915->display.vbt.version < 155)
 374		return NULL;
 375
 376	fp_timing_size = 38;
 377
 378	block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
 379	if (!block)
 380		return NULL;
 381
 382	drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
 383
 384	block_size = get_blocksize(block);
 385
 386	size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
 387		sizeof(struct lvds_pnp_id);
 388	if (size * 16 > block_size)
 389		return NULL;
 390
 391	ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
 392	if (!ptrs_block)
 393		return NULL;
 394
 395	*(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
 396	*(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
 397	ptrs = ptrs_block + 3;
 398
 399	table_size = sizeof(struct lvds_pnp_id);
 400	size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
 401
 402	table_size = sizeof(struct lvds_dvo_timing);
 403	size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
 404
 405	table_size = fp_timing_size;
 406	size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
 407
 408	if (ptrs->ptr[0].fp_timing.table_size)
 409		ptrs->lvds_entries++;
 410	if (ptrs->ptr[0].dvo_timing.table_size)
 411		ptrs->lvds_entries++;
 412	if (ptrs->ptr[0].panel_pnp_id.table_size)
 413		ptrs->lvds_entries++;
 414
 415	if (size != 0 || ptrs->lvds_entries != 3) {
 416		kfree(ptrs_block);
 417		return NULL;
 418	}
 419
 420	size = fp_timing_size + sizeof(struct lvds_dvo_timing) +
 421		sizeof(struct lvds_pnp_id);
 422	for (i = 1; i < 16; i++) {
 423		next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
 424		next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
 425		next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
 426	}
 427
 428	table_size = sizeof(struct lvds_lfp_panel_name);
 429
 430	if (16 * (size + table_size) <= block_size) {
 431		ptrs->panel_name.table_size = table_size;
 432		ptrs->panel_name.offset = size * 16;
 433	}
 434
 435	offset = block - bdb;
 436
 437	for (i = 0; i < 16; i++) {
 438		ptrs->ptr[i].fp_timing.offset += offset;
 439		ptrs->ptr[i].dvo_timing.offset += offset;
 440		ptrs->ptr[i].panel_pnp_id.offset += offset;
 441	}
 442
 443	if (ptrs->panel_name.table_size)
 444		ptrs->panel_name.offset += offset;
 445
 446	return ptrs_block;
 447}
 448
 449static void
 450init_bdb_block(struct drm_i915_private *i915,
 451	       const void *bdb, enum bdb_block_id section_id,
 452	       size_t min_size)
 453{
 454	struct bdb_block_entry *entry;
 455	void *temp_block = NULL;
 456	const void *block;
 457	size_t block_size;
 458
 459	block = find_raw_section(bdb, section_id);
 460
 461	/* Modern VBTs lack the LFP data table pointers block, make one up */
 462	if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
 463		temp_block = generate_lfp_data_ptrs(i915, bdb);
 464		if (temp_block)
 465			block = temp_block + 3;
 466	}
 467	if (!block)
 468		return;
 469
 470	drm_WARN(&i915->drm, min_size == 0,
 471		 "Block %d min_size is zero\n", section_id);
 472
 473	block_size = get_blocksize(block);
 474
 475	/*
 476	 * Version number and new block size are considered
 477	 * part of the header for MIPI sequenece block v3+.
 478	 */
 479	if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
 480		block_size += 5;
 481
 482	entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
 483			GFP_KERNEL);
 484	if (!entry) {
 485		kfree(temp_block);
 486		return;
 487	}
 488
 489	entry->section_id = section_id;
 490	memcpy(entry->data, block - 3, block_size + 3);
 491
 492	kfree(temp_block);
 493
 494	drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
 495		    section_id, block_size, min_size);
 496
 497	if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
 498	    !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
 499		drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
 500		kfree(entry);
 501		return;
 502	}
 503
 504	list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
 505}
 506
 507static void init_bdb_blocks(struct drm_i915_private *i915,
 508			    const void *bdb)
 509{
 510	int i;
 511
 512	for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
 513		enum bdb_block_id section_id = bdb_blocks[i].section_id;
 514		size_t min_size = bdb_blocks[i].min_size;
 515
 516		if (section_id == BDB_LVDS_LFP_DATA)
 517			min_size = lfp_data_min_size(i915);
 518
 519		init_bdb_block(i915, bdb, section_id, min_size);
 520	}
 521}
 522
 523static void
 524fill_detail_timing_data(struct drm_i915_private *i915,
 525			struct drm_display_mode *panel_fixed_mode,
 526			const struct lvds_dvo_timing *dvo_timing)
 527{
 528	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
 529		dvo_timing->hactive_lo;
 530	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
 531		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
 532	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
 533		((dvo_timing->hsync_pulse_width_hi << 8) |
 534			dvo_timing->hsync_pulse_width_lo);
 535	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
 536		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
 537
 538	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
 539		dvo_timing->vactive_lo;
 540	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
 541		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
 542	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
 543		((dvo_timing->vsync_pulse_width_hi << 4) |
 544			dvo_timing->vsync_pulse_width_lo);
 545	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
 546		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
 547	panel_fixed_mode->clock = dvo_timing->clock * 10;
 548	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
 549
 550	if (dvo_timing->hsync_positive)
 551		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
 552	else
 553		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
 554
 555	if (dvo_timing->vsync_positive)
 556		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
 557	else
 558		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
 559
 560	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
 561		dvo_timing->himage_lo;
 562	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
 563		dvo_timing->vimage_lo;
 564
 565	/* Some VBTs have bogus h/vsync_end values */
 566	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) {
 567		drm_dbg_kms(&i915->drm, "reducing hsync_end %d->%d\n",
 568			    panel_fixed_mode->hsync_end, panel_fixed_mode->htotal);
 569		panel_fixed_mode->hsync_end = panel_fixed_mode->htotal;
 570	}
 571	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) {
 572		drm_dbg_kms(&i915->drm, "reducing vsync_end %d->%d\n",
 573			    panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal);
 574		panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal;
 575	}
 576
 577	drm_mode_set_name(panel_fixed_mode);
 578}
 579
 580static const struct lvds_dvo_timing *
 581get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
 582		    const struct bdb_lvds_lfp_data_ptrs *ptrs,
 583		    int index)
 584{
 585	return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
 586}
 587
 588static const struct lvds_fp_timing *
 589get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
 590		   const struct bdb_lvds_lfp_data_ptrs *ptrs,
 591		   int index)
 592{
 593	return (const void *)data + ptrs->ptr[index].fp_timing.offset;
 594}
 595
 596static const struct lvds_pnp_id *
 597get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
 598		const struct bdb_lvds_lfp_data_ptrs *ptrs,
 599		int index)
 600{
 601	return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
 602}
 603
 604static const struct bdb_lvds_lfp_data_tail *
 605get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
 606		  const struct bdb_lvds_lfp_data_ptrs *ptrs)
 607{
 608	if (ptrs->panel_name.table_size)
 609		return (const void *)data + ptrs->panel_name.offset;
 610	else
 611		return NULL;
 612}
 613
 614static void dump_pnp_id(struct drm_i915_private *i915,
 615			const struct lvds_pnp_id *pnp_id,
 616			const char *name)
 617{
 618	u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
 619	char vend[4];
 620
 621	drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n",
 622		    name, drm_edid_decode_mfg_id(mfg_name, vend),
 623		    pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
 624		    pnp_id->mfg_week, pnp_id->mfg_year + 1990);
 625}
 626
 627static int opregion_get_panel_type(struct drm_i915_private *i915,
 628				   const struct intel_bios_encoder_data *devdata,
 629				   const struct drm_edid *drm_edid, bool use_fallback)
 630{
 631	return intel_opregion_get_panel_type(i915);
 632}
 633
 634static int vbt_get_panel_type(struct drm_i915_private *i915,
 635			      const struct intel_bios_encoder_data *devdata,
 636			      const struct drm_edid *drm_edid, bool use_fallback)
 637{
 638	const struct bdb_lvds_options *lvds_options;
 639
 640	lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
 641	if (!lvds_options)
 642		return -1;
 643
 644	if (lvds_options->panel_type > 0xf &&
 645	    lvds_options->panel_type != 0xff) {
 646		drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
 647			    lvds_options->panel_type);
 648		return -1;
 649	}
 650
 651	if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
 652		return lvds_options->panel_type2;
 653
 654	drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
 655
 656	return lvds_options->panel_type;
 657}
 658
 659static int pnpid_get_panel_type(struct drm_i915_private *i915,
 660				const struct intel_bios_encoder_data *devdata,
 661				const struct drm_edid *drm_edid, bool use_fallback)
 662{
 663	const struct bdb_lvds_lfp_data *data;
 664	const struct bdb_lvds_lfp_data_ptrs *ptrs;
 665	const struct lvds_pnp_id *edid_id;
 666	struct lvds_pnp_id edid_id_nodate;
 667	const struct edid *edid = drm_edid_raw(drm_edid); /* FIXME */
 668	int i, best = -1;
 669
 670	if (!edid)
 671		return -1;
 672
 673	edid_id = (const void *)&edid->mfg_id[0];
 674
 675	edid_id_nodate = *edid_id;
 676	edid_id_nodate.mfg_week = 0;
 677	edid_id_nodate.mfg_year = 0;
 678
 679	dump_pnp_id(i915, edid_id, "EDID");
 680
 681	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
 682	if (!ptrs)
 683		return -1;
 684
 685	data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
 686	if (!data)
 687		return -1;
 688
 689	for (i = 0; i < 16; i++) {
 690		const struct lvds_pnp_id *vbt_id =
 691			get_lvds_pnp_id(data, ptrs, i);
 692
 693		/* full match? */
 694		if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
 695			return i;
 696
 697		/*
 698		 * Accept a match w/o date if no full match is found,
 699		 * and the VBT entry does not specify a date.
 700		 */
 701		if (best < 0 &&
 702		    !memcmp(vbt_id, &edid_id_nodate, sizeof(*vbt_id)))
 703			best = i;
 704	}
 705
 706	return best;
 707}
 708
 709static int fallback_get_panel_type(struct drm_i915_private *i915,
 710				   const struct intel_bios_encoder_data *devdata,
 711				   const struct drm_edid *drm_edid, bool use_fallback)
 712{
 713	return use_fallback ? 0 : -1;
 714}
 715
 716enum panel_type {
 717	PANEL_TYPE_OPREGION,
 718	PANEL_TYPE_VBT,
 719	PANEL_TYPE_PNPID,
 720	PANEL_TYPE_FALLBACK,
 721};
 722
 723static int get_panel_type(struct drm_i915_private *i915,
 724			  const struct intel_bios_encoder_data *devdata,
 725			  const struct drm_edid *drm_edid, bool use_fallback)
 726{
 727	struct {
 728		const char *name;
 729		int (*get_panel_type)(struct drm_i915_private *i915,
 730				      const struct intel_bios_encoder_data *devdata,
 731				      const struct drm_edid *drm_edid, bool use_fallback);
 732		int panel_type;
 733	} panel_types[] = {
 734		[PANEL_TYPE_OPREGION] = {
 735			.name = "OpRegion",
 736			.get_panel_type = opregion_get_panel_type,
 737		},
 738		[PANEL_TYPE_VBT] = {
 739			.name = "VBT",
 740			.get_panel_type = vbt_get_panel_type,
 741		},
 742		[PANEL_TYPE_PNPID] = {
 743			.name = "PNPID",
 744			.get_panel_type = pnpid_get_panel_type,
 745		},
 746		[PANEL_TYPE_FALLBACK] = {
 747			.name = "fallback",
 748			.get_panel_type = fallback_get_panel_type,
 749		},
 750	};
 751	int i;
 752
 753	for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
 754		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
 755									  drm_edid, use_fallback);
 756
 757		drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
 758			    panel_types[i].panel_type != 0xff);
 759
 760		if (panel_types[i].panel_type >= 0)
 761			drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
 762				    panel_types[i].name, panel_types[i].panel_type);
 763	}
 764
 765	if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
 766		i = PANEL_TYPE_OPREGION;
 767	else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
 768		 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
 769		i = PANEL_TYPE_PNPID;
 770	else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
 771		 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
 772		i = PANEL_TYPE_VBT;
 773	else
 774		i = PANEL_TYPE_FALLBACK;
 775
 776	drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
 777		    panel_types[i].name, panel_types[i].panel_type);
 778
 779	return panel_types[i].panel_type;
 780}
 781
 782static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
 783{
 784	return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
 785}
 786
 787static bool panel_bool(unsigned int value, int panel_type)
 788{
 789	return panel_bits(value, panel_type, 1);
 790}
 791
 792/* Parse general panel options */
 793static void
 794parse_panel_options(struct drm_i915_private *i915,
 795		    struct intel_panel *panel)
 796{
 797	const struct bdb_lvds_options *lvds_options;
 798	int panel_type = panel->vbt.panel_type;
 799	int drrs_mode;
 800
 801	lvds_options = bdb_find_section(i915, BDB_LVDS_OPTIONS);
 802	if (!lvds_options)
 803		return;
 804
 805	panel->vbt.lvds_dither = lvds_options->pixel_dither;
 806
 807	/*
 808	 * Empirical evidence indicates the block size can be
 809	 * either 4,14,16,24+ bytes. For older VBTs no clear
 810	 * relationship between the block size vs. BDB version.
 811	 */
 812	if (get_blocksize(lvds_options) < 16)
 813		return;
 814
 815	drrs_mode = panel_bits(lvds_options->dps_panel_type_bits,
 816			       panel_type, 2);
 817	/*
 818	 * VBT has static DRRS = 0 and seamless DRRS = 2.
 819	 * The below piece of code is required to adjust vbt.drrs_type
 820	 * to match the enum drrs_support_type.
 821	 */
 822	switch (drrs_mode) {
 823	case 0:
 824		panel->vbt.drrs_type = DRRS_TYPE_STATIC;
 825		drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
 826		break;
 827	case 2:
 828		panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
 829		drm_dbg_kms(&i915->drm,
 830			    "DRRS supported mode is seamless\n");
 831		break;
 832	default:
 833		panel->vbt.drrs_type = DRRS_TYPE_NONE;
 834		drm_dbg_kms(&i915->drm,
 835			    "DRRS not supported (VBT input)\n");
 836		break;
 837	}
 838}
 839
 840static void
 841parse_lfp_panel_dtd(struct drm_i915_private *i915,
 842		    struct intel_panel *panel,
 843		    const struct bdb_lvds_lfp_data *lvds_lfp_data,
 844		    const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
 845{
 846	const struct lvds_dvo_timing *panel_dvo_timing;
 847	const struct lvds_fp_timing *fp_timing;
 848	struct drm_display_mode *panel_fixed_mode;
 849	int panel_type = panel->vbt.panel_type;
 850
 851	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
 852					       lvds_lfp_data_ptrs,
 853					       panel_type);
 854
 855	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
 856	if (!panel_fixed_mode)
 857		return;
 858
 859	fill_detail_timing_data(i915, panel_fixed_mode, panel_dvo_timing);
 860
 861	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
 862
 863	drm_dbg_kms(&i915->drm,
 864		    "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
 865		    DRM_MODE_ARG(panel_fixed_mode));
 866
 867	fp_timing = get_lvds_fp_timing(lvds_lfp_data,
 868				       lvds_lfp_data_ptrs,
 869				       panel_type);
 870
 871	/* check the resolution, just to be sure */
 872	if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
 873	    fp_timing->y_res == panel_fixed_mode->vdisplay) {
 874		panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
 875		drm_dbg_kms(&i915->drm,
 876			    "VBT initial LVDS value %x\n",
 877			    panel->vbt.bios_lvds_val);
 878	}
 879}
 880
 881static void
 882parse_lfp_data(struct drm_i915_private *i915,
 883	       struct intel_panel *panel)
 884{
 885	const struct bdb_lvds_lfp_data *data;
 886	const struct bdb_lvds_lfp_data_tail *tail;
 887	const struct bdb_lvds_lfp_data_ptrs *ptrs;
 888	const struct lvds_pnp_id *pnp_id;
 889	int panel_type = panel->vbt.panel_type;
 890
 891	ptrs = bdb_find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
 892	if (!ptrs)
 893		return;
 894
 895	data = bdb_find_section(i915, BDB_LVDS_LFP_DATA);
 896	if (!data)
 897		return;
 898
 899	if (!panel->vbt.lfp_lvds_vbt_mode)
 900		parse_lfp_panel_dtd(i915, panel, data, ptrs);
 901
 902	pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
 903	dump_pnp_id(i915, pnp_id, "Panel");
 904
 905	tail = get_lfp_data_tail(data, ptrs);
 906	if (!tail)
 907		return;
 908
 909	drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
 910		    (int)sizeof(tail->panel_name[0].name),
 911		    tail->panel_name[panel_type].name);
 912
 913	if (i915->display.vbt.version >= 188) {
 914		panel->vbt.seamless_drrs_min_refresh_rate =
 915			tail->seamless_drrs_min_refresh_rate[panel_type];
 916		drm_dbg_kms(&i915->drm,
 917			    "Seamless DRRS min refresh rate: %d Hz\n",
 918			    panel->vbt.seamless_drrs_min_refresh_rate);
 919	}
 920}
 921
 922static void
 923parse_generic_dtd(struct drm_i915_private *i915,
 924		  struct intel_panel *panel)
 925{
 926	const struct bdb_generic_dtd *generic_dtd;
 927	const struct generic_dtd_entry *dtd;
 928	struct drm_display_mode *panel_fixed_mode;
 929	int num_dtd;
 930
 931	/*
 932	 * Older VBTs provided DTD information for internal displays through
 933	 * the "LFP panel tables" block (42).  As of VBT revision 229 the
 934	 * DTD information should be provided via a newer "generic DTD"
 935	 * block (58).  Just to be safe, we'll try the new generic DTD block
 936	 * first on VBT >= 229, but still fall back to trying the old LFP
 937	 * block if that fails.
 938	 */
 939	if (i915->display.vbt.version < 229)
 940		return;
 941
 942	generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD);
 943	if (!generic_dtd)
 944		return;
 945
 946	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
 947		drm_err(&i915->drm, "GDTD size %u is too small.\n",
 948			generic_dtd->gdtd_size);
 949		return;
 950	} else if (generic_dtd->gdtd_size !=
 951		   sizeof(struct generic_dtd_entry)) {
 952		drm_err(&i915->drm, "Unexpected GDTD size %u\n",
 953			generic_dtd->gdtd_size);
 954		/* DTD has unknown fields, but keep going */
 955	}
 956
 957	num_dtd = (get_blocksize(generic_dtd) -
 958		   sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
 959	if (panel->vbt.panel_type >= num_dtd) {
 960		drm_err(&i915->drm,
 961			"Panel type %d not found in table of %d DTD's\n",
 962			panel->vbt.panel_type, num_dtd);
 963		return;
 964	}
 965
 966	dtd = &generic_dtd->dtd[panel->vbt.panel_type];
 967
 968	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
 969	if (!panel_fixed_mode)
 970		return;
 971
 972	panel_fixed_mode->hdisplay = dtd->hactive;
 973	panel_fixed_mode->hsync_start =
 974		panel_fixed_mode->hdisplay + dtd->hfront_porch;
 975	panel_fixed_mode->hsync_end =
 976		panel_fixed_mode->hsync_start + dtd->hsync;
 977	panel_fixed_mode->htotal =
 978		panel_fixed_mode->hdisplay + dtd->hblank;
 979
 980	panel_fixed_mode->vdisplay = dtd->vactive;
 981	panel_fixed_mode->vsync_start =
 982		panel_fixed_mode->vdisplay + dtd->vfront_porch;
 983	panel_fixed_mode->vsync_end =
 984		panel_fixed_mode->vsync_start + dtd->vsync;
 985	panel_fixed_mode->vtotal =
 986		panel_fixed_mode->vdisplay + dtd->vblank;
 987
 988	panel_fixed_mode->clock = dtd->pixel_clock;
 989	panel_fixed_mode->width_mm = dtd->width_mm;
 990	panel_fixed_mode->height_mm = dtd->height_mm;
 991
 992	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
 993	drm_mode_set_name(panel_fixed_mode);
 994
 995	if (dtd->hsync_positive_polarity)
 996		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
 997	else
 998		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
 999
1000	if (dtd->vsync_positive_polarity)
1001		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
1002	else
1003		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
1004
1005	drm_dbg_kms(&i915->drm,
1006		    "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1007		    DRM_MODE_ARG(panel_fixed_mode));
1008
1009	panel->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
1010}
1011
1012static void
1013parse_lfp_backlight(struct drm_i915_private *i915,
1014		    struct intel_panel *panel)
1015{
1016	const struct bdb_lfp_backlight_data *backlight_data;
1017	const struct lfp_backlight_data_entry *entry;
1018	int panel_type = panel->vbt.panel_type;
1019	u16 level;
1020
1021	backlight_data = bdb_find_section(i915, BDB_LVDS_BACKLIGHT);
1022	if (!backlight_data)
1023		return;
1024
1025	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1026		drm_dbg_kms(&i915->drm,
1027			    "Unsupported backlight data entry size %u\n",
1028			    backlight_data->entry_size);
1029		return;
1030	}
1031
1032	entry = &backlight_data->data[panel_type];
1033
1034	panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1035	if (!panel->vbt.backlight.present) {
1036		drm_dbg_kms(&i915->drm,
1037			    "PWM backlight not present in VBT (type %u)\n",
1038			    entry->type);
1039		return;
1040	}
1041
1042	panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1043	panel->vbt.backlight.controller = 0;
1044	if (i915->display.vbt.version >= 191) {
1045		const struct lfp_backlight_control_method *method;
1046
1047		method = &backlight_data->backlight_control[panel_type];
1048		panel->vbt.backlight.type = method->type;
1049		panel->vbt.backlight.controller = method->controller;
1050	}
1051
1052	panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1053	panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1054
1055	if (i915->display.vbt.version >= 234) {
1056		u16 min_level;
1057		bool scale;
1058
1059		level = backlight_data->brightness_level[panel_type].level;
1060		min_level = backlight_data->brightness_min_level[panel_type].level;
1061
1062		if (i915->display.vbt.version >= 236)
1063			scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1064		else
1065			scale = level > 255;
1066
1067		if (scale)
1068			min_level = min_level / 255;
1069
1070		if (min_level > 255) {
1071			drm_warn(&i915->drm, "Brightness min level > 255\n");
1072			level = 255;
1073		}
1074		panel->vbt.backlight.min_brightness = min_level;
1075
1076		panel->vbt.backlight.brightness_precision_bits =
1077			backlight_data->brightness_precision_bits[panel_type];
1078	} else {
1079		level = backlight_data->level[panel_type];
1080		panel->vbt.backlight.min_brightness = entry->min_brightness;
1081	}
1082
1083	if (i915->display.vbt.version >= 239)
1084		panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1085			DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1086	else
1087		panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1088
1089	drm_dbg_kms(&i915->drm,
1090		    "VBT backlight PWM modulation frequency %u Hz, "
1091		    "active %s, min brightness %u, level %u, controller %u\n",
1092		    panel->vbt.backlight.pwm_freq_hz,
1093		    panel->vbt.backlight.active_low_pwm ? "low" : "high",
1094		    panel->vbt.backlight.min_brightness,
1095		    level,
1096		    panel->vbt.backlight.controller);
1097}
1098
1099/* Try to find sdvo panel data */
1100static void
1101parse_sdvo_panel_data(struct drm_i915_private *i915,
1102		      struct intel_panel *panel)
1103{
1104	const struct bdb_sdvo_panel_dtds *dtds;
1105	struct drm_display_mode *panel_fixed_mode;
1106	int index;
1107
1108	index = i915->display.params.vbt_sdvo_panel_type;
1109	if (index == -2) {
1110		drm_dbg_kms(&i915->drm,
1111			    "Ignore SDVO panel mode from BIOS VBT tables.\n");
1112		return;
1113	}
1114
1115	if (index == -1) {
1116		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1117
1118		sdvo_lvds_options = bdb_find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1119		if (!sdvo_lvds_options)
1120			return;
1121
1122		index = sdvo_lvds_options->panel_type;
1123	}
1124
1125	dtds = bdb_find_section(i915, BDB_SDVO_PANEL_DTDS);
1126	if (!dtds)
1127		return;
1128
1129	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1130	if (!panel_fixed_mode)
1131		return;
1132
1133	fill_detail_timing_data(i915, panel_fixed_mode, &dtds->dtds[index]);
1134
1135	panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1136
1137	drm_dbg_kms(&i915->drm,
1138		    "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1139		    DRM_MODE_ARG(panel_fixed_mode));
1140}
1141
1142static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1143				    bool alternate)
1144{
1145	switch (DISPLAY_VER(i915)) {
1146	case 2:
1147		return alternate ? 66667 : 48000;
1148	case 3:
1149	case 4:
1150		return alternate ? 100000 : 96000;
1151	default:
1152		return alternate ? 100000 : 120000;
1153	}
1154}
1155
1156static void
1157parse_general_features(struct drm_i915_private *i915)
1158{
1159	const struct bdb_general_features *general;
1160
1161	general = bdb_find_section(i915, BDB_GENERAL_FEATURES);
1162	if (!general)
1163		return;
1164
1165	i915->display.vbt.int_tv_support = general->int_tv_support;
1166	/* int_crt_support can't be trusted on earlier platforms */
1167	if (i915->display.vbt.version >= 155 &&
1168	    (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1169		i915->display.vbt.int_crt_support = general->int_crt_support;
1170	i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1171	i915->display.vbt.lvds_ssc_freq =
1172		intel_bios_ssc_frequency(i915, general->ssc_freq);
1173	i915->display.vbt.display_clock_mode = general->display_clock_mode;
1174	i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1175	if (i915->display.vbt.version >= 181) {
1176		i915->display.vbt.orientation = general->rotate_180 ?
1177			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1178			DRM_MODE_PANEL_ORIENTATION_NORMAL;
1179	} else {
1180		i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1181	}
1182
1183	if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1184		i915->display.vbt.override_afc_startup = true;
1185		i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1186	}
1187
1188	drm_dbg_kms(&i915->drm,
1189		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1190		    i915->display.vbt.int_tv_support,
1191		    i915->display.vbt.int_crt_support,
1192		    i915->display.vbt.lvds_use_ssc,
1193		    i915->display.vbt.lvds_ssc_freq,
1194		    i915->display.vbt.display_clock_mode,
1195		    i915->display.vbt.fdi_rx_polarity_inverted);
1196}
1197
1198static const struct child_device_config *
1199child_device_ptr(const struct bdb_general_definitions *defs, int i)
1200{
1201	return (const void *) &defs->devices[i * defs->child_dev_size];
1202}
1203
1204static void
1205parse_sdvo_device_mapping(struct drm_i915_private *i915)
1206{
1207	const struct intel_bios_encoder_data *devdata;
1208	int count = 0;
1209
1210	/*
1211	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1212	 * accurate and doesn't have to be, as long as it's not too strict.
1213	 */
1214	if (!IS_DISPLAY_VER(i915, 3, 7)) {
1215		drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1216		return;
1217	}
1218
1219	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1220		const struct child_device_config *child = &devdata->child;
1221		struct sdvo_device_mapping *mapping;
1222
1223		if (child->slave_addr != SLAVE_ADDR1 &&
1224		    child->slave_addr != SLAVE_ADDR2) {
1225			/*
1226			 * If the slave address is neither 0x70 nor 0x72,
1227			 * it is not a SDVO device. Skip it.
1228			 */
1229			continue;
1230		}
1231		if (child->dvo_port != DEVICE_PORT_DVOB &&
1232		    child->dvo_port != DEVICE_PORT_DVOC) {
1233			/* skip the incorrect SDVO port */
1234			drm_dbg_kms(&i915->drm,
1235				    "Incorrect SDVO port. Skip it\n");
1236			continue;
1237		}
1238		drm_dbg_kms(&i915->drm,
1239			    "the SDVO device with slave addr %2x is found on"
1240			    " %s port\n",
1241			    child->slave_addr,
1242			    (child->dvo_port == DEVICE_PORT_DVOB) ?
1243			    "SDVOB" : "SDVOC");
1244		mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1245		if (!mapping->initialized) {
1246			mapping->dvo_port = child->dvo_port;
1247			mapping->slave_addr = child->slave_addr;
1248			mapping->dvo_wiring = child->dvo_wiring;
1249			mapping->ddc_pin = child->ddc_pin;
1250			mapping->i2c_pin = child->i2c_pin;
1251			mapping->initialized = 1;
1252			drm_dbg_kms(&i915->drm,
1253				    "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1254				    mapping->dvo_port, mapping->slave_addr,
1255				    mapping->dvo_wiring, mapping->ddc_pin,
1256				    mapping->i2c_pin);
1257		} else {
1258			drm_dbg_kms(&i915->drm,
1259				    "Maybe one SDVO port is shared by "
1260				    "two SDVO device.\n");
1261		}
1262		if (child->slave2_addr) {
1263			/* Maybe this is a SDVO device with multiple inputs */
1264			/* And the mapping info is not added */
1265			drm_dbg_kms(&i915->drm,
1266				    "there exists the slave2_addr. Maybe this"
1267				    " is a SDVO device with multiple inputs.\n");
1268		}
1269		count++;
1270	}
1271
1272	if (!count) {
1273		/* No SDVO device info is found */
1274		drm_dbg_kms(&i915->drm,
1275			    "No SDVO device info is found in VBT\n");
1276	}
1277}
1278
1279static void
1280parse_driver_features(struct drm_i915_private *i915)
1281{
1282	const struct bdb_driver_features *driver;
1283
1284	driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1285	if (!driver)
1286		return;
1287
1288	if (DISPLAY_VER(i915) >= 5) {
1289		/*
1290		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1291		 * to mean "eDP". The VBT spec doesn't agree with that
1292		 * interpretation, but real world VBTs seem to.
1293		 */
1294		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1295			i915->display.vbt.int_lvds_support = 0;
1296	} else {
1297		/*
1298		 * FIXME it's not clear which BDB version has the LVDS config
1299		 * bits defined. Revision history in the VBT spec says:
1300		 * "0.92 | Add two definitions for VBT value of LVDS Active
1301		 *  Config (00b and 11b values defined) | 06/13/2005"
1302		 * but does not the specify the BDB version.
1303		 *
1304		 * So far version 134 (on i945gm) is the oldest VBT observed
1305		 * in the wild with the bits correctly populated. Version
1306		 * 108 (on i85x) does not have the bits correctly populated.
1307		 */
1308		if (i915->display.vbt.version >= 134 &&
1309		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1310		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1311			i915->display.vbt.int_lvds_support = 0;
1312	}
1313}
1314
1315static void
1316parse_panel_driver_features(struct drm_i915_private *i915,
1317			    struct intel_panel *panel)
1318{
1319	const struct bdb_driver_features *driver;
1320
1321	driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1322	if (!driver)
1323		return;
1324
1325	if (i915->display.vbt.version < 228) {
1326		drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1327			    driver->drrs_enabled);
1328		/*
1329		 * If DRRS is not supported, drrs_type has to be set to 0.
1330		 * This is because, VBT is configured in such a way that
1331		 * static DRRS is 0 and DRRS not supported is represented by
1332		 * driver->drrs_enabled=false
1333		 */
1334		if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1335			/*
1336			 * FIXME Should DMRRS perhaps be treated as seamless
1337			 * but without the automatic downclocking?
1338			 */
1339			if (driver->dmrrs_enabled)
1340				panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1341			else
1342				panel->vbt.drrs_type = DRRS_TYPE_NONE;
1343		}
1344
1345		panel->vbt.psr.enable = driver->psr_enabled;
1346	}
1347}
1348
1349static void
1350parse_power_conservation_features(struct drm_i915_private *i915,
1351				  struct intel_panel *panel)
1352{
1353	const struct bdb_lfp_power *power;
1354	u8 panel_type = panel->vbt.panel_type;
1355
1356	panel->vbt.vrr = true; /* matches Windows behaviour */
1357
1358	if (i915->display.vbt.version < 228)
1359		return;
1360
1361	power = bdb_find_section(i915, BDB_LFP_POWER);
1362	if (!power)
1363		return;
1364
1365	panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1366
1367	/*
1368	 * If DRRS is not supported, drrs_type has to be set to 0.
1369	 * This is because, VBT is configured in such a way that
1370	 * static DRRS is 0 and DRRS not supported is represented by
1371	 * power->drrs & BIT(panel_type)=false
1372	 */
1373	if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1374		/*
1375		 * FIXME Should DMRRS perhaps be treated as seamless
1376		 * but without the automatic downclocking?
1377		 */
1378		if (panel_bool(power->dmrrs, panel_type))
1379			panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1380		else
1381			panel->vbt.drrs_type = DRRS_TYPE_NONE;
1382	}
1383
1384	if (i915->display.vbt.version >= 232)
1385		panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1386
1387	if (i915->display.vbt.version >= 233)
1388		panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1389					    panel_type);
1390}
1391
1392static void
1393parse_edp(struct drm_i915_private *i915,
1394	  struct intel_panel *panel)
1395{
1396	const struct bdb_edp *edp;
1397	const struct edp_power_seq *edp_pps;
1398	const struct edp_fast_link_params *edp_link_params;
1399	int panel_type = panel->vbt.panel_type;
1400
1401	edp = bdb_find_section(i915, BDB_EDP);
1402	if (!edp)
1403		return;
1404
1405	switch (panel_bits(edp->color_depth, panel_type, 2)) {
1406	case EDP_18BPP:
1407		panel->vbt.edp.bpp = 18;
1408		break;
1409	case EDP_24BPP:
1410		panel->vbt.edp.bpp = 24;
1411		break;
1412	case EDP_30BPP:
1413		panel->vbt.edp.bpp = 30;
1414		break;
1415	}
1416
1417	/* Get the eDP sequencing and link info */
1418	edp_pps = &edp->power_seqs[panel_type];
1419	edp_link_params = &edp->fast_link_params[panel_type];
1420
1421	panel->vbt.edp.pps = *edp_pps;
1422
1423	if (i915->display.vbt.version >= 224) {
1424		panel->vbt.edp.rate =
1425			edp->edp_fast_link_training_rate[panel_type] * 20;
1426	} else {
1427		switch (edp_link_params->rate) {
1428		case EDP_RATE_1_62:
1429			panel->vbt.edp.rate = 162000;
1430			break;
1431		case EDP_RATE_2_7:
1432			panel->vbt.edp.rate = 270000;
1433			break;
1434		case EDP_RATE_5_4:
1435			panel->vbt.edp.rate = 540000;
1436			break;
1437		default:
1438			drm_dbg_kms(&i915->drm,
1439				    "VBT has unknown eDP link rate value %u\n",
1440				    edp_link_params->rate);
1441			break;
1442		}
1443	}
1444
1445	switch (edp_link_params->lanes) {
1446	case EDP_LANE_1:
1447		panel->vbt.edp.lanes = 1;
1448		break;
1449	case EDP_LANE_2:
1450		panel->vbt.edp.lanes = 2;
1451		break;
1452	case EDP_LANE_4:
1453		panel->vbt.edp.lanes = 4;
1454		break;
1455	default:
1456		drm_dbg_kms(&i915->drm,
1457			    "VBT has unknown eDP lane count value %u\n",
1458			    edp_link_params->lanes);
1459		break;
1460	}
1461
1462	switch (edp_link_params->preemphasis) {
1463	case EDP_PREEMPHASIS_NONE:
1464		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1465		break;
1466	case EDP_PREEMPHASIS_3_5dB:
1467		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1468		break;
1469	case EDP_PREEMPHASIS_6dB:
1470		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1471		break;
1472	case EDP_PREEMPHASIS_9_5dB:
1473		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1474		break;
1475	default:
1476		drm_dbg_kms(&i915->drm,
1477			    "VBT has unknown eDP pre-emphasis value %u\n",
1478			    edp_link_params->preemphasis);
1479		break;
1480	}
1481
1482	switch (edp_link_params->vswing) {
1483	case EDP_VSWING_0_4V:
1484		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1485		break;
1486	case EDP_VSWING_0_6V:
1487		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1488		break;
1489	case EDP_VSWING_0_8V:
1490		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1491		break;
1492	case EDP_VSWING_1_2V:
1493		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1494		break;
1495	default:
1496		drm_dbg_kms(&i915->drm,
1497			    "VBT has unknown eDP voltage swing value %u\n",
1498			    edp_link_params->vswing);
1499		break;
1500	}
1501
1502	if (i915->display.vbt.version >= 173) {
1503		u8 vswing;
1504
1505		/* Don't read from VBT if module parameter has valid value*/
1506		if (i915->display.params.edp_vswing) {
1507			panel->vbt.edp.low_vswing =
1508				i915->display.params.edp_vswing == 1;
1509		} else {
1510			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1511			panel->vbt.edp.low_vswing = vswing == 0;
1512		}
1513	}
1514
1515	panel->vbt.edp.drrs_msa_timing_delay =
1516		panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1517
1518	if (i915->display.vbt.version >= 244)
1519		panel->vbt.edp.max_link_rate =
1520			edp->edp_max_port_link_rate[panel_type] * 20;
1521}
1522
1523static void
1524parse_psr(struct drm_i915_private *i915,
1525	  struct intel_panel *panel)
1526{
1527	const struct bdb_psr *psr;
1528	const struct psr_table *psr_table;
1529	int panel_type = panel->vbt.panel_type;
1530
1531	psr = bdb_find_section(i915, BDB_PSR);
1532	if (!psr) {
1533		drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1534		return;
1535	}
1536
1537	psr_table = &psr->psr_table[panel_type];
1538
1539	panel->vbt.psr.full_link = psr_table->full_link;
1540	panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1541
1542	/* Allowed VBT values goes from 0 to 15 */
1543	panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1544		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1545
1546	/*
1547	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1548	 * Old decimal value is wake up time in multiples of 100 us.
1549	 */
1550	if (i915->display.vbt.version >= 205 &&
1551	    (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1552		switch (psr_table->tp1_wakeup_time) {
1553		case 0:
1554			panel->vbt.psr.tp1_wakeup_time_us = 500;
1555			break;
1556		case 1:
1557			panel->vbt.psr.tp1_wakeup_time_us = 100;
1558			break;
1559		case 3:
1560			panel->vbt.psr.tp1_wakeup_time_us = 0;
1561			break;
1562		default:
1563			drm_dbg_kms(&i915->drm,
1564				    "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1565				    psr_table->tp1_wakeup_time);
1566			fallthrough;
1567		case 2:
1568			panel->vbt.psr.tp1_wakeup_time_us = 2500;
1569			break;
1570		}
1571
1572		switch (psr_table->tp2_tp3_wakeup_time) {
1573		case 0:
1574			panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1575			break;
1576		case 1:
1577			panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1578			break;
1579		case 3:
1580			panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1581			break;
1582		default:
1583			drm_dbg_kms(&i915->drm,
1584				    "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1585				    psr_table->tp2_tp3_wakeup_time);
1586			fallthrough;
1587		case 2:
1588			panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1589		break;
1590		}
1591	} else {
1592		panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1593		panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1594	}
1595
1596	if (i915->display.vbt.version >= 226) {
1597		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1598
1599		wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1600		switch (wakeup_time) {
1601		case 0:
1602			wakeup_time = 500;
1603			break;
1604		case 1:
1605			wakeup_time = 100;
1606			break;
1607		case 3:
1608			wakeup_time = 50;
1609			break;
1610		default:
1611		case 2:
1612			wakeup_time = 2500;
1613			break;
1614		}
1615		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1616	} else {
1617		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1618		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1619	}
1620}
1621
1622static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1623				      struct intel_panel *panel,
1624				      enum port port)
1625{
1626	enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1627
1628	if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1629		panel->vbt.dsi.bl_ports = BIT(port);
1630		if (panel->vbt.dsi.config->cabc_supported)
1631			panel->vbt.dsi.cabc_ports = BIT(port);
1632
1633		return;
1634	}
1635
1636	switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1637	case DL_DCS_PORT_A:
1638		panel->vbt.dsi.bl_ports = BIT(PORT_A);
1639		break;
1640	case DL_DCS_PORT_C:
1641		panel->vbt.dsi.bl_ports = BIT(port_bc);
1642		break;
1643	default:
1644	case DL_DCS_PORT_A_AND_C:
1645		panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1646		break;
1647	}
1648
1649	if (!panel->vbt.dsi.config->cabc_supported)
1650		return;
1651
1652	switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1653	case DL_DCS_PORT_A:
1654		panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1655		break;
1656	case DL_DCS_PORT_C:
1657		panel->vbt.dsi.cabc_ports = BIT(port_bc);
1658		break;
1659	default:
1660	case DL_DCS_PORT_A_AND_C:
1661		panel->vbt.dsi.cabc_ports =
1662					BIT(PORT_A) | BIT(port_bc);
1663		break;
1664	}
1665}
1666
1667static void
1668parse_mipi_config(struct drm_i915_private *i915,
1669		  struct intel_panel *panel)
1670{
1671	const struct bdb_mipi_config *start;
1672	const struct mipi_config *config;
1673	const struct mipi_pps_data *pps;
1674	int panel_type = panel->vbt.panel_type;
1675	enum port port;
1676
1677	/* parse MIPI blocks only if LFP type is MIPI */
1678	if (!intel_bios_is_dsi_present(i915, &port))
1679		return;
1680
1681	/* Initialize this to undefined indicating no generic MIPI support */
1682	panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1683
1684	/* Block #40 is already parsed and panel_fixed_mode is
1685	 * stored in i915->lfp_lvds_vbt_mode
1686	 * resuse this when needed
1687	 */
1688
1689	/* Parse #52 for panel index used from panel_type already
1690	 * parsed
1691	 */
1692	start = bdb_find_section(i915, BDB_MIPI_CONFIG);
1693	if (!start) {
1694		drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1695		return;
1696	}
1697
1698	drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1699		panel_type);
1700
1701	/*
1702	 * get hold of the correct configuration block and pps data as per
1703	 * the panel_type as index
1704	 */
1705	config = &start->config[panel_type];
1706	pps = &start->pps[panel_type];
1707
1708	/* store as of now full data. Trim when we realise all is not needed */
1709	panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1710	if (!panel->vbt.dsi.config)
1711		return;
1712
1713	panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1714	if (!panel->vbt.dsi.pps) {
1715		kfree(panel->vbt.dsi.config);
1716		return;
1717	}
1718
1719	parse_dsi_backlight_ports(i915, panel, port);
1720
1721	/* FIXME is the 90 vs. 270 correct? */
1722	switch (config->rotation) {
1723	case ENABLE_ROTATION_0:
1724		/*
1725		 * Most (all?) VBTs claim 0 degrees despite having
1726		 * an upside down panel, thus we do not trust this.
1727		 */
1728		panel->vbt.dsi.orientation =
1729			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1730		break;
1731	case ENABLE_ROTATION_90:
1732		panel->vbt.dsi.orientation =
1733			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1734		break;
1735	case ENABLE_ROTATION_180:
1736		panel->vbt.dsi.orientation =
1737			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1738		break;
1739	case ENABLE_ROTATION_270:
1740		panel->vbt.dsi.orientation =
1741			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1742		break;
1743	}
1744
1745	/* We have mandatory mipi config blocks. Initialize as generic panel */
1746	panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1747}
1748
1749/* Find the sequence block and size for the given panel. */
1750static const u8 *
1751find_panel_sequence_block(struct drm_i915_private *i915,
1752			  const struct bdb_mipi_sequence *sequence,
1753			  u16 panel_id, u32 *seq_size)
1754{
1755	u32 total = get_blocksize(sequence);
1756	const u8 *data = &sequence->data[0];
1757	u8 current_id;
1758	u32 current_size;
1759	int header_size = sequence->version >= 3 ? 5 : 3;
1760	int index = 0;
1761	int i;
1762
1763	/* skip new block size */
1764	if (sequence->version >= 3)
1765		data += 4;
1766
1767	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1768		if (index + header_size > total) {
1769			drm_err(&i915->drm, "Invalid sequence block (header)\n");
1770			return NULL;
1771		}
1772
1773		current_id = *(data + index);
1774		if (sequence->version >= 3)
1775			current_size = *((const u32 *)(data + index + 1));
1776		else
1777			current_size = *((const u16 *)(data + index + 1));
1778
1779		index += header_size;
1780
1781		if (index + current_size > total) {
1782			drm_err(&i915->drm, "Invalid sequence block\n");
1783			return NULL;
1784		}
1785
1786		if (current_id == panel_id) {
1787			*seq_size = current_size;
1788			return data + index;
1789		}
1790
1791		index += current_size;
1792	}
1793
1794	drm_err(&i915->drm, "Sequence block detected but no valid configuration\n");
1795
1796	return NULL;
1797}
1798
1799static int goto_next_sequence(struct drm_i915_private *i915,
1800			      const u8 *data, int index, int total)
1801{
1802	u16 len;
1803
1804	/* Skip Sequence Byte. */
1805	for (index = index + 1; index < total; index += len) {
1806		u8 operation_byte = *(data + index);
1807		index++;
1808
1809		switch (operation_byte) {
1810		case MIPI_SEQ_ELEM_END:
1811			return index;
1812		case MIPI_SEQ_ELEM_SEND_PKT:
1813			if (index + 4 > total)
1814				return 0;
1815
1816			len = *((const u16 *)(data + index + 2)) + 4;
1817			break;
1818		case MIPI_SEQ_ELEM_DELAY:
1819			len = 4;
1820			break;
1821		case MIPI_SEQ_ELEM_GPIO:
1822			len = 2;
1823			break;
1824		case MIPI_SEQ_ELEM_I2C:
1825			if (index + 7 > total)
1826				return 0;
1827			len = *(data + index + 6) + 7;
1828			break;
1829		default:
1830			drm_err(&i915->drm, "Unknown operation byte\n");
1831			return 0;
1832		}
1833	}
1834
1835	return 0;
1836}
1837
1838static int goto_next_sequence_v3(struct drm_i915_private *i915,
1839				 const u8 *data, int index, int total)
1840{
1841	int seq_end;
1842	u16 len;
1843	u32 size_of_sequence;
1844
1845	/*
1846	 * Could skip sequence based on Size of Sequence alone, but also do some
1847	 * checking on the structure.
1848	 */
1849	if (total < 5) {
1850		drm_err(&i915->drm, "Too small sequence size\n");
1851		return 0;
1852	}
1853
1854	/* Skip Sequence Byte. */
1855	index++;
1856
1857	/*
1858	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1859	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1860	 * byte.
1861	 */
1862	size_of_sequence = *((const u32 *)(data + index));
1863	index += 4;
1864
1865	seq_end = index + size_of_sequence;
1866	if (seq_end > total) {
1867		drm_err(&i915->drm, "Invalid sequence size\n");
1868		return 0;
1869	}
1870
1871	for (; index < total; index += len) {
1872		u8 operation_byte = *(data + index);
1873		index++;
1874
1875		if (operation_byte == MIPI_SEQ_ELEM_END) {
1876			if (index != seq_end) {
1877				drm_err(&i915->drm, "Invalid element structure\n");
1878				return 0;
1879			}
1880			return index;
1881		}
1882
1883		len = *(data + index);
1884		index++;
1885
1886		/*
1887		 * FIXME: Would be nice to check elements like for v1/v2 in
1888		 * goto_next_sequence() above.
1889		 */
1890		switch (operation_byte) {
1891		case MIPI_SEQ_ELEM_SEND_PKT:
1892		case MIPI_SEQ_ELEM_DELAY:
1893		case MIPI_SEQ_ELEM_GPIO:
1894		case MIPI_SEQ_ELEM_I2C:
1895		case MIPI_SEQ_ELEM_SPI:
1896		case MIPI_SEQ_ELEM_PMIC:
1897			break;
1898		default:
1899			drm_err(&i915->drm, "Unknown operation byte %u\n",
1900				operation_byte);
1901			break;
1902		}
1903	}
1904
1905	return 0;
1906}
1907
1908/*
1909 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1910 * skip all delay + gpio operands and stop at the first DSI packet op.
1911 */
1912static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1913					      struct intel_panel *panel)
1914{
1915	const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1916	int index, len;
1917
1918	if (drm_WARN_ON(&i915->drm,
1919			!data || panel->vbt.dsi.seq_version != 1))
1920		return 0;
1921
1922	/* index = 1 to skip sequence byte */
1923	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1924		switch (data[index]) {
1925		case MIPI_SEQ_ELEM_SEND_PKT:
1926			return index == 1 ? 0 : index;
1927		case MIPI_SEQ_ELEM_DELAY:
1928			len = 5; /* 1 byte for operand + uint32 */
1929			break;
1930		case MIPI_SEQ_ELEM_GPIO:
1931			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1932			break;
1933		default:
1934			return 0;
1935		}
1936	}
1937
1938	return 0;
1939}
1940
1941/*
1942 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1943 * The deassert must be done before calling intel_dsi_device_ready, so for
1944 * these devices we split the init OTP sequence into a deassert sequence and
1945 * the actual init OTP part.
1946 */
1947static void vlv_fixup_mipi_sequences(struct drm_i915_private *i915,
1948				     struct intel_panel *panel)
1949{
1950	u8 *init_otp;
1951	int len;
1952
1953	/* Limit this to v1 vid-mode sequences */
1954	if (panel->vbt.dsi.config->is_cmd_mode ||
1955	    panel->vbt.dsi.seq_version != 1)
1956		return;
1957
1958	/* Only do this if there are otp and assert seqs and no deassert seq */
1959	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1960	    !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1961	    panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1962		return;
1963
1964	/* The deassert-sequence ends at the first DSI packet */
1965	len = get_init_otp_deassert_fragment_len(i915, panel);
1966	if (!len)
1967		return;
1968
1969	drm_dbg_kms(&i915->drm,
1970		    "Using init OTP fragment to deassert reset\n");
1971
1972	/* Copy the fragment, update seq byte and terminate it */
1973	init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1974	panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1975	if (!panel->vbt.dsi.deassert_seq)
1976		return;
1977	panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1978	panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1979	/* Use the copy for deassert */
1980	panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1981		panel->vbt.dsi.deassert_seq;
1982	/* Replace the last byte of the fragment with init OTP seq byte */
1983	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1984	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1985	panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1986}
1987
1988/*
1989 * Some machines (eg. Lenovo 82TQ) appear to have broken
1990 * VBT sequences:
1991 * - INIT_OTP is not present at all
1992 * - what should be in INIT_OTP is in DISPLAY_ON
1993 * - what should be in DISPLAY_ON is in BACKLIGHT_ON
1994 *   (along with the actual backlight stuff)
1995 *
1996 * To make those work we simply swap DISPLAY_ON and INIT_OTP.
1997 *
1998 * TODO: Do we need to limit this to specific machines,
1999 *       or examine the contents of the sequences to
2000 *       avoid false positives?
2001 */
2002static void icl_fixup_mipi_sequences(struct drm_i915_private *i915,
2003				     struct intel_panel *panel)
2004{
2005	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] &&
2006	    panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) {
2007		drm_dbg_kms(&i915->drm, "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n");
2008
2009		swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP],
2010		     panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]);
2011	}
2012}
2013
2014static void fixup_mipi_sequences(struct drm_i915_private *i915,
2015				 struct intel_panel *panel)
2016{
2017	if (DISPLAY_VER(i915) >= 11)
2018		icl_fixup_mipi_sequences(i915, panel);
2019	else if (IS_VALLEYVIEW(i915))
2020		vlv_fixup_mipi_sequences(i915, panel);
2021}
2022
2023static void
2024parse_mipi_sequence(struct drm_i915_private *i915,
2025		    struct intel_panel *panel)
2026{
2027	int panel_type = panel->vbt.panel_type;
2028	const struct bdb_mipi_sequence *sequence;
2029	const u8 *seq_data;
2030	u32 seq_size;
2031	u8 *data;
2032	int index = 0;
2033
2034	/* Only our generic panel driver uses the sequence block. */
2035	if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2036		return;
2037
2038	sequence = bdb_find_section(i915, BDB_MIPI_SEQUENCE);
2039	if (!sequence) {
2040		drm_dbg_kms(&i915->drm,
2041			    "No MIPI Sequence found, parsing complete\n");
2042		return;
2043	}
2044
2045	/* Fail gracefully for forward incompatible sequence block. */
2046	if (sequence->version >= 4) {
2047		drm_err(&i915->drm,
2048			"Unable to parse MIPI Sequence Block v%u\n",
2049			sequence->version);
2050		return;
2051	}
2052
2053	drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2054		sequence->version);
2055
2056	seq_data = find_panel_sequence_block(i915, sequence, panel_type, &seq_size);
2057	if (!seq_data)
2058		return;
2059
2060	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2061	if (!data)
2062		return;
2063
2064	/* Parse the sequences, store pointers to each sequence. */
2065	for (;;) {
2066		u8 seq_id = *(data + index);
2067		if (seq_id == MIPI_SEQ_END)
2068			break;
2069
2070		if (seq_id >= MIPI_SEQ_MAX) {
2071			drm_err(&i915->drm, "Unknown sequence %u\n",
2072				seq_id);
2073			goto err;
2074		}
2075
2076		/* Log about presence of sequences we won't run. */
2077		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2078			drm_dbg_kms(&i915->drm,
2079				    "Unsupported sequence %u\n", seq_id);
2080
2081		panel->vbt.dsi.sequence[seq_id] = data + index;
2082
2083		if (sequence->version >= 3)
2084			index = goto_next_sequence_v3(i915, data, index, seq_size);
2085		else
2086			index = goto_next_sequence(i915, data, index, seq_size);
2087		if (!index) {
2088			drm_err(&i915->drm, "Invalid sequence %u\n",
2089				seq_id);
2090			goto err;
2091		}
2092	}
2093
2094	panel->vbt.dsi.data = data;
2095	panel->vbt.dsi.size = seq_size;
2096	panel->vbt.dsi.seq_version = sequence->version;
2097
2098	fixup_mipi_sequences(i915, panel);
2099
2100	drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2101	return;
2102
2103err:
2104	kfree(data);
2105	memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2106}
2107
2108static void
2109parse_compression_parameters(struct drm_i915_private *i915)
2110{
2111	const struct bdb_compression_parameters *params;
2112	struct intel_bios_encoder_data *devdata;
2113	u16 block_size;
2114	int index;
2115
2116	if (i915->display.vbt.version < 198)
2117		return;
2118
2119	params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS);
2120	if (params) {
2121		/* Sanity checks */
2122		if (params->entry_size != sizeof(params->data[0])) {
2123			drm_dbg_kms(&i915->drm,
2124				    "VBT: unsupported compression param entry size\n");
2125			return;
2126		}
2127
2128		block_size = get_blocksize(params);
2129		if (block_size < sizeof(*params)) {
2130			drm_dbg_kms(&i915->drm,
2131				    "VBT: expected 16 compression param entries\n");
2132			return;
2133		}
2134	}
2135
2136	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2137		const struct child_device_config *child = &devdata->child;
2138
2139		if (!child->compression_enable)
2140			continue;
2141
2142		if (!params) {
2143			drm_dbg_kms(&i915->drm,
2144				    "VBT: compression params not available\n");
2145			continue;
2146		}
2147
2148		if (child->compression_method_cps) {
2149			drm_dbg_kms(&i915->drm,
2150				    "VBT: CPS compression not supported\n");
2151			continue;
2152		}
2153
2154		index = child->compression_structure_index;
2155
2156		devdata->dsc = kmemdup(&params->data[index],
2157				       sizeof(*devdata->dsc), GFP_KERNEL);
2158	}
2159}
2160
2161static u8 translate_iboost(struct drm_i915_private *i915, u8 val)
2162{
2163	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2164
2165	if (val >= ARRAY_SIZE(mapping)) {
2166		drm_dbg_kms(&i915->drm,
2167			    "Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2168		return 0;
2169	}
2170	return mapping[val];
2171}
2172
2173static const u8 cnp_ddc_pin_map[] = {
2174	[0] = 0, /* N/A */
2175	[GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2176	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2177	[GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2178	[GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2179};
2180
2181static const u8 icp_ddc_pin_map[] = {
2182	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2183	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2184	[GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2185	[GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2186	[GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2187	[GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2188	[GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2189	[GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2190	[GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2191};
2192
2193static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2194	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2195	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2196	[GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2197	[GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2198};
2199
2200static const u8 adls_ddc_pin_map[] = {
2201	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2202	[GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2203	[GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2204	[GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2205	[GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2206};
2207
2208static const u8 gen9bc_tgp_ddc_pin_map[] = {
2209	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2210	[GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2211	[GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2212};
2213
2214static const u8 adlp_ddc_pin_map[] = {
2215	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2216	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2217	[GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2218	[GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2219	[GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2220	[GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2221};
2222
2223static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2224{
2225	const u8 *ddc_pin_map;
2226	int i, n_entries;
2227
2228	if (IS_DGFX(i915))
2229		return vbt_pin;
2230
2231	if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {
2232		ddc_pin_map = adlp_ddc_pin_map;
2233		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2234	} else if (IS_ALDERLAKE_S(i915)) {
2235		ddc_pin_map = adls_ddc_pin_map;
2236		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2237	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2238		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2239		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2240	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2241		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2242		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2243	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2244		ddc_pin_map = icp_ddc_pin_map;
2245		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2246	} else if (HAS_PCH_CNP(i915)) {
2247		ddc_pin_map = cnp_ddc_pin_map;
2248		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2249	} else {
2250		/* Assuming direct map */
2251		return vbt_pin;
2252	}
2253
2254	for (i = 0; i < n_entries; i++) {
2255		if (ddc_pin_map[i] == vbt_pin)
2256			return i;
2257	}
2258
2259	drm_dbg_kms(&i915->drm,
2260		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2261		    vbt_pin);
2262	return 0;
2263}
2264
2265static u8 dvo_port_type(u8 dvo_port)
2266{
2267	switch (dvo_port) {
2268	case DVO_PORT_HDMIA:
2269	case DVO_PORT_HDMIB:
2270	case DVO_PORT_HDMIC:
2271	case DVO_PORT_HDMID:
2272	case DVO_PORT_HDMIE:
2273	case DVO_PORT_HDMIF:
2274	case DVO_PORT_HDMIG:
2275	case DVO_PORT_HDMIH:
2276	case DVO_PORT_HDMII:
2277		return DVO_PORT_HDMIA;
2278	case DVO_PORT_DPA:
2279	case DVO_PORT_DPB:
2280	case DVO_PORT_DPC:
2281	case DVO_PORT_DPD:
2282	case DVO_PORT_DPE:
2283	case DVO_PORT_DPF:
2284	case DVO_PORT_DPG:
2285	case DVO_PORT_DPH:
2286	case DVO_PORT_DPI:
2287		return DVO_PORT_DPA;
2288	case DVO_PORT_MIPIA:
2289	case DVO_PORT_MIPIB:
2290	case DVO_PORT_MIPIC:
2291	case DVO_PORT_MIPID:
2292		return DVO_PORT_MIPIA;
2293	default:
2294		return dvo_port;
2295	}
2296}
2297
2298static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2299				    const int port_mapping[][3], u8 dvo_port)
2300{
2301	enum port port;
2302	int i;
2303
2304	for (port = PORT_A; port < n_ports; port++) {
2305		for (i = 0; i < n_dvo; i++) {
2306			if (port_mapping[port][i] == -1)
2307				break;
2308
2309			if (dvo_port == port_mapping[port][i])
2310				return port;
2311		}
2312	}
2313
2314	return PORT_NONE;
2315}
2316
2317static enum port dvo_port_to_port(struct drm_i915_private *i915,
2318				  u8 dvo_port)
2319{
2320	/*
2321	 * Each DDI port can have more than one value on the "DVO Port" field,
2322	 * so look for all the possible values for each port.
2323	 */
2324	static const int port_mapping[][3] = {
2325		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2326		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2327		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2328		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2329		[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2330		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2331		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2332		[PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2333		[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2334	};
2335	/*
2336	 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2337	 * map to DDI A,B,TC1,TC2 respectively.
2338	 */
2339	static const int rkl_port_mapping[][3] = {
2340		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2341		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2342		[PORT_C] = { -1 },
2343		[PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2344		[PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2345	};
2346	/*
2347	 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2348	 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2349	 */
2350	static const int adls_port_mapping[][3] = {
2351		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2352		[PORT_B] = { -1 },
2353		[PORT_C] = { -1 },
2354		[PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2355		[PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2356		[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2357		[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2358	};
2359	static const int xelpd_port_mapping[][3] = {
2360		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2361		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2362		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2363		[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2364		[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2365		[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2366		[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2367		[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2368		[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2369	};
2370
2371	if (DISPLAY_VER(i915) >= 13)
2372		return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2373					  ARRAY_SIZE(xelpd_port_mapping[0]),
2374					  xelpd_port_mapping,
2375					  dvo_port);
2376	else if (IS_ALDERLAKE_S(i915))
2377		return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2378					  ARRAY_SIZE(adls_port_mapping[0]),
2379					  adls_port_mapping,
2380					  dvo_port);
2381	else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2382		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2383					  ARRAY_SIZE(rkl_port_mapping[0]),
2384					  rkl_port_mapping,
2385					  dvo_port);
2386	else
2387		return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2388					  ARRAY_SIZE(port_mapping[0]),
2389					  port_mapping,
2390					  dvo_port);
2391}
2392
2393static enum port
2394dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2395{
2396	switch (dvo_port) {
2397	case DVO_PORT_MIPIA:
2398		return PORT_A;
2399	case DVO_PORT_MIPIC:
2400		if (DISPLAY_VER(i915) >= 11)
2401			return PORT_B;
2402		else
2403			return PORT_C;
2404	default:
2405		return PORT_NONE;
2406	}
2407}
2408
2409enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata)
2410{
2411	struct drm_i915_private *i915 = devdata->i915;
2412	const struct child_device_config *child = &devdata->child;
2413	enum port port;
2414
2415	port = dvo_port_to_port(i915, child->dvo_port);
2416	if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
2417		port = dsi_dvo_port_to_port(i915, child->dvo_port);
2418
2419	return port;
2420}
2421
2422static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2423{
2424	switch (vbt_max_link_rate) {
2425	default:
2426	case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2427		return 0;
2428	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2429		return 2000000;
2430	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2431		return 1350000;
2432	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2433		return 1000000;
2434	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2435		return 810000;
2436	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2437		return 540000;
2438	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2439		return 270000;
2440	case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2441		return 162000;
2442	}
2443}
2444
2445static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2446{
2447	switch (vbt_max_link_rate) {
2448	default:
2449	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2450		return 810000;
2451	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2452		return 540000;
2453	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2454		return 270000;
2455	case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2456		return 162000;
2457	}
2458}
2459
2460int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2461{
2462	if (!devdata || devdata->i915->display.vbt.version < 216)
2463		return 0;
2464
2465	if (devdata->i915->display.vbt.version >= 230)
2466		return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2467	else
2468		return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2469}
2470
2471int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2472{
2473	if (!devdata || devdata->i915->display.vbt.version < 244)
2474		return 0;
2475
2476	return devdata->child.dp_max_lane_count + 1;
2477}
2478
2479static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2480				 enum port port)
2481{
2482	struct drm_i915_private *i915 = devdata->i915;
2483	bool is_hdmi;
2484
2485	if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2486		return;
2487
2488	if (!intel_bios_encoder_supports_dvi(devdata))
2489		return;
2490
2491	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2492
2493	drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2494		    is_hdmi ? "/HDMI" : "");
2495
2496	devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2497	devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2498}
2499
2500static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
2501				      enum port port)
2502{
2503	struct drm_i915_private *i915 = devdata->i915;
2504
2505	if (!intel_bios_encoder_supports_dvi(devdata))
2506		return;
2507
2508	/*
2509	 * Some BDW machines (eg. HP Pavilion 15-ab) shipped
2510	 * with a HSW VBT where the level shifter value goes
2511	 * up to 11, whereas the BDW max is 9.
2512	 */
2513	if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) {
2514		drm_dbg_kms(&i915->drm, "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
2515			    port_name(port), devdata->child.hdmi_level_shifter_value, 9);
2516
2517		devdata->child.hdmi_level_shifter_value = 9;
2518	}
2519}
2520
2521static bool
2522intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2523{
2524	return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2525}
2526
2527bool
2528intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2529{
2530	return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2531}
2532
2533bool
2534intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2535{
2536	return intel_bios_encoder_supports_dvi(devdata) &&
2537		(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2538}
2539
2540bool
2541intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2542{
2543	return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2544}
2545
2546bool
2547intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2548{
2549	return intel_bios_encoder_supports_dp(devdata) &&
2550		devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2551}
2552
2553bool
2554intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2555{
2556	return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2557}
2558
2559bool
2560intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2561{
2562	return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon;
2563}
2564
2565/* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2566int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2567{
2568	if (!devdata || devdata->i915->display.vbt.version < 158 ||
2569	    DISPLAY_VER(devdata->i915) >= 14)
2570		return -1;
2571
2572	return devdata->child.hdmi_level_shifter_value;
2573}
2574
2575int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2576{
2577	if (!devdata || devdata->i915->display.vbt.version < 204)
2578		return 0;
2579
2580	switch (devdata->child.hdmi_max_data_rate) {
2581	default:
2582		MISSING_CASE(devdata->child.hdmi_max_data_rate);
2583		fallthrough;
2584	case HDMI_MAX_DATA_RATE_PLATFORM:
2585		return 0;
2586	case HDMI_MAX_DATA_RATE_594:
2587		return 594000;
2588	case HDMI_MAX_DATA_RATE_340:
2589		return 340000;
2590	case HDMI_MAX_DATA_RATE_300:
2591		return 300000;
2592	case HDMI_MAX_DATA_RATE_297:
2593		return 297000;
2594	case HDMI_MAX_DATA_RATE_165:
2595		return 165000;
2596	}
2597}
2598
2599static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2600{
2601	/*
2602	 * On some ICL SKUs port F is not present, but broken VBTs mark
2603	 * the port as present. Only try to initialize port F for the
2604	 * SKUs that may actually have it.
2605	 */
2606	if (port == PORT_F && IS_ICELAKE(i915))
2607		return IS_ICL_WITH_PORT_F(i915);
2608
2609	return true;
2610}
2611
2612static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
2613{
2614	struct drm_i915_private *i915 = devdata->i915;
2615	const struct child_device_config *child = &devdata->child;
2616	bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2617	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2618	enum port port;
2619
2620	port = intel_bios_encoder_port(devdata);
2621	if (port == PORT_NONE)
2622		return;
2623
2624	is_dvi = intel_bios_encoder_supports_dvi(devdata);
2625	is_dp = intel_bios_encoder_supports_dp(devdata);
2626	is_crt = intel_bios_encoder_supports_crt(devdata);
2627	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2628	is_edp = intel_bios_encoder_supports_edp(devdata);
2629	is_dsi = intel_bios_encoder_supports_dsi(devdata);
2630
2631	supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2632	supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2633
2634	drm_dbg_kms(&i915->drm,
2635		    "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2636		    port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2637		    intel_bios_encoder_supports_dp_dual_mode(devdata),
2638		    intel_bios_encoder_is_lspcon(devdata),
2639		    supports_typec_usb, supports_tbt,
2640		    devdata->dsc != NULL);
2641
2642	hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2643	if (hdmi_level_shift >= 0) {
2644		drm_dbg_kms(&i915->drm,
2645			    "Port %c VBT HDMI level shift: %d\n",
2646			    port_name(port), hdmi_level_shift);
2647	}
2648
2649	max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2650	if (max_tmds_clock)
2651		drm_dbg_kms(&i915->drm,
2652			    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2653			    port_name(port), max_tmds_clock);
2654
2655	/* I_boost config for SKL and above */
2656	dp_boost_level = intel_bios_dp_boost_level(devdata);
2657	if (dp_boost_level)
2658		drm_dbg_kms(&i915->drm,
2659			    "Port %c VBT (e)DP boost level: %d\n",
2660			    port_name(port), dp_boost_level);
2661
2662	hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2663	if (hdmi_boost_level)
2664		drm_dbg_kms(&i915->drm,
2665			    "Port %c VBT HDMI boost level: %d\n",
2666			    port_name(port), hdmi_boost_level);
2667
2668	dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2669	if (dp_max_link_rate)
2670		drm_dbg_kms(&i915->drm,
2671			    "Port %c VBT DP max link rate: %d\n",
2672			    port_name(port), dp_max_link_rate);
2673
2674	/*
2675	 * FIXME need to implement support for VBT
2676	 * vswing/preemph tables should this ever trigger.
2677	 */
2678	drm_WARN(&i915->drm, child->use_vbt_vswing,
2679		 "Port %c asks to use VBT vswing/preemph tables\n",
2680		 port_name(port));
2681}
2682
2683static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2684{
2685	struct drm_i915_private *i915 = devdata->i915;
2686	enum port port;
2687
2688	port = intel_bios_encoder_port(devdata);
2689	if (port == PORT_NONE)
2690		return;
2691
2692	if (!is_port_valid(i915, port)) {
2693		drm_dbg_kms(&i915->drm,
2694			    "VBT reports port %c as supported, but that can't be true: skipping\n",
2695			    port_name(port));
2696		return;
2697	}
2698
2699	sanitize_device_type(devdata, port);
2700	sanitize_hdmi_level_shift(devdata, port);
2701}
2702
2703static bool has_ddi_port_info(struct drm_i915_private *i915)
2704{
2705	return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2706}
2707
2708static void parse_ddi_ports(struct drm_i915_private *i915)
2709{
2710	struct intel_bios_encoder_data *devdata;
2711
2712	if (!has_ddi_port_info(i915))
2713		return;
2714
2715	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2716		parse_ddi_port(devdata);
2717
2718	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2719		print_ddi_port(devdata);
2720}
2721
2722static void
2723parse_general_definitions(struct drm_i915_private *i915)
2724{
2725	const struct bdb_general_definitions *defs;
2726	struct intel_bios_encoder_data *devdata;
2727	const struct child_device_config *child;
2728	int i, child_device_num;
2729	u8 expected_size;
2730	u16 block_size;
2731	int bus_pin;
2732
2733	defs = bdb_find_section(i915, BDB_GENERAL_DEFINITIONS);
2734	if (!defs) {
2735		drm_dbg_kms(&i915->drm,
2736			    "No general definition block is found, no devices defined.\n");
2737		return;
2738	}
2739
2740	block_size = get_blocksize(defs);
2741	if (block_size < sizeof(*defs)) {
2742		drm_dbg_kms(&i915->drm,
2743			    "General definitions block too small (%u)\n",
2744			    block_size);
2745		return;
2746	}
2747
2748	bus_pin = defs->crt_ddc_gmbus_pin;
2749	drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2750	if (intel_gmbus_is_valid_pin(i915, bus_pin))
2751		i915->display.vbt.crt_ddc_pin = bus_pin;
2752
2753	if (i915->display.vbt.version < 106) {
2754		expected_size = 22;
2755	} else if (i915->display.vbt.version < 111) {
2756		expected_size = 27;
2757	} else if (i915->display.vbt.version < 195) {
2758		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2759	} else if (i915->display.vbt.version == 195) {
2760		expected_size = 37;
2761	} else if (i915->display.vbt.version <= 215) {
2762		expected_size = 38;
2763	} else if (i915->display.vbt.version <= 250) {
2764		expected_size = 39;
2765	} else {
2766		expected_size = sizeof(*child);
2767		BUILD_BUG_ON(sizeof(*child) < 39);
2768		drm_dbg(&i915->drm,
2769			"Expected child device config size for VBT version %u not known; assuming %u\n",
2770			i915->display.vbt.version, expected_size);
2771	}
2772
2773	/* Flag an error for unexpected size, but continue anyway. */
2774	if (defs->child_dev_size != expected_size)
2775		drm_err(&i915->drm,
2776			"Unexpected child device config size %u (expected %u for VBT version %u)\n",
2777			defs->child_dev_size, expected_size, i915->display.vbt.version);
2778
2779	/* The legacy sized child device config is the minimum we need. */
2780	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2781		drm_dbg_kms(&i915->drm,
2782			    "Child device config size %u is too small.\n",
2783			    defs->child_dev_size);
2784		return;
2785	}
2786
2787	/* get the number of child device */
2788	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2789
2790	for (i = 0; i < child_device_num; i++) {
2791		child = child_device_ptr(defs, i);
2792		if (!child->device_type)
2793			continue;
2794
2795		drm_dbg_kms(&i915->drm,
2796			    "Found VBT child device with type 0x%x\n",
2797			    child->device_type);
2798
2799		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2800		if (!devdata)
2801			break;
2802
2803		devdata->i915 = i915;
2804
2805		/*
2806		 * Copy as much as we know (sizeof) and is available
2807		 * (child_dev_size) of the child device config. Accessing the
2808		 * data must depend on VBT version.
2809		 */
2810		memcpy(&devdata->child, child,
2811		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
2812
2813		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2814	}
2815
2816	if (list_empty(&i915->display.vbt.display_devices))
2817		drm_dbg_kms(&i915->drm,
2818			    "no child dev is parsed from VBT\n");
2819}
2820
2821/* Common defaults which may be overridden by VBT. */
2822static void
2823init_vbt_defaults(struct drm_i915_private *i915)
2824{
2825	i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2826
2827	/* general features */
2828	i915->display.vbt.int_tv_support = 1;
2829	i915->display.vbt.int_crt_support = 1;
2830
2831	/* driver features */
2832	i915->display.vbt.int_lvds_support = 1;
2833
2834	/* Default to using SSC */
2835	i915->display.vbt.lvds_use_ssc = 1;
2836	/*
2837	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2838	 * clock for LVDS.
2839	 */
2840	i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2841								   !HAS_PCH_SPLIT(i915));
2842	drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2843		    i915->display.vbt.lvds_ssc_freq);
2844}
2845
2846/* Common defaults which may be overridden by VBT. */
2847static void
2848init_vbt_panel_defaults(struct intel_panel *panel)
2849{
2850	/* Default to having backlight */
2851	panel->vbt.backlight.present = true;
2852
2853	/* LFP panel data */
2854	panel->vbt.lvds_dither = true;
2855}
2856
2857/* Defaults to initialize only if there is no VBT. */
2858static void
2859init_vbt_missing_defaults(struct drm_i915_private *i915)
2860{
2861	enum port port;
2862	int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2863		    BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2864
2865	if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2866		return;
2867
2868	for_each_port_masked(port, ports) {
2869		struct intel_bios_encoder_data *devdata;
2870		struct child_device_config *child;
2871		enum phy phy = intel_port_to_phy(i915, port);
2872
2873		/*
2874		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2875		 * to detect it.
2876		 */
2877		if (intel_phy_is_tc(i915, phy))
2878			continue;
2879
2880		/* Create fake child device config */
2881		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2882		if (!devdata)
2883			break;
2884
2885		devdata->i915 = i915;
2886		child = &devdata->child;
2887
2888		if (port == PORT_F)
2889			child->dvo_port = DVO_PORT_HDMIF;
2890		else if (port == PORT_E)
2891			child->dvo_port = DVO_PORT_HDMIE;
2892		else
2893			child->dvo_port = DVO_PORT_HDMIA + port;
2894
2895		if (port != PORT_A && port != PORT_E)
2896			child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2897
2898		if (port != PORT_E)
2899			child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2900
2901		if (port == PORT_A)
2902			child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2903
2904		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2905
2906		drm_dbg_kms(&i915->drm,
2907			    "Generating default VBT child device with type 0x04%x on port %c\n",
2908			    child->device_type, port_name(port));
2909	}
2910
2911	/* Bypass some minimum baseline VBT version checks */
2912	i915->display.vbt.version = 155;
2913}
2914
2915static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2916{
2917	const void *_vbt = vbt;
2918
2919	return _vbt + vbt->bdb_offset;
2920}
2921
2922/**
2923 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2924 * @i915:	the device
2925 * @buf:	pointer to a buffer to validate
2926 * @size:	size of the buffer
2927 *
2928 * Returns true on valid VBT.
2929 */
2930bool intel_bios_is_valid_vbt(struct drm_i915_private *i915,
2931			     const void *buf, size_t size)
2932{
2933	const struct vbt_header *vbt = buf;
2934	const struct bdb_header *bdb;
2935
2936	if (!vbt)
2937		return false;
2938
2939	if (sizeof(struct vbt_header) > size) {
2940		drm_dbg_kms(&i915->drm, "VBT header incomplete\n");
2941		return false;
2942	}
2943
2944	if (memcmp(vbt->signature, "$VBT", 4)) {
2945		drm_dbg_kms(&i915->drm, "VBT invalid signature\n");
2946		return false;
2947	}
2948
2949	if (vbt->vbt_size > size) {
2950		drm_dbg_kms(&i915->drm, "VBT incomplete (vbt_size overflows)\n");
2951		return false;
2952	}
2953
2954	size = vbt->vbt_size;
2955
2956	if (range_overflows_t(size_t,
2957			      vbt->bdb_offset,
2958			      sizeof(struct bdb_header),
2959			      size)) {
2960		drm_dbg_kms(&i915->drm, "BDB header incomplete\n");
2961		return false;
2962	}
2963
2964	bdb = get_bdb_header(vbt);
2965	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2966		drm_dbg_kms(&i915->drm, "BDB incomplete\n");
2967		return false;
2968	}
2969
2970	return vbt;
2971}
2972
2973static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
2974{
2975	intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset);
2976
2977	return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);
2978}
2979
2980static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2981{
2982	u32 count, data, found, store = 0;
2983	u32 static_region, oprom_offset;
2984	u32 oprom_size = 0x200000;
2985	u16 vbt_size;
2986	u32 *vbt;
2987
2988	static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
2989	static_region &= OPTIONROM_SPI_REGIONID_MASK;
2990	intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
2991
2992	oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
2993	oprom_offset &= OROM_OFFSET_MASK;
2994
2995	for (count = 0; count < oprom_size; count += 4) {
2996		data = intel_spi_read(&i915->uncore, oprom_offset + count);
2997		if (data == *((const u32 *)"$VBT")) {
2998			found = oprom_offset + count;
2999			break;
3000		}
3001	}
3002
3003	if (count >= oprom_size)
3004		goto err_not_found;
3005
3006	/* Get VBT size and allocate space for the VBT */
3007	vbt_size = intel_spi_read(&i915->uncore,
3008				  found + offsetof(struct vbt_header, vbt_size));
3009	vbt_size &= 0xffff;
3010
3011	vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3012	if (!vbt)
3013		goto err_not_found;
3014
3015	for (count = 0; count < vbt_size; count += 4)
3016		*(vbt + store++) = intel_spi_read(&i915->uncore, found + count);
3017
3018	if (!intel_bios_is_valid_vbt(i915, vbt, vbt_size))
3019		goto err_free_vbt;
3020
3021	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3022
3023	return (struct vbt_header *)vbt;
3024
3025err_free_vbt:
3026	kfree(vbt);
3027err_not_found:
3028	return NULL;
3029}
3030
3031static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
3032{
3033	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3034	void __iomem *p = NULL, *oprom;
3035	struct vbt_header *vbt;
3036	u16 vbt_size;
3037	size_t i, size;
3038
3039	oprom = pci_map_rom(pdev, &size);
3040	if (!oprom)
3041		return NULL;
3042
3043	/* Scour memory looking for the VBT signature. */
3044	for (i = 0; i + 4 < size; i += 4) {
3045		if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3046			continue;
3047
3048		p = oprom + i;
3049		size -= i;
3050		break;
3051	}
3052
3053	if (!p)
3054		goto err_unmap_oprom;
3055
3056	if (sizeof(struct vbt_header) > size) {
3057		drm_dbg(&i915->drm, "VBT header incomplete\n");
3058		goto err_unmap_oprom;
3059	}
3060
3061	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3062	if (vbt_size > size) {
3063		drm_dbg(&i915->drm,
3064			"VBT incomplete (vbt_size overflows)\n");
3065		goto err_unmap_oprom;
3066	}
3067
3068	/* The rest will be validated by intel_bios_is_valid_vbt() */
3069	vbt = kmalloc(vbt_size, GFP_KERNEL);
3070	if (!vbt)
3071		goto err_unmap_oprom;
3072
3073	memcpy_fromio(vbt, p, vbt_size);
3074
3075	if (!intel_bios_is_valid_vbt(i915, vbt, vbt_size))
3076		goto err_free_vbt;
3077
3078	pci_unmap_rom(pdev, oprom);
3079
3080	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3081
3082	return vbt;
3083
3084err_free_vbt:
3085	kfree(vbt);
3086err_unmap_oprom:
3087	pci_unmap_rom(pdev, oprom);
3088
3089	return NULL;
3090}
3091
3092/**
3093 * intel_bios_init - find VBT and initialize settings from the BIOS
3094 * @i915: i915 device instance
3095 *
3096 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3097 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3098 * initialize some defaults if the VBT is not present at all.
3099 */
3100void intel_bios_init(struct drm_i915_private *i915)
3101{
3102	const struct vbt_header *vbt;
3103	struct vbt_header *oprom_vbt = NULL;
3104	const struct bdb_header *bdb;
3105
3106	INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3107	INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3108
3109	if (!HAS_DISPLAY(i915)) {
3110		drm_dbg_kms(&i915->drm,
3111			    "Skipping VBT init due to disabled display.\n");
3112		return;
3113	}
3114
3115	init_vbt_defaults(i915);
3116
3117	vbt = intel_opregion_get_vbt(i915, NULL);
3118
3119	/*
3120	 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
3121	 * PCI mapping
3122	 */
3123	if (!vbt && IS_DGFX(i915)) {
3124		oprom_vbt = spi_oprom_get_vbt(i915);
3125		vbt = oprom_vbt;
3126	}
3127
3128	if (!vbt) {
3129		oprom_vbt = oprom_get_vbt(i915);
3130		vbt = oprom_vbt;
3131	}
3132
3133	if (!vbt)
3134		goto out;
3135
3136	bdb = get_bdb_header(vbt);
3137	i915->display.vbt.version = bdb->version;
3138
3139	drm_dbg_kms(&i915->drm,
3140		    "VBT signature \"%.*s\", BDB version %d\n",
3141		    (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3142
3143	init_bdb_blocks(i915, bdb);
3144
3145	/* Grab useful general definitions */
3146	parse_general_features(i915);
3147	parse_general_definitions(i915);
3148	parse_driver_features(i915);
3149
3150	/* Depends on child device list */
3151	parse_compression_parameters(i915);
3152
3153out:
3154	if (!vbt) {
3155		drm_info(&i915->drm,
3156			 "Failed to find VBIOS tables (VBT)\n");
3157		init_vbt_missing_defaults(i915);
3158	}
3159
3160	/* Further processing on pre-parsed or generated child device data */
3161	parse_sdvo_device_mapping(i915);
3162	parse_ddi_ports(i915);
3163
3164	kfree(oprom_vbt);
3165}
3166
3167static void intel_bios_init_panel(struct drm_i915_private *i915,
3168				  struct intel_panel *panel,
3169				  const struct intel_bios_encoder_data *devdata,
3170				  const struct drm_edid *drm_edid,
3171				  bool use_fallback)
3172{
3173	/* already have it? */
3174	if (panel->vbt.panel_type >= 0) {
3175		drm_WARN_ON(&i915->drm, !use_fallback);
3176		return;
3177	}
3178
3179	panel->vbt.panel_type = get_panel_type(i915, devdata,
3180					       drm_edid, use_fallback);
3181	if (panel->vbt.panel_type < 0) {
3182		drm_WARN_ON(&i915->drm, use_fallback);
3183		return;
3184	}
3185
3186	init_vbt_panel_defaults(panel);
3187
3188	parse_panel_options(i915, panel);
3189	parse_generic_dtd(i915, panel);
3190	parse_lfp_data(i915, panel);
3191	parse_lfp_backlight(i915, panel);
3192	parse_sdvo_panel_data(i915, panel);
3193	parse_panel_driver_features(i915, panel);
3194	parse_power_conservation_features(i915, panel);
3195	parse_edp(i915, panel);
3196	parse_psr(i915, panel);
3197	parse_mipi_config(i915, panel);
3198	parse_mipi_sequence(i915, panel);
3199}
3200
3201void intel_bios_init_panel_early(struct drm_i915_private *i915,
3202				 struct intel_panel *panel,
3203				 const struct intel_bios_encoder_data *devdata)
3204{
3205	intel_bios_init_panel(i915, panel, devdata, NULL, false);
3206}
3207
3208void intel_bios_init_panel_late(struct drm_i915_private *i915,
3209				struct intel_panel *panel,
3210				const struct intel_bios_encoder_data *devdata,
3211				const struct drm_edid *drm_edid)
3212{
3213	intel_bios_init_panel(i915, panel, devdata, drm_edid, true);
3214}
3215
3216/**
3217 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3218 * @i915: i915 device instance
3219 */
3220void intel_bios_driver_remove(struct drm_i915_private *i915)
3221{
3222	struct intel_bios_encoder_data *devdata, *nd;
3223	struct bdb_block_entry *entry, *ne;
3224
3225	list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3226		list_del(&devdata->node);
3227		kfree(devdata->dsc);
3228		kfree(devdata);
3229	}
3230
3231	list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3232		list_del(&entry->node);
3233		kfree(entry);
3234	}
3235}
3236
3237void intel_bios_fini_panel(struct intel_panel *panel)
3238{
3239	kfree(panel->vbt.sdvo_lvds_vbt_mode);
3240	panel->vbt.sdvo_lvds_vbt_mode = NULL;
3241	kfree(panel->vbt.lfp_lvds_vbt_mode);
3242	panel->vbt.lfp_lvds_vbt_mode = NULL;
3243	kfree(panel->vbt.dsi.data);
3244	panel->vbt.dsi.data = NULL;
3245	kfree(panel->vbt.dsi.pps);
3246	panel->vbt.dsi.pps = NULL;
3247	kfree(panel->vbt.dsi.config);
3248	panel->vbt.dsi.config = NULL;
3249	kfree(panel->vbt.dsi.deassert_seq);
3250	panel->vbt.dsi.deassert_seq = NULL;
3251}
3252
3253/**
3254 * intel_bios_is_tv_present - is integrated TV present in VBT
3255 * @i915: i915 device instance
3256 *
3257 * Return true if TV is present. If no child devices were parsed from VBT,
3258 * assume TV is present.
3259 */
3260bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3261{
3262	const struct intel_bios_encoder_data *devdata;
3263
3264	if (!i915->display.vbt.int_tv_support)
3265		return false;
3266
3267	if (list_empty(&i915->display.vbt.display_devices))
3268		return true;
3269
3270	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3271		const struct child_device_config *child = &devdata->child;
3272
3273		/*
3274		 * If the device type is not TV, continue.
3275		 */
3276		switch (child->device_type) {
3277		case DEVICE_TYPE_INT_TV:
3278		case DEVICE_TYPE_TV:
3279		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3280			break;
3281		default:
3282			continue;
3283		}
3284		/* Only when the addin_offset is non-zero, it is regarded
3285		 * as present.
3286		 */
3287		if (child->addin_offset)
3288			return true;
3289	}
3290
3291	return false;
3292}
3293
3294/**
3295 * intel_bios_is_lvds_present - is LVDS present in VBT
3296 * @i915:	i915 device instance
3297 * @i2c_pin:	i2c pin for LVDS if present
3298 *
3299 * Return true if LVDS is present. If no child devices were parsed from VBT,
3300 * assume LVDS is present.
3301 */
3302bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3303{
3304	const struct intel_bios_encoder_data *devdata;
3305
3306	if (list_empty(&i915->display.vbt.display_devices))
3307		return true;
3308
3309	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3310		const struct child_device_config *child = &devdata->child;
3311
3312		/* If the device type is not LFP, continue.
3313		 * We have to check both the new identifiers as well as the
3314		 * old for compatibility with some BIOSes.
3315		 */
3316		if (child->device_type != DEVICE_TYPE_INT_LFP &&
3317		    child->device_type != DEVICE_TYPE_LFP)
3318			continue;
3319
3320		if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3321			*i2c_pin = child->i2c_pin;
3322
3323		/* However, we cannot trust the BIOS writers to populate
3324		 * the VBT correctly.  Since LVDS requires additional
3325		 * information from AIM blocks, a non-zero addin offset is
3326		 * a good indicator that the LVDS is actually present.
3327		 */
3328		if (child->addin_offset)
3329			return true;
3330
3331		/* But even then some BIOS writers perform some black magic
3332		 * and instantiate the device without reference to any
3333		 * additional data.  Trust that if the VBT was written into
3334		 * the OpRegion then they have validated the LVDS's existence.
3335		 */
3336		if (intel_opregion_get_vbt(i915, NULL))
3337			return true;
3338	}
3339
3340	return false;
3341}
3342
3343/**
3344 * intel_bios_is_port_present - is the specified digital port present
3345 * @i915:	i915 device instance
3346 * @port:	port to check
3347 *
3348 * Return true if the device in %port is present.
3349 */
3350bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3351{
3352	const struct intel_bios_encoder_data *devdata;
3353
3354	if (WARN_ON(!has_ddi_port_info(i915)))
3355		return true;
3356
3357	if (!is_port_valid(i915, port))
3358		return false;
3359
3360	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3361		const struct child_device_config *child = &devdata->child;
3362
3363		if (dvo_port_to_port(i915, child->dvo_port) == port)
3364			return true;
3365	}
3366
3367	return false;
3368}
3369
3370bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3371{
3372	const struct child_device_config *child = &devdata->child;
3373
3374	if (!devdata)
3375		return false;
3376
3377	if (!intel_bios_encoder_supports_dp(devdata) ||
3378	    !intel_bios_encoder_supports_hdmi(devdata))
3379		return false;
3380
3381	if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3382		return true;
3383
3384	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3385	if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3386	    child->aux_channel != 0)
3387		return true;
3388
3389	return false;
3390}
3391
3392/**
3393 * intel_bios_is_dsi_present - is DSI present in VBT
3394 * @i915:	i915 device instance
3395 * @port:	port for DSI if present
3396 *
3397 * Return true if DSI is present, and return the port in %port.
3398 */
3399bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3400			       enum port *port)
3401{
3402	const struct intel_bios_encoder_data *devdata;
3403
3404	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3405		const struct child_device_config *child = &devdata->child;
3406		u8 dvo_port = child->dvo_port;
3407
3408		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3409			continue;
3410
3411		if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3412			drm_dbg_kms(&i915->drm,
3413				    "VBT has unsupported DSI port %c\n",
3414				    port_name(dvo_port - DVO_PORT_MIPIA));
3415			continue;
3416		}
3417
3418		if (port)
3419			*port = dsi_dvo_port_to_port(i915, dvo_port);
3420		return true;
3421	}
3422
3423	return false;
3424}
3425
3426static void fill_dsc(struct intel_crtc_state *crtc_state,
3427		     struct dsc_compression_parameters_entry *dsc,
3428		     int dsc_max_bpc)
3429{
3430	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
3431	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3432	int bpc = 8;
3433
3434	vdsc_cfg->dsc_version_major = dsc->version_major;
3435	vdsc_cfg->dsc_version_minor = dsc->version_minor;
3436
3437	if (dsc->support_12bpc && dsc_max_bpc >= 12)
3438		bpc = 12;
3439	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3440		bpc = 10;
3441	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3442		bpc = 8;
3443	else
3444		drm_dbg_kms(&i915->drm, "VBT: Unsupported BPC %d for DCS\n",
3445			    dsc_max_bpc);
3446
3447	crtc_state->pipe_bpp = bpc * 3;
3448
3449	crtc_state->dsc.compressed_bpp_x16 = to_bpp_x16(min(crtc_state->pipe_bpp,
3450							    VBT_DSC_MAX_BPP(dsc->max_bpp)));
3451
3452	/*
3453	 * FIXME: This is ugly, and slice count should take DSC engine
3454	 * throughput etc. into account.
3455	 *
3456	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3457	 */
3458	if (dsc->slices_per_line & BIT(2)) {
3459		crtc_state->dsc.slice_count = 4;
3460	} else if (dsc->slices_per_line & BIT(1)) {
3461		crtc_state->dsc.slice_count = 2;
3462	} else {
3463		/* FIXME */
3464		if (!(dsc->slices_per_line & BIT(0)))
3465			drm_dbg_kms(&i915->drm, "VBT: Unsupported DSC slice count for DSI\n");
3466
3467		crtc_state->dsc.slice_count = 1;
3468	}
3469
3470	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3471	    crtc_state->dsc.slice_count != 0)
3472		drm_dbg_kms(&i915->drm, "VBT: DSC hdisplay %d not divisible by slice count %d\n",
3473			    crtc_state->hw.adjusted_mode.crtc_hdisplay,
3474			    crtc_state->dsc.slice_count);
3475
3476	/*
3477	 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3478	 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3479	 */
3480	vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3481							    dsc->rc_buffer_size);
3482
3483	/* FIXME: DSI spec says bpc + 1 for this one */
3484	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3485
3486	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3487
3488	vdsc_cfg->slice_height = dsc->slice_height;
3489}
3490
3491/* FIXME: initially DSI specific */
3492bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3493			       struct intel_crtc_state *crtc_state,
3494			       int dsc_max_bpc)
3495{
3496	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3497	const struct intel_bios_encoder_data *devdata;
3498
3499	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3500		const struct child_device_config *child = &devdata->child;
3501
3502		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3503			continue;
3504
3505		if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
3506			if (!devdata->dsc)
3507				return false;
3508
3509			fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3510
3511			return true;
3512		}
3513	}
3514
3515	return false;
3516}
3517
3518static const u8 adlp_aux_ch_map[] = {
3519	[AUX_CH_A] = DP_AUX_A,
3520	[AUX_CH_B] = DP_AUX_B,
3521	[AUX_CH_C] = DP_AUX_C,
3522	[AUX_CH_D_XELPD] = DP_AUX_D,
3523	[AUX_CH_E_XELPD] = DP_AUX_E,
3524	[AUX_CH_USBC1] = DP_AUX_F,
3525	[AUX_CH_USBC2] = DP_AUX_G,
3526	[AUX_CH_USBC3] = DP_AUX_H,
3527	[AUX_CH_USBC4] = DP_AUX_I,
3528};
3529
3530/*
3531 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3532 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3533 */
3534static const u8 adls_aux_ch_map[] = {
3535	[AUX_CH_A] = DP_AUX_A,
3536	[AUX_CH_USBC1] = DP_AUX_B,
3537	[AUX_CH_USBC2] = DP_AUX_C,
3538	[AUX_CH_USBC3] = DP_AUX_D,
3539	[AUX_CH_USBC4] = DP_AUX_E,
3540};
3541
3542/*
3543 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3544 * map to DDI A,B,TC1,TC2 respectively.
3545 */
3546static const u8 rkl_aux_ch_map[] = {
3547	[AUX_CH_A] = DP_AUX_A,
3548	[AUX_CH_B] = DP_AUX_B,
3549	[AUX_CH_USBC1] = DP_AUX_C,
3550	[AUX_CH_USBC2] = DP_AUX_D,
3551};
3552
3553static const u8 direct_aux_ch_map[] = {
3554	[AUX_CH_A] = DP_AUX_A,
3555	[AUX_CH_B] = DP_AUX_B,
3556	[AUX_CH_C] = DP_AUX_C,
3557	[AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3558	[AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3559	[AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3560	[AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3561	[AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3562	[AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3563};
3564
3565static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel)
3566{
3567	const u8 *aux_ch_map;
3568	int i, n_entries;
3569
3570	if (DISPLAY_VER(i915) >= 13) {
3571		aux_ch_map = adlp_aux_ch_map;
3572		n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3573	} else if (IS_ALDERLAKE_S(i915)) {
3574		aux_ch_map = adls_aux_ch_map;
3575		n_entries = ARRAY_SIZE(adls_aux_ch_map);
3576	} else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
3577		aux_ch_map = rkl_aux_ch_map;
3578		n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3579	} else {
3580		aux_ch_map = direct_aux_ch_map;
3581		n_entries = ARRAY_SIZE(direct_aux_ch_map);
3582	}
3583
3584	for (i = 0; i < n_entries; i++) {
3585		if (aux_ch_map[i] == aux_channel)
3586			return i;
3587	}
3588
3589	drm_dbg_kms(&i915->drm,
3590		    "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3591		    aux_channel);
3592
3593	return AUX_CH_NONE;
3594}
3595
3596enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3597{
3598	if (!devdata || !devdata->child.aux_channel)
3599		return AUX_CH_NONE;
3600
3601	return map_aux_ch(devdata->i915, devdata->child.aux_channel);
3602}
3603
3604bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
3605{
3606	struct drm_i915_private *i915;
3607	u8 aux_channel;
3608	int count = 0;
3609
3610	if (!devdata || !devdata->child.aux_channel)
3611		return false;
3612
3613	i915 = devdata->i915;
3614	aux_channel = devdata->child.aux_channel;
3615
3616	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3617		if (intel_bios_encoder_supports_dp(devdata) &&
3618		    aux_channel == devdata->child.aux_channel)
3619			count++;
3620	}
3621
3622	return count > 1;
3623}
3624
3625int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3626{
3627	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3628		return 0;
3629
3630	return translate_iboost(devdata->i915, devdata->child.dp_iboost_level);
3631}
3632
3633int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3634{
3635	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3636		return 0;
3637
3638	return translate_iboost(devdata->i915, devdata->child.hdmi_iboost_level);
3639}
3640
3641int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3642{
3643	if (!devdata || !devdata->child.ddc_pin)
3644		return 0;
3645
3646	return map_ddc_pin(devdata->i915, devdata->child.ddc_pin);
3647}
3648
3649bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3650{
3651	return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3652}
3653
3654bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3655{
3656	return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3657}
3658
3659bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3660{
3661	return devdata && devdata->child.lane_reversal;
3662}
3663
3664bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3665{
3666	return devdata && devdata->child.hpd_invert;
3667}
3668
3669const struct intel_bios_encoder_data *
3670intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3671{
3672	struct intel_bios_encoder_data *devdata;
3673
3674	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3675		if (intel_bios_encoder_port(devdata) == port)
3676			return devdata;
3677	}
3678
3679	return NULL;
3680}
3681
3682void intel_bios_for_each_encoder(struct drm_i915_private *i915,
3683				 void (*func)(struct drm_i915_private *i915,
3684					      const struct intel_bios_encoder_data *devdata))
3685{
3686	struct intel_bios_encoder_data *devdata;
3687
3688	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
3689		func(i915, devdata);
3690}
3691
3692static int intel_bios_vbt_show(struct seq_file *m, void *unused)
3693{
3694	struct drm_i915_private *i915 = m->private;
3695	const void *vbt;
3696	size_t vbt_size;
3697
3698	/*
3699	 * FIXME: VBT might originate from other places than opregion, and then
3700	 * this would be incorrect.
3701	 */
3702	vbt = intel_opregion_get_vbt(i915, &vbt_size);
3703	if (vbt)
3704		seq_write(m, vbt, vbt_size);
3705
3706	return 0;
3707}
3708
3709DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt);
3710
3711void intel_bios_debugfs_register(struct drm_i915_private *i915)
3712{
3713	struct drm_minor *minor = i915->drm.primary;
3714
3715	debugfs_create_file("i915_vbt", 0444, minor->debugfs_root,
3716			    i915, &intel_bios_vbt_fops);
3717}