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1/*
2 * drivers/usb/host/ehci-orion.c
3 *
4 * Tzachi Perelstein <tzachi@marvell.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/mbus.h>
15#include <linux/clk.h>
16#include <linux/platform_data/usb-ehci-orion.h>
17#include <linux/of.h>
18#include <linux/phy/phy.h>
19#include <linux/of_device.h>
20#include <linux/of_irq.h>
21#include <linux/usb.h>
22#include <linux/usb/hcd.h>
23#include <linux/io.h>
24#include <linux/dma-mapping.h>
25
26#include "ehci.h"
27
28#define rdl(off) readl_relaxed(hcd->regs + (off))
29#define wrl(off, val) writel_relaxed((val), hcd->regs + (off))
30
31#define USB_CMD 0x140
32#define USB_CMD_RUN BIT(0)
33#define USB_CMD_RESET BIT(1)
34#define USB_MODE 0x1a8
35#define USB_MODE_MASK GENMASK(1, 0)
36#define USB_MODE_DEVICE 0x2
37#define USB_MODE_HOST 0x3
38#define USB_MODE_SDIS BIT(4)
39#define USB_CAUSE 0x310
40#define USB_MASK 0x314
41#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
42#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
43#define USB_IPG 0x360
44#define USB_PHY_PWR_CTRL 0x400
45#define USB_PHY_TX_CTRL 0x420
46#define USB_PHY_RX_CTRL 0x430
47#define USB_PHY_IVREF_CTRL 0x440
48#define USB_PHY_TST_GRP_CTRL 0x450
49
50#define DRIVER_DESC "EHCI orion driver"
51
52#define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
53
54struct orion_ehci_hcd {
55 struct clk *clk;
56 struct phy *phy;
57};
58
59static const char hcd_name[] = "ehci-orion";
60
61static struct hc_driver __read_mostly ehci_orion_hc_driver;
62
63/*
64 * Implement Orion USB controller specification guidelines
65 */
66static void orion_usb_phy_v1_setup(struct usb_hcd *hcd)
67{
68 /* The below GLs are according to the Orion Errata document */
69 /*
70 * Clear interrupt cause and mask
71 */
72 wrl(USB_CAUSE, 0);
73 wrl(USB_MASK, 0);
74
75 /*
76 * Reset controller
77 */
78 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
79 while (rdl(USB_CMD) & USB_CMD_RESET);
80
81 /*
82 * GL# USB-10: Set IPG for non start of frame packets
83 * Bits[14:8]=0xc
84 */
85 wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00);
86
87 /*
88 * GL# USB-9: USB 2.0 Power Control
89 * BG_VSEL[7:6]=0x1
90 */
91 wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40);
92
93 /*
94 * GL# USB-1: USB PHY Tx Control - force calibration to '8'
95 * TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8
96 */
97 wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040);
98
99 /*
100 * GL# USB-3 GL# USB-9: USB PHY Rx Control
101 * RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0,
102 * CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1
103 */
104 wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010);
105
106 /*
107 * GL# USB-3 GL# USB-9: USB PHY IVREF Control
108 * PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0
109 */
110 wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32);
111
112 /*
113 * GL# USB-3 GL# USB-9: USB PHY Test Group Control
114 * REG_FIFO_SQ_RST[15]=0
115 */
116 wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
117
118 /*
119 * Stop and reset controller
120 */
121 wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
122 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
123 while (rdl(USB_CMD) & USB_CMD_RESET);
124
125 /*
126 * GL# USB-5 Streaming disable REG_USB_MODE[4]=1
127 * TBD: This need to be done after each reset!
128 * GL# USB-4 Setup USB Host mode
129 */
130 wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST);
131}
132
133static void
134ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
135 const struct mbus_dram_target_info *dram)
136{
137 int i;
138
139 for (i = 0; i < 4; i++) {
140 wrl(USB_WINDOW_CTRL(i), 0);
141 wrl(USB_WINDOW_BASE(i), 0);
142 }
143
144 for (i = 0; i < dram->num_cs; i++) {
145 const struct mbus_dram_window *cs = dram->cs + i;
146
147 wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
148 (cs->mbus_attr << 8) |
149 (dram->mbus_dram_target_id << 4) | 1);
150 wrl(USB_WINDOW_BASE(i), cs->base);
151 }
152}
153
154static const struct ehci_driver_overrides orion_overrides __initconst = {
155 .extra_priv_size = sizeof(struct orion_ehci_hcd),
156};
157
158static int ehci_orion_drv_probe(struct platform_device *pdev)
159{
160 struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev);
161 const struct mbus_dram_target_info *dram;
162 struct resource *res;
163 struct usb_hcd *hcd;
164 struct ehci_hcd *ehci;
165 void __iomem *regs;
166 int irq, err;
167 enum orion_ehci_phy_ver phy_version;
168 struct orion_ehci_hcd *priv;
169
170 if (usb_disabled())
171 return -ENODEV;
172
173 pr_debug("Initializing Orion-SoC USB Host Controller\n");
174
175 irq = platform_get_irq(pdev, 0);
176 if (irq <= 0) {
177 dev_err(&pdev->dev,
178 "Found HC with no IRQ. Check %s setup!\n",
179 dev_name(&pdev->dev));
180 err = -ENODEV;
181 goto err;
182 }
183
184 /*
185 * Right now device-tree probed devices don't get dma_mask
186 * set. Since shared usb code relies on it, set it here for
187 * now. Once we have dma capability bindings this can go away.
188 */
189 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
190 if (err)
191 goto err;
192
193 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
194 regs = devm_ioremap_resource(&pdev->dev, res);
195 if (IS_ERR(regs)) {
196 err = PTR_ERR(regs);
197 goto err;
198 }
199
200 hcd = usb_create_hcd(&ehci_orion_hc_driver,
201 &pdev->dev, dev_name(&pdev->dev));
202 if (!hcd) {
203 err = -ENOMEM;
204 goto err;
205 }
206
207 hcd->rsrc_start = res->start;
208 hcd->rsrc_len = resource_size(res);
209 hcd->regs = regs;
210
211 ehci = hcd_to_ehci(hcd);
212 ehci->caps = hcd->regs + 0x100;
213 hcd->has_tt = 1;
214
215 priv = hcd_to_orion_priv(hcd);
216 /*
217 * Not all platforms can gate the clock, so it is not an error if
218 * the clock does not exists.
219 */
220 priv->clk = devm_clk_get(&pdev->dev, NULL);
221 if (!IS_ERR(priv->clk))
222 clk_prepare_enable(priv->clk);
223
224 priv->phy = devm_phy_optional_get(&pdev->dev, "usb");
225 if (IS_ERR(priv->phy)) {
226 err = PTR_ERR(priv->phy);
227 if (err != -ENOSYS)
228 goto err_phy_get;
229 } else {
230 err = phy_init(priv->phy);
231 if (err)
232 goto err_phy_init;
233
234 err = phy_power_on(priv->phy);
235 if (err)
236 goto err_phy_power_on;
237 }
238
239 /*
240 * (Re-)program MBUS remapping windows if we are asked to.
241 */
242 dram = mv_mbus_dram_info();
243 if (dram)
244 ehci_orion_conf_mbus_windows(hcd, dram);
245
246 /*
247 * setup Orion USB controller.
248 */
249 if (pdev->dev.of_node)
250 phy_version = EHCI_PHY_NA;
251 else
252 phy_version = pd->phy_version;
253
254 switch (phy_version) {
255 case EHCI_PHY_NA: /* dont change USB phy settings */
256 break;
257 case EHCI_PHY_ORION:
258 orion_usb_phy_v1_setup(hcd);
259 break;
260 case EHCI_PHY_DD:
261 case EHCI_PHY_KW:
262 default:
263 dev_warn(&pdev->dev, "USB phy version isn't supported.\n");
264 }
265
266 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
267 if (err)
268 goto err_add_hcd;
269
270 device_wakeup_enable(hcd->self.controller);
271 return 0;
272
273err_add_hcd:
274 if (!IS_ERR(priv->phy))
275 phy_power_off(priv->phy);
276err_phy_power_on:
277 if (!IS_ERR(priv->phy))
278 phy_exit(priv->phy);
279err_phy_init:
280err_phy_get:
281 if (!IS_ERR(priv->clk))
282 clk_disable_unprepare(priv->clk);
283 usb_put_hcd(hcd);
284err:
285 dev_err(&pdev->dev, "init %s fail, %d\n",
286 dev_name(&pdev->dev), err);
287
288 return err;
289}
290
291static int ehci_orion_drv_remove(struct platform_device *pdev)
292{
293 struct usb_hcd *hcd = platform_get_drvdata(pdev);
294 struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd);
295
296 usb_remove_hcd(hcd);
297
298 if (!IS_ERR(priv->phy)) {
299 phy_power_off(priv->phy);
300 phy_exit(priv->phy);
301 }
302
303 if (!IS_ERR(priv->clk))
304 clk_disable_unprepare(priv->clk);
305
306 usb_put_hcd(hcd);
307
308 return 0;
309}
310
311static const struct of_device_id ehci_orion_dt_ids[] = {
312 { .compatible = "marvell,orion-ehci", },
313 {},
314};
315MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
316
317static struct platform_driver ehci_orion_driver = {
318 .probe = ehci_orion_drv_probe,
319 .remove = ehci_orion_drv_remove,
320 .shutdown = usb_hcd_platform_shutdown,
321 .driver = {
322 .name = "orion-ehci",
323 .of_match_table = ehci_orion_dt_ids,
324 },
325};
326
327static int __init ehci_orion_init(void)
328{
329 if (usb_disabled())
330 return -ENODEV;
331
332 pr_info("%s: " DRIVER_DESC "\n", hcd_name);
333
334 ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides);
335 return platform_driver_register(&ehci_orion_driver);
336}
337module_init(ehci_orion_init);
338
339static void __exit ehci_orion_cleanup(void)
340{
341 platform_driver_unregister(&ehci_orion_driver);
342}
343module_exit(ehci_orion_cleanup);
344
345MODULE_DESCRIPTION(DRIVER_DESC);
346MODULE_ALIAS("platform:orion-ehci");
347MODULE_AUTHOR("Tzachi Perelstein");
348MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * drivers/usb/host/ehci-orion.c
4 *
5 * Tzachi Perelstein <tzachi@marvell.com>
6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/mbus.h>
12#include <linux/clk.h>
13#include <linux/platform_data/usb-ehci-orion.h>
14#include <linux/of.h>
15#include <linux/phy/phy.h>
16#include <linux/usb.h>
17#include <linux/usb/hcd.h>
18#include <linux/io.h>
19#include <linux/dma-mapping.h>
20
21#include "ehci.h"
22
23#define rdl(off) readl_relaxed(hcd->regs + (off))
24#define wrl(off, val) writel_relaxed((val), hcd->regs + (off))
25
26#define USB_CMD 0x140
27#define USB_CMD_RUN BIT(0)
28#define USB_CMD_RESET BIT(1)
29#define USB_MODE 0x1a8
30#define USB_MODE_MASK GENMASK(1, 0)
31#define USB_MODE_DEVICE 0x2
32#define USB_MODE_HOST 0x3
33#define USB_MODE_SDIS BIT(4)
34#define USB_CAUSE 0x310
35#define USB_MASK 0x314
36#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
37#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
38#define USB_IPG 0x360
39#define USB_PHY_PWR_CTRL 0x400
40#define USB_PHY_TX_CTRL 0x420
41#define USB_PHY_RX_CTRL 0x430
42#define USB_PHY_IVREF_CTRL 0x440
43#define USB_PHY_TST_GRP_CTRL 0x450
44
45#define USB_SBUSCFG 0x90
46
47/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
48#define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6)
49#define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3)
50/* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */
51#define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0)
52
53#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \
54 | USB_SBUSCFG_BARD_ALIGN_128B \
55 | USB_SBUSCFG_AHBBRST_INCR16)
56
57#define DRIVER_DESC "EHCI orion driver"
58
59#define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
60
61struct orion_ehci_hcd {
62 struct clk *clk;
63 struct phy *phy;
64};
65
66static struct hc_driver __read_mostly ehci_orion_hc_driver;
67
68/*
69 * Legacy DMA mask is 32 bit.
70 * AC5 has the DDR starting at 8GB, hence it requires
71 * a larger (34-bit) DMA mask, in order for DMA allocations
72 * to succeed:
73 */
74static const u64 dma_mask_orion = DMA_BIT_MASK(32);
75static const u64 dma_mask_ac5 = DMA_BIT_MASK(34);
76
77/*
78 * Implement Orion USB controller specification guidelines
79 */
80static void orion_usb_phy_v1_setup(struct usb_hcd *hcd)
81{
82 /* The below GLs are according to the Orion Errata document */
83 /*
84 * Clear interrupt cause and mask
85 */
86 wrl(USB_CAUSE, 0);
87 wrl(USB_MASK, 0);
88
89 /*
90 * Reset controller
91 */
92 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
93 while (rdl(USB_CMD) & USB_CMD_RESET);
94
95 /*
96 * GL# USB-10: Set IPG for non start of frame packets
97 * Bits[14:8]=0xc
98 */
99 wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00);
100
101 /*
102 * GL# USB-9: USB 2.0 Power Control
103 * BG_VSEL[7:6]=0x1
104 */
105 wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40);
106
107 /*
108 * GL# USB-1: USB PHY Tx Control - force calibration to '8'
109 * TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8
110 */
111 wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040);
112
113 /*
114 * GL# USB-3 GL# USB-9: USB PHY Rx Control
115 * RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0,
116 * CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1
117 */
118 wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010);
119
120 /*
121 * GL# USB-3 GL# USB-9: USB PHY IVREF Control
122 * PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0
123 */
124 wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32);
125
126 /*
127 * GL# USB-3 GL# USB-9: USB PHY Test Group Control
128 * REG_FIFO_SQ_RST[15]=0
129 */
130 wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
131
132 /*
133 * Stop and reset controller
134 */
135 wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
136 wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
137 while (rdl(USB_CMD) & USB_CMD_RESET);
138
139 /*
140 * GL# USB-5 Streaming disable REG_USB_MODE[4]=1
141 * TBD: This need to be done after each reset!
142 * GL# USB-4 Setup USB Host mode
143 */
144 wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST);
145}
146
147static void
148ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
149 const struct mbus_dram_target_info *dram)
150{
151 int i;
152
153 for (i = 0; i < 4; i++) {
154 wrl(USB_WINDOW_CTRL(i), 0);
155 wrl(USB_WINDOW_BASE(i), 0);
156 }
157
158 for (i = 0; i < dram->num_cs; i++) {
159 const struct mbus_dram_window *cs = dram->cs + i;
160
161 wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
162 (cs->mbus_attr << 8) |
163 (dram->mbus_dram_target_id << 4) | 1);
164 wrl(USB_WINDOW_BASE(i), cs->base);
165 }
166}
167
168static int ehci_orion_drv_reset(struct usb_hcd *hcd)
169{
170 struct device *dev = hcd->self.controller;
171 int ret;
172
173 ret = ehci_setup(hcd);
174 if (ret)
175 return ret;
176
177 /*
178 * For SoC without hlock, need to program sbuscfg value to guarantee
179 * AHB master's burst would not overrun or underrun FIFO.
180 *
181 * sbuscfg reg has to be set after usb controller reset, otherwise
182 * the value would be override to 0.
183 */
184 if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
185 wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
186
187 return ret;
188}
189
190static int __maybe_unused ehci_orion_drv_suspend(struct device *dev)
191{
192 struct usb_hcd *hcd = dev_get_drvdata(dev);
193
194 return ehci_suspend(hcd, device_may_wakeup(dev));
195}
196
197static int __maybe_unused ehci_orion_drv_resume(struct device *dev)
198{
199 struct usb_hcd *hcd = dev_get_drvdata(dev);
200
201 return ehci_resume(hcd, false);
202}
203
204static SIMPLE_DEV_PM_OPS(ehci_orion_pm_ops, ehci_orion_drv_suspend,
205 ehci_orion_drv_resume);
206
207static const struct ehci_driver_overrides orion_overrides __initconst = {
208 .extra_priv_size = sizeof(struct orion_ehci_hcd),
209 .reset = ehci_orion_drv_reset,
210};
211
212static int ehci_orion_drv_probe(struct platform_device *pdev)
213{
214 struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev);
215 const struct mbus_dram_target_info *dram;
216 struct resource *res;
217 struct usb_hcd *hcd;
218 struct ehci_hcd *ehci;
219 void __iomem *regs;
220 int irq, err;
221 enum orion_ehci_phy_ver phy_version;
222 struct orion_ehci_hcd *priv;
223 u64 *dma_mask_ptr;
224
225 if (usb_disabled())
226 return -ENODEV;
227
228 pr_debug("Initializing Orion-SoC USB Host Controller\n");
229
230 irq = platform_get_irq(pdev, 0);
231 if (irq < 0) {
232 err = irq;
233 goto err;
234 }
235
236 /*
237 * Right now device-tree probed devices don't get dma_mask
238 * set. Since shared usb code relies on it, set it here for
239 * now. Once we have dma capability bindings this can go away.
240 */
241 dma_mask_ptr = (u64 *)of_device_get_match_data(&pdev->dev);
242 err = dma_coerce_mask_and_coherent(&pdev->dev, *dma_mask_ptr);
243 if (err)
244 goto err;
245
246 regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
247 if (IS_ERR(regs)) {
248 err = PTR_ERR(regs);
249 goto err;
250 }
251
252 hcd = usb_create_hcd(&ehci_orion_hc_driver,
253 &pdev->dev, dev_name(&pdev->dev));
254 if (!hcd) {
255 err = -ENOMEM;
256 goto err;
257 }
258
259 hcd->rsrc_start = res->start;
260 hcd->rsrc_len = resource_size(res);
261 hcd->regs = regs;
262
263 ehci = hcd_to_ehci(hcd);
264 ehci->caps = hcd->regs + 0x100;
265 hcd->has_tt = 1;
266
267 priv = hcd_to_orion_priv(hcd);
268 /*
269 * Not all platforms can gate the clock, so it is not an error if
270 * the clock does not exists.
271 */
272 priv->clk = devm_clk_get(&pdev->dev, NULL);
273 if (!IS_ERR(priv->clk)) {
274 err = clk_prepare_enable(priv->clk);
275 if (err)
276 goto err_put_hcd;
277 }
278
279 priv->phy = devm_phy_optional_get(&pdev->dev, "usb");
280 if (IS_ERR(priv->phy)) {
281 err = PTR_ERR(priv->phy);
282 if (err != -ENOSYS)
283 goto err_dis_clk;
284 }
285
286 /*
287 * (Re-)program MBUS remapping windows if we are asked to.
288 */
289 dram = mv_mbus_dram_info();
290 if (dram)
291 ehci_orion_conf_mbus_windows(hcd, dram);
292
293 /*
294 * setup Orion USB controller.
295 */
296 if (pdev->dev.of_node)
297 phy_version = EHCI_PHY_NA;
298 else
299 phy_version = pd->phy_version;
300
301 switch (phy_version) {
302 case EHCI_PHY_NA: /* dont change USB phy settings */
303 break;
304 case EHCI_PHY_ORION:
305 orion_usb_phy_v1_setup(hcd);
306 break;
307 case EHCI_PHY_DD:
308 case EHCI_PHY_KW:
309 default:
310 dev_warn(&pdev->dev, "USB phy version isn't supported.\n");
311 }
312
313 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
314 if (err)
315 goto err_dis_clk;
316
317 device_wakeup_enable(hcd->self.controller);
318 return 0;
319
320err_dis_clk:
321 if (!IS_ERR(priv->clk))
322 clk_disable_unprepare(priv->clk);
323err_put_hcd:
324 usb_put_hcd(hcd);
325err:
326 dev_err(&pdev->dev, "init %s fail, %d\n",
327 dev_name(&pdev->dev), err);
328
329 return err;
330}
331
332static void ehci_orion_drv_remove(struct platform_device *pdev)
333{
334 struct usb_hcd *hcd = platform_get_drvdata(pdev);
335 struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd);
336
337 usb_remove_hcd(hcd);
338
339 if (!IS_ERR(priv->clk))
340 clk_disable_unprepare(priv->clk);
341
342 usb_put_hcd(hcd);
343}
344
345static const struct of_device_id ehci_orion_dt_ids[] = {
346 { .compatible = "marvell,orion-ehci", .data = &dma_mask_orion},
347 { .compatible = "marvell,armada-3700-ehci", .data = &dma_mask_orion},
348 { .compatible = "marvell,ac5-ehci", .data = &dma_mask_ac5},
349 {},
350};
351MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
352
353static struct platform_driver ehci_orion_driver = {
354 .probe = ehci_orion_drv_probe,
355 .remove_new = ehci_orion_drv_remove,
356 .shutdown = usb_hcd_platform_shutdown,
357 .driver = {
358 .name = "orion-ehci",
359 .of_match_table = ehci_orion_dt_ids,
360 .pm = &ehci_orion_pm_ops,
361 },
362};
363
364static int __init ehci_orion_init(void)
365{
366 if (usb_disabled())
367 return -ENODEV;
368
369 ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides);
370 return platform_driver_register(&ehci_orion_driver);
371}
372module_init(ehci_orion_init);
373
374static void __exit ehci_orion_cleanup(void)
375{
376 platform_driver_unregister(&ehci_orion_driver);
377}
378module_exit(ehci_orion_cleanup);
379
380MODULE_DESCRIPTION(DRIVER_DESC);
381MODULE_ALIAS("platform:orion-ehci");
382MODULE_AUTHOR("Tzachi Perelstein");
383MODULE_LICENSE("GPL v2");