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1/**************************************************************************
2 * Copyright (c) 2007-2011, Intel Corporation.
3 * All Rights Reserved.
4 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
5 * All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 **************************************************************************/
21
22#include <drm/drmP.h>
23#include <drm/drm.h>
24#include "psb_drv.h"
25#include "framebuffer.h"
26#include "psb_reg.h"
27#include "psb_intel_reg.h"
28#include "intel_bios.h"
29#include "mid_bios.h"
30#include <drm/drm_pciids.h>
31#include "power.h"
32#include <linux/cpu.h>
33#include <linux/notifier.h>
34#include <linux/spinlock.h>
35#include <linux/pm_runtime.h>
36#include <acpi/video.h>
37#include <linux/module.h>
38
39static struct drm_driver driver;
40static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
41
42/*
43 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
44 * to the different groups of PowerVR 5-series chip designs
45 *
46 * 0x8086 = Intel Corporation
47 *
48 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
49 * PowerVR SGX535 - Moorestown - Intel GMA 600
50 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
51 * PowerVR SGX540 - Medfield - Intel Atom Z2460
52 * PowerVR SGX544MP2 - Medfield -
53 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
54 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
55 * N2800
56 */
57static const struct pci_device_id pciidlist[] = {
58 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
59 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
60#if defined(CONFIG_DRM_GMA600)
61 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
69 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
70#endif
71#if defined(CONFIG_DRM_MEDFIELD)
72 { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
73 { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
74 { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
75 { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
76 { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
77 { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
78 { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
79 { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
80#endif
81#if defined(CONFIG_DRM_GMA3600)
82 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
87 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
88 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
89 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
90 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
91 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
92 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
93 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
94 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
95 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
96 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
97 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
98#endif
99 { 0, }
100};
101MODULE_DEVICE_TABLE(pci, pciidlist);
102
103/*
104 * Standard IOCTLs.
105 */
106static const struct drm_ioctl_desc psb_ioctls[] = {
107};
108
109static void psb_driver_lastclose(struct drm_device *dev)
110{
111 int ret;
112 struct drm_psb_private *dev_priv = dev->dev_private;
113 struct psb_fbdev *fbdev = dev_priv->fbdev;
114
115 ret = drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->psb_fb_helper);
116 if (ret)
117 DRM_DEBUG("failed to restore crtc mode\n");
118
119 return;
120}
121
122static int psb_do_init(struct drm_device *dev)
123{
124 struct drm_psb_private *dev_priv = dev->dev_private;
125 struct psb_gtt *pg = &dev_priv->gtt;
126
127 uint32_t stolen_gtt;
128
129 if (pg->mmu_gatt_start & 0x0FFFFFFF) {
130 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
131 return -EINVAL;
132 }
133
134 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
135 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
136 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
137
138 dev_priv->gatt_free_offset = pg->mmu_gatt_start +
139 (stolen_gtt << PAGE_SHIFT) * 1024;
140
141 spin_lock_init(&dev_priv->irqmask_lock);
142 spin_lock_init(&dev_priv->lock_2d);
143
144 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
145 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
146 PSB_RSGX32(PSB_CR_BIF_BANK1);
147
148 /* Do not bypass any MMU access, let them pagefault instead */
149 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
150 PSB_CR_BIF_CTRL);
151 PSB_RSGX32(PSB_CR_BIF_CTRL);
152
153 psb_spank(dev_priv);
154
155 /* mmu_gatt ?? */
156 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
157 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
158
159 return 0;
160}
161
162static int psb_driver_unload(struct drm_device *dev)
163{
164 struct drm_psb_private *dev_priv = dev->dev_private;
165
166 /* TODO: Kill vblank etc here */
167
168 if (dev_priv) {
169 if (dev_priv->backlight_device)
170 gma_backlight_exit(dev);
171 psb_modeset_cleanup(dev);
172
173 if (dev_priv->ops->chip_teardown)
174 dev_priv->ops->chip_teardown(dev);
175
176 psb_intel_opregion_fini(dev);
177
178 if (dev_priv->pf_pd) {
179 psb_mmu_free_pagedir(dev_priv->pf_pd);
180 dev_priv->pf_pd = NULL;
181 }
182 if (dev_priv->mmu) {
183 struct psb_gtt *pg = &dev_priv->gtt;
184
185 down_read(&pg->sem);
186 psb_mmu_remove_pfn_sequence(
187 psb_mmu_get_default_pd
188 (dev_priv->mmu),
189 pg->mmu_gatt_start,
190 dev_priv->vram_stolen_size >> PAGE_SHIFT);
191 up_read(&pg->sem);
192 psb_mmu_driver_takedown(dev_priv->mmu);
193 dev_priv->mmu = NULL;
194 }
195 psb_gtt_takedown(dev);
196 if (dev_priv->scratch_page) {
197 set_pages_wb(dev_priv->scratch_page, 1);
198 __free_page(dev_priv->scratch_page);
199 dev_priv->scratch_page = NULL;
200 }
201 if (dev_priv->vdc_reg) {
202 iounmap(dev_priv->vdc_reg);
203 dev_priv->vdc_reg = NULL;
204 }
205 if (dev_priv->sgx_reg) {
206 iounmap(dev_priv->sgx_reg);
207 dev_priv->sgx_reg = NULL;
208 }
209 if (dev_priv->aux_reg) {
210 iounmap(dev_priv->aux_reg);
211 dev_priv->aux_reg = NULL;
212 }
213 if (dev_priv->aux_pdev)
214 pci_dev_put(dev_priv->aux_pdev);
215 if (dev_priv->lpc_pdev)
216 pci_dev_put(dev_priv->lpc_pdev);
217
218 /* Destroy VBT data */
219 psb_intel_destroy_bios(dev);
220
221 kfree(dev_priv);
222 dev->dev_private = NULL;
223 }
224 gma_power_uninit(dev);
225 return 0;
226}
227
228static int psb_driver_load(struct drm_device *dev, unsigned long flags)
229{
230 struct drm_psb_private *dev_priv;
231 unsigned long resource_start, resource_len;
232 unsigned long irqflags;
233 int ret = -ENOMEM;
234 struct drm_connector *connector;
235 struct gma_encoder *gma_encoder;
236 struct psb_gtt *pg;
237
238 /* allocating and initializing driver private data */
239 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
240 if (dev_priv == NULL)
241 return -ENOMEM;
242
243 dev_priv->ops = (struct psb_ops *)flags;
244 dev_priv->dev = dev;
245 dev->dev_private = (void *) dev_priv;
246
247 pg = &dev_priv->gtt;
248
249 pci_set_master(dev->pdev);
250
251 dev_priv->num_pipe = dev_priv->ops->pipes;
252
253 resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
254
255 dev_priv->vdc_reg =
256 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
257 if (!dev_priv->vdc_reg)
258 goto out_err;
259
260 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
261 PSB_SGX_SIZE);
262 if (!dev_priv->sgx_reg)
263 goto out_err;
264
265 if (IS_MRST(dev)) {
266 dev_priv->aux_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(3, 0));
267
268 if (dev_priv->aux_pdev) {
269 resource_start = pci_resource_start(dev_priv->aux_pdev,
270 PSB_AUX_RESOURCE);
271 resource_len = pci_resource_len(dev_priv->aux_pdev,
272 PSB_AUX_RESOURCE);
273 dev_priv->aux_reg = ioremap_nocache(resource_start,
274 resource_len);
275 if (!dev_priv->aux_reg)
276 goto out_err;
277
278 DRM_DEBUG_KMS("Found aux vdc");
279 } else {
280 /* Couldn't find the aux vdc so map to primary vdc */
281 dev_priv->aux_reg = dev_priv->vdc_reg;
282 DRM_DEBUG_KMS("Couldn't find aux pci device");
283 }
284 dev_priv->gmbus_reg = dev_priv->aux_reg;
285
286 dev_priv->lpc_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(31, 0));
287 if (dev_priv->lpc_pdev) {
288 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
289 &dev_priv->lpc_gpio_base);
290 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
291 (u32)dev_priv->lpc_gpio_base | (1L<<31));
292 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
293 &dev_priv->lpc_gpio_base);
294 dev_priv->lpc_gpio_base &= 0xffc0;
295 if (dev_priv->lpc_gpio_base)
296 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
297 dev_priv->lpc_gpio_base);
298 else {
299 pci_dev_put(dev_priv->lpc_pdev);
300 dev_priv->lpc_pdev = NULL;
301 }
302 }
303 } else {
304 dev_priv->gmbus_reg = dev_priv->vdc_reg;
305 }
306
307 psb_intel_opregion_setup(dev);
308
309 ret = dev_priv->ops->chip_setup(dev);
310 if (ret)
311 goto out_err;
312
313 /* Init OSPM support */
314 gma_power_init(dev);
315
316 ret = -ENOMEM;
317
318 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
319 if (!dev_priv->scratch_page)
320 goto out_err;
321
322 set_pages_uc(dev_priv->scratch_page, 1);
323
324 ret = psb_gtt_init(dev, 0);
325 if (ret)
326 goto out_err;
327
328 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0);
329 if (!dev_priv->mmu)
330 goto out_err;
331
332 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
333 if (!dev_priv->pf_pd)
334 goto out_err;
335
336 ret = psb_do_init(dev);
337 if (ret)
338 return ret;
339
340 /* Add stolen memory to SGX MMU */
341 down_read(&pg->sem);
342 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
343 dev_priv->stolen_base >> PAGE_SHIFT,
344 pg->gatt_start,
345 pg->stolen_size >> PAGE_SHIFT, 0);
346 up_read(&pg->sem);
347
348 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
349 psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
350
351 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
352 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
353
354 acpi_video_register();
355
356 /* Setup vertical blanking handling */
357 ret = drm_vblank_init(dev, dev_priv->num_pipe);
358 if (ret)
359 goto out_err;
360
361 /*
362 * Install interrupt handlers prior to powering off SGX or else we will
363 * crash.
364 */
365 dev_priv->vdc_irq_mask = 0;
366 dev_priv->pipestat[0] = 0;
367 dev_priv->pipestat[1] = 0;
368 dev_priv->pipestat[2] = 0;
369 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
370 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
371 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
372 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
373 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
374
375 drm_irq_install(dev, dev->pdev->irq);
376
377 dev->vblank_disable_allowed = true;
378 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
379 dev->driver->get_vblank_counter = psb_get_vblank_counter;
380
381 psb_modeset_init(dev);
382 psb_fbdev_init(dev);
383 drm_kms_helper_poll_init(dev);
384
385 /* Only add backlight support if we have LVDS output */
386 list_for_each_entry(connector, &dev->mode_config.connector_list,
387 head) {
388 gma_encoder = gma_attached_encoder(connector);
389
390 switch (gma_encoder->type) {
391 case INTEL_OUTPUT_LVDS:
392 case INTEL_OUTPUT_MIPI:
393 ret = gma_backlight_init(dev);
394 break;
395 }
396 }
397
398 if (ret)
399 return ret;
400 psb_intel_opregion_enable_asle(dev);
401#if 0
402 /* Enable runtime pm at last */
403 pm_runtime_enable(&dev->pdev->dev);
404 pm_runtime_set_active(&dev->pdev->dev);
405#endif
406 /* Intel drm driver load is done, continue doing pvr load */
407 return 0;
408out_err:
409 psb_driver_unload(dev);
410 return ret;
411}
412
413static int psb_driver_device_is_agp(struct drm_device *dev)
414{
415 return 0;
416}
417
418static inline void get_brightness(struct backlight_device *bd)
419{
420#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
421 if (bd) {
422 bd->props.brightness = bd->ops->get_brightness(bd);
423 backlight_update_status(bd);
424 }
425#endif
426}
427
428static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
429 unsigned long arg)
430{
431 struct drm_file *file_priv = filp->private_data;
432 struct drm_device *dev = file_priv->minor->dev;
433 struct drm_psb_private *dev_priv = dev->dev_private;
434 static unsigned int runtime_allowed;
435
436 if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
437 runtime_allowed++;
438 pm_runtime_allow(&dev->pdev->dev);
439 dev_priv->rpm_enabled = 1;
440 }
441 return drm_ioctl(filp, cmd, arg);
442 /* FIXME: do we need to wrap the other side of this */
443}
444
445static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
446{
447 return drm_get_pci_dev(pdev, ent, &driver);
448}
449
450
451static void psb_pci_remove(struct pci_dev *pdev)
452{
453 struct drm_device *dev = pci_get_drvdata(pdev);
454 drm_put_dev(dev);
455}
456
457static const struct dev_pm_ops psb_pm_ops = {
458 .resume = gma_power_resume,
459 .suspend = gma_power_suspend,
460 .thaw = gma_power_thaw,
461 .freeze = gma_power_freeze,
462 .restore = gma_power_restore,
463 .runtime_suspend = psb_runtime_suspend,
464 .runtime_resume = psb_runtime_resume,
465 .runtime_idle = psb_runtime_idle,
466};
467
468static const struct vm_operations_struct psb_gem_vm_ops = {
469 .fault = psb_gem_fault,
470 .open = drm_gem_vm_open,
471 .close = drm_gem_vm_close,
472};
473
474static const struct file_operations psb_gem_fops = {
475 .owner = THIS_MODULE,
476 .open = drm_open,
477 .release = drm_release,
478 .unlocked_ioctl = psb_unlocked_ioctl,
479 .mmap = drm_gem_mmap,
480 .poll = drm_poll,
481 .read = drm_read,
482};
483
484static struct drm_driver driver = {
485 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
486 DRIVER_MODESET | DRIVER_GEM,
487 .load = psb_driver_load,
488 .unload = psb_driver_unload,
489 .lastclose = psb_driver_lastclose,
490 .set_busid = drm_pci_set_busid,
491
492 .num_ioctls = ARRAY_SIZE(psb_ioctls),
493 .device_is_agp = psb_driver_device_is_agp,
494 .irq_preinstall = psb_irq_preinstall,
495 .irq_postinstall = psb_irq_postinstall,
496 .irq_uninstall = psb_irq_uninstall,
497 .irq_handler = psb_irq_handler,
498 .enable_vblank = psb_enable_vblank,
499 .disable_vblank = psb_disable_vblank,
500 .get_vblank_counter = psb_get_vblank_counter,
501
502 .gem_free_object = psb_gem_free_object,
503 .gem_vm_ops = &psb_gem_vm_ops,
504
505 .dumb_create = psb_gem_dumb_create,
506 .dumb_map_offset = psb_gem_dumb_map_gtt,
507 .dumb_destroy = drm_gem_dumb_destroy,
508 .ioctls = psb_ioctls,
509 .fops = &psb_gem_fops,
510 .name = DRIVER_NAME,
511 .desc = DRIVER_DESC,
512 .date = DRIVER_DATE,
513 .major = DRIVER_MAJOR,
514 .minor = DRIVER_MINOR,
515 .patchlevel = DRIVER_PATCHLEVEL
516};
517
518static struct pci_driver psb_pci_driver = {
519 .name = DRIVER_NAME,
520 .id_table = pciidlist,
521 .probe = psb_pci_probe,
522 .remove = psb_pci_remove,
523 .driver.pm = &psb_pm_ops,
524};
525
526static int __init psb_init(void)
527{
528 return drm_pci_init(&driver, &psb_pci_driver);
529}
530
531static void __exit psb_exit(void)
532{
533 drm_pci_exit(&driver, &psb_pci_driver);
534}
535
536late_initcall(psb_init);
537module_exit(psb_exit);
538
539MODULE_AUTHOR(DRIVER_AUTHOR);
540MODULE_DESCRIPTION(DRIVER_DESC);
541MODULE_LICENSE(DRIVER_LICENSE);
1// SPDX-License-Identifier: GPL-2.0-only
2/**************************************************************************
3 * Copyright (c) 2007-2011, Intel Corporation.
4 * All Rights Reserved.
5 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
6 * All Rights Reserved.
7 *
8 **************************************************************************/
9
10#include <linux/aperture.h>
11#include <linux/cpu.h>
12#include <linux/module.h>
13#include <linux/notifier.h>
14#include <linux/pm_runtime.h>
15#include <linux/spinlock.h>
16#include <linux/delay.h>
17
18#include <asm/set_memory.h>
19
20#include <acpi/video.h>
21
22#include <drm/drm.h>
23#include <drm/drm_drv.h>
24#include <drm/drm_file.h>
25#include <drm/drm_ioctl.h>
26#include <drm/drm_pciids.h>
27#include <drm/drm_vblank.h>
28
29#include "framebuffer.h"
30#include "gem.h"
31#include "intel_bios.h"
32#include "mid_bios.h"
33#include "power.h"
34#include "psb_drv.h"
35#include "psb_intel_reg.h"
36#include "psb_irq.h"
37#include "psb_reg.h"
38
39static const struct drm_driver driver;
40static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
41
42/*
43 * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
44 * to the different groups of PowerVR 5-series chip designs
45 *
46 * 0x8086 = Intel Corporation
47 *
48 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx
49 * PowerVR SGX535 - Moorestown - Intel GMA 600
50 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx
51 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
52 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
53 * N2800
54 */
55static const struct pci_device_id pciidlist[] = {
56 /* Poulsbo */
57 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
58 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
59 /* Oak Trail */
60 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
61 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
69 /* Cedar Trail */
70 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
71 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
72 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
73 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
74 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
75 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
76 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
77 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
78 { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
79 { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
80 { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
81 { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
82 { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86 { 0, }
87};
88MODULE_DEVICE_TABLE(pci, pciidlist);
89
90/*
91 * Standard IOCTLs.
92 */
93static const struct drm_ioctl_desc psb_ioctls[] = {
94};
95
96/**
97 * psb_spank - reset the 2D engine
98 * @dev_priv: our PSB DRM device
99 *
100 * Soft reset the graphics engine and then reload the necessary registers.
101 */
102static void psb_spank(struct drm_psb_private *dev_priv)
103{
104 PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
105 _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
106 _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
107 _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
108 PSB_RSGX32(PSB_CR_SOFT_RESET);
109
110 msleep(1);
111
112 PSB_WSGX32(0, PSB_CR_SOFT_RESET);
113 wmb();
114 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
115 PSB_CR_BIF_CTRL);
116 wmb();
117 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
118
119 msleep(1);
120 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
121 PSB_CR_BIF_CTRL);
122 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
123 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
124}
125
126static int psb_do_init(struct drm_device *dev)
127{
128 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
129 struct psb_gtt *pg = &dev_priv->gtt;
130
131 uint32_t stolen_gtt;
132
133 if (pg->mmu_gatt_start & 0x0FFFFFFF) {
134 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
135 return -EINVAL;
136 }
137
138 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
139 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
140 stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
141
142 dev_priv->gatt_free_offset = pg->mmu_gatt_start +
143 (stolen_gtt << PAGE_SHIFT) * 1024;
144
145 spin_lock_init(&dev_priv->irqmask_lock);
146
147 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
148 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
149 PSB_RSGX32(PSB_CR_BIF_BANK1);
150
151 /* Do not bypass any MMU access, let them pagefault instead */
152 PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
153 PSB_CR_BIF_CTRL);
154 PSB_RSGX32(PSB_CR_BIF_CTRL);
155
156 psb_spank(dev_priv);
157
158 /* mmu_gatt ?? */
159 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
160 PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
161
162 return 0;
163}
164
165static void psb_driver_unload(struct drm_device *dev)
166{
167 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
168
169 /* TODO: Kill vblank etc here */
170
171 gma_backlight_exit(dev);
172 psb_modeset_cleanup(dev);
173
174 gma_irq_uninstall(dev);
175
176 if (dev_priv->ops->chip_teardown)
177 dev_priv->ops->chip_teardown(dev);
178
179 psb_intel_opregion_fini(dev);
180
181 if (dev_priv->pf_pd) {
182 psb_mmu_free_pagedir(dev_priv->pf_pd);
183 dev_priv->pf_pd = NULL;
184 }
185 if (dev_priv->mmu) {
186 struct psb_gtt *pg = &dev_priv->gtt;
187
188 psb_mmu_remove_pfn_sequence(
189 psb_mmu_get_default_pd
190 (dev_priv->mmu),
191 pg->mmu_gatt_start,
192 dev_priv->vram_stolen_size >> PAGE_SHIFT);
193 psb_mmu_driver_takedown(dev_priv->mmu);
194 dev_priv->mmu = NULL;
195 }
196 psb_gem_mm_fini(dev);
197 psb_gtt_fini(dev);
198 if (dev_priv->scratch_page) {
199 set_pages_wb(dev_priv->scratch_page, 1);
200 __free_page(dev_priv->scratch_page);
201 dev_priv->scratch_page = NULL;
202 }
203 if (dev_priv->vdc_reg) {
204 iounmap(dev_priv->vdc_reg);
205 dev_priv->vdc_reg = NULL;
206 }
207 if (dev_priv->sgx_reg) {
208 iounmap(dev_priv->sgx_reg);
209 dev_priv->sgx_reg = NULL;
210 }
211 if (dev_priv->aux_reg) {
212 iounmap(dev_priv->aux_reg);
213 dev_priv->aux_reg = NULL;
214 }
215 pci_dev_put(dev_priv->aux_pdev);
216 pci_dev_put(dev_priv->lpc_pdev);
217
218 /* Destroy VBT data */
219 psb_intel_destroy_bios(dev);
220
221 gma_power_uninit(dev);
222}
223
224static void psb_device_release(void *data)
225{
226 struct drm_device *dev = data;
227
228 psb_driver_unload(dev);
229}
230
231static int psb_driver_load(struct drm_device *dev, unsigned long flags)
232{
233 struct pci_dev *pdev = to_pci_dev(dev->dev);
234 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
235 unsigned long resource_start, resource_len;
236 unsigned long irqflags;
237 struct drm_connector_list_iter conn_iter;
238 struct drm_connector *connector;
239 struct gma_encoder *gma_encoder;
240 struct psb_gtt *pg;
241 int ret = -ENOMEM;
242
243 /* initializing driver private data */
244
245 dev_priv->ops = (struct psb_ops *)flags;
246
247 pg = &dev_priv->gtt;
248
249 pci_set_master(pdev);
250
251 dev_priv->num_pipe = dev_priv->ops->pipes;
252
253 resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
254
255 dev_priv->vdc_reg =
256 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
257 if (!dev_priv->vdc_reg)
258 goto out_err;
259
260 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
261 PSB_SGX_SIZE);
262 if (!dev_priv->sgx_reg)
263 goto out_err;
264
265 if (IS_MRST(dev)) {
266 int domain = pci_domain_nr(pdev->bus);
267
268 dev_priv->aux_pdev =
269 pci_get_domain_bus_and_slot(domain, 0,
270 PCI_DEVFN(3, 0));
271
272 if (dev_priv->aux_pdev) {
273 resource_start = pci_resource_start(dev_priv->aux_pdev,
274 PSB_AUX_RESOURCE);
275 resource_len = pci_resource_len(dev_priv->aux_pdev,
276 PSB_AUX_RESOURCE);
277 dev_priv->aux_reg = ioremap(resource_start,
278 resource_len);
279 if (!dev_priv->aux_reg)
280 goto out_err;
281
282 DRM_DEBUG_KMS("Found aux vdc");
283 } else {
284 /* Couldn't find the aux vdc so map to primary vdc */
285 dev_priv->aux_reg = dev_priv->vdc_reg;
286 DRM_DEBUG_KMS("Couldn't find aux pci device");
287 }
288 dev_priv->gmbus_reg = dev_priv->aux_reg;
289
290 dev_priv->lpc_pdev =
291 pci_get_domain_bus_and_slot(domain, 0,
292 PCI_DEVFN(31, 0));
293 if (dev_priv->lpc_pdev) {
294 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
295 &dev_priv->lpc_gpio_base);
296 pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
297 (u32)dev_priv->lpc_gpio_base | (1L<<31));
298 pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
299 &dev_priv->lpc_gpio_base);
300 dev_priv->lpc_gpio_base &= 0xffc0;
301 if (dev_priv->lpc_gpio_base)
302 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
303 dev_priv->lpc_gpio_base);
304 else {
305 pci_dev_put(dev_priv->lpc_pdev);
306 dev_priv->lpc_pdev = NULL;
307 }
308 }
309 } else {
310 dev_priv->gmbus_reg = dev_priv->vdc_reg;
311 }
312
313 psb_intel_opregion_setup(dev);
314
315 ret = dev_priv->ops->chip_setup(dev);
316 if (ret)
317 goto out_err;
318
319 /* Init OSPM support */
320 gma_power_init(dev);
321
322 ret = -ENOMEM;
323
324 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
325 if (!dev_priv->scratch_page)
326 goto out_err;
327
328 set_pages_uc(dev_priv->scratch_page, 1);
329
330 ret = psb_gtt_init(dev);
331 if (ret)
332 goto out_err;
333 ret = psb_gem_mm_init(dev);
334 if (ret)
335 goto out_err;
336
337 ret = -ENOMEM;
338
339 dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
340 if (!dev_priv->mmu)
341 goto out_err;
342
343 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
344 if (!dev_priv->pf_pd)
345 goto out_err;
346
347 ret = psb_do_init(dev);
348 if (ret)
349 return ret;
350
351 /* Add stolen memory to SGX MMU */
352 ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
353 dev_priv->stolen_base >> PAGE_SHIFT,
354 pg->gatt_start,
355 pg->stolen_size >> PAGE_SHIFT, 0);
356
357 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
358 psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
359
360 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
361 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
362
363 acpi_video_register();
364
365 /* Setup vertical blanking handling */
366 ret = drm_vblank_init(dev, dev_priv->num_pipe);
367 if (ret)
368 goto out_err;
369
370 /*
371 * Install interrupt handlers prior to powering off SGX or else we will
372 * crash.
373 */
374 dev_priv->vdc_irq_mask = 0;
375 dev_priv->pipestat[0] = 0;
376 dev_priv->pipestat[1] = 0;
377 dev_priv->pipestat[2] = 0;
378 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
379 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
380 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
381 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
382 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
383
384 gma_irq_install(dev);
385
386 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
387
388 psb_modeset_init(dev);
389 drm_kms_helper_poll_init(dev);
390
391 /* Only add backlight support if we have LVDS or MIPI output */
392 drm_connector_list_iter_begin(dev, &conn_iter);
393 drm_for_each_connector_iter(connector, &conn_iter) {
394 gma_encoder = gma_attached_encoder(connector);
395
396 if (gma_encoder->type == INTEL_OUTPUT_LVDS ||
397 gma_encoder->type == INTEL_OUTPUT_MIPI) {
398 ret = gma_backlight_init(dev);
399 if (ret == 0)
400 acpi_video_register_backlight();
401 break;
402 }
403 }
404 drm_connector_list_iter_end(&conn_iter);
405
406 if (ret)
407 return ret;
408 psb_intel_opregion_enable_asle(dev);
409
410 return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
411
412out_err:
413 psb_driver_unload(dev);
414 return ret;
415}
416
417/*
418 * Hardware for gma500 is a hybrid device, which both acts as a PCI
419 * device (for legacy vga functionality) but also more like an
420 * integrated display on a SoC where the framebuffer simply
421 * resides in main memory and not in a special PCI bar (that
422 * internally redirects to a stolen range of main memory) like all
423 * other integrated PCI display devices implement it.
424 *
425 * To catch all cases we need to remove conflicting firmware devices
426 * for the stolen system memory and for the VGA functionality. As we
427 * currently cannot easily find the framebuffer's location in stolen
428 * memory, we remove all framebuffers here.
429 *
430 * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then
431 * we might be able to read the framebuffer range from the
432 * device.
433 */
434static int gma_remove_conflicting_framebuffers(struct pci_dev *pdev,
435 const struct drm_driver *req_driver)
436{
437 resource_size_t base = 0;
438 resource_size_t size = U32_MAX; /* 4 GiB HW limit */
439 const char *name = req_driver->name;
440 int ret;
441
442 ret = aperture_remove_conflicting_devices(base, size, name);
443 if (ret)
444 return ret;
445
446 return __aperture_remove_legacy_vga_devices(pdev);
447}
448
449static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
450{
451 struct drm_psb_private *dev_priv;
452 struct drm_device *dev;
453 int ret;
454
455 ret = gma_remove_conflicting_framebuffers(pdev, &driver);
456 if (ret)
457 return ret;
458
459 ret = pcim_enable_device(pdev);
460 if (ret)
461 return ret;
462
463 dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
464 if (IS_ERR(dev_priv))
465 return PTR_ERR(dev_priv);
466 dev = &dev_priv->dev;
467
468 pci_set_drvdata(pdev, dev);
469
470 ret = psb_driver_load(dev, ent->driver_data);
471 if (ret)
472 return ret;
473
474 ret = drm_dev_register(dev, ent->driver_data);
475 if (ret)
476 return ret;
477
478 psb_fbdev_setup(dev_priv);
479
480 return 0;
481}
482
483static void psb_pci_remove(struct pci_dev *pdev)
484{
485 struct drm_device *dev = pci_get_drvdata(pdev);
486
487 drm_dev_unregister(dev);
488}
489
490static DEFINE_RUNTIME_DEV_PM_OPS(psb_pm_ops, gma_power_suspend, gma_power_resume, NULL);
491
492static const struct file_operations psb_gem_fops = {
493 .owner = THIS_MODULE,
494 .open = drm_open,
495 .release = drm_release,
496 .unlocked_ioctl = drm_ioctl,
497 .compat_ioctl = drm_compat_ioctl,
498 .mmap = drm_gem_mmap,
499 .poll = drm_poll,
500 .read = drm_read,
501};
502
503static const struct drm_driver driver = {
504 .driver_features = DRIVER_MODESET | DRIVER_GEM,
505
506 .num_ioctls = ARRAY_SIZE(psb_ioctls),
507
508 .dumb_create = psb_gem_dumb_create,
509 .ioctls = psb_ioctls,
510 .fops = &psb_gem_fops,
511 .name = DRIVER_NAME,
512 .desc = DRIVER_DESC,
513 .date = DRIVER_DATE,
514 .major = DRIVER_MAJOR,
515 .minor = DRIVER_MINOR,
516 .patchlevel = DRIVER_PATCHLEVEL
517};
518
519static struct pci_driver psb_pci_driver = {
520 .name = DRIVER_NAME,
521 .id_table = pciidlist,
522 .probe = psb_pci_probe,
523 .remove = psb_pci_remove,
524 .driver.pm = &psb_pm_ops,
525};
526
527static int __init psb_init(void)
528{
529 if (drm_firmware_drivers_only())
530 return -ENODEV;
531
532 return pci_register_driver(&psb_pci_driver);
533}
534
535static void __exit psb_exit(void)
536{
537 pci_unregister_driver(&psb_pci_driver);
538}
539
540late_initcall(psb_init);
541module_exit(psb_exit);
542
543MODULE_AUTHOR(DRIVER_AUTHOR);
544MODULE_DESCRIPTION(DRIVER_DESC);
545MODULE_LICENSE("GPL");