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v4.6
 
  1/*
  2 * This file is part of wl1271
  3 *
  4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
  5 * Copyright (C) 2008-2010 Nokia Corporation
  6 *
  7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  8 *
  9 * This program is free software; you can redistribute it and/or
 10 * modify it under the terms of the GNU General Public License
 11 * version 2 as published by the Free Software Foundation.
 12 *
 13 * This program is distributed in the hope that it will be useful, but
 14 * WITHOUT ANY WARRANTY; without even the implied warranty of
 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 16 * General Public License for more details.
 17 *
 18 * You should have received a copy of the GNU General Public License
 19 * along with this program; if not, write to the Free Software
 20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 21 * 02110-1301 USA
 22 *
 23 */
 24
 25#ifndef __IO_H__
 26#define __IO_H__
 27
 28#include <linux/irqreturn.h>
 29
 30#define HW_ACCESS_MEMORY_MAX_RANGE	0x1FFC0
 31
 32#define HW_PARTITION_REGISTERS_ADDR     0x1FFC0
 33#define HW_PART0_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR)
 34#define HW_PART0_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 4)
 35#define HW_PART1_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 8)
 36#define HW_PART1_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 12)
 37#define HW_PART2_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 16)
 38#define HW_PART2_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 20)
 39#define HW_PART3_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 24)
 
 40
 41#define HW_ACCESS_REGISTER_SIZE         4
 42
 43#define HW_ACCESS_PRAM_MAX_RANGE	0x3c000
 44
 45struct wl1271;
 46
 47void wlcore_disable_interrupts(struct wl1271 *wl);
 48void wlcore_disable_interrupts_nosync(struct wl1271 *wl);
 49void wlcore_enable_interrupts(struct wl1271 *wl);
 50void wlcore_synchronize_interrupts(struct wl1271 *wl);
 51
 52void wl1271_io_reset(struct wl1271 *wl);
 53void wl1271_io_init(struct wl1271 *wl);
 54int wlcore_translate_addr(struct wl1271 *wl, int addr);
 55
 56/* Raw target IO, address is not translated */
 57static inline int __must_check wlcore_raw_write(struct wl1271 *wl, int addr,
 58						void *buf, size_t len,
 59						bool fixed)
 60{
 61	int ret;
 62
 63	if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
 64	    WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
 65		     addr != HW_ACCESS_ELP_CTRL_REG)))
 66		return -EIO;
 67
 68	ret = wl->if_ops->write(wl->dev, addr, buf, len, fixed);
 69	if (ret && wl->state != WLCORE_STATE_OFF)
 70		set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
 71
 72	return ret;
 73}
 74
 75static inline int __must_check wlcore_raw_read(struct wl1271 *wl, int addr,
 76					       void *buf, size_t len,
 77					       bool fixed)
 78{
 79	int ret;
 80
 81	if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
 82	    WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
 83		     addr != HW_ACCESS_ELP_CTRL_REG)))
 84		return -EIO;
 85
 86	ret = wl->if_ops->read(wl->dev, addr, buf, len, fixed);
 87	if (ret && wl->state != WLCORE_STATE_OFF)
 88		set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
 89
 90	return ret;
 91}
 92
 93static inline int __must_check wlcore_raw_read_data(struct wl1271 *wl, int reg,
 94						    void *buf, size_t len,
 95						    bool fixed)
 96{
 97	return wlcore_raw_read(wl, wl->rtable[reg], buf, len, fixed);
 98}
 99
100static inline int __must_check wlcore_raw_write_data(struct wl1271 *wl, int reg,
101						     void *buf, size_t len,
102						     bool fixed)
103{
104	return wlcore_raw_write(wl, wl->rtable[reg], buf, len, fixed);
105}
106
107static inline int __must_check wlcore_raw_read32(struct wl1271 *wl, int addr,
108						 u32 *val)
109{
110	int ret;
111
112	ret = wlcore_raw_read(wl, addr, wl->buffer_32,
113			      sizeof(*wl->buffer_32), false);
114	if (ret < 0)
115		return ret;
116
117	if (val)
118		*val = le32_to_cpu(*wl->buffer_32);
119
120	return 0;
121}
122
123static inline int __must_check wlcore_raw_write32(struct wl1271 *wl, int addr,
124						  u32 val)
125{
126	*wl->buffer_32 = cpu_to_le32(val);
127	return wlcore_raw_write(wl, addr, wl->buffer_32,
128				sizeof(*wl->buffer_32), false);
129}
130
131static inline int __must_check wlcore_read(struct wl1271 *wl, int addr,
132					   void *buf, size_t len, bool fixed)
133{
134	int physical;
135
136	physical = wlcore_translate_addr(wl, addr);
137
138	return wlcore_raw_read(wl, physical, buf, len, fixed);
139}
140
141static inline int __must_check wlcore_write(struct wl1271 *wl, int addr,
142					    void *buf, size_t len, bool fixed)
143{
144	int physical;
145
146	physical = wlcore_translate_addr(wl, addr);
147
148	return wlcore_raw_write(wl, physical, buf, len, fixed);
149}
150
151static inline int __must_check wlcore_write_data(struct wl1271 *wl, int reg,
152						 void *buf, size_t len,
153						 bool fixed)
154{
155	return wlcore_write(wl, wl->rtable[reg], buf, len, fixed);
156}
157
158static inline int __must_check wlcore_read_data(struct wl1271 *wl, int reg,
159						void *buf, size_t len,
160						bool fixed)
161{
162	return wlcore_read(wl, wl->rtable[reg], buf, len, fixed);
163}
164
165static inline int __must_check wlcore_read_hwaddr(struct wl1271 *wl, int hwaddr,
166						  void *buf, size_t len,
167						  bool fixed)
168{
169	int physical;
170	int addr;
171
172	/* Convert from FW internal address which is chip arch dependent */
173	addr = wl->ops->convert_hwaddr(wl, hwaddr);
174
175	physical = wlcore_translate_addr(wl, addr);
176
177	return wlcore_raw_read(wl, physical, buf, len, fixed);
178}
179
180static inline int __must_check wlcore_read32(struct wl1271 *wl, int addr,
181					     u32 *val)
182{
183	return wlcore_raw_read32(wl, wlcore_translate_addr(wl, addr), val);
184}
185
186static inline int __must_check wlcore_write32(struct wl1271 *wl, int addr,
187					      u32 val)
188{
189	return wlcore_raw_write32(wl, wlcore_translate_addr(wl, addr), val);
190}
191
192static inline int __must_check wlcore_read_reg(struct wl1271 *wl, int reg,
193					       u32 *val)
194{
195	return wlcore_raw_read32(wl,
196				 wlcore_translate_addr(wl, wl->rtable[reg]),
197				 val);
198}
199
200static inline int __must_check wlcore_write_reg(struct wl1271 *wl, int reg,
201						u32 val)
202{
203	return wlcore_raw_write32(wl,
204				  wlcore_translate_addr(wl, wl->rtable[reg]),
205				  val);
206}
207
208static inline void wl1271_power_off(struct wl1271 *wl)
209{
210	int ret = 0;
211
212	if (!test_bit(WL1271_FLAG_GPIO_POWER, &wl->flags))
213		return;
214
215	if (wl->if_ops->power)
216		ret = wl->if_ops->power(wl->dev, false);
217	if (!ret)
218		clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
219}
220
221static inline int wl1271_power_on(struct wl1271 *wl)
222{
223	int ret = 0;
224
225	if (wl->if_ops->power)
226		ret = wl->if_ops->power(wl->dev, true);
227	if (ret == 0)
228		set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
229
230	return ret;
231}
232
233int wlcore_set_partition(struct wl1271 *wl,
234			 const struct wlcore_partition_set *p);
235
236bool wl1271_set_block_size(struct wl1271 *wl);
237
238/* Functions from wl1271_main.c */
239
240int wl1271_tx_dummy_packet(struct wl1271 *wl);
241
242#endif
v6.8
  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * This file is part of wl1271
  4 *
  5 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
  6 * Copyright (C) 2008-2010 Nokia Corporation
  7 *
  8 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  9 */
 10
 11#ifndef __IO_H__
 12#define __IO_H__
 13
 14#include <linux/irqreturn.h>
 15
 16#define HW_ACCESS_MEMORY_MAX_RANGE	0x1FFC0
 17
 18#define HW_PARTITION_REGISTERS_ADDR     0x1FFC0
 19#define HW_PART0_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR)
 20#define HW_PART0_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 4)
 21#define HW_PART1_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 8)
 22#define HW_PART1_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 12)
 23#define HW_PART2_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 16)
 24#define HW_PART2_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 20)
 25#define HW_PART3_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 24)
 26#define HW_PART3_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 28)
 27
 28#define HW_ACCESS_REGISTER_SIZE         4
 29
 30#define HW_ACCESS_PRAM_MAX_RANGE	0x3c000
 31
 32struct wl1271;
 33
 34void wlcore_disable_interrupts(struct wl1271 *wl);
 35void wlcore_disable_interrupts_nosync(struct wl1271 *wl);
 36void wlcore_enable_interrupts(struct wl1271 *wl);
 37void wlcore_synchronize_interrupts(struct wl1271 *wl);
 38
 39void wl1271_io_reset(struct wl1271 *wl);
 40void wl1271_io_init(struct wl1271 *wl);
 41int wlcore_translate_addr(struct wl1271 *wl, int addr);
 42
 43/* Raw target IO, address is not translated */
 44static inline int __must_check wlcore_raw_write(struct wl1271 *wl, int addr,
 45						void *buf, size_t len,
 46						bool fixed)
 47{
 48	int ret;
 49
 50	if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
 51	    WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
 52		     addr != HW_ACCESS_ELP_CTRL_REG)))
 53		return -EIO;
 54
 55	ret = wl->if_ops->write(wl->dev, addr, buf, len, fixed);
 56	if (ret && wl->state != WLCORE_STATE_OFF)
 57		set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
 58
 59	return ret;
 60}
 61
 62static inline int __must_check wlcore_raw_read(struct wl1271 *wl, int addr,
 63					       void *buf, size_t len,
 64					       bool fixed)
 65{
 66	int ret;
 67
 68	if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
 69	    WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
 70		     addr != HW_ACCESS_ELP_CTRL_REG)))
 71		return -EIO;
 72
 73	ret = wl->if_ops->read(wl->dev, addr, buf, len, fixed);
 74	if (ret && wl->state != WLCORE_STATE_OFF)
 75		set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
 76
 77	return ret;
 78}
 79
 80static inline int __must_check wlcore_raw_read_data(struct wl1271 *wl, int reg,
 81						    void *buf, size_t len,
 82						    bool fixed)
 83{
 84	return wlcore_raw_read(wl, wl->rtable[reg], buf, len, fixed);
 85}
 86
 87static inline int __must_check wlcore_raw_write_data(struct wl1271 *wl, int reg,
 88						     void *buf, size_t len,
 89						     bool fixed)
 90{
 91	return wlcore_raw_write(wl, wl->rtable[reg], buf, len, fixed);
 92}
 93
 94static inline int __must_check wlcore_raw_read32(struct wl1271 *wl, int addr,
 95						 u32 *val)
 96{
 97	int ret;
 98
 99	ret = wlcore_raw_read(wl, addr, wl->buffer_32,
100			      sizeof(*wl->buffer_32), false);
101	if (ret < 0)
102		return ret;
103
104	if (val)
105		*val = le32_to_cpu(*wl->buffer_32);
106
107	return 0;
108}
109
110static inline int __must_check wlcore_raw_write32(struct wl1271 *wl, int addr,
111						  u32 val)
112{
113	*wl->buffer_32 = cpu_to_le32(val);
114	return wlcore_raw_write(wl, addr, wl->buffer_32,
115				sizeof(*wl->buffer_32), false);
116}
117
118static inline int __must_check wlcore_read(struct wl1271 *wl, int addr,
119					   void *buf, size_t len, bool fixed)
120{
121	int physical;
122
123	physical = wlcore_translate_addr(wl, addr);
124
125	return wlcore_raw_read(wl, physical, buf, len, fixed);
126}
127
128static inline int __must_check wlcore_write(struct wl1271 *wl, int addr,
129					    void *buf, size_t len, bool fixed)
130{
131	int physical;
132
133	physical = wlcore_translate_addr(wl, addr);
134
135	return wlcore_raw_write(wl, physical, buf, len, fixed);
136}
137
138static inline int __must_check wlcore_write_data(struct wl1271 *wl, int reg,
139						 void *buf, size_t len,
140						 bool fixed)
141{
142	return wlcore_write(wl, wl->rtable[reg], buf, len, fixed);
143}
144
145static inline int __must_check wlcore_read_data(struct wl1271 *wl, int reg,
146						void *buf, size_t len,
147						bool fixed)
148{
149	return wlcore_read(wl, wl->rtable[reg], buf, len, fixed);
150}
151
152static inline int __must_check wlcore_read_hwaddr(struct wl1271 *wl, int hwaddr,
153						  void *buf, size_t len,
154						  bool fixed)
155{
156	int physical;
157	int addr;
158
159	/* Convert from FW internal address which is chip arch dependent */
160	addr = wl->ops->convert_hwaddr(wl, hwaddr);
161
162	physical = wlcore_translate_addr(wl, addr);
163
164	return wlcore_raw_read(wl, physical, buf, len, fixed);
165}
166
167static inline int __must_check wlcore_read32(struct wl1271 *wl, int addr,
168					     u32 *val)
169{
170	return wlcore_raw_read32(wl, wlcore_translate_addr(wl, addr), val);
171}
172
173static inline int __must_check wlcore_write32(struct wl1271 *wl, int addr,
174					      u32 val)
175{
176	return wlcore_raw_write32(wl, wlcore_translate_addr(wl, addr), val);
177}
178
179static inline int __must_check wlcore_read_reg(struct wl1271 *wl, int reg,
180					       u32 *val)
181{
182	return wlcore_raw_read32(wl,
183				 wlcore_translate_addr(wl, wl->rtable[reg]),
184				 val);
185}
186
187static inline int __must_check wlcore_write_reg(struct wl1271 *wl, int reg,
188						u32 val)
189{
190	return wlcore_raw_write32(wl,
191				  wlcore_translate_addr(wl, wl->rtable[reg]),
192				  val);
193}
194
195static inline void wl1271_power_off(struct wl1271 *wl)
196{
197	int ret = 0;
198
199	if (!test_bit(WL1271_FLAG_GPIO_POWER, &wl->flags))
200		return;
201
202	if (wl->if_ops->power)
203		ret = wl->if_ops->power(wl->dev, false);
204	if (!ret)
205		clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
206}
207
208static inline int wl1271_power_on(struct wl1271 *wl)
209{
210	int ret = 0;
211
212	if (wl->if_ops->power)
213		ret = wl->if_ops->power(wl->dev, true);
214	if (ret == 0)
215		set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
216
217	return ret;
218}
219
220int wlcore_set_partition(struct wl1271 *wl,
221			 const struct wlcore_partition_set *p);
222
223bool wl1271_set_block_size(struct wl1271 *wl);
224
225/* Functions from wl1271_main.c */
226
227int wl1271_tx_dummy_packet(struct wl1271 *wl);
228
229#endif