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1/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
2 *
3 * Description: CoreSight Embedded Trace Buffer driver
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 and
7 * only version 2 as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <asm/local.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/types.h>
19#include <linux/device.h>
20#include <linux/io.h>
21#include <linux/err.h>
22#include <linux/fs.h>
23#include <linux/miscdevice.h>
24#include <linux/uaccess.h>
25#include <linux/slab.h>
26#include <linux/spinlock.h>
27#include <linux/pm_runtime.h>
28#include <linux/seq_file.h>
29#include <linux/coresight.h>
30#include <linux/amba/bus.h>
31#include <linux/clk.h>
32#include <linux/circ_buf.h>
33#include <linux/mm.h>
34#include <linux/perf_event.h>
35
36#include <asm/local.h>
37
38#include "coresight-priv.h"
39
40#define ETB_RAM_DEPTH_REG 0x004
41#define ETB_STATUS_REG 0x00c
42#define ETB_RAM_READ_DATA_REG 0x010
43#define ETB_RAM_READ_POINTER 0x014
44#define ETB_RAM_WRITE_POINTER 0x018
45#define ETB_TRG 0x01c
46#define ETB_CTL_REG 0x020
47#define ETB_RWD_REG 0x024
48#define ETB_FFSR 0x300
49#define ETB_FFCR 0x304
50#define ETB_ITMISCOP0 0xee0
51#define ETB_ITTRFLINACK 0xee4
52#define ETB_ITTRFLIN 0xee8
53#define ETB_ITATBDATA0 0xeeC
54#define ETB_ITATBCTR2 0xef0
55#define ETB_ITATBCTR1 0xef4
56#define ETB_ITATBCTR0 0xef8
57
58/* register description */
59/* STS - 0x00C */
60#define ETB_STATUS_RAM_FULL BIT(0)
61/* CTL - 0x020 */
62#define ETB_CTL_CAPT_EN BIT(0)
63/* FFCR - 0x304 */
64#define ETB_FFCR_EN_FTC BIT(0)
65#define ETB_FFCR_FON_MAN BIT(6)
66#define ETB_FFCR_STOP_FI BIT(12)
67#define ETB_FFCR_STOP_TRIGGER BIT(13)
68
69#define ETB_FFCR_BIT 6
70#define ETB_FFSR_BIT 1
71#define ETB_FRAME_SIZE_WORDS 4
72
73/**
74 * struct cs_buffer - keep track of a recording session' specifics
75 * @cur: index of the current buffer
76 * @nr_pages: max number of pages granted to us
77 * @offset: offset within the current buffer
78 * @data_size: how much we collected in this run
79 * @lost: other than zero if we had a HW buffer wrap around
80 * @snapshot: is this run in snapshot mode
81 * @data_pages: a handle the ring buffer
82 */
83struct cs_buffers {
84 unsigned int cur;
85 unsigned int nr_pages;
86 unsigned long offset;
87 local_t data_size;
88 local_t lost;
89 bool snapshot;
90 void **data_pages;
91};
92
93/**
94 * struct etb_drvdata - specifics associated to an ETB component
95 * @base: memory mapped base address for this component.
96 * @dev: the device entity associated to this component.
97 * @atclk: optional clock for the core parts of the ETB.
98 * @csdev: component vitals needed by the framework.
99 * @miscdev: specifics to handle "/dev/xyz.etb" entry.
100 * @spinlock: only one at a time pls.
101 * @reading: synchronise user space access to etb buffer.
102 * @mode: this ETB is being used.
103 * @buf: area of memory where ETB buffer content gets sent.
104 * @buffer_depth: size of @buf.
105 * @trigger_cntr: amount of words to store after a trigger.
106 */
107struct etb_drvdata {
108 void __iomem *base;
109 struct device *dev;
110 struct clk *atclk;
111 struct coresight_device *csdev;
112 struct miscdevice miscdev;
113 spinlock_t spinlock;
114 local_t reading;
115 local_t mode;
116 u8 *buf;
117 u32 buffer_depth;
118 u32 trigger_cntr;
119};
120
121static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata)
122{
123 u32 depth = 0;
124
125 pm_runtime_get_sync(drvdata->dev);
126
127 /* RO registers don't need locking */
128 depth = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
129
130 pm_runtime_put(drvdata->dev);
131 return depth;
132}
133
134static void etb_enable_hw(struct etb_drvdata *drvdata)
135{
136 int i;
137 u32 depth;
138
139 CS_UNLOCK(drvdata->base);
140
141 depth = drvdata->buffer_depth;
142 /* reset write RAM pointer address */
143 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
144 /* clear entire RAM buffer */
145 for (i = 0; i < depth; i++)
146 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG);
147
148 /* reset write RAM pointer address */
149 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
150 /* reset read RAM pointer address */
151 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
152
153 writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG);
154 writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER,
155 drvdata->base + ETB_FFCR);
156 /* ETB trace capture enable */
157 writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG);
158
159 CS_LOCK(drvdata->base);
160}
161
162static int etb_enable(struct coresight_device *csdev, u32 mode)
163{
164 u32 val;
165 unsigned long flags;
166 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
167
168 val = local_cmpxchg(&drvdata->mode,
169 CS_MODE_DISABLED, mode);
170 /*
171 * When accessing from Perf, a HW buffer can be handled
172 * by a single trace entity. In sysFS mode many tracers
173 * can be logging to the same HW buffer.
174 */
175 if (val == CS_MODE_PERF)
176 return -EBUSY;
177
178 /* Nothing to do, the tracer is already enabled. */
179 if (val == CS_MODE_SYSFS)
180 goto out;
181
182 spin_lock_irqsave(&drvdata->spinlock, flags);
183 etb_enable_hw(drvdata);
184 spin_unlock_irqrestore(&drvdata->spinlock, flags);
185
186out:
187 dev_info(drvdata->dev, "ETB enabled\n");
188 return 0;
189}
190
191static void etb_disable_hw(struct etb_drvdata *drvdata)
192{
193 u32 ffcr;
194
195 CS_UNLOCK(drvdata->base);
196
197 ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
198 /* stop formatter when a stop has completed */
199 ffcr |= ETB_FFCR_STOP_FI;
200 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
201 /* manually generate a flush of the system */
202 ffcr |= ETB_FFCR_FON_MAN;
203 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
204
205 if (coresight_timeout(drvdata->base, ETB_FFCR, ETB_FFCR_BIT, 0)) {
206 dev_err(drvdata->dev,
207 "timeout observed when probing at offset %#x\n",
208 ETB_FFCR);
209 }
210
211 /* disable trace capture */
212 writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);
213
214 if (coresight_timeout(drvdata->base, ETB_FFSR, ETB_FFSR_BIT, 1)) {
215 dev_err(drvdata->dev,
216 "timeout observed when probing at offset %#x\n",
217 ETB_FFCR);
218 }
219
220 CS_LOCK(drvdata->base);
221}
222
223static void etb_dump_hw(struct etb_drvdata *drvdata)
224{
225 int i;
226 u8 *buf_ptr;
227 u32 read_data, depth;
228 u32 read_ptr, write_ptr;
229 u32 frame_off, frame_endoff;
230
231 CS_UNLOCK(drvdata->base);
232
233 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
234 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
235
236 frame_off = write_ptr % ETB_FRAME_SIZE_WORDS;
237 frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off;
238 if (frame_off) {
239 dev_err(drvdata->dev,
240 "write_ptr: %lu not aligned to formatter frame size\n",
241 (unsigned long)write_ptr);
242 dev_err(drvdata->dev, "frameoff: %lu, frame_endoff: %lu\n",
243 (unsigned long)frame_off, (unsigned long)frame_endoff);
244 write_ptr += frame_endoff;
245 }
246
247 if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
248 & ETB_STATUS_RAM_FULL) == 0)
249 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
250 else
251 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER);
252
253 depth = drvdata->buffer_depth;
254 buf_ptr = drvdata->buf;
255 for (i = 0; i < depth; i++) {
256 read_data = readl_relaxed(drvdata->base +
257 ETB_RAM_READ_DATA_REG);
258 *buf_ptr++ = read_data >> 0;
259 *buf_ptr++ = read_data >> 8;
260 *buf_ptr++ = read_data >> 16;
261 *buf_ptr++ = read_data >> 24;
262 }
263
264 if (frame_off) {
265 buf_ptr -= (frame_endoff * 4);
266 for (i = 0; i < frame_endoff; i++) {
267 *buf_ptr++ = 0x0;
268 *buf_ptr++ = 0x0;
269 *buf_ptr++ = 0x0;
270 *buf_ptr++ = 0x0;
271 }
272 }
273
274 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
275
276 CS_LOCK(drvdata->base);
277}
278
279static void etb_disable(struct coresight_device *csdev)
280{
281 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
282 unsigned long flags;
283
284 spin_lock_irqsave(&drvdata->spinlock, flags);
285 etb_disable_hw(drvdata);
286 etb_dump_hw(drvdata);
287 spin_unlock_irqrestore(&drvdata->spinlock, flags);
288
289 local_set(&drvdata->mode, CS_MODE_DISABLED);
290
291 dev_info(drvdata->dev, "ETB disabled\n");
292}
293
294static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu,
295 void **pages, int nr_pages, bool overwrite)
296{
297 int node;
298 struct cs_buffers *buf;
299
300 if (cpu == -1)
301 cpu = smp_processor_id();
302 node = cpu_to_node(cpu);
303
304 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
305 if (!buf)
306 return NULL;
307
308 buf->snapshot = overwrite;
309 buf->nr_pages = nr_pages;
310 buf->data_pages = pages;
311
312 return buf;
313}
314
315static void etb_free_buffer(void *config)
316{
317 struct cs_buffers *buf = config;
318
319 kfree(buf);
320}
321
322static int etb_set_buffer(struct coresight_device *csdev,
323 struct perf_output_handle *handle,
324 void *sink_config)
325{
326 int ret = 0;
327 unsigned long head;
328 struct cs_buffers *buf = sink_config;
329
330 /* wrap head around to the amount of space we have */
331 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
332
333 /* find the page to write to */
334 buf->cur = head / PAGE_SIZE;
335
336 /* and offset within that page */
337 buf->offset = head % PAGE_SIZE;
338
339 local_set(&buf->data_size, 0);
340
341 return ret;
342}
343
344static unsigned long etb_reset_buffer(struct coresight_device *csdev,
345 struct perf_output_handle *handle,
346 void *sink_config, bool *lost)
347{
348 unsigned long size = 0;
349 struct cs_buffers *buf = sink_config;
350
351 if (buf) {
352 /*
353 * In snapshot mode ->data_size holds the new address of the
354 * ring buffer's head. The size itself is the whole address
355 * range since we want the latest information.
356 */
357 if (buf->snapshot)
358 handle->head = local_xchg(&buf->data_size,
359 buf->nr_pages << PAGE_SHIFT);
360
361 /*
362 * Tell the tracer PMU how much we got in this run and if
363 * something went wrong along the way. Nobody else can use
364 * this cs_buffers instance until we are done. As such
365 * resetting parameters here and squaring off with the ring
366 * buffer API in the tracer PMU is fine.
367 */
368 *lost = !!local_xchg(&buf->lost, 0);
369 size = local_xchg(&buf->data_size, 0);
370 }
371
372 return size;
373}
374
375static void etb_update_buffer(struct coresight_device *csdev,
376 struct perf_output_handle *handle,
377 void *sink_config)
378{
379 int i, cur;
380 u8 *buf_ptr;
381 u32 read_ptr, write_ptr, capacity;
382 u32 status, read_data, to_read;
383 unsigned long offset;
384 struct cs_buffers *buf = sink_config;
385 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
386
387 if (!buf)
388 return;
389
390 capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
391
392 CS_UNLOCK(drvdata->base);
393 etb_disable_hw(drvdata);
394
395 /* unit is in words, not bytes */
396 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
397 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
398
399 /*
400 * Entries should be aligned to the frame size. If they are not
401 * go back to the last alignement point to give decoding tools a
402 * chance to fix things.
403 */
404 if (write_ptr % ETB_FRAME_SIZE_WORDS) {
405 dev_err(drvdata->dev,
406 "write_ptr: %lu not aligned to formatter frame size\n",
407 (unsigned long)write_ptr);
408
409 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1);
410 local_inc(&buf->lost);
411 }
412
413 /*
414 * Get a hold of the status register and see if a wrap around
415 * has occurred. If so adjust things accordingly. Otherwise
416 * start at the beginning and go until the write pointer has
417 * been reached.
418 */
419 status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
420 if (status & ETB_STATUS_RAM_FULL) {
421 local_inc(&buf->lost);
422 to_read = capacity;
423 read_ptr = write_ptr;
424 } else {
425 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth);
426 to_read *= ETB_FRAME_SIZE_WORDS;
427 }
428
429 /*
430 * Make sure we don't overwrite data that hasn't been consumed yet.
431 * It is entirely possible that the HW buffer has more data than the
432 * ring buffer can currently handle. If so adjust the start address
433 * to take only the last traces.
434 *
435 * In snapshot mode we are looking to get the latest traces only and as
436 * such, we don't care about not overwriting data that hasn't been
437 * processed by user space.
438 */
439 if (!buf->snapshot && to_read > handle->size) {
440 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1);
441
442 /* The new read pointer must be frame size aligned */
443 to_read -= handle->size & mask;
444 /*
445 * Move the RAM read pointer up, keeping in mind that
446 * everything is in frame size units.
447 */
448 read_ptr = (write_ptr + drvdata->buffer_depth) -
449 to_read / ETB_FRAME_SIZE_WORDS;
450 /* Wrap around if need be*/
451 read_ptr &= ~(drvdata->buffer_depth - 1);
452 /* let the decoder know we've skipped ahead */
453 local_inc(&buf->lost);
454 }
455
456 /* finally tell HW where we want to start reading from */
457 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
458
459 cur = buf->cur;
460 offset = buf->offset;
461 for (i = 0; i < to_read; i += 4) {
462 buf_ptr = buf->data_pages[cur] + offset;
463 read_data = readl_relaxed(drvdata->base +
464 ETB_RAM_READ_DATA_REG);
465 *buf_ptr++ = read_data >> 0;
466 *buf_ptr++ = read_data >> 8;
467 *buf_ptr++ = read_data >> 16;
468 *buf_ptr++ = read_data >> 24;
469
470 offset += 4;
471 if (offset >= PAGE_SIZE) {
472 offset = 0;
473 cur++;
474 /* wrap around at the end of the buffer */
475 cur &= buf->nr_pages - 1;
476 }
477 }
478
479 /* reset ETB buffer for next run */
480 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
481 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
482
483 /*
484 * In snapshot mode all we have to do is communicate to
485 * perf_aux_output_end() the address of the current head. In full
486 * trace mode the same function expects a size to move rb->aux_head
487 * forward.
488 */
489 if (buf->snapshot)
490 local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
491 else
492 local_add(to_read, &buf->data_size);
493
494 etb_enable_hw(drvdata);
495 CS_LOCK(drvdata->base);
496}
497
498static const struct coresight_ops_sink etb_sink_ops = {
499 .enable = etb_enable,
500 .disable = etb_disable,
501 .alloc_buffer = etb_alloc_buffer,
502 .free_buffer = etb_free_buffer,
503 .set_buffer = etb_set_buffer,
504 .reset_buffer = etb_reset_buffer,
505 .update_buffer = etb_update_buffer,
506};
507
508static const struct coresight_ops etb_cs_ops = {
509 .sink_ops = &etb_sink_ops,
510};
511
512static void etb_dump(struct etb_drvdata *drvdata)
513{
514 unsigned long flags;
515
516 spin_lock_irqsave(&drvdata->spinlock, flags);
517 if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
518 etb_disable_hw(drvdata);
519 etb_dump_hw(drvdata);
520 etb_enable_hw(drvdata);
521 }
522 spin_unlock_irqrestore(&drvdata->spinlock, flags);
523
524 dev_info(drvdata->dev, "ETB dumped\n");
525}
526
527static int etb_open(struct inode *inode, struct file *file)
528{
529 struct etb_drvdata *drvdata = container_of(file->private_data,
530 struct etb_drvdata, miscdev);
531
532 if (local_cmpxchg(&drvdata->reading, 0, 1))
533 return -EBUSY;
534
535 dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
536 return 0;
537}
538
539static ssize_t etb_read(struct file *file, char __user *data,
540 size_t len, loff_t *ppos)
541{
542 u32 depth;
543 struct etb_drvdata *drvdata = container_of(file->private_data,
544 struct etb_drvdata, miscdev);
545
546 etb_dump(drvdata);
547
548 depth = drvdata->buffer_depth;
549 if (*ppos + len > depth * 4)
550 len = depth * 4 - *ppos;
551
552 if (copy_to_user(data, drvdata->buf + *ppos, len)) {
553 dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
554 return -EFAULT;
555 }
556
557 *ppos += len;
558
559 dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
560 __func__, len, (int)(depth * 4 - *ppos));
561 return len;
562}
563
564static int etb_release(struct inode *inode, struct file *file)
565{
566 struct etb_drvdata *drvdata = container_of(file->private_data,
567 struct etb_drvdata, miscdev);
568 local_set(&drvdata->reading, 0);
569
570 dev_dbg(drvdata->dev, "%s: released\n", __func__);
571 return 0;
572}
573
574static const struct file_operations etb_fops = {
575 .owner = THIS_MODULE,
576 .open = etb_open,
577 .read = etb_read,
578 .release = etb_release,
579 .llseek = no_llseek,
580};
581
582static ssize_t status_show(struct device *dev,
583 struct device_attribute *attr, char *buf)
584{
585 unsigned long flags;
586 u32 etb_rdr, etb_sr, etb_rrp, etb_rwp;
587 u32 etb_trg, etb_cr, etb_ffsr, etb_ffcr;
588 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
589
590 pm_runtime_get_sync(drvdata->dev);
591 spin_lock_irqsave(&drvdata->spinlock, flags);
592 CS_UNLOCK(drvdata->base);
593
594 etb_rdr = readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
595 etb_sr = readl_relaxed(drvdata->base + ETB_STATUS_REG);
596 etb_rrp = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
597 etb_rwp = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
598 etb_trg = readl_relaxed(drvdata->base + ETB_TRG);
599 etb_cr = readl_relaxed(drvdata->base + ETB_CTL_REG);
600 etb_ffsr = readl_relaxed(drvdata->base + ETB_FFSR);
601 etb_ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
602
603 CS_LOCK(drvdata->base);
604 spin_unlock_irqrestore(&drvdata->spinlock, flags);
605
606 pm_runtime_put(drvdata->dev);
607
608 return sprintf(buf,
609 "Depth:\t\t0x%x\n"
610 "Status:\t\t0x%x\n"
611 "RAM read ptr:\t0x%x\n"
612 "RAM wrt ptr:\t0x%x\n"
613 "Trigger cnt:\t0x%x\n"
614 "Control:\t0x%x\n"
615 "Flush status:\t0x%x\n"
616 "Flush ctrl:\t0x%x\n",
617 etb_rdr, etb_sr, etb_rrp, etb_rwp,
618 etb_trg, etb_cr, etb_ffsr, etb_ffcr);
619
620 return -EINVAL;
621}
622static DEVICE_ATTR_RO(status);
623
624static ssize_t trigger_cntr_show(struct device *dev,
625 struct device_attribute *attr, char *buf)
626{
627 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
628 unsigned long val = drvdata->trigger_cntr;
629
630 return sprintf(buf, "%#lx\n", val);
631}
632
633static ssize_t trigger_cntr_store(struct device *dev,
634 struct device_attribute *attr,
635 const char *buf, size_t size)
636{
637 int ret;
638 unsigned long val;
639 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
640
641 ret = kstrtoul(buf, 16, &val);
642 if (ret)
643 return ret;
644
645 drvdata->trigger_cntr = val;
646 return size;
647}
648static DEVICE_ATTR_RW(trigger_cntr);
649
650static struct attribute *coresight_etb_attrs[] = {
651 &dev_attr_trigger_cntr.attr,
652 &dev_attr_status.attr,
653 NULL,
654};
655ATTRIBUTE_GROUPS(coresight_etb);
656
657static int etb_probe(struct amba_device *adev, const struct amba_id *id)
658{
659 int ret;
660 void __iomem *base;
661 struct device *dev = &adev->dev;
662 struct coresight_platform_data *pdata = NULL;
663 struct etb_drvdata *drvdata;
664 struct resource *res = &adev->res;
665 struct coresight_desc *desc;
666 struct device_node *np = adev->dev.of_node;
667
668 if (np) {
669 pdata = of_get_coresight_platform_data(dev, np);
670 if (IS_ERR(pdata))
671 return PTR_ERR(pdata);
672 adev->dev.platform_data = pdata;
673 }
674
675 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
676 if (!drvdata)
677 return -ENOMEM;
678
679 drvdata->dev = &adev->dev;
680 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
681 if (!IS_ERR(drvdata->atclk)) {
682 ret = clk_prepare_enable(drvdata->atclk);
683 if (ret)
684 return ret;
685 }
686 dev_set_drvdata(dev, drvdata);
687
688 /* validity for the resource is already checked by the AMBA core */
689 base = devm_ioremap_resource(dev, res);
690 if (IS_ERR(base))
691 return PTR_ERR(base);
692
693 drvdata->base = base;
694
695 spin_lock_init(&drvdata->spinlock);
696
697 drvdata->buffer_depth = etb_get_buffer_depth(drvdata);
698 pm_runtime_put(&adev->dev);
699
700 if (drvdata->buffer_depth & 0x80000000)
701 return -EINVAL;
702
703 drvdata->buf = devm_kzalloc(dev,
704 drvdata->buffer_depth * 4, GFP_KERNEL);
705 if (!drvdata->buf) {
706 dev_err(dev, "Failed to allocate %u bytes for buffer data\n",
707 drvdata->buffer_depth * 4);
708 return -ENOMEM;
709 }
710
711 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
712 if (!desc)
713 return -ENOMEM;
714
715 desc->type = CORESIGHT_DEV_TYPE_SINK;
716 desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
717 desc->ops = &etb_cs_ops;
718 desc->pdata = pdata;
719 desc->dev = dev;
720 desc->groups = coresight_etb_groups;
721 drvdata->csdev = coresight_register(desc);
722 if (IS_ERR(drvdata->csdev))
723 return PTR_ERR(drvdata->csdev);
724
725 drvdata->miscdev.name = pdata->name;
726 drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
727 drvdata->miscdev.fops = &etb_fops;
728 ret = misc_register(&drvdata->miscdev);
729 if (ret)
730 goto err_misc_register;
731
732 dev_info(dev, "ETB initialized\n");
733 return 0;
734
735err_misc_register:
736 coresight_unregister(drvdata->csdev);
737 return ret;
738}
739
740#ifdef CONFIG_PM
741static int etb_runtime_suspend(struct device *dev)
742{
743 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
744
745 if (drvdata && !IS_ERR(drvdata->atclk))
746 clk_disable_unprepare(drvdata->atclk);
747
748 return 0;
749}
750
751static int etb_runtime_resume(struct device *dev)
752{
753 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
754
755 if (drvdata && !IS_ERR(drvdata->atclk))
756 clk_prepare_enable(drvdata->atclk);
757
758 return 0;
759}
760#endif
761
762static const struct dev_pm_ops etb_dev_pm_ops = {
763 SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL)
764};
765
766static struct amba_id etb_ids[] = {
767 {
768 .id = 0x0003b907,
769 .mask = 0x0003ffff,
770 },
771 { 0, 0},
772};
773
774static struct amba_driver etb_driver = {
775 .drv = {
776 .name = "coresight-etb10",
777 .owner = THIS_MODULE,
778 .pm = &etb_dev_pm_ops,
779 .suppress_bind_attrs = true,
780
781 },
782 .probe = etb_probe,
783 .id_table = etb_ids,
784};
785builtin_amba_driver(etb_driver);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
4 *
5 * Description: CoreSight Embedded Trace Buffer driver
6 */
7
8#include <linux/atomic.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/types.h>
12#include <linux/device.h>
13#include <linux/io.h>
14#include <linux/err.h>
15#include <linux/fs.h>
16#include <linux/miscdevice.h>
17#include <linux/uaccess.h>
18#include <linux/slab.h>
19#include <linux/spinlock.h>
20#include <linux/pm_runtime.h>
21#include <linux/seq_file.h>
22#include <linux/coresight.h>
23#include <linux/amba/bus.h>
24#include <linux/clk.h>
25#include <linux/circ_buf.h>
26#include <linux/mm.h>
27#include <linux/perf_event.h>
28
29
30#include "coresight-priv.h"
31#include "coresight-etm-perf.h"
32
33#define ETB_RAM_DEPTH_REG 0x004
34#define ETB_STATUS_REG 0x00c
35#define ETB_RAM_READ_DATA_REG 0x010
36#define ETB_RAM_READ_POINTER 0x014
37#define ETB_RAM_WRITE_POINTER 0x018
38#define ETB_TRG 0x01c
39#define ETB_CTL_REG 0x020
40#define ETB_RWD_REG 0x024
41#define ETB_FFSR 0x300
42#define ETB_FFCR 0x304
43#define ETB_ITMISCOP0 0xee0
44#define ETB_ITTRFLINACK 0xee4
45#define ETB_ITTRFLIN 0xee8
46#define ETB_ITATBDATA0 0xeeC
47#define ETB_ITATBCTR2 0xef0
48#define ETB_ITATBCTR1 0xef4
49#define ETB_ITATBCTR0 0xef8
50
51/* register description */
52/* STS - 0x00C */
53#define ETB_STATUS_RAM_FULL BIT(0)
54/* CTL - 0x020 */
55#define ETB_CTL_CAPT_EN BIT(0)
56/* FFCR - 0x304 */
57#define ETB_FFCR_EN_FTC BIT(0)
58#define ETB_FFCR_FON_MAN BIT(6)
59#define ETB_FFCR_STOP_FI BIT(12)
60#define ETB_FFCR_STOP_TRIGGER BIT(13)
61
62#define ETB_FFCR_BIT 6
63#define ETB_FFSR_BIT 1
64#define ETB_FRAME_SIZE_WORDS 4
65
66DEFINE_CORESIGHT_DEVLIST(etb_devs, "etb");
67
68/**
69 * struct etb_drvdata - specifics associated to an ETB component
70 * @base: memory mapped base address for this component.
71 * @atclk: optional clock for the core parts of the ETB.
72 * @csdev: component vitals needed by the framework.
73 * @miscdev: specifics to handle "/dev/xyz.etb" entry.
74 * @spinlock: only one at a time pls.
75 * @reading: synchronise user space access to etb buffer.
76 * @pid: Process ID of the process being monitored by the session
77 * that is using this component.
78 * @buf: area of memory where ETB buffer content gets sent.
79 * @mode: this ETB is being used.
80 * @buffer_depth: size of @buf.
81 * @trigger_cntr: amount of words to store after a trigger.
82 */
83struct etb_drvdata {
84 void __iomem *base;
85 struct clk *atclk;
86 struct coresight_device *csdev;
87 struct miscdevice miscdev;
88 spinlock_t spinlock;
89 local_t reading;
90 pid_t pid;
91 u8 *buf;
92 u32 mode;
93 u32 buffer_depth;
94 u32 trigger_cntr;
95};
96
97static int etb_set_buffer(struct coresight_device *csdev,
98 struct perf_output_handle *handle);
99
100static inline unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata)
101{
102 return readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
103}
104
105static void __etb_enable_hw(struct etb_drvdata *drvdata)
106{
107 int i;
108 u32 depth;
109
110 CS_UNLOCK(drvdata->base);
111
112 depth = drvdata->buffer_depth;
113 /* reset write RAM pointer address */
114 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
115 /* clear entire RAM buffer */
116 for (i = 0; i < depth; i++)
117 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG);
118
119 /* reset write RAM pointer address */
120 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
121 /* reset read RAM pointer address */
122 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
123
124 writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG);
125 writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER,
126 drvdata->base + ETB_FFCR);
127 /* ETB trace capture enable */
128 writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG);
129
130 CS_LOCK(drvdata->base);
131}
132
133static int etb_enable_hw(struct etb_drvdata *drvdata)
134{
135 int rc = coresight_claim_device(drvdata->csdev);
136
137 if (rc)
138 return rc;
139
140 __etb_enable_hw(drvdata);
141 return 0;
142}
143
144static int etb_enable_sysfs(struct coresight_device *csdev)
145{
146 int ret = 0;
147 unsigned long flags;
148 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
149
150 spin_lock_irqsave(&drvdata->spinlock, flags);
151
152 /* Don't messup with perf sessions. */
153 if (drvdata->mode == CS_MODE_PERF) {
154 ret = -EBUSY;
155 goto out;
156 }
157
158 if (drvdata->mode == CS_MODE_DISABLED) {
159 ret = etb_enable_hw(drvdata);
160 if (ret)
161 goto out;
162
163 drvdata->mode = CS_MODE_SYSFS;
164 }
165
166 atomic_inc(&csdev->refcnt);
167out:
168 spin_unlock_irqrestore(&drvdata->spinlock, flags);
169 return ret;
170}
171
172static int etb_enable_perf(struct coresight_device *csdev, void *data)
173{
174 int ret = 0;
175 pid_t pid;
176 unsigned long flags;
177 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
178 struct perf_output_handle *handle = data;
179 struct cs_buffers *buf = etm_perf_sink_config(handle);
180
181 spin_lock_irqsave(&drvdata->spinlock, flags);
182
183 /* No need to continue if the component is already in used by sysFS. */
184 if (drvdata->mode == CS_MODE_SYSFS) {
185 ret = -EBUSY;
186 goto out;
187 }
188
189 /* Get a handle on the pid of the process to monitor */
190 pid = buf->pid;
191
192 if (drvdata->pid != -1 && drvdata->pid != pid) {
193 ret = -EBUSY;
194 goto out;
195 }
196
197 /*
198 * No HW configuration is needed if the sink is already in
199 * use for this session.
200 */
201 if (drvdata->pid == pid) {
202 atomic_inc(&csdev->refcnt);
203 goto out;
204 }
205
206 /*
207 * We don't have an internal state to clean up if we fail to setup
208 * the perf buffer. So we can perform the step before we turn the
209 * ETB on and leave without cleaning up.
210 */
211 ret = etb_set_buffer(csdev, handle);
212 if (ret)
213 goto out;
214
215 ret = etb_enable_hw(drvdata);
216 if (!ret) {
217 /* Associate with monitored process. */
218 drvdata->pid = pid;
219 drvdata->mode = CS_MODE_PERF;
220 atomic_inc(&csdev->refcnt);
221 }
222
223out:
224 spin_unlock_irqrestore(&drvdata->spinlock, flags);
225 return ret;
226}
227
228static int etb_enable(struct coresight_device *csdev, enum cs_mode mode,
229 void *data)
230{
231 int ret;
232
233 switch (mode) {
234 case CS_MODE_SYSFS:
235 ret = etb_enable_sysfs(csdev);
236 break;
237 case CS_MODE_PERF:
238 ret = etb_enable_perf(csdev, data);
239 break;
240 default:
241 ret = -EINVAL;
242 break;
243 }
244
245 if (ret)
246 return ret;
247
248 dev_dbg(&csdev->dev, "ETB enabled\n");
249 return 0;
250}
251
252static void __etb_disable_hw(struct etb_drvdata *drvdata)
253{
254 u32 ffcr;
255 struct device *dev = &drvdata->csdev->dev;
256 struct csdev_access *csa = &drvdata->csdev->access;
257
258 CS_UNLOCK(drvdata->base);
259
260 ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
261 /* stop formatter when a stop has completed */
262 ffcr |= ETB_FFCR_STOP_FI;
263 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
264 /* manually generate a flush of the system */
265 ffcr |= ETB_FFCR_FON_MAN;
266 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
267
268 if (coresight_timeout(csa, ETB_FFCR, ETB_FFCR_BIT, 0)) {
269 dev_err(dev,
270 "timeout while waiting for completion of Manual Flush\n");
271 }
272
273 /* disable trace capture */
274 writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);
275
276 if (coresight_timeout(csa, ETB_FFSR, ETB_FFSR_BIT, 1)) {
277 dev_err(dev,
278 "timeout while waiting for Formatter to Stop\n");
279 }
280
281 CS_LOCK(drvdata->base);
282}
283
284static void etb_dump_hw(struct etb_drvdata *drvdata)
285{
286 bool lost = false;
287 int i;
288 u8 *buf_ptr;
289 u32 read_data, depth;
290 u32 read_ptr, write_ptr;
291 u32 frame_off, frame_endoff;
292 struct device *dev = &drvdata->csdev->dev;
293
294 CS_UNLOCK(drvdata->base);
295
296 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
297 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
298
299 frame_off = write_ptr % ETB_FRAME_SIZE_WORDS;
300 frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off;
301 if (frame_off) {
302 dev_err(dev,
303 "write_ptr: %lu not aligned to formatter frame size\n",
304 (unsigned long)write_ptr);
305 dev_err(dev, "frameoff: %lu, frame_endoff: %lu\n",
306 (unsigned long)frame_off, (unsigned long)frame_endoff);
307 write_ptr += frame_endoff;
308 }
309
310 if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
311 & ETB_STATUS_RAM_FULL) == 0) {
312 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
313 } else {
314 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER);
315 lost = true;
316 }
317
318 depth = drvdata->buffer_depth;
319 buf_ptr = drvdata->buf;
320 for (i = 0; i < depth; i++) {
321 read_data = readl_relaxed(drvdata->base +
322 ETB_RAM_READ_DATA_REG);
323 *(u32 *)buf_ptr = read_data;
324 buf_ptr += 4;
325 }
326
327 if (lost)
328 coresight_insert_barrier_packet(drvdata->buf);
329
330 if (frame_off) {
331 buf_ptr -= (frame_endoff * 4);
332 for (i = 0; i < frame_endoff; i++) {
333 *buf_ptr++ = 0x0;
334 *buf_ptr++ = 0x0;
335 *buf_ptr++ = 0x0;
336 *buf_ptr++ = 0x0;
337 }
338 }
339
340 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
341
342 CS_LOCK(drvdata->base);
343}
344
345static void etb_disable_hw(struct etb_drvdata *drvdata)
346{
347 __etb_disable_hw(drvdata);
348 etb_dump_hw(drvdata);
349 coresight_disclaim_device(drvdata->csdev);
350}
351
352static int etb_disable(struct coresight_device *csdev)
353{
354 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
355 unsigned long flags;
356
357 spin_lock_irqsave(&drvdata->spinlock, flags);
358
359 if (atomic_dec_return(&csdev->refcnt)) {
360 spin_unlock_irqrestore(&drvdata->spinlock, flags);
361 return -EBUSY;
362 }
363
364 /* Complain if we (somehow) got out of sync */
365 WARN_ON_ONCE(drvdata->mode == CS_MODE_DISABLED);
366 etb_disable_hw(drvdata);
367 /* Dissociate from monitored process. */
368 drvdata->pid = -1;
369 drvdata->mode = CS_MODE_DISABLED;
370 spin_unlock_irqrestore(&drvdata->spinlock, flags);
371
372 dev_dbg(&csdev->dev, "ETB disabled\n");
373 return 0;
374}
375
376static void *etb_alloc_buffer(struct coresight_device *csdev,
377 struct perf_event *event, void **pages,
378 int nr_pages, bool overwrite)
379{
380 int node;
381 struct cs_buffers *buf;
382
383 node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu);
384
385 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
386 if (!buf)
387 return NULL;
388
389 buf->pid = task_pid_nr(event->owner);
390 buf->snapshot = overwrite;
391 buf->nr_pages = nr_pages;
392 buf->data_pages = pages;
393
394 return buf;
395}
396
397static void etb_free_buffer(void *config)
398{
399 struct cs_buffers *buf = config;
400
401 kfree(buf);
402}
403
404static int etb_set_buffer(struct coresight_device *csdev,
405 struct perf_output_handle *handle)
406{
407 int ret = 0;
408 unsigned long head;
409 struct cs_buffers *buf = etm_perf_sink_config(handle);
410
411 if (!buf)
412 return -EINVAL;
413
414 /* wrap head around to the amount of space we have */
415 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
416
417 /* find the page to write to */
418 buf->cur = head / PAGE_SIZE;
419
420 /* and offset within that page */
421 buf->offset = head % PAGE_SIZE;
422
423 local_set(&buf->data_size, 0);
424
425 return ret;
426}
427
428static unsigned long etb_update_buffer(struct coresight_device *csdev,
429 struct perf_output_handle *handle,
430 void *sink_config)
431{
432 bool lost = false;
433 int i, cur;
434 u8 *buf_ptr;
435 const u32 *barrier;
436 u32 read_ptr, write_ptr, capacity;
437 u32 status, read_data;
438 unsigned long offset, to_read = 0, flags;
439 struct cs_buffers *buf = sink_config;
440 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
441
442 if (!buf)
443 return 0;
444
445 capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
446
447 spin_lock_irqsave(&drvdata->spinlock, flags);
448
449 /* Don't do anything if another tracer is using this sink */
450 if (atomic_read(&csdev->refcnt) != 1)
451 goto out;
452
453 __etb_disable_hw(drvdata);
454 CS_UNLOCK(drvdata->base);
455
456 /* unit is in words, not bytes */
457 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
458 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
459
460 /*
461 * Entries should be aligned to the frame size. If they are not
462 * go back to the last alignment point to give decoding tools a
463 * chance to fix things.
464 */
465 if (write_ptr % ETB_FRAME_SIZE_WORDS) {
466 dev_err(&csdev->dev,
467 "write_ptr: %lu not aligned to formatter frame size\n",
468 (unsigned long)write_ptr);
469
470 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1);
471 lost = true;
472 }
473
474 /*
475 * Get a hold of the status register and see if a wrap around
476 * has occurred. If so adjust things accordingly. Otherwise
477 * start at the beginning and go until the write pointer has
478 * been reached.
479 */
480 status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
481 if (status & ETB_STATUS_RAM_FULL) {
482 lost = true;
483 to_read = capacity;
484 read_ptr = write_ptr;
485 } else {
486 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth);
487 to_read *= ETB_FRAME_SIZE_WORDS;
488 }
489
490 /*
491 * Make sure we don't overwrite data that hasn't been consumed yet.
492 * It is entirely possible that the HW buffer has more data than the
493 * ring buffer can currently handle. If so adjust the start address
494 * to take only the last traces.
495 *
496 * In snapshot mode we are looking to get the latest traces only and as
497 * such, we don't care about not overwriting data that hasn't been
498 * processed by user space.
499 */
500 if (!buf->snapshot && to_read > handle->size) {
501 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1);
502
503 /* The new read pointer must be frame size aligned */
504 to_read = handle->size & mask;
505 /*
506 * Move the RAM read pointer up, keeping in mind that
507 * everything is in frame size units.
508 */
509 read_ptr = (write_ptr + drvdata->buffer_depth) -
510 to_read / ETB_FRAME_SIZE_WORDS;
511 /* Wrap around if need be*/
512 if (read_ptr > (drvdata->buffer_depth - 1))
513 read_ptr -= drvdata->buffer_depth;
514 /* let the decoder know we've skipped ahead */
515 lost = true;
516 }
517
518 /*
519 * Don't set the TRUNCATED flag in snapshot mode because 1) the
520 * captured buffer is expected to be truncated and 2) a full buffer
521 * prevents the event from being re-enabled by the perf core,
522 * resulting in stale data being send to user space.
523 */
524 if (!buf->snapshot && lost)
525 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
526
527 /* finally tell HW where we want to start reading from */
528 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
529
530 cur = buf->cur;
531 offset = buf->offset;
532 barrier = coresight_barrier_pkt;
533
534 for (i = 0; i < to_read; i += 4) {
535 buf_ptr = buf->data_pages[cur] + offset;
536 read_data = readl_relaxed(drvdata->base +
537 ETB_RAM_READ_DATA_REG);
538 if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) {
539 read_data = *barrier;
540 barrier++;
541 }
542
543 *(u32 *)buf_ptr = read_data;
544 buf_ptr += 4;
545
546 offset += 4;
547 if (offset >= PAGE_SIZE) {
548 offset = 0;
549 cur++;
550 /* wrap around at the end of the buffer */
551 cur &= buf->nr_pages - 1;
552 }
553 }
554
555 /* reset ETB buffer for next run */
556 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
557 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
558
559 /*
560 * In snapshot mode we simply increment the head by the number of byte
561 * that were written. User space will figure out how many bytes to get
562 * from the AUX buffer based on the position of the head.
563 */
564 if (buf->snapshot)
565 handle->head += to_read;
566
567 __etb_enable_hw(drvdata);
568 CS_LOCK(drvdata->base);
569out:
570 spin_unlock_irqrestore(&drvdata->spinlock, flags);
571
572 return to_read;
573}
574
575static const struct coresight_ops_sink etb_sink_ops = {
576 .enable = etb_enable,
577 .disable = etb_disable,
578 .alloc_buffer = etb_alloc_buffer,
579 .free_buffer = etb_free_buffer,
580 .update_buffer = etb_update_buffer,
581};
582
583static const struct coresight_ops etb_cs_ops = {
584 .sink_ops = &etb_sink_ops,
585};
586
587static void etb_dump(struct etb_drvdata *drvdata)
588{
589 unsigned long flags;
590
591 spin_lock_irqsave(&drvdata->spinlock, flags);
592 if (drvdata->mode == CS_MODE_SYSFS) {
593 __etb_disable_hw(drvdata);
594 etb_dump_hw(drvdata);
595 __etb_enable_hw(drvdata);
596 }
597 spin_unlock_irqrestore(&drvdata->spinlock, flags);
598
599 dev_dbg(&drvdata->csdev->dev, "ETB dumped\n");
600}
601
602static int etb_open(struct inode *inode, struct file *file)
603{
604 struct etb_drvdata *drvdata = container_of(file->private_data,
605 struct etb_drvdata, miscdev);
606
607 if (local_cmpxchg(&drvdata->reading, 0, 1))
608 return -EBUSY;
609
610 dev_dbg(&drvdata->csdev->dev, "%s: successfully opened\n", __func__);
611 return 0;
612}
613
614static ssize_t etb_read(struct file *file, char __user *data,
615 size_t len, loff_t *ppos)
616{
617 u32 depth;
618 struct etb_drvdata *drvdata = container_of(file->private_data,
619 struct etb_drvdata, miscdev);
620 struct device *dev = &drvdata->csdev->dev;
621
622 etb_dump(drvdata);
623
624 depth = drvdata->buffer_depth;
625 if (*ppos + len > depth * 4)
626 len = depth * 4 - *ppos;
627
628 if (copy_to_user(data, drvdata->buf + *ppos, len)) {
629 dev_dbg(dev,
630 "%s: copy_to_user failed\n", __func__);
631 return -EFAULT;
632 }
633
634 *ppos += len;
635
636 dev_dbg(dev, "%s: %zu bytes copied, %d bytes left\n",
637 __func__, len, (int)(depth * 4 - *ppos));
638 return len;
639}
640
641static int etb_release(struct inode *inode, struct file *file)
642{
643 struct etb_drvdata *drvdata = container_of(file->private_data,
644 struct etb_drvdata, miscdev);
645 local_set(&drvdata->reading, 0);
646
647 dev_dbg(&drvdata->csdev->dev, "%s: released\n", __func__);
648 return 0;
649}
650
651static const struct file_operations etb_fops = {
652 .owner = THIS_MODULE,
653 .open = etb_open,
654 .read = etb_read,
655 .release = etb_release,
656 .llseek = no_llseek,
657};
658
659static struct attribute *coresight_etb_mgmt_attrs[] = {
660 coresight_simple_reg32(rdp, ETB_RAM_DEPTH_REG),
661 coresight_simple_reg32(sts, ETB_STATUS_REG),
662 coresight_simple_reg32(rrp, ETB_RAM_READ_POINTER),
663 coresight_simple_reg32(rwp, ETB_RAM_WRITE_POINTER),
664 coresight_simple_reg32(trg, ETB_TRG),
665 coresight_simple_reg32(ctl, ETB_CTL_REG),
666 coresight_simple_reg32(ffsr, ETB_FFSR),
667 coresight_simple_reg32(ffcr, ETB_FFCR),
668 NULL,
669};
670
671static ssize_t trigger_cntr_show(struct device *dev,
672 struct device_attribute *attr, char *buf)
673{
674 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
675 unsigned long val = drvdata->trigger_cntr;
676
677 return sprintf(buf, "%#lx\n", val);
678}
679
680static ssize_t trigger_cntr_store(struct device *dev,
681 struct device_attribute *attr,
682 const char *buf, size_t size)
683{
684 int ret;
685 unsigned long val;
686 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
687
688 ret = kstrtoul(buf, 16, &val);
689 if (ret)
690 return ret;
691
692 drvdata->trigger_cntr = val;
693 return size;
694}
695static DEVICE_ATTR_RW(trigger_cntr);
696
697static struct attribute *coresight_etb_attrs[] = {
698 &dev_attr_trigger_cntr.attr,
699 NULL,
700};
701
702static const struct attribute_group coresight_etb_group = {
703 .attrs = coresight_etb_attrs,
704};
705
706static const struct attribute_group coresight_etb_mgmt_group = {
707 .attrs = coresight_etb_mgmt_attrs,
708 .name = "mgmt",
709};
710
711static const struct attribute_group *coresight_etb_groups[] = {
712 &coresight_etb_group,
713 &coresight_etb_mgmt_group,
714 NULL,
715};
716
717static int etb_probe(struct amba_device *adev, const struct amba_id *id)
718{
719 int ret;
720 void __iomem *base;
721 struct device *dev = &adev->dev;
722 struct coresight_platform_data *pdata = NULL;
723 struct etb_drvdata *drvdata;
724 struct resource *res = &adev->res;
725 struct coresight_desc desc = { 0 };
726
727 desc.name = coresight_alloc_device_name(&etb_devs, dev);
728 if (!desc.name)
729 return -ENOMEM;
730
731 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
732 if (!drvdata)
733 return -ENOMEM;
734
735 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
736 if (!IS_ERR(drvdata->atclk)) {
737 ret = clk_prepare_enable(drvdata->atclk);
738 if (ret)
739 return ret;
740 }
741 dev_set_drvdata(dev, drvdata);
742
743 /* validity for the resource is already checked by the AMBA core */
744 base = devm_ioremap_resource(dev, res);
745 if (IS_ERR(base))
746 return PTR_ERR(base);
747
748 drvdata->base = base;
749 desc.access = CSDEV_ACCESS_IOMEM(base);
750
751 spin_lock_init(&drvdata->spinlock);
752
753 drvdata->buffer_depth = etb_get_buffer_depth(drvdata);
754
755 if (drvdata->buffer_depth & 0x80000000)
756 return -EINVAL;
757
758 drvdata->buf = devm_kcalloc(dev,
759 drvdata->buffer_depth, 4, GFP_KERNEL);
760 if (!drvdata->buf)
761 return -ENOMEM;
762
763 /* This device is not associated with a session */
764 drvdata->pid = -1;
765
766 pdata = coresight_get_platform_data(dev);
767 if (IS_ERR(pdata))
768 return PTR_ERR(pdata);
769 adev->dev.platform_data = pdata;
770
771 desc.type = CORESIGHT_DEV_TYPE_SINK;
772 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
773 desc.ops = &etb_cs_ops;
774 desc.pdata = pdata;
775 desc.dev = dev;
776 desc.groups = coresight_etb_groups;
777 drvdata->csdev = coresight_register(&desc);
778 if (IS_ERR(drvdata->csdev))
779 return PTR_ERR(drvdata->csdev);
780
781 drvdata->miscdev.name = desc.name;
782 drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
783 drvdata->miscdev.fops = &etb_fops;
784 ret = misc_register(&drvdata->miscdev);
785 if (ret)
786 goto err_misc_register;
787
788 pm_runtime_put(&adev->dev);
789 return 0;
790
791err_misc_register:
792 coresight_unregister(drvdata->csdev);
793 return ret;
794}
795
796static void etb_remove(struct amba_device *adev)
797{
798 struct etb_drvdata *drvdata = dev_get_drvdata(&adev->dev);
799
800 /*
801 * Since misc_open() holds a refcount on the f_ops, which is
802 * etb fops in this case, device is there until last file
803 * handler to this device is closed.
804 */
805 misc_deregister(&drvdata->miscdev);
806 coresight_unregister(drvdata->csdev);
807}
808
809#ifdef CONFIG_PM
810static int etb_runtime_suspend(struct device *dev)
811{
812 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
813
814 if (drvdata && !IS_ERR(drvdata->atclk))
815 clk_disable_unprepare(drvdata->atclk);
816
817 return 0;
818}
819
820static int etb_runtime_resume(struct device *dev)
821{
822 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
823
824 if (drvdata && !IS_ERR(drvdata->atclk))
825 clk_prepare_enable(drvdata->atclk);
826
827 return 0;
828}
829#endif
830
831static const struct dev_pm_ops etb_dev_pm_ops = {
832 SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL)
833};
834
835static const struct amba_id etb_ids[] = {
836 {
837 .id = 0x000bb907,
838 .mask = 0x000fffff,
839 },
840 { 0, 0},
841};
842
843MODULE_DEVICE_TABLE(amba, etb_ids);
844
845static struct amba_driver etb_driver = {
846 .drv = {
847 .name = "coresight-etb10",
848 .owner = THIS_MODULE,
849 .pm = &etb_dev_pm_ops,
850 .suppress_bind_attrs = true,
851
852 },
853 .probe = etb_probe,
854 .remove = etb_remove,
855 .id_table = etb_ids,
856};
857
858module_amba_driver(etb_driver);
859
860MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
861MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
862MODULE_DESCRIPTION("Arm CoreSight Embedded Trace Buffer driver");
863MODULE_LICENSE("GPL v2");