1/* SPDX-License-Identifier: MIT */
 2/*
 3 * Copyright © 2021 Intel Corporation
 4 */
 5
 6#include <drm/drm_modeset_helper.h>
 7
 8#include "i915_drv.h"
 9#include "intel_display_types.h"
10#include "intel_fb_bo.h"
11
12void intel_fb_bo_framebuffer_fini(struct xe_bo *bo)
13{
14	if (bo->flags & XE_BO_CREATE_PINNED_BIT) {
15		/* Unpin our kernel fb first */
16		xe_bo_lock(bo, false);
17		xe_bo_unpin(bo);
18		xe_bo_unlock(bo);
19	}
20	xe_bo_put(bo);
21}
22
23int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
24				 struct xe_bo *bo,
25				 struct drm_mode_fb_cmd2 *mode_cmd)
26{
27	struct drm_i915_private *i915 = to_i915(bo->ttm.base.dev);
28	int ret;
29
30	xe_bo_get(bo);
31
32	ret = ttm_bo_reserve(&bo->ttm, true, false, NULL);
33	if (ret)
34		return ret;
35
36	if (!(bo->flags & XE_BO_SCANOUT_BIT)) {
37		/*
38		 * XE_BO_SCANOUT_BIT should ideally be set at creation, or is
39		 * automatically set when creating FB. We cannot change caching
40		 * mode when the boect is VM_BINDed, so we can only set
41		 * coherency with display when unbound.
42		 */
43		if (XE_IOCTL_DBG(i915, !list_empty(&bo->ttm.base.gpuva.list))) {
44			ttm_bo_unreserve(&bo->ttm);
45			return -EINVAL;
46		}
47		bo->flags |= XE_BO_SCANOUT_BIT;
48	}
49	ttm_bo_unreserve(&bo->ttm);
50
51	return ret;
52}
53
54struct xe_bo *intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
55					  struct drm_file *filp,
56					  const struct drm_mode_fb_cmd2 *mode_cmd)
57{
58	struct drm_i915_gem_object *bo;
59	struct drm_gem_object *gem = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
60
61	if (!gem)
62		return ERR_PTR(-ENOENT);
63
64	bo = gem_to_xe_bo(gem);
65	/* Require vram placement or dma-buf import */
66	if (IS_DGFX(i915) &&
67	    !xe_bo_can_migrate(gem_to_xe_bo(gem), XE_PL_VRAM0) &&
68	    bo->ttm.type != ttm_bo_type_sg) {
69		drm_gem_object_put(gem);
70		return ERR_PTR(-EREMOTE);
71	}
72
73	return bo;
74}