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1/*
2 * Copyright 2019 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef _DMUB_SRV_H_
27#define _DMUB_SRV_H_
28
29/**
30 * DOC: DMUB interface and operation
31 *
32 * DMUB is the interface to the display DMCUB microcontroller on DCN hardware.
33 * It delegates hardware initialization and command submission to the
34 * microcontroller. DMUB is the shortname for DMCUB.
35 *
36 * This interface is not thread-safe. Ensure that all access to the interface
37 * is properly synchronized by the caller.
38 *
39 * Initialization and usage of the DMUB service should be done in the
40 * steps given below:
41 *
42 * 1. dmub_srv_create()
43 * 2. dmub_srv_has_hw_support()
44 * 3. dmub_srv_calc_region_info()
45 * 4. dmub_srv_hw_init()
46 *
47 * The call to dmub_srv_create() is required to use the server.
48 *
49 * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()
50 * are helpers to query cache window size and allocate framebuffer(s)
51 * for the cache windows.
52 *
53 * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare
54 * for command submission. Commands can be queued via dmub_srv_cmd_queue()
55 * and executed via dmub_srv_cmd_execute().
56 *
57 * If the queue is full the dmub_srv_wait_for_idle() call can be used to
58 * wait until the queue has been cleared.
59 *
60 * Destroying the DMUB service can be done by calling dmub_srv_destroy().
61 * This does not clear DMUB hardware state, only software state.
62 *
63 * The interface is intended to be standalone and should not depend on any
64 * other component within DAL.
65 */
66
67#include "inc/dmub_cmd.h"
68#include "dc/dc_types.h"
69
70#if defined(__cplusplus)
71extern "C" {
72#endif
73
74/* Forward declarations */
75struct dmub_srv;
76struct dmub_srv_common_regs;
77struct dmub_srv_dcn31_regs;
78
79struct dmcub_trace_buf_entry;
80
81/* enum dmub_status - return code for dmcub functions */
82enum dmub_status {
83 DMUB_STATUS_OK = 0,
84 DMUB_STATUS_NO_CTX,
85 DMUB_STATUS_QUEUE_FULL,
86 DMUB_STATUS_TIMEOUT,
87 DMUB_STATUS_INVALID,
88 DMUB_STATUS_HW_FAILURE,
89 DMUB_STATUS_POWER_STATE_D3
90};
91
92/* enum dmub_asic - dmub asic identifier */
93enum dmub_asic {
94 DMUB_ASIC_NONE = 0,
95 DMUB_ASIC_DCN20,
96 DMUB_ASIC_DCN21,
97 DMUB_ASIC_DCN30,
98 DMUB_ASIC_DCN301,
99 DMUB_ASIC_DCN302,
100 DMUB_ASIC_DCN303,
101 DMUB_ASIC_DCN31,
102 DMUB_ASIC_DCN31B,
103 DMUB_ASIC_DCN314,
104 DMUB_ASIC_DCN315,
105 DMUB_ASIC_DCN316,
106 DMUB_ASIC_DCN32,
107 DMUB_ASIC_DCN321,
108 DMUB_ASIC_DCN35,
109 DMUB_ASIC_MAX,
110};
111
112/* enum dmub_window_id - dmub window identifier */
113enum dmub_window_id {
114 DMUB_WINDOW_0_INST_CONST = 0,
115 DMUB_WINDOW_1_STACK,
116 DMUB_WINDOW_2_BSS_DATA,
117 DMUB_WINDOW_3_VBIOS,
118 DMUB_WINDOW_4_MAILBOX,
119 DMUB_WINDOW_5_TRACEBUFF,
120 DMUB_WINDOW_6_FW_STATE,
121 DMUB_WINDOW_7_SCRATCH_MEM,
122 DMUB_WINDOW_TOTAL,
123};
124
125/* enum dmub_notification_type - dmub outbox notification identifier */
126enum dmub_notification_type {
127 DMUB_NOTIFICATION_NO_DATA = 0,
128 DMUB_NOTIFICATION_AUX_REPLY,
129 DMUB_NOTIFICATION_HPD,
130 DMUB_NOTIFICATION_HPD_IRQ,
131 DMUB_NOTIFICATION_SET_CONFIG_REPLY,
132 DMUB_NOTIFICATION_DPIA_NOTIFICATION,
133 DMUB_NOTIFICATION_MAX
134};
135
136/**
137 * DPIA NOTIFICATION Response Type
138 */
139enum dpia_notify_bw_alloc_status {
140
141 DPIA_BW_REQ_FAILED = 0,
142 DPIA_BW_REQ_SUCCESS,
143 DPIA_EST_BW_CHANGED,
144 DPIA_BW_ALLOC_CAPS_CHANGED
145};
146
147/* enum dmub_memory_access_type - memory access method */
148enum dmub_memory_access_type {
149 DMUB_MEMORY_ACCESS_DEFAULT,
150 DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
151 DMUB_MEMORY_ACCESS_DMA
152};
153
154/* enum dmub_power_state type - to track DC power state in dmub_srv */
155enum dmub_srv_power_state_type {
156 DMUB_POWER_STATE_UNDEFINED = 0,
157 DMUB_POWER_STATE_D0 = 1,
158 DMUB_POWER_STATE_D3 = 8
159};
160
161/**
162 * struct dmub_region - dmub hw memory region
163 * @base: base address for region, must be 256 byte aligned
164 * @top: top address for region
165 */
166struct dmub_region {
167 uint32_t base;
168 uint32_t top;
169};
170
171/**
172 * struct dmub_window - dmub hw cache window
173 * @off: offset to the fb memory in gpu address space
174 * @r: region in uc address space for cache window
175 */
176struct dmub_window {
177 union dmub_addr offset;
178 struct dmub_region region;
179};
180
181/**
182 * struct dmub_fb - defines a dmub framebuffer memory region
183 * @cpu_addr: cpu virtual address for the region, NULL if invalid
184 * @gpu_addr: gpu virtual address for the region, NULL if invalid
185 * @size: size of the region in bytes, zero if invalid
186 */
187struct dmub_fb {
188 void *cpu_addr;
189 uint64_t gpu_addr;
190 uint32_t size;
191};
192
193/**
194 * struct dmub_srv_region_params - params used for calculating dmub regions
195 * @inst_const_size: size of the fw inst const section
196 * @bss_data_size: size of the fw bss data section
197 * @vbios_size: size of the vbios data
198 * @fw_bss_data: raw firmware bss data section
199 */
200struct dmub_srv_region_params {
201 uint32_t inst_const_size;
202 uint32_t bss_data_size;
203 uint32_t vbios_size;
204 const uint8_t *fw_inst_const;
205 const uint8_t *fw_bss_data;
206 bool is_mailbox_in_inbox;
207};
208
209/**
210 * struct dmub_srv_region_info - output region info from the dmub service
211 * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes
212 * @num_regions: number of regions used by the dmub service
213 * @regions: region info
214 *
215 * The regions are aligned such that they can be all placed within the
216 * same framebuffer but they can also be placed into different framebuffers.
217 *
218 * The size of each region can be calculated by the caller:
219 * size = reg.top - reg.base
220 *
221 * Care must be taken when performing custom allocations to ensure that each
222 * region base address is 256 byte aligned.
223 */
224struct dmub_srv_region_info {
225 uint32_t fb_size;
226 uint32_t inbox_size;
227 uint8_t num_regions;
228 struct dmub_region regions[DMUB_WINDOW_TOTAL];
229};
230
231/**
232 * struct dmub_srv_memory_params - parameters used for driver fb setup
233 * @region_info: region info calculated by dmub service
234 * @cpu_fb_addr: base cpu address for the framebuffer
235 * @cpu_inbox_addr: base cpu address for the gart
236 * @gpu_fb_addr: base gpu virtual address for the framebuffer
237 * @gpu_inbox_addr: base gpu virtual address for the gart
238 */
239struct dmub_srv_memory_params {
240 const struct dmub_srv_region_info *region_info;
241 void *cpu_fb_addr;
242 void *cpu_inbox_addr;
243 uint64_t gpu_fb_addr;
244 uint64_t gpu_inbox_addr;
245};
246
247/**
248 * struct dmub_srv_fb_info - output fb info from the dmub service
249 * @num_fbs: number of required dmub framebuffers
250 * @fbs: fb data for each region
251 *
252 * Output from the dmub service helper that can be used by the
253 * driver to prepare dmub_fb that can be passed into the dmub
254 * hw init service.
255 *
256 * Assumes that all regions are within the same framebuffer
257 * and have been setup according to the region_info generated
258 * by the dmub service.
259 */
260struct dmub_srv_fb_info {
261 uint8_t num_fb;
262 struct dmub_fb fb[DMUB_WINDOW_TOTAL];
263};
264
265/*
266 * struct dmub_srv_hw_params - params for dmub hardware initialization
267 * @fb: framebuffer info for each region
268 * @fb_base: base of the framebuffer aperture
269 * @fb_offset: offset of the framebuffer aperture
270 * @psp_version: psp version to pass for DMCU init
271 * @load_inst_const: true if DMUB should load inst const fw
272 */
273struct dmub_srv_hw_params {
274 struct dmub_fb *fb[DMUB_WINDOW_TOTAL];
275 uint64_t fb_base;
276 uint64_t fb_offset;
277 uint32_t psp_version;
278 bool load_inst_const;
279 bool skip_panel_power_sequence;
280 bool disable_z10;
281 bool power_optimization;
282 bool dpia_supported;
283 bool disable_dpia;
284 bool usb4_cm_version;
285 bool fw_in_system_memory;
286 bool dpia_hpd_int_enable_supported;
287 bool disable_clock_gate;
288 bool disallow_dispclk_dppclk_ds;
289 enum dmub_memory_access_type mem_access_type;
290 enum dmub_ips_disable_type disable_ips;
291};
292
293/**
294 * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for
295 * debugging purposes, including logging, crash analysis, etc.
296 */
297struct dmub_diagnostic_data {
298 uint32_t dmcub_version;
299 uint32_t scratch[17];
300 uint32_t pc;
301 uint32_t undefined_address_fault_addr;
302 uint32_t inst_fetch_fault_addr;
303 uint32_t data_write_fault_addr;
304 uint32_t inbox1_rptr;
305 uint32_t inbox1_wptr;
306 uint32_t inbox1_size;
307 uint32_t inbox0_rptr;
308 uint32_t inbox0_wptr;
309 uint32_t inbox0_size;
310 uint32_t gpint_datain0;
311 uint8_t is_dmcub_enabled : 1;
312 uint8_t is_dmcub_soft_reset : 1;
313 uint8_t is_dmcub_secure_reset : 1;
314 uint8_t is_traceport_en : 1;
315 uint8_t is_cw0_enabled : 1;
316 uint8_t is_cw6_enabled : 1;
317};
318
319/**
320 * struct dmub_srv_base_funcs - Driver specific base callbacks
321 */
322struct dmub_srv_base_funcs {
323 /**
324 * @reg_read:
325 *
326 * Hook for reading a register.
327 *
328 * Return: The 32-bit register value from the given address.
329 */
330 uint32_t (*reg_read)(void *ctx, uint32_t address);
331
332 /**
333 * @reg_write:
334 *
335 * Hook for writing a value to the register specified by address.
336 */
337 void (*reg_write)(void *ctx, uint32_t address, uint32_t value);
338};
339
340/**
341 * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub
342 */
343struct dmub_srv_hw_funcs {
344 /* private: internal use only */
345
346 void (*init)(struct dmub_srv *dmub);
347
348 void (*reset)(struct dmub_srv *dmub);
349
350 void (*reset_release)(struct dmub_srv *dmub);
351
352 void (*backdoor_load)(struct dmub_srv *dmub,
353 const struct dmub_window *cw0,
354 const struct dmub_window *cw1);
355
356 void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
357 const struct dmub_window *cw0,
358 const struct dmub_window *cw1);
359 void (*setup_windows)(struct dmub_srv *dmub,
360 const struct dmub_window *cw2,
361 const struct dmub_window *cw3,
362 const struct dmub_window *cw4,
363 const struct dmub_window *cw5,
364 const struct dmub_window *cw6);
365
366 void (*setup_mailbox)(struct dmub_srv *dmub,
367 const struct dmub_region *inbox1);
368
369 uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
370
371 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
372
373 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
374
375 void (*setup_out_mailbox)(struct dmub_srv *dmub,
376 const struct dmub_region *outbox1);
377
378 uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);
379
380 void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
381
382 void (*setup_outbox0)(struct dmub_srv *dmub,
383 const struct dmub_region *outbox0);
384
385 uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);
386
387 void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
388
389 uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
390
391 void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
392
393 bool (*is_supported)(struct dmub_srv *dmub);
394
395 bool (*is_psrsu_supported)(struct dmub_srv *dmub);
396
397 bool (*is_hw_init)(struct dmub_srv *dmub);
398 bool (*is_hw_powered_up)(struct dmub_srv *dmub);
399
400 void (*enable_dmub_boot_options)(struct dmub_srv *dmub,
401 const struct dmub_srv_hw_params *params);
402
403 void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
404
405 union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
406
407 union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);
408
409 void (*set_gpint)(struct dmub_srv *dmub,
410 union dmub_gpint_data_register reg);
411
412 bool (*is_gpint_acked)(struct dmub_srv *dmub,
413 union dmub_gpint_data_register reg);
414
415 uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
416
417 uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);
418
419 void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);
420 void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);
421 uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);
422 void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
423 uint32_t (*get_current_time)(struct dmub_srv *dmub);
424
425 void (*get_diagnostic_data)(struct dmub_srv *dmub, struct dmub_diagnostic_data *dmub_oca);
426
427 bool (*should_detect)(struct dmub_srv *dmub);
428 void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);
429
430 void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
431};
432
433/**
434 * struct dmub_srv_create_params - params for dmub service creation
435 * @base_funcs: driver supplied base routines
436 * @hw_funcs: optional overrides for hw funcs
437 * @user_ctx: context data for callback funcs
438 * @asic: driver supplied asic
439 * @fw_version: the current firmware version, if any
440 * @is_virtual: false for hw support only
441 */
442struct dmub_srv_create_params {
443 struct dmub_srv_base_funcs funcs;
444 struct dmub_srv_hw_funcs *hw_funcs;
445 void *user_ctx;
446 struct dc_context *dc_ctx;
447 enum dmub_asic asic;
448 uint32_t fw_version;
449 bool is_virtual;
450};
451
452/**
453 * struct dmub_srv - software state for dmcub
454 * @asic: dmub asic identifier
455 * @user_ctx: user provided context for the dmub_srv
456 * @fw_version: the current firmware version, if any
457 * @is_virtual: false if hardware support only
458 * @fw_state: dmub firmware state pointer
459 */
460struct dmub_srv {
461 enum dmub_asic asic;
462 void *user_ctx;
463 uint32_t fw_version;
464 bool is_virtual;
465 struct dmub_fb scratch_mem_fb;
466 volatile const struct dmub_fw_state *fw_state;
467
468 /* private: internal use only */
469 const struct dmub_srv_common_regs *regs;
470 const struct dmub_srv_dcn31_regs *regs_dcn31;
471 struct dmub_srv_dcn32_regs *regs_dcn32;
472 struct dmub_srv_dcn35_regs *regs_dcn35;
473
474 struct dmub_srv_base_funcs funcs;
475 struct dmub_srv_hw_funcs hw_funcs;
476 struct dmub_rb inbox1_rb;
477 uint32_t inbox1_last_wptr;
478 /**
479 * outbox1_rb is accessed without locks (dal & dc)
480 * and to be used only in dmub_srv_stat_get_notification()
481 */
482 struct dmub_rb outbox1_rb;
483
484 struct dmub_rb outbox0_rb;
485
486 bool sw_init;
487 bool hw_init;
488
489 uint64_t fb_base;
490 uint64_t fb_offset;
491 uint32_t psp_version;
492
493 /* Feature capabilities reported by fw */
494 struct dmub_feature_caps feature_caps;
495 struct dmub_visual_confirm_color visual_confirm_color;
496
497 enum dmub_srv_power_state_type power_state;
498};
499
500/**
501 * struct dmub_notification - dmub notification data
502 * @type: dmub notification type
503 * @link_index: link index to identify aux connection
504 * @result: USB4 status returned from dmub
505 * @pending_notification: Indicates there are other pending notifications
506 * @aux_reply: aux reply
507 * @hpd_status: hpd status
508 * @bw_alloc_reply: BW Allocation reply from CM/DPIA
509 */
510struct dmub_notification {
511 enum dmub_notification_type type;
512 uint8_t link_index;
513 uint8_t result;
514 bool pending_notification;
515 union {
516 struct aux_reply_data aux_reply;
517 enum dp_hpd_status hpd_status;
518 enum set_config_status sc_status;
519 /**
520 * DPIA notification command.
521 */
522 struct dmub_rb_cmd_dpia_notification dpia_notification;
523 };
524};
525
526/**
527 * DMUB firmware version helper macro - useful for checking if the version
528 * of a firmware to know if feature or functionality is supported or present.
529 */
530#define DMUB_FW_VERSION(major, minor, revision) \
531 ((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))
532
533/**
534 * dmub_srv_create() - creates the DMUB service.
535 * @dmub: the dmub service
536 * @params: creation parameters for the service
537 *
538 * Return:
539 * DMUB_STATUS_OK - success
540 * DMUB_STATUS_INVALID - unspecified error
541 */
542enum dmub_status dmub_srv_create(struct dmub_srv *dmub,
543 const struct dmub_srv_create_params *params);
544
545/**
546 * dmub_srv_destroy() - destroys the DMUB service.
547 * @dmub: the dmub service
548 */
549void dmub_srv_destroy(struct dmub_srv *dmub);
550
551/**
552 * dmub_srv_calc_region_info() - retreives region info from the dmub service
553 * @dmub: the dmub service
554 * @params: parameters used to calculate region locations
555 * @info_out: the output region info from dmub
556 *
557 * Calculates the base and top address for all relevant dmub regions
558 * using the parameters given (if any).
559 *
560 * Return:
561 * DMUB_STATUS_OK - success
562 * DMUB_STATUS_INVALID - unspecified error
563 */
564enum dmub_status
565dmub_srv_calc_region_info(struct dmub_srv *dmub,
566 const struct dmub_srv_region_params *params,
567 struct dmub_srv_region_info *out);
568
569/**
570 * dmub_srv_calc_region_info() - retreives fb info from the dmub service
571 * @dmub: the dmub service
572 * @params: parameters used to calculate fb locations
573 * @info_out: the output fb info from dmub
574 *
575 * Calculates the base and top address for all relevant dmub regions
576 * using the parameters given (if any).
577 *
578 * Return:
579 * DMUB_STATUS_OK - success
580 * DMUB_STATUS_INVALID - unspecified error
581 */
582enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
583 const struct dmub_srv_memory_params *params,
584 struct dmub_srv_fb_info *out);
585
586/**
587 * dmub_srv_has_hw_support() - returns hw support state for dmcub
588 * @dmub: the dmub service
589 * @is_supported: hw support state
590 *
591 * Queries the hardware for DMCUB support and returns the result.
592 *
593 * Can be called before dmub_srv_hw_init().
594 *
595 * Return:
596 * DMUB_STATUS_OK - success
597 * DMUB_STATUS_INVALID - unspecified error
598 */
599enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,
600 bool *is_supported);
601
602/**
603 * dmub_srv_is_hw_init() - returns hardware init state
604 *
605 * Return:
606 * DMUB_STATUS_OK - success
607 * DMUB_STATUS_INVALID - unspecified error
608 */
609enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);
610
611/**
612 * dmub_srv_hw_init() - initializes the underlying DMUB hardware
613 * @dmub: the dmub service
614 * @params: params for hardware initialization
615 *
616 * Resets the DMUB hardware and performs backdoor loading of the
617 * required cache regions based on the input framebuffer regions.
618 *
619 * Return:
620 * DMUB_STATUS_OK - success
621 * DMUB_STATUS_NO_CTX - dmcub context not initialized
622 * DMUB_STATUS_INVALID - unspecified error
623 */
624enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,
625 const struct dmub_srv_hw_params *params);
626
627/**
628 * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized
629 * @dmub: the dmub service
630 *
631 * Before destroying the DMUB service or releasing the backing framebuffer
632 * memory we'll need to put the DMCUB into reset first.
633 *
634 * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.
635 *
636 * Return:
637 * DMUB_STATUS_OK - success
638 * DMUB_STATUS_INVALID - unspecified error
639 */
640enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);
641
642/**
643 * dmub_srv_sync_inbox1() - sync sw state with hw state
644 * @dmub: the dmub service
645 *
646 * Sync sw state with hw state when resume from S0i3
647 *
648 * Return:
649 * DMUB_STATUS_OK - success
650 * DMUB_STATUS_INVALID - unspecified error
651 */
652enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);
653
654/**
655 * dmub_srv_cmd_queue() - queues a command to the DMUB
656 * @dmub: the dmub service
657 * @cmd: the command to queue
658 *
659 * Queues a command to the DMUB service but does not begin execution
660 * immediately.
661 *
662 * Return:
663 * DMUB_STATUS_OK - success
664 * DMUB_STATUS_QUEUE_FULL - no remaining room in queue
665 * DMUB_STATUS_INVALID - unspecified error
666 */
667enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,
668 const union dmub_rb_cmd *cmd);
669
670/**
671 * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub
672 * @dmub: the dmub service
673 *
674 * Begins execution of queued commands on the dmub.
675 *
676 * Return:
677 * DMUB_STATUS_OK - success
678 * DMUB_STATUS_INVALID - unspecified error
679 */
680enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub);
681
682/**
683 * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed
684 * @dmub: the dmub service
685 * @timeout_us: the maximum number of microseconds to wait
686 *
687 * Waits until firmware hardware is powered up. The maximum
688 * wait time is given in microseconds to prevent spinning forever.
689 *
690 * Return:
691 * DMUB_STATUS_OK - success
692 * DMUB_STATUS_TIMEOUT - timed out
693 * DMUB_STATUS_INVALID - unspecified error
694 */
695enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,
696 uint32_t timeout_us);
697
698bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);
699
700/**
701 * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete
702 * @dmub: the dmub service
703 * @timeout_us: the maximum number of microseconds to wait
704 *
705 * Waits until firmware has been autoloaded by the DMCUB. The maximum
706 * wait time is given in microseconds to prevent spinning forever.
707 *
708 * On ASICs without firmware autoload support this function will return
709 * immediately.
710 *
711 * Return:
712 * DMUB_STATUS_OK - success
713 * DMUB_STATUS_TIMEOUT - wait for phy init timed out
714 * DMUB_STATUS_INVALID - unspecified error
715 */
716enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,
717 uint32_t timeout_us);
718
719/**
720 * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete
721 * @dmub: the dmub service
722 * @timeout_us: the maximum number of microseconds to wait
723 *
724 * Waits until the PHY has been initialized by the DMUB. The maximum
725 * wait time is given in microseconds to prevent spinning forever.
726 *
727 * On ASICs without PHY init support this function will return
728 * immediately.
729 *
730 * Return:
731 * DMUB_STATUS_OK - success
732 * DMUB_STATUS_TIMEOUT - wait for phy init timed out
733 * DMUB_STATUS_INVALID - unspecified error
734 */
735enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
736 uint32_t timeout_us);
737
738/**
739 * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle
740 * @dmub: the dmub service
741 * @timeout_us: the maximum number of microseconds to wait
742 *
743 * Waits until the DMUB buffer is empty and all commands have
744 * finished processing. The maximum wait time is given in
745 * microseconds to prevent spinning forever.
746 *
747 * Return:
748 * DMUB_STATUS_OK - success
749 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
750 * DMUB_STATUS_INVALID - unspecified error
751 */
752enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,
753 uint32_t timeout_us);
754
755/**
756 * dmub_srv_send_gpint_command() - Sends a GPINT based command.
757 * @dmub: the dmub service
758 * @command_code: the command code to send
759 * @param: the command parameter to send
760 * @timeout_us: the maximum number of microseconds to wait
761 *
762 * Sends a command via the general purpose interrupt (GPINT).
763 * Waits for the number of microseconds specified by timeout_us
764 * for the command ACK before returning.
765 *
766 * Can be called after software initialization.
767 *
768 * Return:
769 * DMUB_STATUS_OK - success
770 * DMUB_STATUS_TIMEOUT - wait for ACK timed out
771 * DMUB_STATUS_INVALID - unspecified error
772 */
773enum dmub_status
774dmub_srv_send_gpint_command(struct dmub_srv *dmub,
775 enum dmub_gpint_command command_code,
776 uint16_t param, uint32_t timeout_us);
777
778/**
779 * dmub_srv_get_gpint_response() - Queries the GPINT response.
780 * @dmub: the dmub service
781 * @response: the response for the last GPINT
782 *
783 * Returns the response code for the last GPINT interrupt.
784 *
785 * Can be called after software initialization.
786 *
787 * Return:
788 * DMUB_STATUS_OK - success
789 * DMUB_STATUS_INVALID - unspecified error
790 */
791enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
792 uint32_t *response);
793
794/**
795 * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.
796 * @dmub: the dmub service
797 * @dataout: the data for the GPINT DATAOUT
798 *
799 * Returns the response code for the last GPINT DATAOUT interrupt.
800 *
801 * Can be called after software initialization.
802 *
803 * Return:
804 * DMUB_STATUS_OK - success
805 * DMUB_STATUS_INVALID - unspecified error
806 */
807enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,
808 uint32_t *dataout);
809
810/**
811 * dmub_flush_buffer_mem() - Read back entire frame buffer region.
812 * This ensures that the write from x86 has been flushed and will not
813 * hang the DMCUB.
814 * @fb: frame buffer to flush
815 *
816 * Can be called after software initialization.
817 */
818void dmub_flush_buffer_mem(const struct dmub_fb *fb);
819
820/**
821 * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
822 *
823 * @dmub: the dmub service
824 * @status: out pointer for firmware status
825 *
826 * Return:
827 * DMUB_STATUS_OK - success
828 * DMUB_STATUS_INVALID - unspecified error, unsupported
829 */
830enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
831 union dmub_fw_boot_status *status);
832
833enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,
834 union dmub_fw_boot_options *option);
835
836enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
837 union dmub_rb_cmd *cmd);
838
839enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
840 bool skip);
841
842bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);
843
844bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data);
845
846bool dmub_srv_should_detect(struct dmub_srv *dmub);
847
848/**
849 * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0
850 * @dmub: the dmub service
851 * @data: the data to be sent in the INBOX0 command
852 *
853 * Send command by writing directly to INBOX0 WPTR
854 *
855 * Return:
856 * DMUB_STATUS_OK - success
857 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist
858 */
859enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
860
861/**
862 * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command
863 * @dmub: the dmub service
864 * @timeout_us: the maximum number of microseconds to wait
865 *
866 * Wait for DMUB to ACK the INBOX0 message
867 *
868 * Return:
869 * DMUB_STATUS_OK - success
870 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist
871 * DMUB_STATUS_TIMEOUT - wait for ack timed out
872 */
873enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);
874
875/**
876 * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0
877 * @dmub: the dmub service
878 *
879 * Clear ACK register for INBOX0
880 *
881 * Return:
882 * DMUB_STATUS_OK - success
883 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist
884 */
885enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);
886
887/**
888 * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip
889 * @dmub: The dmub service
890 * @addr: The surface address to be programmed on the current flip
891 * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for
892 *
893 * Function to save the surface flip addr into scratch registers. This is to fix a race condition
894 * between FW and driver reading / writing to the surface address at the same time. This is
895 * required because there is no EARLIEST_IN_USE_META.
896 *
897 * Return:
898 * void
899 */
900void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
901
902/**
903 * dmub_srv_set_power_state() - Track DC power state in dmub_srv
904 * @dmub: The dmub service
905 * @power_state: DC power state setting
906 *
907 * Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB
908 *
909 * Return:
910 * void
911 */
912void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);
913
914#if defined(__cplusplus)
915}
916#endif
917
918#endif /* _DMUB_SRV_H_ */