1#ifndef _ASM_X86_PGTABLE_32_H
 2#define _ASM_X86_PGTABLE_32_H
 3
 4#include <asm/pgtable_32_types.h>
 5
 6/*
 7 * The Linux memory management assumes a three-level page table setup. On
 8 * the i386, we use that, but "fold" the mid level into the top-level page
 9 * table, so that we physically have the same two-level page table as the
10 * i386 mmu expects.
11 *
12 * This file contains the functions and defines necessary to modify and use
13 * the i386 page table tree.
14 */
15#ifndef __ASSEMBLY__
16#include <asm/processor.h>
17#include <asm/fixmap.h>
18#include <linux/threads.h>
19#include <asm/paravirt.h>
20
21#include <linux/bitops.h>
22#include <linux/list.h>
23#include <linux/spinlock.h>
24
25struct mm_struct;
26struct vm_area_struct;
27
28extern pgd_t swapper_pg_dir[1024];
29extern pgd_t initial_page_table[1024];
 
30
31static inline void pgtable_cache_init(void) { }
32static inline void check_pgt_cache(void) { }
33void paging_init(void);
34
35/*
36 * Define this if things work differently on an i386 and an i486:
37 * it will (on an i486) warn about kernel memory accesses that are
38 * done without a 'access_ok(VERIFY_WRITE,..)'
39 */
40#undef TEST_ACCESS_OK
41
42#ifdef CONFIG_X86_PAE
43# include <asm/pgtable-3level.h>
44#else
45# include <asm/pgtable-2level.h>
46#endif
47
48#if defined(CONFIG_HIGHPTE)
49#define pte_offset_map(dir, address)					\
50	((pte_t *)kmap_atomic(pmd_page(*(dir))) +		\
51	 pte_index((address)))
52#define pte_unmap(pte) kunmap_atomic((pte))
53#else
54#define pte_offset_map(dir, address)					\
55	((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
56#define pte_unmap(pte) do { } while (0)
57#endif
58
59/* Clear a kernel PTE and flush it from the TLB */
60#define kpte_clear_flush(ptep, vaddr)		\
61do {						\
62	pte_clear(&init_mm, (vaddr), (ptep));	\
63	__flush_tlb_one((vaddr));		\
64} while (0)
65
66#endif /* !__ASSEMBLY__ */
67
68/*
69 * kern_addr_valid() is (1) for FLATMEM and (0) for
70 * SPARSEMEM and DISCONTIGMEM
 
 
 
 
 
71 */
72#ifdef CONFIG_FLATMEM
73#define kern_addr_valid(addr)	(1)
74#else
75#define kern_addr_valid(kaddr)	(0)
76#endif
 
 
 
 
 
 
 
 
 
 
77
78#endif /* _ASM_X86_PGTABLE_32_H */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _ASM_X86_PGTABLE_32_H
 3#define _ASM_X86_PGTABLE_32_H
 4
 5#include <asm/pgtable_32_types.h>
 6
 7/*
 8 * The Linux memory management assumes a three-level page table setup. On
 9 * the i386, we use that, but "fold" the mid level into the top-level page
10 * table, so that we physically have the same two-level page table as the
11 * i386 mmu expects.
12 *
13 * This file contains the functions and defines necessary to modify and use
14 * the i386 page table tree.
15 */
16#ifndef __ASSEMBLY__
17#include <asm/processor.h>
 
18#include <linux/threads.h>
19#include <asm/paravirt.h>
20
21#include <linux/bitops.h>
22#include <linux/list.h>
23#include <linux/spinlock.h>
24
25struct mm_struct;
26struct vm_area_struct;
27
28extern pgd_t swapper_pg_dir[1024];
29extern pgd_t initial_page_table[1024];
30extern pmd_t initial_pg_pmd[];
31
 
 
32void paging_init(void);
33void sync_initial_page_table(void);
 
 
 
 
 
 
34
35#ifdef CONFIG_X86_PAE
36# include <asm/pgtable-3level.h>
37#else
38# include <asm/pgtable-2level.h>
39#endif
40
 
 
 
 
 
 
 
 
 
 
 
41/* Clear a kernel PTE and flush it from the TLB */
42#define kpte_clear_flush(ptep, vaddr)		\
43do {						\
44	pte_clear(&init_mm, (vaddr), (ptep));	\
45	flush_tlb_one_kernel((vaddr));		\
46} while (0)
47
48#endif /* !__ASSEMBLY__ */
49
50/*
51 * This is used to calculate the .brk reservation for initial pagetables.
52 * Enough space is reserved to allocate pagetables sufficient to cover all
53 * of LOWMEM_PAGES, which is an upper bound on the size of the direct map of
54 * lowmem.
55 *
56 * With PAE paging (PTRS_PER_PMD > 1), we allocate PTRS_PER_PGD == 4 pages for
57 * the PMD's in addition to the pages required for the last level pagetables.
58 */
59#if PTRS_PER_PMD > 1
60#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
61#else
62#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
63#endif
64
65/*
66 * Number of possible pages in the lowmem region.
67 *
68 * We shift 2 by 31 instead of 1 by 32 to the left in order to avoid a
69 * gas warning about overflowing shift count when gas has been compiled
70 * with only a host target support using a 32-bit type for internal
71 * representation.
72 */
73#define LOWMEM_PAGES ((((_ULL(2)<<31) - __PAGE_OFFSET) >> PAGE_SHIFT))
74
75#endif /* _ASM_X86_PGTABLE_32_H */