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1#ifndef _ASM_X86_CPUFEATURE_H
2#define _ASM_X86_CPUFEATURE_H
3
4#include <asm/processor.h>
5
6#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
7
8#include <asm/asm.h>
9#include <linux/bitops.h>
10
11enum cpuid_leafs
12{
13 CPUID_1_EDX = 0,
14 CPUID_8000_0001_EDX,
15 CPUID_8086_0001_EDX,
16 CPUID_LNX_1,
17 CPUID_1_ECX,
18 CPUID_C000_0001_EDX,
19 CPUID_8000_0001_ECX,
20 CPUID_LNX_2,
21 CPUID_LNX_3,
22 CPUID_7_0_EBX,
23 CPUID_D_1_EAX,
24 CPUID_F_0_EDX,
25 CPUID_F_1_EDX,
26 CPUID_8000_0008_EBX,
27 CPUID_6_EAX,
28 CPUID_8000_000A_EDX,
29 CPUID_7_ECX,
30};
31
32#ifdef CONFIG_X86_FEATURE_NAMES
33extern const char * const x86_cap_flags[NCAPINTS*32];
34extern const char * const x86_power_flags[32];
35#define X86_CAP_FMT "%s"
36#define x86_cap_flag(flag) x86_cap_flags[flag]
37#else
38#define X86_CAP_FMT "%d:%d"
39#define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
40#endif
41
42/*
43 * In order to save room, we index into this array by doing
44 * X86_BUG_<name> - NCAPINTS*32.
45 */
46extern const char * const x86_bug_flags[NBUGINTS*32];
47
48#define test_cpu_cap(c, bit) \
49 test_bit(bit, (unsigned long *)((c)->x86_capability))
50
51#define REQUIRED_MASK_BIT_SET(bit) \
52 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0 )) || \
53 (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1 )) || \
54 (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2 )) || \
55 (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3 )) || \
56 (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4 )) || \
57 (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5 )) || \
58 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6 )) || \
59 (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7 )) || \
60 (((bit)>>5)==8 && (1UL<<((bit)&31) & REQUIRED_MASK8 )) || \
61 (((bit)>>5)==9 && (1UL<<((bit)&31) & REQUIRED_MASK9 )) || \
62 (((bit)>>5)==10 && (1UL<<((bit)&31) & REQUIRED_MASK10)) || \
63 (((bit)>>5)==11 && (1UL<<((bit)&31) & REQUIRED_MASK11)) || \
64 (((bit)>>5)==12 && (1UL<<((bit)&31) & REQUIRED_MASK12)) || \
65 (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) || \
66 (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK14)) || \
67 (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK15)) || \
68 (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK16)) )
69
70#define DISABLED_MASK_BIT_SET(bit) \
71 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & DISABLED_MASK0 )) || \
72 (((bit)>>5)==1 && (1UL<<((bit)&31) & DISABLED_MASK1 )) || \
73 (((bit)>>5)==2 && (1UL<<((bit)&31) & DISABLED_MASK2 )) || \
74 (((bit)>>5)==3 && (1UL<<((bit)&31) & DISABLED_MASK3 )) || \
75 (((bit)>>5)==4 && (1UL<<((bit)&31) & DISABLED_MASK4 )) || \
76 (((bit)>>5)==5 && (1UL<<((bit)&31) & DISABLED_MASK5 )) || \
77 (((bit)>>5)==6 && (1UL<<((bit)&31) & DISABLED_MASK6 )) || \
78 (((bit)>>5)==7 && (1UL<<((bit)&31) & DISABLED_MASK7 )) || \
79 (((bit)>>5)==8 && (1UL<<((bit)&31) & DISABLED_MASK8 )) || \
80 (((bit)>>5)==9 && (1UL<<((bit)&31) & DISABLED_MASK9 )) || \
81 (((bit)>>5)==10 && (1UL<<((bit)&31) & DISABLED_MASK10)) || \
82 (((bit)>>5)==11 && (1UL<<((bit)&31) & DISABLED_MASK11)) || \
83 (((bit)>>5)==12 && (1UL<<((bit)&31) & DISABLED_MASK12)) || \
84 (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) || \
85 (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK14)) || \
86 (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK15)) || \
87 (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK16)) )
88
89#define cpu_has(c, bit) \
90 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
91 test_cpu_cap(c, bit))
92
93#define this_cpu_has(bit) \
94 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
95 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
96
97/*
98 * This macro is for detection of features which need kernel
99 * infrastructure to be used. It may *not* directly test the CPU
100 * itself. Use the cpu_has() family if you want true runtime
101 * testing of CPU features, like in hypervisor code where you are
102 * supporting a possible guest feature where host support for it
103 * is not relevant.
104 */
105#define cpu_feature_enabled(bit) \
106 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
107
108#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
109
110#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
111#define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability))
112#define setup_clear_cpu_cap(bit) do { \
113 clear_cpu_cap(&boot_cpu_data, bit); \
114 set_bit(bit, (unsigned long *)cpu_caps_cleared); \
115} while (0)
116#define setup_force_cpu_cap(bit) do { \
117 set_cpu_cap(&boot_cpu_data, bit); \
118 set_bit(bit, (unsigned long *)cpu_caps_set); \
119} while (0)
120
121#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
122#define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE)
123#define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
124#define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
125#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
126#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
127#define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
128#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
129#define cpu_has_aes boot_cpu_has(X86_FEATURE_AES)
130#define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX)
131#define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
132#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH)
133#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
134#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
135#define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
136#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
137#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
138#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
139#define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE)
140#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
141/*
142 * Do not add any more of those clumsy macros - use static_cpu_has() for
143 * fast paths and boot_cpu_has() otherwise!
144 */
145
146#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
147/*
148 * Static testing of CPU features. Used the same as boot_cpu_has().
149 * These will statically patch the target code for additional
150 * performance.
151 */
152static __always_inline __pure bool _static_cpu_has(u16 bit)
153{
154 asm_volatile_goto("1: jmp 6f\n"
155 "2:\n"
156 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
157 "((5f-4f) - (2b-1b)),0x90\n"
158 "3:\n"
159 ".section .altinstructions,\"a\"\n"
160 " .long 1b - .\n" /* src offset */
161 " .long 4f - .\n" /* repl offset */
162 " .word %P1\n" /* always replace */
163 " .byte 3b - 1b\n" /* src len */
164 " .byte 5f - 4f\n" /* repl len */
165 " .byte 3b - 2b\n" /* pad len */
166 ".previous\n"
167 ".section .altinstr_replacement,\"ax\"\n"
168 "4: jmp %l[t_no]\n"
169 "5:\n"
170 ".previous\n"
171 ".section .altinstructions,\"a\"\n"
172 " .long 1b - .\n" /* src offset */
173 " .long 0\n" /* no replacement */
174 " .word %P0\n" /* feature bit */
175 " .byte 3b - 1b\n" /* src len */
176 " .byte 0\n" /* repl len */
177 " .byte 0\n" /* pad len */
178 ".previous\n"
179 ".section .altinstr_aux,\"ax\"\n"
180 "6:\n"
181 " testb %[bitnum],%[cap_byte]\n"
182 " jnz %l[t_yes]\n"
183 " jmp %l[t_no]\n"
184 ".previous\n"
185 : : "i" (bit), "i" (X86_FEATURE_ALWAYS),
186 [bitnum] "i" (1 << (bit & 7)),
187 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
188 : : t_yes, t_no);
189 t_yes:
190 return true;
191 t_no:
192 return false;
193}
194
195#define static_cpu_has(bit) \
196( \
197 __builtin_constant_p(boot_cpu_has(bit)) ? \
198 boot_cpu_has(bit) : \
199 _static_cpu_has(bit) \
200)
201#else
202/*
203 * Fall back to dynamic for gcc versions which don't support asm goto. Should be
204 * a minority now anyway.
205 */
206#define static_cpu_has(bit) boot_cpu_has(bit)
207#endif
208
209#define cpu_has_bug(c, bit) cpu_has(c, (bit))
210#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
211#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
212
213#define static_cpu_has_bug(bit) static_cpu_has((bit))
214#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
215
216#define MAX_CPU_FEATURES (NCAPINTS * 32)
217#define cpu_have_feature boot_cpu_has
218
219#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
220#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
221 boot_cpu_data.x86_model
222
223#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
224#endif /* _ASM_X86_CPUFEATURE_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_CPUFEATURE_H
3#define _ASM_X86_CPUFEATURE_H
4
5#include <asm/processor.h>
6
7#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
8
9#include <asm/asm.h>
10#include <linux/bitops.h>
11#include <asm/alternative.h>
12
13enum cpuid_leafs
14{
15 CPUID_1_EDX = 0,
16 CPUID_8000_0001_EDX,
17 CPUID_8086_0001_EDX,
18 CPUID_LNX_1,
19 CPUID_1_ECX,
20 CPUID_C000_0001_EDX,
21 CPUID_8000_0001_ECX,
22 CPUID_LNX_2,
23 CPUID_LNX_3,
24 CPUID_7_0_EBX,
25 CPUID_D_1_EAX,
26 CPUID_LNX_4,
27 CPUID_7_1_EAX,
28 CPUID_8000_0008_EBX,
29 CPUID_6_EAX,
30 CPUID_8000_000A_EDX,
31 CPUID_7_ECX,
32 CPUID_8000_0007_EBX,
33 CPUID_7_EDX,
34 CPUID_8000_001F_EAX,
35 CPUID_8000_0021_EAX,
36};
37
38#define X86_CAP_FMT_NUM "%d:%d"
39#define x86_cap_flag_num(flag) ((flag) >> 5), ((flag) & 31)
40
41extern const char * const x86_cap_flags[NCAPINTS*32];
42extern const char * const x86_power_flags[32];
43#define X86_CAP_FMT "%s"
44#define x86_cap_flag(flag) x86_cap_flags[flag]
45
46/*
47 * In order to save room, we index into this array by doing
48 * X86_BUG_<name> - NCAPINTS*32.
49 */
50extern const char * const x86_bug_flags[NBUGINTS*32];
51
52#define test_cpu_cap(c, bit) \
53 arch_test_bit(bit, (unsigned long *)((c)->x86_capability))
54
55/*
56 * There are 32 bits/features in each mask word. The high bits
57 * (selected with (bit>>5) give us the word number and the low 5
58 * bits give us the bit/feature number inside the word.
59 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
60 * see if it is set in the mask word.
61 */
62#define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
63 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
64
65/*
66 * {REQUIRED,DISABLED}_MASK_CHECK below may seem duplicated with the
67 * following BUILD_BUG_ON_ZERO() check but when NCAPINTS gets changed, all
68 * header macros which use NCAPINTS need to be changed. The duplicated macro
69 * use causes the compiler to issue errors for all headers so that all usage
70 * sites can be corrected.
71 */
72#define REQUIRED_MASK_BIT_SET(feature_bit) \
73 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
74 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
75 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
84 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
85 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
86 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
87 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
88 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
89 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
90 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
91 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
92 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \
93 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \
94 REQUIRED_MASK_CHECK || \
95 BUILD_BUG_ON_ZERO(NCAPINTS != 21))
96
97#define DISABLED_MASK_BIT_SET(feature_bit) \
98 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
99 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
100 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
101 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
106 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
107 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
108 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
109 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
110 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
111 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
112 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
113 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
114 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
115 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
116 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
117 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \
118 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \
119 DISABLED_MASK_CHECK || \
120 BUILD_BUG_ON_ZERO(NCAPINTS != 21))
121
122#define cpu_has(c, bit) \
123 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
124 test_cpu_cap(c, bit))
125
126#define this_cpu_has(bit) \
127 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
128 x86_this_cpu_test_bit(bit, \
129 (unsigned long __percpu *)&cpu_info.x86_capability))
130
131/*
132 * This macro is for detection of features which need kernel
133 * infrastructure to be used. It may *not* directly test the CPU
134 * itself. Use the cpu_has() family if you want true runtime
135 * testing of CPU features, like in hypervisor code where you are
136 * supporting a possible guest feature where host support for it
137 * is not relevant.
138 */
139#define cpu_feature_enabled(bit) \
140 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
141
142#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
143
144#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
145
146extern void setup_clear_cpu_cap(unsigned int bit);
147extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
148
149#define setup_force_cpu_cap(bit) do { \
150 set_cpu_cap(&boot_cpu_data, bit); \
151 set_bit(bit, (unsigned long *)cpu_caps_set); \
152} while (0)
153
154#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
155
156/*
157 * Static testing of CPU features. Used the same as boot_cpu_has(). It
158 * statically patches the target code for additional performance. Use
159 * static_cpu_has() only in fast paths, where every cycle counts. Which
160 * means that the boot_cpu_has() variant is already fast enough for the
161 * majority of cases and you should stick to using it as it is generally
162 * only two instructions: a RIP-relative MOV and a TEST.
163 *
164 * Do not use an "m" constraint for [cap_byte] here: gcc doesn't know
165 * that this is only used on a fallback path and will sometimes cause
166 * it to manifest the address of boot_cpu_data in a register, fouling
167 * the mainline (post-initialization) code.
168 */
169static __always_inline bool _static_cpu_has(u16 bit)
170{
171 asm goto(
172 ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]")
173 ".pushsection .altinstr_aux,\"ax\"\n"
174 "6:\n"
175 " testb %[bitnum]," _ASM_RIP(%P[cap_byte]) "\n"
176 " jnz %l[t_yes]\n"
177 " jmp %l[t_no]\n"
178 ".popsection\n"
179 : : [feature] "i" (bit),
180 [bitnum] "i" (1 << (bit & 7)),
181 [cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3])
182 : : t_yes, t_no);
183t_yes:
184 return true;
185t_no:
186 return false;
187}
188
189#define static_cpu_has(bit) \
190( \
191 __builtin_constant_p(boot_cpu_has(bit)) ? \
192 boot_cpu_has(bit) : \
193 _static_cpu_has(bit) \
194)
195
196#define cpu_has_bug(c, bit) cpu_has(c, (bit))
197#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
198#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
199
200#define static_cpu_has_bug(bit) static_cpu_has((bit))
201#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
202#define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
203
204#define MAX_CPU_FEATURES (NCAPINTS * 32)
205#define cpu_have_feature boot_cpu_has
206
207#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
208#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
209 boot_cpu_data.x86_model
210
211#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
212#endif /* _ASM_X86_CPUFEATURE_H */