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1/*
2 * Device driver for the via ADB on (many) Mac II-class machines
3 *
4 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
5 * Also derived from code Copyright (C) 1996 Paul Mackerras.
6 *
7 * With various updates provided over the years by Michael Schmitz,
8 * Guideo Koerber and others.
9 *
10 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
11 *
12 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
13 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
14 * - Big overhaul, should actually work now.
15 * 2006-12-31 Finn Thain <fthain@telegraphics.com.au> - Another overhaul.
16 *
17 * Suggested reading:
18 * Inside Macintosh, ch. 5 ADB Manager
19 * Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
20 * Rockwell R6522 VIA datasheet
21 *
22 * Apple's "ADB Analyzer" bus sniffer is invaluable:
23 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
24 */
25
26#include <stdarg.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/kernel.h>
30#include <linux/delay.h>
31#include <linux/adb.h>
32#include <linux/interrupt.h>
33#include <linux/init.h>
34#include <asm/macintosh.h>
35#include <asm/macints.h>
36#include <asm/mac_via.h>
37
38static volatile unsigned char *via;
39
40/* VIA registers - spaced 0x200 bytes apart */
41#define RS 0x200 /* skip between registers */
42#define B 0 /* B-side data */
43#define A RS /* A-side data */
44#define DIRB (2*RS) /* B-side direction (1=output) */
45#define DIRA (3*RS) /* A-side direction (1=output) */
46#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
47#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
48#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
49#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
50#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
51#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
52#define SR (10*RS) /* Shift register */
53#define ACR (11*RS) /* Auxiliary control register */
54#define PCR (12*RS) /* Peripheral control register */
55#define IFR (13*RS) /* Interrupt flag register */
56#define IER (14*RS) /* Interrupt enable register */
57#define ANH (15*RS) /* A-side data, no handshake */
58
59/* Bits in B data register: all active low */
60#define CTLR_IRQ 0x08 /* Controller rcv status (input) */
61#define ST_MASK 0x30 /* mask for selecting ADB state bits */
62
63/* Bits in ACR */
64#define SR_CTRL 0x1c /* Shift register control bits */
65#define SR_EXT 0x0c /* Shift on external clock */
66#define SR_OUT 0x10 /* Shift out if 1 */
67
68/* Bits in IFR and IER */
69#define IER_SET 0x80 /* set bits in IER */
70#define IER_CLR 0 /* clear bits in IER */
71#define SR_INT 0x04 /* Shift register full/empty */
72
73/* ADB transaction states according to GMHW */
74#define ST_CMD 0x00 /* ADB state: command byte */
75#define ST_EVEN 0x10 /* ADB state: even data byte */
76#define ST_ODD 0x20 /* ADB state: odd data byte */
77#define ST_IDLE 0x30 /* ADB state: idle, nothing to send */
78
79static int macii_init_via(void);
80static void macii_start(void);
81static irqreturn_t macii_interrupt(int irq, void *arg);
82static void macii_queue_poll(void);
83
84static int macii_probe(void);
85static int macii_init(void);
86static int macii_send_request(struct adb_request *req, int sync);
87static int macii_write(struct adb_request *req);
88static int macii_autopoll(int devs);
89static void macii_poll(void);
90static int macii_reset_bus(void);
91
92struct adb_driver via_macii_driver = {
93 "Mac II",
94 macii_probe,
95 macii_init,
96 macii_send_request,
97 macii_autopoll,
98 macii_poll,
99 macii_reset_bus
100};
101
102static enum macii_state {
103 idle,
104 sending,
105 reading,
106 read_done,
107} macii_state;
108
109static struct adb_request *current_req; /* first request struct in the queue */
110static struct adb_request *last_req; /* last request struct in the queue */
111static unsigned char reply_buf[16]; /* storage for autopolled replies */
112static unsigned char *reply_ptr; /* next byte in reply_buf or req->reply */
113static int reading_reply; /* store reply in reply_buf else req->reply */
114static int data_index; /* index of the next byte to send from req->data */
115static int reply_len; /* number of bytes received in reply_buf or req->reply */
116static int status; /* VIA's ADB status bits captured upon interrupt */
117static int last_status; /* status bits as at previous interrupt */
118static int srq_asserted; /* have to poll for the device that asserted it */
119static int command_byte; /* the most recent command byte transmitted */
120static int autopoll_devs; /* bits set are device addresses to be polled */
121
122/* Sanity check for request queue. Doesn't check for cycles. */
123static int request_is_queued(struct adb_request *req) {
124 struct adb_request *cur;
125 unsigned long flags;
126 local_irq_save(flags);
127 cur = current_req;
128 while (cur) {
129 if (cur == req) {
130 local_irq_restore(flags);
131 return 1;
132 }
133 cur = cur->next;
134 }
135 local_irq_restore(flags);
136 return 0;
137}
138
139/* Check for MacII style ADB */
140static int macii_probe(void)
141{
142 if (macintosh_config->adb_type != MAC_ADB_II) return -ENODEV;
143
144 via = via1;
145
146 printk("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
147 return 0;
148}
149
150/* Initialize the driver */
151int macii_init(void)
152{
153 unsigned long flags;
154 int err;
155
156 local_irq_save(flags);
157
158 err = macii_init_via();
159 if (err) goto out;
160
161 err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
162 macii_interrupt);
163 if (err) goto out;
164
165 macii_state = idle;
166out:
167 local_irq_restore(flags);
168 return err;
169}
170
171/* initialize the hardware */
172static int macii_init_via(void)
173{
174 unsigned char x;
175
176 /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
177 via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
178
179 /* Set up state: idle */
180 via[B] |= ST_IDLE;
181 last_status = via[B] & (ST_MASK|CTLR_IRQ);
182
183 /* Shift register on input */
184 via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
185
186 /* Wipe any pending data and int */
187 x = via[SR];
188
189 return 0;
190}
191
192/* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
193static void macii_queue_poll(void)
194{
195 /* No point polling the active device as it will never assert SRQ, so
196 * poll the next device in the autopoll list. This could leave us
197 * stuck in a polling loop if an unprobed device is asserting SRQ.
198 * In theory, that could only happen if a device was plugged in after
199 * probing started. Unplugging it again will break the cycle.
200 * (Simply polling the next higher device often ends up polling almost
201 * every device (after wrapping around), which takes too long.)
202 */
203 int device_mask;
204 int next_device;
205 static struct adb_request req;
206
207 if (!autopoll_devs) return;
208
209 device_mask = (1 << (((command_byte & 0xF0) >> 4) + 1)) - 1;
210 if (autopoll_devs & ~device_mask)
211 next_device = ffs(autopoll_devs & ~device_mask) - 1;
212 else
213 next_device = ffs(autopoll_devs) - 1;
214
215 BUG_ON(request_is_queued(&req));
216
217 adb_request(&req, NULL, ADBREQ_NOSEND, 1,
218 ADB_READREG(next_device, 0));
219
220 req.sent = 0;
221 req.complete = 0;
222 req.reply_len = 0;
223 req.next = current_req;
224
225 if (current_req != NULL) {
226 current_req = &req;
227 } else {
228 current_req = &req;
229 last_req = &req;
230 }
231}
232
233/* Send an ADB request; if sync, poll out the reply 'till it's done */
234static int macii_send_request(struct adb_request *req, int sync)
235{
236 int err;
237 unsigned long flags;
238
239 BUG_ON(request_is_queued(req));
240
241 local_irq_save(flags);
242 err = macii_write(req);
243 local_irq_restore(flags);
244
245 if (!err && sync) {
246 while (!req->complete) {
247 macii_poll();
248 }
249 BUG_ON(request_is_queued(req));
250 }
251
252 return err;
253}
254
255/* Send an ADB request (append to request queue) */
256static int macii_write(struct adb_request *req)
257{
258 if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
259 req->complete = 1;
260 return -EINVAL;
261 }
262
263 req->next = NULL;
264 req->sent = 0;
265 req->complete = 0;
266 req->reply_len = 0;
267
268 if (current_req != NULL) {
269 last_req->next = req;
270 last_req = req;
271 } else {
272 current_req = req;
273 last_req = req;
274 if (macii_state == idle) macii_start();
275 }
276 return 0;
277}
278
279/* Start auto-polling */
280static int macii_autopoll(int devs)
281{
282 static struct adb_request req;
283 unsigned long flags;
284 int err = 0;
285
286 /* bit 1 == device 1, and so on. */
287 autopoll_devs = devs & 0xFFFE;
288
289 if (!autopoll_devs) return 0;
290
291 local_irq_save(flags);
292
293 if (current_req == NULL) {
294 /* Send a Talk Reg 0. The controller will repeatedly transmit
295 * this as long as it is idle.
296 */
297 adb_request(&req, NULL, ADBREQ_NOSEND, 1,
298 ADB_READREG(ffs(autopoll_devs) - 1, 0));
299 err = macii_write(&req);
300 }
301
302 local_irq_restore(flags);
303 return err;
304}
305
306static inline int need_autopoll(void) {
307 /* Was the last command Talk Reg 0
308 * and is the target on the autopoll list?
309 */
310 if ((command_byte & 0x0F) == 0x0C &&
311 ((1 << ((command_byte & 0xF0) >> 4)) & autopoll_devs))
312 return 0;
313 return 1;
314}
315
316/* Prod the chip without interrupts */
317static void macii_poll(void)
318{
319 disable_irq(IRQ_MAC_ADB);
320 macii_interrupt(0, NULL);
321 enable_irq(IRQ_MAC_ADB);
322}
323
324/* Reset the bus */
325static int macii_reset_bus(void)
326{
327 static struct adb_request req;
328
329 if (request_is_queued(&req))
330 return 0;
331
332 /* Command = 0, Address = ignored */
333 adb_request(&req, NULL, 0, 1, ADB_BUSRESET);
334
335 /* Don't want any more requests during the Global Reset low time. */
336 udelay(3000);
337
338 return 0;
339}
340
341/* Start sending ADB packet */
342static void macii_start(void)
343{
344 struct adb_request *req;
345
346 req = current_req;
347
348 BUG_ON(req == NULL);
349
350 BUG_ON(macii_state != idle);
351
352 /* Now send it. Be careful though, that first byte of the request
353 * is actually ADB_PACKET; the real data begins at index 1!
354 * And req->nbytes is the number of bytes of real data plus one.
355 */
356
357 /* store command byte */
358 command_byte = req->data[1];
359 /* Output mode */
360 via[ACR] |= SR_OUT;
361 /* Load data */
362 via[SR] = req->data[1];
363 /* set ADB state to 'command' */
364 via[B] = (via[B] & ~ST_MASK) | ST_CMD;
365
366 macii_state = sending;
367 data_index = 2;
368}
369
370/*
371 * The notorious ADB interrupt handler - does all of the protocol handling.
372 * Relies on the ADB controller sending and receiving data, thereby
373 * generating shift register interrupts (SR_INT) for us. This means there has
374 * to be activity on the ADB bus. The chip will poll to achieve this.
375 *
376 * The basic ADB state machine was left unchanged from the original MacII code
377 * by Alan Cox, which was based on the CUDA driver for PowerMac.
378 * The syntax of the ADB status lines is totally different on MacII,
379 * though. MacII uses the states Command -> Even -> Odd -> Even ->...-> Idle
380 * for sending and Idle -> Even -> Odd -> Even ->...-> Idle for receiving.
381 * Start and end of a receive packet are signalled by asserting /IRQ on the
382 * interrupt line (/IRQ means the CTLR_IRQ bit in port B; not to be confused
383 * with the VIA shift register interrupt. /IRQ never actually interrupts the
384 * processor, it's just an ordinary input.)
385 */
386static irqreturn_t macii_interrupt(int irq, void *arg)
387{
388 int x;
389 static int entered;
390 struct adb_request *req;
391
392 if (!arg) {
393 /* Clear the SR IRQ flag when polling. */
394 if (via[IFR] & SR_INT)
395 via[IFR] = SR_INT;
396 else
397 return IRQ_NONE;
398 }
399
400 BUG_ON(entered++);
401
402 last_status = status;
403 status = via[B] & (ST_MASK|CTLR_IRQ);
404
405 switch (macii_state) {
406 case idle:
407 if (reading_reply) {
408 reply_ptr = current_req->reply;
409 } else {
410 BUG_ON(current_req != NULL);
411 reply_ptr = reply_buf;
412 }
413
414 x = via[SR];
415
416 if ((status & CTLR_IRQ) && (x == 0xFF)) {
417 /* Bus timeout without SRQ sequence:
418 * data is "FF" while CTLR_IRQ is "H"
419 */
420 reply_len = 0;
421 srq_asserted = 0;
422 macii_state = read_done;
423 } else {
424 macii_state = reading;
425 *reply_ptr = x;
426 reply_len = 1;
427 }
428
429 /* set ADB state = even for first data byte */
430 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
431 break;
432
433 case sending:
434 req = current_req;
435 if (data_index >= req->nbytes) {
436 req->sent = 1;
437 macii_state = idle;
438
439 if (req->reply_expected) {
440 reading_reply = 1;
441 } else {
442 req->complete = 1;
443 current_req = req->next;
444 if (req->done) (*req->done)(req);
445
446 if (current_req)
447 macii_start();
448 else
449 if (need_autopoll())
450 macii_autopoll(autopoll_devs);
451 }
452
453 if (macii_state == idle) {
454 /* reset to shift in */
455 via[ACR] &= ~SR_OUT;
456 x = via[SR];
457 /* set ADB state idle - might get SRQ */
458 via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
459 }
460 } else {
461 via[SR] = req->data[data_index++];
462
463 if ( (via[B] & ST_MASK) == ST_CMD ) {
464 /* just sent the command byte, set to EVEN */
465 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
466 } else {
467 /* invert state bits, toggle ODD/EVEN */
468 via[B] ^= ST_MASK;
469 }
470 }
471 break;
472
473 case reading:
474 x = via[SR];
475 BUG_ON((status & ST_MASK) == ST_CMD ||
476 (status & ST_MASK) == ST_IDLE);
477
478 /* Bus timeout with SRQ sequence:
479 * data is "XX FF" while CTLR_IRQ is "L L"
480 * End of packet without SRQ sequence:
481 * data is "XX...YY 00" while CTLR_IRQ is "L...H L"
482 * End of packet SRQ sequence:
483 * data is "XX...YY 00" while CTLR_IRQ is "L...L L"
484 * (where XX is the first response byte and
485 * YY is the last byte of valid response data.)
486 */
487
488 srq_asserted = 0;
489 if (!(status & CTLR_IRQ)) {
490 if (x == 0xFF) {
491 if (!(last_status & CTLR_IRQ)) {
492 macii_state = read_done;
493 reply_len = 0;
494 srq_asserted = 1;
495 }
496 } else if (x == 0x00) {
497 macii_state = read_done;
498 if (!(last_status & CTLR_IRQ))
499 srq_asserted = 1;
500 }
501 }
502
503 if (macii_state == reading) {
504 BUG_ON(reply_len > 15);
505 reply_ptr++;
506 *reply_ptr = x;
507 reply_len++;
508 }
509
510 /* invert state bits, toggle ODD/EVEN */
511 via[B] ^= ST_MASK;
512 break;
513
514 case read_done:
515 x = via[SR];
516
517 if (reading_reply) {
518 reading_reply = 0;
519 req = current_req;
520 req->reply_len = reply_len;
521 req->complete = 1;
522 current_req = req->next;
523 if (req->done) (*req->done)(req);
524 } else if (reply_len && autopoll_devs)
525 adb_input(reply_buf, reply_len, 0);
526
527 macii_state = idle;
528
529 /* SRQ seen before, initiate poll now */
530 if (srq_asserted)
531 macii_queue_poll();
532
533 if (current_req)
534 macii_start();
535 else
536 if (need_autopoll())
537 macii_autopoll(autopoll_devs);
538
539 if (macii_state == idle)
540 via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
541 break;
542
543 default:
544 break;
545 }
546
547 entered--;
548 return IRQ_HANDLED;
549}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device driver for the via ADB on (many) Mac II-class machines
4 *
5 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
6 * Also derived from code Copyright (C) 1996 Paul Mackerras.
7 *
8 * With various updates provided over the years by Michael Schmitz,
9 * Guideo Koerber and others.
10 *
11 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
12 *
13 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
14 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
15 * - Big overhaul, should actually work now.
16 * 2006-12-31 Finn Thain - Another overhaul.
17 *
18 * Suggested reading:
19 * Inside Macintosh, ch. 5 ADB Manager
20 * Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
21 * Rockwell R6522 VIA datasheet
22 *
23 * Apple's "ADB Analyzer" bus sniffer is invaluable:
24 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
25 */
26#include <linux/types.h>
27#include <linux/errno.h>
28#include <linux/kernel.h>
29#include <linux/delay.h>
30#include <linux/adb.h>
31#include <linux/interrupt.h>
32#include <linux/init.h>
33#include <asm/macintosh.h>
34#include <asm/macints.h>
35#include <asm/mac_via.h>
36
37static volatile unsigned char *via;
38
39/* VIA registers - spaced 0x200 bytes apart */
40#define RS 0x200 /* skip between registers */
41#define B 0 /* B-side data */
42#define A RS /* A-side data */
43#define DIRB (2*RS) /* B-side direction (1=output) */
44#define DIRA (3*RS) /* A-side direction (1=output) */
45#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
46#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
47#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
48#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
49#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
50#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
51#define SR (10*RS) /* Shift register */
52#define ACR (11*RS) /* Auxiliary control register */
53#define PCR (12*RS) /* Peripheral control register */
54#define IFR (13*RS) /* Interrupt flag register */
55#define IER (14*RS) /* Interrupt enable register */
56#define ANH (15*RS) /* A-side data, no handshake */
57
58/* Bits in B data register: all active low */
59#define CTLR_IRQ 0x08 /* Controller rcv status (input) */
60#define ST_MASK 0x30 /* mask for selecting ADB state bits */
61
62/* Bits in ACR */
63#define SR_CTRL 0x1c /* Shift register control bits */
64#define SR_EXT 0x0c /* Shift on external clock */
65#define SR_OUT 0x10 /* Shift out if 1 */
66
67/* Bits in IFR and IER */
68#define IER_SET 0x80 /* set bits in IER */
69#define IER_CLR 0 /* clear bits in IER */
70#define SR_INT 0x04 /* Shift register full/empty */
71
72/* ADB transaction states according to GMHW */
73#define ST_CMD 0x00 /* ADB state: command byte */
74#define ST_EVEN 0x10 /* ADB state: even data byte */
75#define ST_ODD 0x20 /* ADB state: odd data byte */
76#define ST_IDLE 0x30 /* ADB state: idle, nothing to send */
77
78/* ADB command byte structure */
79#define ADDR_MASK 0xF0
80#define CMD_MASK 0x0F
81#define OP_MASK 0x0C
82#define TALK 0x0C
83
84static int macii_init_via(void);
85static void macii_start(void);
86static irqreturn_t macii_interrupt(int irq, void *arg);
87static void macii_queue_poll(void);
88
89static int macii_probe(void);
90static int macii_init(void);
91static int macii_send_request(struct adb_request *req, int sync);
92static int macii_write(struct adb_request *req);
93static int macii_autopoll(int devs);
94static void macii_poll(void);
95static int macii_reset_bus(void);
96
97struct adb_driver via_macii_driver = {
98 .name = "Mac II",
99 .probe = macii_probe,
100 .init = macii_init,
101 .send_request = macii_send_request,
102 .autopoll = macii_autopoll,
103 .poll = macii_poll,
104 .reset_bus = macii_reset_bus,
105};
106
107static enum macii_state {
108 idle,
109 sending,
110 reading,
111} macii_state;
112
113static struct adb_request *current_req; /* first request struct in the queue */
114static struct adb_request *last_req; /* last request struct in the queue */
115static unsigned char reply_buf[16]; /* storage for autopolled replies */
116static unsigned char *reply_ptr; /* next byte in reply_buf or req->reply */
117static bool reading_reply; /* store reply in reply_buf else req->reply */
118static int data_index; /* index of the next byte to send from req->data */
119static int reply_len; /* number of bytes received in reply_buf or req->reply */
120static int status; /* VIA's ADB status bits captured upon interrupt */
121static bool bus_timeout; /* no data was sent by the device */
122static bool srq_asserted; /* have to poll for the device that asserted it */
123static u8 last_cmd; /* the most recent command byte transmitted */
124static u8 last_talk_cmd; /* the most recent Talk command byte transmitted */
125static u8 last_poll_cmd; /* the most recent Talk R0 command byte transmitted */
126static unsigned int autopoll_devs; /* bits set are device addresses to poll */
127
128/* Check for MacII style ADB */
129static int macii_probe(void)
130{
131 if (macintosh_config->adb_type != MAC_ADB_II)
132 return -ENODEV;
133
134 via = via1;
135
136 pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
137 return 0;
138}
139
140/* Initialize the driver */
141static int macii_init(void)
142{
143 unsigned long flags;
144 int err;
145
146 local_irq_save(flags);
147
148 err = macii_init_via();
149 if (err)
150 goto out;
151
152 err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
153 macii_interrupt);
154 if (err)
155 goto out;
156
157 macii_state = idle;
158out:
159 local_irq_restore(flags);
160 return err;
161}
162
163/* initialize the hardware */
164static int macii_init_via(void)
165{
166 unsigned char x;
167
168 /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
169 via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
170
171 /* Set up state: idle */
172 via[B] |= ST_IDLE;
173
174 /* Shift register on input */
175 via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
176
177 /* Wipe any pending data and int */
178 x = via[SR];
179
180 return 0;
181}
182
183/* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
184static void macii_queue_poll(void)
185{
186 static struct adb_request req;
187 unsigned char poll_command;
188 unsigned int poll_addr;
189
190 /* This only polls devices in the autopoll list, which assumes that
191 * unprobed devices never assert SRQ. That could happen if a device was
192 * plugged in after the adb bus scan. Unplugging it again will resolve
193 * the problem. This behaviour is similar to MacOS.
194 */
195 if (!autopoll_devs)
196 return;
197
198 /* The device most recently polled may not be the best device to poll
199 * right now. Some other device(s) may have signalled SRQ (the active
200 * device won't do that). Or the autopoll list may have been changed.
201 * Try polling the next higher address.
202 */
203 poll_addr = (last_poll_cmd & ADDR_MASK) >> 4;
204 if ((srq_asserted && last_cmd == last_poll_cmd) ||
205 !(autopoll_devs & (1 << poll_addr))) {
206 unsigned int higher_devs;
207
208 higher_devs = autopoll_devs & -(1 << (poll_addr + 1));
209 poll_addr = ffs(higher_devs ? higher_devs : autopoll_devs) - 1;
210 }
211
212 /* Send a Talk Register 0 command */
213 poll_command = ADB_READREG(poll_addr, 0);
214
215 /* No need to repeat this Talk command. The transceiver will do that
216 * as long as it is idle.
217 */
218 if (poll_command == last_cmd)
219 return;
220
221 adb_request(&req, NULL, ADBREQ_NOSEND, 1, poll_command);
222
223 req.sent = 0;
224 req.complete = 0;
225 req.reply_len = 0;
226 req.next = current_req;
227
228 if (WARN_ON(current_req)) {
229 current_req = &req;
230 } else {
231 current_req = &req;
232 last_req = &req;
233 }
234}
235
236/* Send an ADB request; if sync, poll out the reply 'till it's done */
237static int macii_send_request(struct adb_request *req, int sync)
238{
239 int err;
240
241 err = macii_write(req);
242 if (err)
243 return err;
244
245 if (sync)
246 while (!req->complete)
247 macii_poll();
248
249 return 0;
250}
251
252/* Send an ADB request (append to request queue) */
253static int macii_write(struct adb_request *req)
254{
255 unsigned long flags;
256
257 if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
258 req->complete = 1;
259 return -EINVAL;
260 }
261
262 req->next = NULL;
263 req->sent = 0;
264 req->complete = 0;
265 req->reply_len = 0;
266
267 local_irq_save(flags);
268
269 if (current_req != NULL) {
270 last_req->next = req;
271 last_req = req;
272 } else {
273 current_req = req;
274 last_req = req;
275 if (macii_state == idle)
276 macii_start();
277 }
278
279 local_irq_restore(flags);
280
281 return 0;
282}
283
284/* Start auto-polling */
285static int macii_autopoll(int devs)
286{
287 unsigned long flags;
288
289 local_irq_save(flags);
290
291 /* bit 1 == device 1, and so on. */
292 autopoll_devs = (unsigned int)devs & 0xFFFE;
293
294 if (!current_req) {
295 macii_queue_poll();
296 if (current_req && macii_state == idle)
297 macii_start();
298 }
299
300 local_irq_restore(flags);
301
302 return 0;
303}
304
305/* Prod the chip without interrupts */
306static void macii_poll(void)
307{
308 macii_interrupt(0, NULL);
309}
310
311/* Reset the bus */
312static int macii_reset_bus(void)
313{
314 struct adb_request req;
315
316 /* Command = 0, Address = ignored */
317 adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_BUSRESET);
318 macii_send_request(&req, 1);
319
320 /* Don't want any more requests during the Global Reset low time. */
321 udelay(3000);
322
323 return 0;
324}
325
326/* Start sending ADB packet */
327static void macii_start(void)
328{
329 struct adb_request *req;
330
331 req = current_req;
332
333 /* Now send it. Be careful though, that first byte of the request
334 * is actually ADB_PACKET; the real data begins at index 1!
335 * And req->nbytes is the number of bytes of real data plus one.
336 */
337
338 /* Output mode */
339 via[ACR] |= SR_OUT;
340 /* Load data */
341 via[SR] = req->data[1];
342 /* set ADB state to 'command' */
343 via[B] = (via[B] & ~ST_MASK) | ST_CMD;
344
345 macii_state = sending;
346 data_index = 2;
347
348 bus_timeout = false;
349 srq_asserted = false;
350}
351
352/*
353 * The notorious ADB interrupt handler - does all of the protocol handling.
354 * Relies on the ADB controller sending and receiving data, thereby
355 * generating shift register interrupts (SR_INT) for us. This means there has
356 * to be activity on the ADB bus. The chip will poll to achieve this.
357 *
358 * The VIA Port B output signalling works as follows. After the ADB transceiver
359 * sees a transition on the PB4 and PB5 lines it will crank over the VIA shift
360 * register which eventually raises the SR_INT interrupt. The PB4/PB5 outputs
361 * are toggled with each byte as the ADB transaction progresses.
362 *
363 * Request with no reply expected (and empty transceiver buffer):
364 * CMD -> IDLE
365 * Request with expected reply packet (or with buffered autopoll packet):
366 * CMD -> EVEN -> ODD -> EVEN -> ... -> IDLE
367 * Unsolicited packet:
368 * IDLE -> EVEN -> ODD -> EVEN -> ... -> IDLE
369 */
370static irqreturn_t macii_interrupt(int irq, void *arg)
371{
372 int x;
373 struct adb_request *req;
374 unsigned long flags;
375
376 local_irq_save(flags);
377
378 if (!arg) {
379 /* Clear the SR IRQ flag when polling. */
380 if (via[IFR] & SR_INT)
381 via[IFR] = SR_INT;
382 else {
383 local_irq_restore(flags);
384 return IRQ_NONE;
385 }
386 }
387
388 status = via[B] & (ST_MASK | CTLR_IRQ);
389
390 switch (macii_state) {
391 case idle:
392 WARN_ON((status & ST_MASK) != ST_IDLE);
393
394 reply_ptr = reply_buf;
395 reading_reply = false;
396
397 bus_timeout = false;
398 srq_asserted = false;
399
400 x = via[SR];
401
402 if (!(status & CTLR_IRQ)) {
403 /* /CTLR_IRQ asserted in idle state means we must
404 * read an autopoll reply from the transceiver buffer.
405 */
406 macii_state = reading;
407 *reply_ptr = x;
408 reply_len = 1;
409 } else {
410 /* bus timeout */
411 reply_len = 0;
412 break;
413 }
414
415 /* set ADB state = even for first data byte */
416 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
417 break;
418
419 case sending:
420 req = current_req;
421
422 if (status == (ST_CMD | CTLR_IRQ)) {
423 /* /CTLR_IRQ de-asserted after the command byte means
424 * the host can continue with the transaction.
425 */
426
427 /* Store command byte */
428 last_cmd = req->data[1];
429 if ((last_cmd & OP_MASK) == TALK) {
430 last_talk_cmd = last_cmd;
431 if ((last_cmd & CMD_MASK) == ADB_READREG(0, 0))
432 last_poll_cmd = last_cmd;
433 }
434 }
435
436 if (status == ST_CMD) {
437 /* /CTLR_IRQ asserted after the command byte means we
438 * must read an autopoll reply. The first byte was
439 * lost because the shift register was an output.
440 */
441 macii_state = reading;
442
443 reading_reply = false;
444 reply_ptr = reply_buf;
445 *reply_ptr = last_talk_cmd;
446 reply_len = 1;
447
448 /* reset to shift in */
449 via[ACR] &= ~SR_OUT;
450 x = via[SR];
451 } else if (data_index >= req->nbytes) {
452 req->sent = 1;
453
454 if (req->reply_expected) {
455 macii_state = reading;
456
457 reading_reply = true;
458 reply_ptr = req->reply;
459 *reply_ptr = req->data[1];
460 reply_len = 1;
461
462 via[ACR] &= ~SR_OUT;
463 x = via[SR];
464 } else if ((req->data[1] & OP_MASK) == TALK) {
465 macii_state = reading;
466
467 reading_reply = false;
468 reply_ptr = reply_buf;
469 *reply_ptr = req->data[1];
470 reply_len = 1;
471
472 via[ACR] &= ~SR_OUT;
473 x = via[SR];
474
475 req->complete = 1;
476 current_req = req->next;
477 if (req->done)
478 (*req->done)(req);
479 } else {
480 macii_state = idle;
481
482 req->complete = 1;
483 current_req = req->next;
484 if (req->done)
485 (*req->done)(req);
486 break;
487 }
488 } else {
489 via[SR] = req->data[data_index++];
490 }
491
492 if ((via[B] & ST_MASK) == ST_CMD) {
493 /* just sent the command byte, set to EVEN */
494 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
495 } else {
496 /* invert state bits, toggle ODD/EVEN */
497 via[B] ^= ST_MASK;
498 }
499 break;
500
501 case reading:
502 x = via[SR];
503 WARN_ON((status & ST_MASK) == ST_CMD ||
504 (status & ST_MASK) == ST_IDLE);
505
506 if (!(status & CTLR_IRQ)) {
507 if (status == ST_EVEN && reply_len == 1) {
508 bus_timeout = true;
509 } else if (status == ST_ODD && reply_len == 2) {
510 srq_asserted = true;
511 } else {
512 macii_state = idle;
513
514 if (bus_timeout)
515 reply_len = 0;
516
517 if (reading_reply) {
518 struct adb_request *req = current_req;
519
520 req->reply_len = reply_len;
521
522 req->complete = 1;
523 current_req = req->next;
524 if (req->done)
525 (*req->done)(req);
526 } else if (reply_len && autopoll_devs &&
527 reply_buf[0] == last_poll_cmd) {
528 adb_input(reply_buf, reply_len, 1);
529 }
530 break;
531 }
532 }
533
534 if (reply_len < ARRAY_SIZE(reply_buf)) {
535 reply_ptr++;
536 *reply_ptr = x;
537 reply_len++;
538 }
539
540 /* invert state bits, toggle ODD/EVEN */
541 via[B] ^= ST_MASK;
542 break;
543
544 default:
545 break;
546 }
547
548 if (macii_state == idle) {
549 if (!current_req)
550 macii_queue_poll();
551
552 if (current_req)
553 macii_start();
554
555 if (macii_state == idle) {
556 via[ACR] &= ~SR_OUT;
557 x = via[SR];
558 via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
559 }
560 }
561
562 local_irq_restore(flags);
563 return IRQ_HANDLED;
564}