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1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include <linux/virtio.h>
27#include <linux/virtio_config.h>
28#include <drm/drmP.h>
29#include "virtgpu_drv.h"
30
31static int virtio_gpu_fbdev = 1;
32
33MODULE_PARM_DESC(fbdev, "Disable/Enable framebuffer device & console");
34module_param_named(fbdev, virtio_gpu_fbdev, int, 0400);
35
36static void virtio_gpu_config_changed_work_func(struct work_struct *work)
37{
38 struct virtio_gpu_device *vgdev =
39 container_of(work, struct virtio_gpu_device,
40 config_changed_work);
41 u32 events_read, events_clear = 0;
42
43 /* read the config space */
44 virtio_cread(vgdev->vdev, struct virtio_gpu_config,
45 events_read, &events_read);
46 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
47 virtio_gpu_cmd_get_display_info(vgdev);
48 drm_helper_hpd_irq_event(vgdev->ddev);
49 events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
50 }
51 virtio_cwrite(vgdev->vdev, struct virtio_gpu_config,
52 events_clear, &events_clear);
53}
54
55static void virtio_gpu_ctx_id_get(struct virtio_gpu_device *vgdev,
56 uint32_t *resid)
57{
58 int handle;
59
60 idr_preload(GFP_KERNEL);
61 spin_lock(&vgdev->ctx_id_idr_lock);
62 handle = idr_alloc(&vgdev->ctx_id_idr, NULL, 1, 0, 0);
63 spin_unlock(&vgdev->ctx_id_idr_lock);
64 idr_preload_end();
65 *resid = handle;
66}
67
68static void virtio_gpu_ctx_id_put(struct virtio_gpu_device *vgdev, uint32_t id)
69{
70 spin_lock(&vgdev->ctx_id_idr_lock);
71 idr_remove(&vgdev->ctx_id_idr, id);
72 spin_unlock(&vgdev->ctx_id_idr_lock);
73}
74
75static void virtio_gpu_context_create(struct virtio_gpu_device *vgdev,
76 uint32_t nlen, const char *name,
77 uint32_t *ctx_id)
78{
79 virtio_gpu_ctx_id_get(vgdev, ctx_id);
80 virtio_gpu_cmd_context_create(vgdev, *ctx_id, nlen, name);
81}
82
83static void virtio_gpu_context_destroy(struct virtio_gpu_device *vgdev,
84 uint32_t ctx_id)
85{
86 virtio_gpu_cmd_context_destroy(vgdev, ctx_id);
87 virtio_gpu_ctx_id_put(vgdev, ctx_id);
88}
89
90static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
91 void (*work_func)(struct work_struct *work))
92{
93 spin_lock_init(&vgvq->qlock);
94 init_waitqueue_head(&vgvq->ack_queue);
95 INIT_WORK(&vgvq->dequeue_work, work_func);
96}
97
98static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
99 int num_capsets)
100{
101 int i, ret;
102
103 vgdev->capsets = kcalloc(num_capsets,
104 sizeof(struct virtio_gpu_drv_capset),
105 GFP_KERNEL);
106 if (!vgdev->capsets) {
107 DRM_ERROR("failed to allocate cap sets\n");
108 return;
109 }
110 for (i = 0; i < num_capsets; i++) {
111 virtio_gpu_cmd_get_capset_info(vgdev, i);
112 ret = wait_event_timeout(vgdev->resp_wq,
113 vgdev->capsets[i].id > 0, 5 * HZ);
114 if (ret == 0) {
115 DRM_ERROR("timed out waiting for cap set %d\n", i);
116 kfree(vgdev->capsets);
117 vgdev->capsets = NULL;
118 return;
119 }
120 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
121 i, vgdev->capsets[i].id,
122 vgdev->capsets[i].max_version,
123 vgdev->capsets[i].max_size);
124 }
125 vgdev->num_capsets = num_capsets;
126}
127
128int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags)
129{
130 static vq_callback_t *callbacks[] = {
131 virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
132 };
133 static const char * const names[] = { "control", "cursor" };
134
135 struct virtio_gpu_device *vgdev;
136 /* this will expand later */
137 struct virtqueue *vqs[2];
138 u32 num_scanouts, num_capsets;
139 int ret;
140
141 if (!virtio_has_feature(dev->virtdev, VIRTIO_F_VERSION_1))
142 return -ENODEV;
143
144 vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL);
145 if (!vgdev)
146 return -ENOMEM;
147
148 vgdev->ddev = dev;
149 dev->dev_private = vgdev;
150 vgdev->vdev = dev->virtdev;
151 vgdev->dev = dev->dev;
152
153 spin_lock_init(&vgdev->display_info_lock);
154 spin_lock_init(&vgdev->ctx_id_idr_lock);
155 idr_init(&vgdev->ctx_id_idr);
156 spin_lock_init(&vgdev->resource_idr_lock);
157 idr_init(&vgdev->resource_idr);
158 init_waitqueue_head(&vgdev->resp_wq);
159 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
160 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
161
162 spin_lock_init(&vgdev->fence_drv.lock);
163 INIT_LIST_HEAD(&vgdev->fence_drv.fences);
164 INIT_LIST_HEAD(&vgdev->cap_cache);
165 INIT_WORK(&vgdev->config_changed_work,
166 virtio_gpu_config_changed_work_func);
167
168 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
169 vgdev->has_virgl_3d = true;
170 DRM_INFO("virgl 3d acceleration %s\n",
171 vgdev->has_virgl_3d ? "enabled" : "not available");
172
173 ret = vgdev->vdev->config->find_vqs(vgdev->vdev, 2, vqs,
174 callbacks, names);
175 if (ret) {
176 DRM_ERROR("failed to find virt queues\n");
177 goto err_vqs;
178 }
179 vgdev->ctrlq.vq = vqs[0];
180 vgdev->cursorq.vq = vqs[1];
181 ret = virtio_gpu_alloc_vbufs(vgdev);
182 if (ret) {
183 DRM_ERROR("failed to alloc vbufs\n");
184 goto err_vbufs;
185 }
186
187 ret = virtio_gpu_ttm_init(vgdev);
188 if (ret) {
189 DRM_ERROR("failed to init ttm %d\n", ret);
190 goto err_ttm;
191 }
192
193 /* get display info */
194 virtio_cread(vgdev->vdev, struct virtio_gpu_config,
195 num_scanouts, &num_scanouts);
196 vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
197 VIRTIO_GPU_MAX_SCANOUTS);
198 if (!vgdev->num_scanouts) {
199 DRM_ERROR("num_scanouts is zero\n");
200 ret = -EINVAL;
201 goto err_scanouts;
202 }
203 DRM_INFO("number of scanouts: %d\n", num_scanouts);
204
205 virtio_cread(vgdev->vdev, struct virtio_gpu_config,
206 num_capsets, &num_capsets);
207 DRM_INFO("number of cap sets: %d\n", num_capsets);
208
209 ret = virtio_gpu_modeset_init(vgdev);
210 if (ret)
211 goto err_modeset;
212
213 virtio_device_ready(vgdev->vdev);
214 vgdev->vqs_ready = true;
215
216 if (num_capsets)
217 virtio_gpu_get_capsets(vgdev, num_capsets);
218 virtio_gpu_cmd_get_display_info(vgdev);
219 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
220 5 * HZ);
221 if (virtio_gpu_fbdev)
222 virtio_gpu_fbdev_init(vgdev);
223
224 return 0;
225
226err_modeset:
227err_scanouts:
228 virtio_gpu_ttm_fini(vgdev);
229err_ttm:
230 virtio_gpu_free_vbufs(vgdev);
231err_vbufs:
232 vgdev->vdev->config->del_vqs(vgdev->vdev);
233err_vqs:
234 kfree(vgdev);
235 return ret;
236}
237
238static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
239{
240 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
241
242 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
243 kfree(cache_ent->caps_cache);
244 kfree(cache_ent);
245 }
246}
247
248int virtio_gpu_driver_unload(struct drm_device *dev)
249{
250 struct virtio_gpu_device *vgdev = dev->dev_private;
251
252 vgdev->vqs_ready = false;
253 flush_work(&vgdev->ctrlq.dequeue_work);
254 flush_work(&vgdev->cursorq.dequeue_work);
255 flush_work(&vgdev->config_changed_work);
256 vgdev->vdev->config->del_vqs(vgdev->vdev);
257
258 virtio_gpu_modeset_fini(vgdev);
259 virtio_gpu_ttm_fini(vgdev);
260 virtio_gpu_free_vbufs(vgdev);
261 virtio_gpu_cleanup_cap_cache(vgdev);
262 kfree(vgdev->capsets);
263 kfree(vgdev);
264 return 0;
265}
266
267int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
268{
269 struct virtio_gpu_device *vgdev = dev->dev_private;
270 struct virtio_gpu_fpriv *vfpriv;
271 uint32_t id;
272 char dbgname[64], tmpname[TASK_COMM_LEN];
273
274 /* can't create contexts without 3d renderer */
275 if (!vgdev->has_virgl_3d)
276 return 0;
277
278 get_task_comm(tmpname, current);
279 snprintf(dbgname, sizeof(dbgname), "%s", tmpname);
280 dbgname[63] = 0;
281 /* allocate a virt GPU context for this opener */
282 vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
283 if (!vfpriv)
284 return -ENOMEM;
285
286 virtio_gpu_context_create(vgdev, strlen(dbgname), dbgname, &id);
287
288 vfpriv->ctx_id = id;
289 file->driver_priv = vfpriv;
290 return 0;
291}
292
293void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
294{
295 struct virtio_gpu_device *vgdev = dev->dev_private;
296 struct virtio_gpu_fpriv *vfpriv;
297
298 if (!vgdev->has_virgl_3d)
299 return;
300
301 vfpriv = file->driver_priv;
302
303 virtio_gpu_context_destroy(vgdev, vfpriv->ctx_id);
304 kfree(vfpriv);
305 file->driver_priv = NULL;
306}
1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include <linux/virtio.h>
27#include <linux/virtio_config.h>
28#include <linux/virtio_ring.h>
29
30#include <drm/drm_file.h>
31#include <drm/drm_managed.h>
32
33#include "virtgpu_drv.h"
34
35static void virtio_gpu_config_changed_work_func(struct work_struct *work)
36{
37 struct virtio_gpu_device *vgdev =
38 container_of(work, struct virtio_gpu_device,
39 config_changed_work);
40 u32 events_read, events_clear = 0;
41
42 /* read the config space */
43 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
44 events_read, &events_read);
45 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
46 if (vgdev->num_scanouts) {
47 if (vgdev->has_edid)
48 virtio_gpu_cmd_get_edids(vgdev);
49 virtio_gpu_cmd_get_display_info(vgdev);
50 virtio_gpu_notify(vgdev);
51 drm_helper_hpd_irq_event(vgdev->ddev);
52 }
53 events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
54 }
55 virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config,
56 events_clear, &events_clear);
57}
58
59static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
60 void (*work_func)(struct work_struct *work))
61{
62 spin_lock_init(&vgvq->qlock);
63 init_waitqueue_head(&vgvq->ack_queue);
64 INIT_WORK(&vgvq->dequeue_work, work_func);
65}
66
67static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
68 int num_capsets)
69{
70 int i, ret;
71 bool invalid_capset_id = false;
72 struct drm_device *drm = vgdev->ddev;
73
74 vgdev->capsets = drmm_kcalloc(drm, num_capsets,
75 sizeof(struct virtio_gpu_drv_capset),
76 GFP_KERNEL);
77 if (!vgdev->capsets) {
78 DRM_ERROR("failed to allocate cap sets\n");
79 return;
80 }
81 for (i = 0; i < num_capsets; i++) {
82 virtio_gpu_cmd_get_capset_info(vgdev, i);
83 virtio_gpu_notify(vgdev);
84 ret = wait_event_timeout(vgdev->resp_wq,
85 vgdev->capsets[i].id > 0, 5 * HZ);
86 /*
87 * Capability ids are defined in the virtio-gpu spec and are
88 * between 1 to 63, inclusive.
89 */
90 if (!vgdev->capsets[i].id ||
91 vgdev->capsets[i].id > MAX_CAPSET_ID)
92 invalid_capset_id = true;
93
94 if (ret == 0)
95 DRM_ERROR("timed out waiting for cap set %d\n", i);
96 else if (invalid_capset_id)
97 DRM_ERROR("invalid capset id %u", vgdev->capsets[i].id);
98
99 if (ret == 0 || invalid_capset_id) {
100 spin_lock(&vgdev->display_info_lock);
101 drmm_kfree(drm, vgdev->capsets);
102 vgdev->capsets = NULL;
103 spin_unlock(&vgdev->display_info_lock);
104 return;
105 }
106
107 vgdev->capset_id_mask |= 1 << vgdev->capsets[i].id;
108 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
109 i, vgdev->capsets[i].id,
110 vgdev->capsets[i].max_version,
111 vgdev->capsets[i].max_size);
112 }
113
114 vgdev->num_capsets = num_capsets;
115}
116
117int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev)
118{
119 static vq_callback_t *callbacks[] = {
120 virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
121 };
122 static const char * const names[] = { "control", "cursor" };
123
124 struct virtio_gpu_device *vgdev;
125 /* this will expand later */
126 struct virtqueue *vqs[2];
127 u32 num_scanouts, num_capsets;
128 int ret = 0;
129
130 if (!virtio_has_feature(vdev, VIRTIO_F_VERSION_1))
131 return -ENODEV;
132
133 vgdev = drmm_kzalloc(dev, sizeof(struct virtio_gpu_device), GFP_KERNEL);
134 if (!vgdev)
135 return -ENOMEM;
136
137 vgdev->ddev = dev;
138 dev->dev_private = vgdev;
139 vgdev->vdev = vdev;
140
141 spin_lock_init(&vgdev->display_info_lock);
142 spin_lock_init(&vgdev->resource_export_lock);
143 spin_lock_init(&vgdev->host_visible_lock);
144 ida_init(&vgdev->ctx_id_ida);
145 ida_init(&vgdev->resource_ida);
146 init_waitqueue_head(&vgdev->resp_wq);
147 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
148 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
149
150 vgdev->fence_drv.context = dma_fence_context_alloc(1);
151 spin_lock_init(&vgdev->fence_drv.lock);
152 INIT_LIST_HEAD(&vgdev->fence_drv.fences);
153 INIT_LIST_HEAD(&vgdev->cap_cache);
154 INIT_WORK(&vgdev->config_changed_work,
155 virtio_gpu_config_changed_work_func);
156
157 INIT_WORK(&vgdev->obj_free_work,
158 virtio_gpu_array_put_free_work);
159 INIT_LIST_HEAD(&vgdev->obj_free_list);
160 spin_lock_init(&vgdev->obj_free_lock);
161
162#ifdef __LITTLE_ENDIAN
163 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
164 vgdev->has_virgl_3d = true;
165#endif
166 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
167 vgdev->has_edid = true;
168 }
169 if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) {
170 vgdev->has_indirect = true;
171 }
172 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) {
173 vgdev->has_resource_assign_uuid = true;
174 }
175 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_BLOB)) {
176 vgdev->has_resource_blob = true;
177 }
178 if (virtio_get_shm_region(vgdev->vdev, &vgdev->host_visible_region,
179 VIRTIO_GPU_SHM_ID_HOST_VISIBLE)) {
180 if (!devm_request_mem_region(&vgdev->vdev->dev,
181 vgdev->host_visible_region.addr,
182 vgdev->host_visible_region.len,
183 dev_name(&vgdev->vdev->dev))) {
184 DRM_ERROR("Could not reserve host visible region\n");
185 ret = -EBUSY;
186 goto err_vqs;
187 }
188
189 DRM_INFO("Host memory window: 0x%lx +0x%lx\n",
190 (unsigned long)vgdev->host_visible_region.addr,
191 (unsigned long)vgdev->host_visible_region.len);
192 vgdev->has_host_visible = true;
193 drm_mm_init(&vgdev->host_visible_mm,
194 (unsigned long)vgdev->host_visible_region.addr,
195 (unsigned long)vgdev->host_visible_region.len);
196 }
197 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_CONTEXT_INIT)) {
198 vgdev->has_context_init = true;
199 }
200
201 DRM_INFO("features: %cvirgl %cedid %cresource_blob %chost_visible",
202 vgdev->has_virgl_3d ? '+' : '-',
203 vgdev->has_edid ? '+' : '-',
204 vgdev->has_resource_blob ? '+' : '-',
205 vgdev->has_host_visible ? '+' : '-');
206
207 DRM_INFO("features: %ccontext_init\n",
208 vgdev->has_context_init ? '+' : '-');
209
210 ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
211 if (ret) {
212 DRM_ERROR("failed to find virt queues\n");
213 goto err_vqs;
214 }
215 vgdev->ctrlq.vq = vqs[0];
216 vgdev->cursorq.vq = vqs[1];
217 ret = virtio_gpu_alloc_vbufs(vgdev);
218 if (ret) {
219 DRM_ERROR("failed to alloc vbufs\n");
220 goto err_vbufs;
221 }
222
223 /* get display info */
224 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
225 num_scanouts, &num_scanouts);
226 vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
227 VIRTIO_GPU_MAX_SCANOUTS);
228
229 if (!IS_ENABLED(CONFIG_DRM_VIRTIO_GPU_KMS) || !vgdev->num_scanouts) {
230 DRM_INFO("KMS disabled\n");
231 vgdev->num_scanouts = 0;
232 vgdev->has_edid = false;
233 dev->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
234 } else {
235 DRM_INFO("number of scanouts: %d\n", num_scanouts);
236 }
237
238 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
239 num_capsets, &num_capsets);
240 DRM_INFO("number of cap sets: %d\n", num_capsets);
241
242 ret = virtio_gpu_modeset_init(vgdev);
243 if (ret) {
244 DRM_ERROR("modeset init failed\n");
245 goto err_scanouts;
246 }
247
248 virtio_device_ready(vgdev->vdev);
249
250 if (num_capsets)
251 virtio_gpu_get_capsets(vgdev, num_capsets);
252 if (vgdev->num_scanouts) {
253 if (vgdev->has_edid)
254 virtio_gpu_cmd_get_edids(vgdev);
255 virtio_gpu_cmd_get_display_info(vgdev);
256 virtio_gpu_notify(vgdev);
257 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
258 5 * HZ);
259 }
260 return 0;
261
262err_scanouts:
263 virtio_gpu_free_vbufs(vgdev);
264err_vbufs:
265 vgdev->vdev->config->del_vqs(vgdev->vdev);
266err_vqs:
267 dev->dev_private = NULL;
268 return ret;
269}
270
271static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
272{
273 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
274
275 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
276 kfree(cache_ent->caps_cache);
277 kfree(cache_ent);
278 }
279}
280
281void virtio_gpu_deinit(struct drm_device *dev)
282{
283 struct virtio_gpu_device *vgdev = dev->dev_private;
284
285 flush_work(&vgdev->obj_free_work);
286 flush_work(&vgdev->ctrlq.dequeue_work);
287 flush_work(&vgdev->cursorq.dequeue_work);
288 flush_work(&vgdev->config_changed_work);
289 virtio_reset_device(vgdev->vdev);
290 vgdev->vdev->config->del_vqs(vgdev->vdev);
291}
292
293void virtio_gpu_release(struct drm_device *dev)
294{
295 struct virtio_gpu_device *vgdev = dev->dev_private;
296
297 if (!vgdev)
298 return;
299
300 virtio_gpu_modeset_fini(vgdev);
301 virtio_gpu_free_vbufs(vgdev);
302 virtio_gpu_cleanup_cap_cache(vgdev);
303
304 if (vgdev->has_host_visible)
305 drm_mm_takedown(&vgdev->host_visible_mm);
306}
307
308int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
309{
310 struct virtio_gpu_device *vgdev = dev->dev_private;
311 struct virtio_gpu_fpriv *vfpriv;
312 int handle;
313
314 /* can't create contexts without 3d renderer */
315 if (!vgdev->has_virgl_3d)
316 return 0;
317
318 /* allocate a virt GPU context for this opener */
319 vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
320 if (!vfpriv)
321 return -ENOMEM;
322
323 mutex_init(&vfpriv->context_lock);
324
325 handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
326 if (handle < 0) {
327 kfree(vfpriv);
328 return handle;
329 }
330
331 vfpriv->ctx_id = handle + 1;
332 file->driver_priv = vfpriv;
333 return 0;
334}
335
336void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
337{
338 struct virtio_gpu_device *vgdev = dev->dev_private;
339 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
340
341 if (!vgdev->has_virgl_3d)
342 return;
343
344 if (vfpriv->context_created) {
345 virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
346 virtio_gpu_notify(vgdev);
347 }
348
349 ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
350 mutex_destroy(&vfpriv->context_lock);
351 kfree(vfpriv);
352 file->driver_priv = NULL;
353}