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1/*
2 * TI clock support
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * Tero Kristo <t-kristo@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/clk.h>
19#include <linux/clk-provider.h>
20#include <linux/clkdev.h>
21#include <linux/clk/ti.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
24#include <linux/list.h>
25#include <linux/regmap.h>
26#include <linux/bootmem.h>
27
28#include "clock.h"
29
30#undef pr_fmt
31#define pr_fmt(fmt) "%s: " fmt, __func__
32
33struct ti_clk_ll_ops *ti_clk_ll_ops;
34static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
35
36static struct ti_clk_features ti_clk_features;
37
38struct clk_iomap {
39 struct regmap *regmap;
40 void __iomem *mem;
41};
42
43static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
44
45static void clk_memmap_writel(u32 val, void __iomem *reg)
46{
47 struct clk_omap_reg *r = (struct clk_omap_reg *)®
48 struct clk_iomap *io = clk_memmaps[r->index];
49
50 if (io->regmap)
51 regmap_write(io->regmap, r->offset, val);
52 else
53 writel_relaxed(val, io->mem + r->offset);
54}
55
56static u32 clk_memmap_readl(void __iomem *reg)
57{
58 u32 val;
59 struct clk_omap_reg *r = (struct clk_omap_reg *)®
60 struct clk_iomap *io = clk_memmaps[r->index];
61
62 if (io->regmap)
63 regmap_read(io->regmap, r->offset, &val);
64 else
65 val = readl_relaxed(io->mem + r->offset);
66
67 return val;
68}
69
70/**
71 * ti_clk_setup_ll_ops - setup low level clock operations
72 * @ops: low level clock ops descriptor
73 *
74 * Sets up low level clock operations for TI clock driver. This is used
75 * to provide various callbacks for the clock driver towards platform
76 * specific code. Returns 0 on success, -EBUSY if ll_ops have been
77 * registered already.
78 */
79int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
80{
81 if (ti_clk_ll_ops) {
82 pr_err("Attempt to register ll_ops multiple times.\n");
83 return -EBUSY;
84 }
85
86 ti_clk_ll_ops = ops;
87 ops->clk_readl = clk_memmap_readl;
88 ops->clk_writel = clk_memmap_writel;
89
90 return 0;
91}
92
93/**
94 * ti_dt_clocks_register - register DT alias clocks during boot
95 * @oclks: list of clocks to register
96 *
97 * Register alias or non-standard DT clock entries during boot. By
98 * default, DT clocks are found based on their node name. If any
99 * additional con-id / dev-id -> clock mapping is required, use this
100 * function to list these.
101 */
102void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
103{
104 struct ti_dt_clk *c;
105 struct device_node *node;
106 struct clk *clk;
107 struct of_phandle_args clkspec;
108
109 for (c = oclks; c->node_name != NULL; c++) {
110 node = of_find_node_by_name(NULL, c->node_name);
111 clkspec.np = node;
112 clk = of_clk_get_from_provider(&clkspec);
113
114 if (!IS_ERR(clk)) {
115 c->lk.clk = clk;
116 clkdev_add(&c->lk);
117 } else {
118 pr_warn("failed to lookup clock node %s\n",
119 c->node_name);
120 }
121 }
122}
123
124struct clk_init_item {
125 struct device_node *node;
126 struct clk_hw *hw;
127 ti_of_clk_init_cb_t func;
128 struct list_head link;
129};
130
131static LIST_HEAD(retry_list);
132
133/**
134 * ti_clk_retry_init - retries a failed clock init at later phase
135 * @node: device not for the clock
136 * @hw: partially initialized clk_hw struct for the clock
137 * @func: init function to be called for the clock
138 *
139 * Adds a failed clock init to the retry list. The retry list is parsed
140 * once all the other clocks have been initialized.
141 */
142int __init ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
143 ti_of_clk_init_cb_t func)
144{
145 struct clk_init_item *retry;
146
147 pr_debug("%s: adding to retry list...\n", node->name);
148 retry = kzalloc(sizeof(*retry), GFP_KERNEL);
149 if (!retry)
150 return -ENOMEM;
151
152 retry->node = node;
153 retry->func = func;
154 retry->hw = hw;
155 list_add(&retry->link, &retry_list);
156
157 return 0;
158}
159
160/**
161 * ti_clk_get_reg_addr - get register address for a clock register
162 * @node: device node for the clock
163 * @index: register index from the clock node
164 *
165 * Builds clock register address from device tree information. This
166 * is a struct of type clk_omap_reg. Returns a pointer to the register
167 * address, or a pointer error value in failure.
168 */
169void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index)
170{
171 struct clk_omap_reg *reg;
172 u32 val;
173 u32 tmp;
174 int i;
175
176 reg = (struct clk_omap_reg *)&tmp;
177
178 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
179 if (clocks_node_ptr[i] == node->parent)
180 break;
181 }
182
183 if (i == CLK_MAX_MEMMAPS) {
184 pr_err("clk-provider not found for %s!\n", node->name);
185 return IOMEM_ERR_PTR(-ENOENT);
186 }
187
188 reg->index = i;
189
190 if (of_property_read_u32_index(node, "reg", index, &val)) {
191 pr_err("%s must have reg[%d]!\n", node->name, index);
192 return IOMEM_ERR_PTR(-EINVAL);
193 }
194
195 reg->offset = val;
196
197 return (__force void __iomem *)tmp;
198}
199
200/**
201 * omap2_clk_provider_init - init master clock provider
202 * @parent: master node
203 * @index: internal index for clk_reg_ops
204 * @syscon: syscon regmap pointer for accessing clock registers
205 * @mem: iomem pointer for the clock provider memory area, only used if
206 * syscon is not provided
207 *
208 * Initializes a master clock IP block. This basically sets up the
209 * mapping from clocks node to the memory map index. All the clocks
210 * are then initialized through the common of_clk_init call, and the
211 * clocks will access their memory maps based on the node layout.
212 * Returns 0 in success.
213 */
214int __init omap2_clk_provider_init(struct device_node *parent, int index,
215 struct regmap *syscon, void __iomem *mem)
216{
217 struct device_node *clocks;
218 struct clk_iomap *io;
219
220 /* get clocks for this parent */
221 clocks = of_get_child_by_name(parent, "clocks");
222 if (!clocks) {
223 pr_err("%s missing 'clocks' child node.\n", parent->name);
224 return -EINVAL;
225 }
226
227 /* add clocks node info */
228 clocks_node_ptr[index] = clocks;
229
230 io = kzalloc(sizeof(*io), GFP_KERNEL);
231 if (!io)
232 return -ENOMEM;
233
234 io->regmap = syscon;
235 io->mem = mem;
236
237 clk_memmaps[index] = io;
238
239 return 0;
240}
241
242/**
243 * omap2_clk_legacy_provider_init - initialize a legacy clock provider
244 * @index: index for the clock provider
245 * @mem: iomem pointer for the clock provider memory area
246 *
247 * Initializes a legacy clock provider memory mapping.
248 */
249void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
250{
251 struct clk_iomap *io;
252
253 io = memblock_virt_alloc(sizeof(*io), 0);
254
255 io->mem = mem;
256
257 clk_memmaps[index] = io;
258}
259
260/**
261 * ti_dt_clk_init_retry_clks - init clocks from the retry list
262 *
263 * Initializes any clocks that have failed to initialize before,
264 * reasons being missing parent node(s) during earlier init. This
265 * typically happens only for DPLLs which need to have both of their
266 * parent clocks ready during init.
267 */
268void ti_dt_clk_init_retry_clks(void)
269{
270 struct clk_init_item *retry;
271 struct clk_init_item *tmp;
272 int retries = 5;
273
274 while (!list_empty(&retry_list) && retries) {
275 list_for_each_entry_safe(retry, tmp, &retry_list, link) {
276 pr_debug("retry-init: %s\n", retry->node->name);
277 retry->func(retry->hw, retry->node);
278 list_del(&retry->link);
279 kfree(retry);
280 }
281 retries--;
282 }
283}
284
285#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
286void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
287{
288 while (*patch) {
289 memcpy((*patch)->patch, *patch, sizeof(**patch));
290 patch++;
291 }
292}
293
294struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
295{
296 struct clk *clk;
297 struct ti_clk_fixed *fixed;
298 struct ti_clk_fixed_factor *fixed_factor;
299 struct clk_hw *clk_hw;
300
301 if (setup->clk)
302 return setup->clk;
303
304 switch (setup->type) {
305 case TI_CLK_FIXED:
306 fixed = setup->data;
307
308 clk = clk_register_fixed_rate(NULL, setup->name, NULL, 0,
309 fixed->frequency);
310 break;
311 case TI_CLK_MUX:
312 clk = ti_clk_register_mux(setup);
313 break;
314 case TI_CLK_DIVIDER:
315 clk = ti_clk_register_divider(setup);
316 break;
317 case TI_CLK_COMPOSITE:
318 clk = ti_clk_register_composite(setup);
319 break;
320 case TI_CLK_FIXED_FACTOR:
321 fixed_factor = setup->data;
322
323 clk = clk_register_fixed_factor(NULL, setup->name,
324 fixed_factor->parent,
325 0, fixed_factor->mult,
326 fixed_factor->div);
327 break;
328 case TI_CLK_GATE:
329 clk = ti_clk_register_gate(setup);
330 break;
331 case TI_CLK_DPLL:
332 clk = ti_clk_register_dpll(setup);
333 break;
334 default:
335 pr_err("bad type for %s!\n", setup->name);
336 clk = ERR_PTR(-EINVAL);
337 }
338
339 if (!IS_ERR(clk)) {
340 setup->clk = clk;
341 if (setup->clkdm_name) {
342 clk_hw = __clk_get_hw(clk);
343 if (clk_hw_get_flags(clk_hw) & CLK_IS_BASIC) {
344 pr_warn("can't setup clkdm for basic clk %s\n",
345 setup->name);
346 } else {
347 to_clk_hw_omap(clk_hw)->clkdm_name =
348 setup->clkdm_name;
349 omap2_init_clk_clkdm(clk_hw);
350 }
351 }
352 }
353
354 return clk;
355}
356
357int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
358{
359 struct clk *clk;
360 bool retry;
361 struct ti_clk_alias *retry_clk;
362 struct ti_clk_alias *tmp;
363
364 while (clks->clk) {
365 clk = ti_clk_register_clk(clks->clk);
366 if (IS_ERR(clk)) {
367 if (PTR_ERR(clk) == -EAGAIN) {
368 list_add(&clks->link, &retry_list);
369 } else {
370 pr_err("register for %s failed: %ld\n",
371 clks->clk->name, PTR_ERR(clk));
372 return PTR_ERR(clk);
373 }
374 } else {
375 clks->lk.clk = clk;
376 clkdev_add(&clks->lk);
377 }
378 clks++;
379 }
380
381 retry = true;
382
383 while (!list_empty(&retry_list) && retry) {
384 retry = false;
385 list_for_each_entry_safe(retry_clk, tmp, &retry_list, link) {
386 pr_debug("retry-init: %s\n", retry_clk->clk->name);
387 clk = ti_clk_register_clk(retry_clk->clk);
388 if (IS_ERR(clk)) {
389 if (PTR_ERR(clk) == -EAGAIN) {
390 continue;
391 } else {
392 pr_err("register for %s failed: %ld\n",
393 retry_clk->clk->name,
394 PTR_ERR(clk));
395 return PTR_ERR(clk);
396 }
397 } else {
398 retry = true;
399 retry_clk->lk.clk = clk;
400 clkdev_add(&retry_clk->lk);
401 list_del(&retry_clk->link);
402 }
403 }
404 }
405
406 return 0;
407}
408#endif
409
410/**
411 * ti_clk_setup_features - setup clock features flags
412 * @features: features definition to use
413 *
414 * Initializes the clock driver features flags based on platform
415 * provided data. No return value.
416 */
417void __init ti_clk_setup_features(struct ti_clk_features *features)
418{
419 memcpy(&ti_clk_features, features, sizeof(*features));
420}
421
422/**
423 * ti_clk_get_features - get clock driver features flags
424 *
425 * Get TI clock driver features description. Returns a pointer
426 * to the current feature setup.
427 */
428const struct ti_clk_features *ti_clk_get_features(void)
429{
430 return &ti_clk_features;
431}
432
433/**
434 * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
435 * @clk_names: ptr to an array of strings of clock names to enable
436 * @num_clocks: number of clock names in @clk_names
437 *
438 * Prepare and enable a list of clocks, named by @clk_names. No
439 * return value. XXX Deprecated; only needed until these clocks are
440 * properly claimed and enabled by the drivers or core code that uses
441 * them. XXX What code disables & calls clk_put on these clocks?
442 */
443void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
444{
445 struct clk *init_clk;
446 int i;
447
448 for (i = 0; i < num_clocks; i++) {
449 init_clk = clk_get(NULL, clk_names[i]);
450 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
451 clk_names[i]))
452 continue;
453 clk_prepare_enable(init_clk);
454 }
455}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * TI clock support
4 *
5 * Copyright (C) 2013 Texas Instruments, Inc.
6 *
7 * Tero Kristo <t-kristo@ti.com>
8 */
9
10#include <linux/clk.h>
11#include <linux/clk-provider.h>
12#include <linux/clkdev.h>
13#include <linux/clk/ti.h>
14#include <linux/io.h>
15#include <linux/of.h>
16#include <linux/of_address.h>
17#include <linux/list.h>
18#include <linux/regmap.h>
19#include <linux/string_helpers.h>
20#include <linux/memblock.h>
21#include <linux/device.h>
22
23#include "clock.h"
24
25#undef pr_fmt
26#define pr_fmt(fmt) "%s: " fmt, __func__
27
28static LIST_HEAD(clk_hw_omap_clocks);
29struct ti_clk_ll_ops *ti_clk_ll_ops;
30static struct device_node *clocks_node_ptr[CLK_MAX_MEMMAPS];
31
32struct ti_clk_features ti_clk_features;
33
34struct clk_iomap {
35 struct regmap *regmap;
36 void __iomem *mem;
37};
38
39static struct clk_iomap *clk_memmaps[CLK_MAX_MEMMAPS];
40
41static void clk_memmap_writel(u32 val, const struct clk_omap_reg *reg)
42{
43 struct clk_iomap *io = clk_memmaps[reg->index];
44
45 if (reg->ptr)
46 writel_relaxed(val, reg->ptr);
47 else if (io->regmap)
48 regmap_write(io->regmap, reg->offset, val);
49 else
50 writel_relaxed(val, io->mem + reg->offset);
51}
52
53static void _clk_rmw(u32 val, u32 mask, void __iomem *ptr)
54{
55 u32 v;
56
57 v = readl_relaxed(ptr);
58 v &= ~mask;
59 v |= val;
60 writel_relaxed(v, ptr);
61}
62
63static void clk_memmap_rmw(u32 val, u32 mask, const struct clk_omap_reg *reg)
64{
65 struct clk_iomap *io = clk_memmaps[reg->index];
66
67 if (reg->ptr) {
68 _clk_rmw(val, mask, reg->ptr);
69 } else if (io->regmap) {
70 regmap_update_bits(io->regmap, reg->offset, mask, val);
71 } else {
72 _clk_rmw(val, mask, io->mem + reg->offset);
73 }
74}
75
76static u32 clk_memmap_readl(const struct clk_omap_reg *reg)
77{
78 u32 val;
79 struct clk_iomap *io = clk_memmaps[reg->index];
80
81 if (reg->ptr)
82 val = readl_relaxed(reg->ptr);
83 else if (io->regmap)
84 regmap_read(io->regmap, reg->offset, &val);
85 else
86 val = readl_relaxed(io->mem + reg->offset);
87
88 return val;
89}
90
91/**
92 * ti_clk_setup_ll_ops - setup low level clock operations
93 * @ops: low level clock ops descriptor
94 *
95 * Sets up low level clock operations for TI clock driver. This is used
96 * to provide various callbacks for the clock driver towards platform
97 * specific code. Returns 0 on success, -EBUSY if ll_ops have been
98 * registered already.
99 */
100int ti_clk_setup_ll_ops(struct ti_clk_ll_ops *ops)
101{
102 if (ti_clk_ll_ops) {
103 pr_err("Attempt to register ll_ops multiple times.\n");
104 return -EBUSY;
105 }
106
107 ti_clk_ll_ops = ops;
108 ops->clk_readl = clk_memmap_readl;
109 ops->clk_writel = clk_memmap_writel;
110 ops->clk_rmw = clk_memmap_rmw;
111
112 return 0;
113}
114
115/*
116 * Eventually we could standardize to using '_' for clk-*.c files to follow the
117 * TRM naming and leave out the tmp name here.
118 */
119static struct device_node *ti_find_clock_provider(struct device_node *from,
120 const char *name)
121{
122 struct device_node *np;
123 bool found = false;
124 const char *n;
125 char *tmp;
126
127 tmp = kstrdup_and_replace(name, '-', '_', GFP_KERNEL);
128 if (!tmp)
129 return NULL;
130
131 /* Node named "clock" with "clock-output-names" */
132 for_each_of_allnodes_from(from, np) {
133 if (of_property_read_string_index(np, "clock-output-names",
134 0, &n))
135 continue;
136
137 if (!strncmp(n, tmp, strlen(tmp))) {
138 of_node_get(np);
139 found = true;
140 break;
141 }
142 }
143 kfree(tmp);
144
145 if (found) {
146 of_node_put(from);
147 return np;
148 }
149
150 /* Fall back to using old node name base provider name */
151 return of_find_node_by_name(from, name);
152}
153
154/**
155 * ti_dt_clocks_register - register DT alias clocks during boot
156 * @oclks: list of clocks to register
157 *
158 * Register alias or non-standard DT clock entries during boot. By
159 * default, DT clocks are found based on their clock-output-names
160 * property, or the clock node name for legacy cases. If any
161 * additional con-id / dev-id -> clock mapping is required, use this
162 * function to list these.
163 */
164void __init ti_dt_clocks_register(struct ti_dt_clk oclks[])
165{
166 struct ti_dt_clk *c;
167 struct device_node *node, *parent, *child;
168 struct clk *clk;
169 struct of_phandle_args clkspec;
170 char buf[64];
171 char *ptr;
172 char *tags[2];
173 int i;
174 int num_args;
175 int ret;
176 static bool clkctrl_nodes_missing;
177 static bool has_clkctrl_data;
178 static bool compat_mode;
179
180 compat_mode = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT;
181
182 for (c = oclks; c->node_name != NULL; c++) {
183 strcpy(buf, c->node_name);
184 ptr = buf;
185 for (i = 0; i < 2; i++)
186 tags[i] = NULL;
187 num_args = 0;
188 while (*ptr) {
189 if (*ptr == ':') {
190 if (num_args >= 2) {
191 pr_warn("Bad number of tags on %s\n",
192 c->node_name);
193 return;
194 }
195 tags[num_args++] = ptr + 1;
196 *ptr = 0;
197 }
198 ptr++;
199 }
200
201 if (num_args && clkctrl_nodes_missing)
202 continue;
203
204 node = ti_find_clock_provider(NULL, buf);
205 if (num_args && compat_mode) {
206 parent = node;
207 child = of_get_child_by_name(parent, "clock");
208 if (!child)
209 child = of_get_child_by_name(parent, "clk");
210 if (child) {
211 of_node_put(parent);
212 node = child;
213 }
214 }
215
216 clkspec.np = node;
217 clkspec.args_count = num_args;
218 for (i = 0; i < num_args; i++) {
219 ret = kstrtoint(tags[i], i ? 10 : 16, clkspec.args + i);
220 if (ret) {
221 pr_warn("Bad tag in %s at %d: %s\n",
222 c->node_name, i, tags[i]);
223 of_node_put(node);
224 return;
225 }
226 }
227 clk = of_clk_get_from_provider(&clkspec);
228 of_node_put(node);
229 if (!IS_ERR(clk)) {
230 c->lk.clk = clk;
231 clkdev_add(&c->lk);
232 } else {
233 if (num_args && !has_clkctrl_data) {
234 struct device_node *np;
235
236 np = of_find_compatible_node(NULL, NULL,
237 "ti,clkctrl");
238 if (np) {
239 has_clkctrl_data = true;
240 of_node_put(np);
241 } else {
242 clkctrl_nodes_missing = true;
243
244 pr_warn("missing clkctrl nodes, please update your dts.\n");
245 continue;
246 }
247 }
248
249 pr_warn("failed to lookup clock node %s, ret=%ld\n",
250 c->node_name, PTR_ERR(clk));
251 }
252 }
253}
254
255struct clk_init_item {
256 struct device_node *node;
257 void *user;
258 ti_of_clk_init_cb_t func;
259 struct list_head link;
260};
261
262static LIST_HEAD(retry_list);
263
264/**
265 * ti_clk_retry_init - retries a failed clock init at later phase
266 * @node: device node for the clock
267 * @user: user data pointer
268 * @func: init function to be called for the clock
269 *
270 * Adds a failed clock init to the retry list. The retry list is parsed
271 * once all the other clocks have been initialized.
272 */
273int __init ti_clk_retry_init(struct device_node *node, void *user,
274 ti_of_clk_init_cb_t func)
275{
276 struct clk_init_item *retry;
277
278 pr_debug("%pOFn: adding to retry list...\n", node);
279 retry = kzalloc(sizeof(*retry), GFP_KERNEL);
280 if (!retry)
281 return -ENOMEM;
282
283 retry->node = node;
284 retry->func = func;
285 retry->user = user;
286 list_add(&retry->link, &retry_list);
287
288 return 0;
289}
290
291/**
292 * ti_clk_get_reg_addr - get register address for a clock register
293 * @node: device node for the clock
294 * @index: register index from the clock node
295 * @reg: pointer to target register struct
296 *
297 * Builds clock register address from device tree information, and returns
298 * the data via the provided output pointer @reg. Returns 0 on success,
299 * negative error value on failure.
300 */
301int ti_clk_get_reg_addr(struct device_node *node, int index,
302 struct clk_omap_reg *reg)
303{
304 u32 val;
305 int i;
306
307 for (i = 0; i < CLK_MAX_MEMMAPS; i++) {
308 if (clocks_node_ptr[i] == node->parent)
309 break;
310 if (clocks_node_ptr[i] == node->parent->parent)
311 break;
312 }
313
314 if (i == CLK_MAX_MEMMAPS) {
315 pr_err("clk-provider not found for %pOFn!\n", node);
316 return -ENOENT;
317 }
318
319 reg->index = i;
320
321 if (of_property_read_u32_index(node, "reg", index, &val)) {
322 if (of_property_read_u32_index(node->parent, "reg",
323 index, &val)) {
324 pr_err("%pOFn or parent must have reg[%d]!\n",
325 node, index);
326 return -EINVAL;
327 }
328 }
329
330 reg->offset = val;
331 reg->ptr = NULL;
332
333 return 0;
334}
335
336void ti_clk_latch(struct clk_omap_reg *reg, s8 shift)
337{
338 u32 latch;
339
340 if (shift < 0)
341 return;
342
343 latch = 1 << shift;
344
345 ti_clk_ll_ops->clk_rmw(latch, latch, reg);
346 ti_clk_ll_ops->clk_rmw(0, latch, reg);
347 ti_clk_ll_ops->clk_readl(reg); /* OCP barrier */
348}
349
350/**
351 * omap2_clk_provider_init - init master clock provider
352 * @parent: master node
353 * @index: internal index for clk_reg_ops
354 * @syscon: syscon regmap pointer for accessing clock registers
355 * @mem: iomem pointer for the clock provider memory area, only used if
356 * syscon is not provided
357 *
358 * Initializes a master clock IP block. This basically sets up the
359 * mapping from clocks node to the memory map index. All the clocks
360 * are then initialized through the common of_clk_init call, and the
361 * clocks will access their memory maps based on the node layout.
362 * Returns 0 in success.
363 */
364int __init omap2_clk_provider_init(struct device_node *parent, int index,
365 struct regmap *syscon, void __iomem *mem)
366{
367 struct device_node *clocks;
368 struct clk_iomap *io;
369
370 /* get clocks for this parent */
371 clocks = of_get_child_by_name(parent, "clocks");
372 if (!clocks) {
373 pr_err("%pOFn missing 'clocks' child node.\n", parent);
374 return -EINVAL;
375 }
376
377 /* add clocks node info */
378 clocks_node_ptr[index] = clocks;
379
380 io = kzalloc(sizeof(*io), GFP_KERNEL);
381 if (!io)
382 return -ENOMEM;
383
384 io->regmap = syscon;
385 io->mem = mem;
386
387 clk_memmaps[index] = io;
388
389 return 0;
390}
391
392/**
393 * omap2_clk_legacy_provider_init - initialize a legacy clock provider
394 * @index: index for the clock provider
395 * @mem: iomem pointer for the clock provider memory area
396 *
397 * Initializes a legacy clock provider memory mapping.
398 */
399void __init omap2_clk_legacy_provider_init(int index, void __iomem *mem)
400{
401 struct clk_iomap *io;
402
403 io = memblock_alloc(sizeof(*io), SMP_CACHE_BYTES);
404 if (!io)
405 panic("%s: Failed to allocate %zu bytes\n", __func__,
406 sizeof(*io));
407
408 io->mem = mem;
409
410 clk_memmaps[index] = io;
411}
412
413/**
414 * ti_dt_clk_init_retry_clks - init clocks from the retry list
415 *
416 * Initializes any clocks that have failed to initialize before,
417 * reasons being missing parent node(s) during earlier init. This
418 * typically happens only for DPLLs which need to have both of their
419 * parent clocks ready during init.
420 */
421void ti_dt_clk_init_retry_clks(void)
422{
423 struct clk_init_item *retry;
424 struct clk_init_item *tmp;
425 int retries = 5;
426
427 while (!list_empty(&retry_list) && retries) {
428 list_for_each_entry_safe(retry, tmp, &retry_list, link) {
429 pr_debug("retry-init: %pOFn\n", retry->node);
430 retry->func(retry->user, retry->node);
431 list_del(&retry->link);
432 kfree(retry);
433 }
434 retries--;
435 }
436}
437
438static const struct of_device_id simple_clk_match_table[] __initconst = {
439 { .compatible = "fixed-clock" },
440 { .compatible = "fixed-factor-clock" },
441 { }
442};
443
444/**
445 * ti_dt_clk_name - init clock name from first output name or node name
446 * @np: device node
447 *
448 * Use the first clock-output-name for the clock name if found. Fall back
449 * to legacy naming based on node name.
450 */
451const char *ti_dt_clk_name(struct device_node *np)
452{
453 const char *name;
454
455 if (!of_property_read_string_index(np, "clock-output-names", 0,
456 &name))
457 return name;
458
459 return np->name;
460}
461
462/**
463 * ti_clk_add_aliases - setup clock aliases
464 *
465 * Sets up any missing clock aliases. No return value.
466 */
467void __init ti_clk_add_aliases(void)
468{
469 struct device_node *np;
470 struct clk *clk;
471
472 for_each_matching_node(np, simple_clk_match_table) {
473 struct of_phandle_args clkspec;
474
475 clkspec.np = np;
476 clk = of_clk_get_from_provider(&clkspec);
477
478 ti_clk_add_alias(clk, ti_dt_clk_name(np));
479 }
480}
481
482/**
483 * ti_clk_setup_features - setup clock features flags
484 * @features: features definition to use
485 *
486 * Initializes the clock driver features flags based on platform
487 * provided data. No return value.
488 */
489void __init ti_clk_setup_features(struct ti_clk_features *features)
490{
491 memcpy(&ti_clk_features, features, sizeof(*features));
492}
493
494/**
495 * ti_clk_get_features - get clock driver features flags
496 *
497 * Get TI clock driver features description. Returns a pointer
498 * to the current feature setup.
499 */
500const struct ti_clk_features *ti_clk_get_features(void)
501{
502 return &ti_clk_features;
503}
504
505/**
506 * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
507 * @clk_names: ptr to an array of strings of clock names to enable
508 * @num_clocks: number of clock names in @clk_names
509 *
510 * Prepare and enable a list of clocks, named by @clk_names. No
511 * return value. XXX Deprecated; only needed until these clocks are
512 * properly claimed and enabled by the drivers or core code that uses
513 * them. XXX What code disables & calls clk_put on these clocks?
514 */
515void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
516{
517 struct clk *init_clk;
518 int i;
519
520 for (i = 0; i < num_clocks; i++) {
521 init_clk = clk_get(NULL, clk_names[i]);
522 if (WARN(IS_ERR(init_clk), "could not find init clock %s\n",
523 clk_names[i]))
524 continue;
525 clk_prepare_enable(init_clk);
526 }
527}
528
529/**
530 * ti_clk_add_alias - add a clock alias for a TI clock
531 * @clk: clock handle to create alias for
532 * @con: connection ID for this clock
533 *
534 * Creates a clock alias for a TI clock. Allocates the clock lookup entry
535 * and assigns the data to it. Returns 0 if successful, negative error
536 * value otherwise.
537 */
538int ti_clk_add_alias(struct clk *clk, const char *con)
539{
540 struct clk_lookup *cl;
541
542 if (!clk)
543 return 0;
544
545 if (IS_ERR(clk))
546 return PTR_ERR(clk);
547
548 cl = kzalloc(sizeof(*cl), GFP_KERNEL);
549 if (!cl)
550 return -ENOMEM;
551
552 cl->con_id = con;
553 cl->clk = clk;
554
555 clkdev_add(cl);
556
557 return 0;
558}
559
560/**
561 * of_ti_clk_register - register a TI clock to the common clock framework
562 * @node: device node for this clock
563 * @hw: hardware clock handle
564 * @con: connection ID for this clock
565 *
566 * Registers a TI clock to the common clock framework, and adds a clock
567 * alias for it. Returns a handle to the registered clock if successful,
568 * ERR_PTR value in failure.
569 */
570struct clk *of_ti_clk_register(struct device_node *node, struct clk_hw *hw,
571 const char *con)
572{
573 struct clk *clk;
574 int ret;
575
576 ret = of_clk_hw_register(node, hw);
577 if (ret)
578 return ERR_PTR(ret);
579
580 clk = hw->clk;
581 ret = ti_clk_add_alias(clk, con);
582 if (ret) {
583 clk_unregister(clk);
584 return ERR_PTR(ret);
585 }
586
587 return clk;
588}
589
590/**
591 * of_ti_clk_register_omap_hw - register a clk_hw_omap to the clock framework
592 * @node: device node for this clock
593 * @hw: hardware clock handle
594 * @con: connection ID for this clock
595 *
596 * Registers a clk_hw_omap clock to the clock framewor, adds a clock alias
597 * for it, and adds the list to the available clk_hw_omap type clocks.
598 * Returns a handle to the registered clock if successful, ERR_PTR value
599 * in failure.
600 */
601struct clk *of_ti_clk_register_omap_hw(struct device_node *node,
602 struct clk_hw *hw, const char *con)
603{
604 struct clk *clk;
605 struct clk_hw_omap *oclk;
606
607 clk = of_ti_clk_register(node, hw, con);
608 if (IS_ERR(clk))
609 return clk;
610
611 oclk = to_clk_hw_omap(hw);
612
613 list_add(&oclk->node, &clk_hw_omap_clocks);
614
615 return clk;
616}
617
618/**
619 * omap2_clk_for_each - call function for each registered clk_hw_omap
620 * @fn: pointer to a callback function
621 *
622 * Call @fn for each registered clk_hw_omap, passing @hw to each
623 * function. @fn must return 0 for success or any other value for
624 * failure. If @fn returns non-zero, the iteration across clocks
625 * will stop and the non-zero return value will be passed to the
626 * caller of omap2_clk_for_each().
627 */
628int omap2_clk_for_each(int (*fn)(struct clk_hw_omap *hw))
629{
630 int ret;
631 struct clk_hw_omap *hw;
632
633 list_for_each_entry(hw, &clk_hw_omap_clocks, node) {
634 ret = (*fn)(hw);
635 if (ret)
636 break;
637 }
638
639 return ret;
640}
641
642/**
643 * omap2_clk_is_hw_omap - check if the provided clk_hw is OMAP clock
644 * @hw: clk_hw to check if it is an omap clock or not
645 *
646 * Checks if the provided clk_hw is OMAP clock or not. Returns true if
647 * it is, false otherwise.
648 */
649bool omap2_clk_is_hw_omap(struct clk_hw *hw)
650{
651 struct clk_hw_omap *oclk;
652
653 list_for_each_entry(oclk, &clk_hw_omap_clocks, node) {
654 if (&oclk->hw == hw)
655 return true;
656 }
657
658 return false;
659}