Loading...
1/*
2 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
3 *
4 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
5 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 */
25
26#include <linux/init.h>
27#include <linux/acpi.h>
28#include <linux/acpi_pmtmr.h>
29#include <linux/efi.h>
30#include <linux/cpumask.h>
31#include <linux/module.h>
32#include <linux/dmi.h>
33#include <linux/irq.h>
34#include <linux/slab.h>
35#include <linux/bootmem.h>
36#include <linux/ioport.h>
37#include <linux/pci.h>
38
39#include <asm/irqdomain.h>
40#include <asm/pci_x86.h>
41#include <asm/pgtable.h>
42#include <asm/io_apic.h>
43#include <asm/apic.h>
44#include <asm/io.h>
45#include <asm/mpspec.h>
46#include <asm/smp.h>
47#include <asm/i8259.h>
48
49#include "sleep.h" /* To include x86_acpi_suspend_lowlevel */
50static int __initdata acpi_force = 0;
51int acpi_disabled;
52EXPORT_SYMBOL(acpi_disabled);
53
54#ifdef CONFIG_X86_64
55# include <asm/proto.h>
56#endif /* X86 */
57
58#define PREFIX "ACPI: "
59
60int acpi_noirq; /* skip ACPI IRQ initialization */
61int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
62EXPORT_SYMBOL(acpi_pci_disabled);
63
64int acpi_lapic;
65int acpi_ioapic;
66int acpi_strict;
67int acpi_disable_cmcff;
68
69u8 acpi_sci_flags __initdata;
70int acpi_sci_override_gsi __initdata;
71int acpi_skip_timer_override __initdata;
72int acpi_use_timer_override __initdata;
73int acpi_fix_pin2_polarity __initdata;
74
75#ifdef CONFIG_X86_LOCAL_APIC
76static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
77#endif
78
79/*
80 * Locks related to IOAPIC hotplug
81 * Hotplug side:
82 * ->device_hotplug_lock
83 * ->acpi_ioapic_lock
84 * ->ioapic_lock
85 * Interrupt mapping side:
86 * ->acpi_ioapic_lock
87 * ->ioapic_mutex
88 * ->ioapic_lock
89 */
90static DEFINE_MUTEX(acpi_ioapic_lock);
91
92/* --------------------------------------------------------------------------
93 Boot-time Configuration
94 -------------------------------------------------------------------------- */
95
96/*
97 * The default interrupt routing model is PIC (8259). This gets
98 * overridden if IOAPICs are enumerated (below).
99 */
100enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
101
102
103/*
104 * ISA irqs by default are the first 16 gsis but can be
105 * any gsi as specified by an interrupt source override.
106 */
107static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
108 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
109};
110
111#define ACPI_INVALID_GSI INT_MIN
112
113/*
114 * This is just a simple wrapper around early_ioremap(),
115 * with sanity checks for phys == 0 and size == 0.
116 */
117char *__init __acpi_map_table(unsigned long phys, unsigned long size)
118{
119
120 if (!phys || !size)
121 return NULL;
122
123 return early_ioremap(phys, size);
124}
125
126void __init __acpi_unmap_table(char *map, unsigned long size)
127{
128 if (!map || !size)
129 return;
130
131 early_iounmap(map, size);
132}
133
134#ifdef CONFIG_X86_LOCAL_APIC
135static int __init acpi_parse_madt(struct acpi_table_header *table)
136{
137 struct acpi_table_madt *madt = NULL;
138
139 if (!cpu_has_apic)
140 return -EINVAL;
141
142 madt = (struct acpi_table_madt *)table;
143 if (!madt) {
144 printk(KERN_WARNING PREFIX "Unable to map MADT\n");
145 return -ENODEV;
146 }
147
148 if (madt->address) {
149 acpi_lapic_addr = (u64) madt->address;
150
151 printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n",
152 madt->address);
153 }
154
155 default_acpi_madt_oem_check(madt->header.oem_id,
156 madt->header.oem_table_id);
157
158 return 0;
159}
160
161/**
162 * acpi_register_lapic - register a local apic and generates a logic cpu number
163 * @id: local apic id to register
164 * @enabled: this cpu is enabled or not
165 *
166 * Returns the logic cpu number which maps to the local apic
167 */
168static int acpi_register_lapic(int id, u8 enabled)
169{
170 unsigned int ver = 0;
171
172 if (id >= MAX_LOCAL_APIC) {
173 printk(KERN_INFO PREFIX "skipped apicid that is too big\n");
174 return -EINVAL;
175 }
176
177 if (!enabled) {
178 ++disabled_cpus;
179 return -EINVAL;
180 }
181
182 if (boot_cpu_physical_apicid != -1U)
183 ver = apic_version[boot_cpu_physical_apicid];
184
185 return generic_processor_info(id, ver);
186}
187
188static int __init
189acpi_parse_x2apic(struct acpi_subtable_header *header, const unsigned long end)
190{
191 struct acpi_madt_local_x2apic *processor = NULL;
192 int apic_id;
193 u8 enabled;
194
195 processor = (struct acpi_madt_local_x2apic *)header;
196
197 if (BAD_MADT_ENTRY(processor, end))
198 return -EINVAL;
199
200 acpi_table_print_madt_entry(header);
201
202 apic_id = processor->local_apic_id;
203 enabled = processor->lapic_flags & ACPI_MADT_ENABLED;
204#ifdef CONFIG_X86_X2APIC
205 /*
206 * We need to register disabled CPU as well to permit
207 * counting disabled CPUs. This allows us to size
208 * cpus_possible_map more accurately, to permit
209 * to not preallocating memory for all NR_CPUS
210 * when we use CPU hotplug.
211 */
212 if (!apic->apic_id_valid(apic_id) && enabled)
213 printk(KERN_WARNING PREFIX "x2apic entry ignored\n");
214 else
215 acpi_register_lapic(apic_id, enabled);
216#else
217 printk(KERN_WARNING PREFIX "x2apic entry ignored\n");
218#endif
219
220 return 0;
221}
222
223static int __init
224acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end)
225{
226 struct acpi_madt_local_apic *processor = NULL;
227
228 processor = (struct acpi_madt_local_apic *)header;
229
230 if (BAD_MADT_ENTRY(processor, end))
231 return -EINVAL;
232
233 acpi_table_print_madt_entry(header);
234
235 /*
236 * We need to register disabled CPU as well to permit
237 * counting disabled CPUs. This allows us to size
238 * cpus_possible_map more accurately, to permit
239 * to not preallocating memory for all NR_CPUS
240 * when we use CPU hotplug.
241 */
242 acpi_register_lapic(processor->id, /* APIC ID */
243 processor->lapic_flags & ACPI_MADT_ENABLED);
244
245 return 0;
246}
247
248static int __init
249acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end)
250{
251 struct acpi_madt_local_sapic *processor = NULL;
252
253 processor = (struct acpi_madt_local_sapic *)header;
254
255 if (BAD_MADT_ENTRY(processor, end))
256 return -EINVAL;
257
258 acpi_table_print_madt_entry(header);
259
260 acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */
261 processor->lapic_flags & ACPI_MADT_ENABLED);
262
263 return 0;
264}
265
266static int __init
267acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
268 const unsigned long end)
269{
270 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
271
272 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
273
274 if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
275 return -EINVAL;
276
277 acpi_lapic_addr = lapic_addr_ovr->address;
278
279 return 0;
280}
281
282static int __init
283acpi_parse_x2apic_nmi(struct acpi_subtable_header *header,
284 const unsigned long end)
285{
286 struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL;
287
288 x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header;
289
290 if (BAD_MADT_ENTRY(x2apic_nmi, end))
291 return -EINVAL;
292
293 acpi_table_print_madt_entry(header);
294
295 if (x2apic_nmi->lint != 1)
296 printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
297
298 return 0;
299}
300
301static int __init
302acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end)
303{
304 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
305
306 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
307
308 if (BAD_MADT_ENTRY(lapic_nmi, end))
309 return -EINVAL;
310
311 acpi_table_print_madt_entry(header);
312
313 if (lapic_nmi->lint != 1)
314 printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
315
316 return 0;
317}
318
319#endif /*CONFIG_X86_LOCAL_APIC */
320
321#ifdef CONFIG_X86_IO_APIC
322#define MP_ISA_BUS 0
323
324static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
325 u32 gsi)
326{
327 int ioapic;
328 int pin;
329 struct mpc_intsrc mp_irq;
330
331 /*
332 * Convert 'gsi' to 'ioapic.pin'.
333 */
334 ioapic = mp_find_ioapic(gsi);
335 if (ioapic < 0)
336 return;
337 pin = mp_find_ioapic_pin(ioapic, gsi);
338
339 /*
340 * TBD: This check is for faulty timer entries, where the override
341 * erroneously sets the trigger to level, resulting in a HUGE
342 * increase of timer interrupts!
343 */
344 if ((bus_irq == 0) && (trigger == 3))
345 trigger = 1;
346
347 mp_irq.type = MP_INTSRC;
348 mp_irq.irqtype = mp_INT;
349 mp_irq.irqflag = (trigger << 2) | polarity;
350 mp_irq.srcbus = MP_ISA_BUS;
351 mp_irq.srcbusirq = bus_irq; /* IRQ */
352 mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
353 mp_irq.dstirq = pin; /* INTIN# */
354
355 mp_save_irq(&mp_irq);
356
357 /*
358 * Reset default identity mapping if gsi is also an legacy IRQ,
359 * otherwise there will be more than one entry with the same GSI
360 * and acpi_isa_irq_to_gsi() may give wrong result.
361 */
362 if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi)
363 isa_irq_to_gsi[gsi] = ACPI_INVALID_GSI;
364 isa_irq_to_gsi[bus_irq] = gsi;
365}
366
367static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
368 int polarity)
369{
370#ifdef CONFIG_X86_MPPARSE
371 struct mpc_intsrc mp_irq;
372 struct pci_dev *pdev;
373 unsigned char number;
374 unsigned int devfn;
375 int ioapic;
376 u8 pin;
377
378 if (!acpi_ioapic)
379 return 0;
380 if (!dev || !dev_is_pci(dev))
381 return 0;
382
383 pdev = to_pci_dev(dev);
384 number = pdev->bus->number;
385 devfn = pdev->devfn;
386 pin = pdev->pin;
387 /* print the entry should happen on mptable identically */
388 mp_irq.type = MP_INTSRC;
389 mp_irq.irqtype = mp_INT;
390 mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
391 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
392 mp_irq.srcbus = number;
393 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
394 ioapic = mp_find_ioapic(gsi);
395 mp_irq.dstapic = mpc_ioapic_id(ioapic);
396 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
397
398 mp_save_irq(&mp_irq);
399#endif
400 return 0;
401}
402
403static int __init
404acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
405{
406 struct acpi_madt_io_apic *ioapic = NULL;
407 struct ioapic_domain_cfg cfg = {
408 .type = IOAPIC_DOMAIN_DYNAMIC,
409 .ops = &mp_ioapic_irqdomain_ops,
410 };
411
412 ioapic = (struct acpi_madt_io_apic *)header;
413
414 if (BAD_MADT_ENTRY(ioapic, end))
415 return -EINVAL;
416
417 acpi_table_print_madt_entry(header);
418
419 /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */
420 if (ioapic->global_irq_base < nr_legacy_irqs())
421 cfg.type = IOAPIC_DOMAIN_LEGACY;
422
423 mp_register_ioapic(ioapic->id, ioapic->address, ioapic->global_irq_base,
424 &cfg);
425
426 return 0;
427}
428
429/*
430 * Parse Interrupt Source Override for the ACPI SCI
431 */
432static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi)
433{
434 if (trigger == 0) /* compatible SCI trigger is level */
435 trigger = 3;
436
437 if (polarity == 0) /* compatible SCI polarity is low */
438 polarity = 3;
439
440 /* Command-line over-ride via acpi_sci= */
441 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
442 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
443
444 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
445 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
446
447 mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
448 acpi_penalize_sci_irq(bus_irq, trigger, polarity);
449
450 /*
451 * stash over-ride to indicate we've been here
452 * and for later update of acpi_gbl_FADT
453 */
454 acpi_sci_override_gsi = gsi;
455 return;
456}
457
458static int __init
459acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
460 const unsigned long end)
461{
462 struct acpi_madt_interrupt_override *intsrc = NULL;
463
464 intsrc = (struct acpi_madt_interrupt_override *)header;
465
466 if (BAD_MADT_ENTRY(intsrc, end))
467 return -EINVAL;
468
469 acpi_table_print_madt_entry(header);
470
471 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
472 acpi_sci_ioapic_setup(intsrc->source_irq,
473 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
474 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
475 intsrc->global_irq);
476 return 0;
477 }
478
479 if (intsrc->source_irq == 0) {
480 if (acpi_skip_timer_override) {
481 printk(PREFIX "BIOS IRQ0 override ignored.\n");
482 return 0;
483 }
484
485 if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity
486 && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) {
487 intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK;
488 printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n");
489 }
490 }
491
492 mp_override_legacy_irq(intsrc->source_irq,
493 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
494 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
495 intsrc->global_irq);
496
497 return 0;
498}
499
500static int __init
501acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end)
502{
503 struct acpi_madt_nmi_source *nmi_src = NULL;
504
505 nmi_src = (struct acpi_madt_nmi_source *)header;
506
507 if (BAD_MADT_ENTRY(nmi_src, end))
508 return -EINVAL;
509
510 acpi_table_print_madt_entry(header);
511
512 /* TBD: Support nimsrc entries? */
513
514 return 0;
515}
516
517#endif /* CONFIG_X86_IO_APIC */
518
519/*
520 * acpi_pic_sci_set_trigger()
521 *
522 * use ELCR to set PIC-mode trigger type for SCI
523 *
524 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
525 * it may require Edge Trigger -- use "acpi_sci=edge"
526 *
527 * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
528 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
529 * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
530 * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
531 */
532
533void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
534{
535 unsigned int mask = 1 << irq;
536 unsigned int old, new;
537
538 /* Real old ELCR mask */
539 old = inb(0x4d0) | (inb(0x4d1) << 8);
540
541 /*
542 * If we use ACPI to set PCI IRQs, then we should clear ELCR
543 * since we will set it correctly as we enable the PCI irq
544 * routing.
545 */
546 new = acpi_noirq ? old : 0;
547
548 /*
549 * Update SCI information in the ELCR, it isn't in the PCI
550 * routing tables..
551 */
552 switch (trigger) {
553 case 1: /* Edge - clear */
554 new &= ~mask;
555 break;
556 case 3: /* Level - set */
557 new |= mask;
558 break;
559 }
560
561 if (old == new)
562 return;
563
564 printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
565 outb(new, 0x4d0);
566 outb(new >> 8, 0x4d1);
567}
568
569int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
570{
571 int rc, irq, trigger, polarity;
572
573 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
574 *irqp = gsi;
575 return 0;
576 }
577
578 rc = acpi_get_override_irq(gsi, &trigger, &polarity);
579 if (rc == 0) {
580 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
581 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
582 irq = acpi_register_gsi(NULL, gsi, trigger, polarity);
583 if (irq >= 0) {
584 *irqp = irq;
585 return 0;
586 }
587 }
588
589 return -1;
590}
591EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
592
593int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
594{
595 if (isa_irq < nr_legacy_irqs() &&
596 isa_irq_to_gsi[isa_irq] != ACPI_INVALID_GSI) {
597 *gsi = isa_irq_to_gsi[isa_irq];
598 return 0;
599 }
600
601 return -1;
602}
603
604static int acpi_register_gsi_pic(struct device *dev, u32 gsi,
605 int trigger, int polarity)
606{
607#ifdef CONFIG_PCI
608 /*
609 * Make sure all (legacy) PCI IRQs are set as level-triggered.
610 */
611 if (trigger == ACPI_LEVEL_SENSITIVE)
612 elcr_set_level_irq(gsi);
613#endif
614
615 return gsi;
616}
617
618#ifdef CONFIG_X86_LOCAL_APIC
619static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,
620 int trigger, int polarity)
621{
622 int irq = gsi;
623#ifdef CONFIG_X86_IO_APIC
624 int node;
625 struct irq_alloc_info info;
626
627 node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
628 trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
629 polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
630 ioapic_set_alloc_attr(&info, node, trigger, polarity);
631
632 mutex_lock(&acpi_ioapic_lock);
633 irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, &info);
634 /* Don't set up the ACPI SCI because it's already set up */
635 if (irq >= 0 && enable_update_mptable &&
636 acpi_gbl_FADT.sci_interrupt != gsi)
637 mp_config_acpi_gsi(dev, gsi, trigger, polarity);
638 mutex_unlock(&acpi_ioapic_lock);
639#endif
640
641 return irq;
642}
643
644static void acpi_unregister_gsi_ioapic(u32 gsi)
645{
646#ifdef CONFIG_X86_IO_APIC
647 int irq;
648
649 mutex_lock(&acpi_ioapic_lock);
650 irq = mp_map_gsi_to_irq(gsi, 0, NULL);
651 if (irq > 0)
652 mp_unmap_irq(irq);
653 mutex_unlock(&acpi_ioapic_lock);
654#endif
655}
656#endif
657
658int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
659 int trigger, int polarity) = acpi_register_gsi_pic;
660void (*__acpi_unregister_gsi)(u32 gsi) = NULL;
661
662#ifdef CONFIG_ACPI_SLEEP
663int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel;
664#else
665int (*acpi_suspend_lowlevel)(void);
666#endif
667
668/*
669 * success: return IRQ number (>=0)
670 * failure: return < 0
671 */
672int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
673{
674 return __acpi_register_gsi(dev, gsi, trigger, polarity);
675}
676EXPORT_SYMBOL_GPL(acpi_register_gsi);
677
678void acpi_unregister_gsi(u32 gsi)
679{
680 if (__acpi_unregister_gsi)
681 __acpi_unregister_gsi(gsi);
682}
683EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
684
685#ifdef CONFIG_X86_LOCAL_APIC
686static void __init acpi_set_irq_model_ioapic(void)
687{
688 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
689 __acpi_register_gsi = acpi_register_gsi_ioapic;
690 __acpi_unregister_gsi = acpi_unregister_gsi_ioapic;
691 acpi_ioapic = 1;
692}
693#endif
694
695/*
696 * ACPI based hotplug support for CPU
697 */
698#ifdef CONFIG_ACPI_HOTPLUG_CPU
699#include <acpi/processor.h>
700
701static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
702{
703#ifdef CONFIG_ACPI_NUMA
704 int nid;
705
706 nid = acpi_get_node(handle);
707 if (nid != -1) {
708 set_apicid_to_node(physid, nid);
709 numa_set_node(cpu, nid);
710 }
711#endif
712}
713
714int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, int *pcpu)
715{
716 int cpu;
717
718 cpu = acpi_register_lapic(physid, ACPI_MADT_ENABLED);
719 if (cpu < 0) {
720 pr_info(PREFIX "Unable to map lapic to logical cpu number\n");
721 return cpu;
722 }
723
724 acpi_processor_set_pdc(handle);
725 acpi_map_cpu2node(handle, cpu, physid);
726
727 *pcpu = cpu;
728 return 0;
729}
730EXPORT_SYMBOL(acpi_map_cpu);
731
732int acpi_unmap_cpu(int cpu)
733{
734#ifdef CONFIG_ACPI_NUMA
735 set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE);
736#endif
737
738 per_cpu(x86_cpu_to_apicid, cpu) = -1;
739 set_cpu_present(cpu, false);
740 num_processors--;
741
742 return (0);
743}
744EXPORT_SYMBOL(acpi_unmap_cpu);
745#endif /* CONFIG_ACPI_HOTPLUG_CPU */
746
747int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
748{
749 int ret = -ENOSYS;
750#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
751 int ioapic_id;
752 u64 addr;
753 struct ioapic_domain_cfg cfg = {
754 .type = IOAPIC_DOMAIN_DYNAMIC,
755 .ops = &mp_ioapic_irqdomain_ops,
756 };
757
758 ioapic_id = acpi_get_ioapic_id(handle, gsi_base, &addr);
759 if (ioapic_id < 0) {
760 unsigned long long uid;
761 acpi_status status;
762
763 status = acpi_evaluate_integer(handle, METHOD_NAME__UID,
764 NULL, &uid);
765 if (ACPI_FAILURE(status)) {
766 acpi_handle_warn(handle, "failed to get IOAPIC ID.\n");
767 return -EINVAL;
768 }
769 ioapic_id = (int)uid;
770 }
771
772 mutex_lock(&acpi_ioapic_lock);
773 ret = mp_register_ioapic(ioapic_id, phys_addr, gsi_base, &cfg);
774 mutex_unlock(&acpi_ioapic_lock);
775#endif
776
777 return ret;
778}
779EXPORT_SYMBOL(acpi_register_ioapic);
780
781int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
782{
783 int ret = -ENOSYS;
784
785#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
786 mutex_lock(&acpi_ioapic_lock);
787 ret = mp_unregister_ioapic(gsi_base);
788 mutex_unlock(&acpi_ioapic_lock);
789#endif
790
791 return ret;
792}
793EXPORT_SYMBOL(acpi_unregister_ioapic);
794
795/**
796 * acpi_ioapic_registered - Check whether IOAPIC assoicatied with @gsi_base
797 * has been registered
798 * @handle: ACPI handle of the IOAPIC deivce
799 * @gsi_base: GSI base associated with the IOAPIC
800 *
801 * Assume caller holds some type of lock to serialize acpi_ioapic_registered()
802 * with acpi_register_ioapic()/acpi_unregister_ioapic().
803 */
804int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base)
805{
806 int ret = 0;
807
808#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
809 mutex_lock(&acpi_ioapic_lock);
810 ret = mp_ioapic_registered(gsi_base);
811 mutex_unlock(&acpi_ioapic_lock);
812#endif
813
814 return ret;
815}
816
817static int __init acpi_parse_sbf(struct acpi_table_header *table)
818{
819 struct acpi_table_boot *sb = (struct acpi_table_boot *)table;
820
821 sbf_port = sb->cmos_index; /* Save CMOS port */
822
823 return 0;
824}
825
826#ifdef CONFIG_HPET_TIMER
827#include <asm/hpet.h>
828
829static struct resource *hpet_res __initdata;
830
831static int __init acpi_parse_hpet(struct acpi_table_header *table)
832{
833 struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table;
834
835 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
836 printk(KERN_WARNING PREFIX "HPET timers must be located in "
837 "memory.\n");
838 return -1;
839 }
840
841 hpet_address = hpet_tbl->address.address;
842 hpet_blockid = hpet_tbl->sequence;
843
844 /*
845 * Some broken BIOSes advertise HPET at 0x0. We really do not
846 * want to allocate a resource there.
847 */
848 if (!hpet_address) {
849 printk(KERN_WARNING PREFIX
850 "HPET id: %#x base: %#lx is invalid\n",
851 hpet_tbl->id, hpet_address);
852 return 0;
853 }
854#ifdef CONFIG_X86_64
855 /*
856 * Some even more broken BIOSes advertise HPET at
857 * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
858 * some noise:
859 */
860 if (hpet_address == 0xfed0000000000000UL) {
861 if (!hpet_force_user) {
862 printk(KERN_WARNING PREFIX "HPET id: %#x "
863 "base: 0xfed0000000000000 is bogus\n "
864 "try hpet=force on the kernel command line to "
865 "fix it up to 0xfed00000.\n", hpet_tbl->id);
866 hpet_address = 0;
867 return 0;
868 }
869 printk(KERN_WARNING PREFIX
870 "HPET id: %#x base: 0xfed0000000000000 fixed up "
871 "to 0xfed00000.\n", hpet_tbl->id);
872 hpet_address >>= 32;
873 }
874#endif
875 printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
876 hpet_tbl->id, hpet_address);
877
878 /*
879 * Allocate and initialize the HPET firmware resource for adding into
880 * the resource tree during the lateinit timeframe.
881 */
882#define HPET_RESOURCE_NAME_SIZE 9
883 hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
884
885 hpet_res->name = (void *)&hpet_res[1];
886 hpet_res->flags = IORESOURCE_MEM;
887 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
888 hpet_tbl->sequence);
889
890 hpet_res->start = hpet_address;
891 hpet_res->end = hpet_address + (1 * 1024) - 1;
892
893 return 0;
894}
895
896/*
897 * hpet_insert_resource inserts the HPET resources used into the resource
898 * tree.
899 */
900static __init int hpet_insert_resource(void)
901{
902 if (!hpet_res)
903 return 1;
904
905 return insert_resource(&iomem_resource, hpet_res);
906}
907
908late_initcall(hpet_insert_resource);
909
910#else
911#define acpi_parse_hpet NULL
912#endif
913
914static int __init acpi_parse_fadt(struct acpi_table_header *table)
915{
916
917#ifdef CONFIG_X86_PM_TIMER
918 /* detect the location of the ACPI PM Timer */
919 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
920 /* FADT rev. 2 */
921 if (acpi_gbl_FADT.xpm_timer_block.space_id !=
922 ACPI_ADR_SPACE_SYSTEM_IO)
923 return 0;
924
925 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
926 /*
927 * "X" fields are optional extensions to the original V1.0
928 * fields, so we must selectively expand V1.0 fields if the
929 * corresponding X field is zero.
930 */
931 if (!pmtmr_ioport)
932 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
933 } else {
934 /* FADT rev. 1 */
935 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
936 }
937 if (pmtmr_ioport)
938 printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n",
939 pmtmr_ioport);
940#endif
941 return 0;
942}
943
944#ifdef CONFIG_X86_LOCAL_APIC
945/*
946 * Parse LAPIC entries in MADT
947 * returns 0 on success, < 0 on error
948 */
949
950static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
951{
952 int count;
953
954 if (!cpu_has_apic)
955 return -ENODEV;
956
957 /*
958 * Note that the LAPIC address is obtained from the MADT (32-bit value)
959 * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value).
960 */
961
962 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
963 acpi_parse_lapic_addr_ovr, 0);
964 if (count < 0) {
965 printk(KERN_ERR PREFIX
966 "Error parsing LAPIC address override entry\n");
967 return count;
968 }
969
970 register_lapic_address(acpi_lapic_addr);
971
972 return count;
973}
974
975static int __init acpi_parse_madt_lapic_entries(void)
976{
977 int count;
978 int x2count = 0;
979 int ret;
980 struct acpi_subtable_proc madt_proc[2];
981
982 if (!cpu_has_apic)
983 return -ENODEV;
984
985 /*
986 * Note that the LAPIC address is obtained from the MADT (32-bit value)
987 * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value).
988 */
989
990 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
991 acpi_parse_lapic_addr_ovr, 0);
992 if (count < 0) {
993 printk(KERN_ERR PREFIX
994 "Error parsing LAPIC address override entry\n");
995 return count;
996 }
997
998 register_lapic_address(acpi_lapic_addr);
999
1000 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC,
1001 acpi_parse_sapic, MAX_LOCAL_APIC);
1002
1003 if (!count) {
1004 memset(madt_proc, 0, sizeof(madt_proc));
1005 madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC;
1006 madt_proc[0].handler = acpi_parse_lapic;
1007 madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC;
1008 madt_proc[1].handler = acpi_parse_x2apic;
1009 ret = acpi_table_parse_entries_array(ACPI_SIG_MADT,
1010 sizeof(struct acpi_table_madt),
1011 madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC);
1012 if (ret < 0) {
1013 printk(KERN_ERR PREFIX
1014 "Error parsing LAPIC/X2APIC entries\n");
1015 return ret;
1016 }
1017
1018 x2count = madt_proc[0].count;
1019 count = madt_proc[1].count;
1020 }
1021 if (!count && !x2count) {
1022 printk(KERN_ERR PREFIX "No LAPIC entries present\n");
1023 /* TBD: Cleanup to allow fallback to MPS */
1024 return -ENODEV;
1025 } else if (count < 0 || x2count < 0) {
1026 printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n");
1027 /* TBD: Cleanup to allow fallback to MPS */
1028 return count;
1029 }
1030
1031 x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC_NMI,
1032 acpi_parse_x2apic_nmi, 0);
1033 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI,
1034 acpi_parse_lapic_nmi, 0);
1035 if (count < 0 || x2count < 0) {
1036 printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n");
1037 /* TBD: Cleanup to allow fallback to MPS */
1038 return count;
1039 }
1040 return 0;
1041}
1042#endif /* CONFIG_X86_LOCAL_APIC */
1043
1044#ifdef CONFIG_X86_IO_APIC
1045static void __init mp_config_acpi_legacy_irqs(void)
1046{
1047 int i;
1048 struct mpc_intsrc mp_irq;
1049
1050#ifdef CONFIG_EISA
1051 /*
1052 * Fabricate the legacy ISA bus (bus #31).
1053 */
1054 mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
1055#endif
1056 set_bit(MP_ISA_BUS, mp_bus_not_pci);
1057 pr_debug("Bus #%d is ISA\n", MP_ISA_BUS);
1058
1059 /*
1060 * Use the default configuration for the IRQs 0-15. Unless
1061 * overridden by (MADT) interrupt source override entries.
1062 */
1063 for (i = 0; i < nr_legacy_irqs(); i++) {
1064 int ioapic, pin;
1065 unsigned int dstapic;
1066 int idx;
1067 u32 gsi;
1068
1069 /* Locate the gsi that irq i maps to. */
1070 if (acpi_isa_irq_to_gsi(i, &gsi))
1071 continue;
1072
1073 /*
1074 * Locate the IOAPIC that manages the ISA IRQ.
1075 */
1076 ioapic = mp_find_ioapic(gsi);
1077 if (ioapic < 0)
1078 continue;
1079 pin = mp_find_ioapic_pin(ioapic, gsi);
1080 dstapic = mpc_ioapic_id(ioapic);
1081
1082 for (idx = 0; idx < mp_irq_entries; idx++) {
1083 struct mpc_intsrc *irq = mp_irqs + idx;
1084
1085 /* Do we already have a mapping for this ISA IRQ? */
1086 if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i)
1087 break;
1088
1089 /* Do we already have a mapping for this IOAPIC pin */
1090 if (irq->dstapic == dstapic && irq->dstirq == pin)
1091 break;
1092 }
1093
1094 if (idx != mp_irq_entries) {
1095 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
1096 continue; /* IRQ already used */
1097 }
1098
1099 mp_irq.type = MP_INTSRC;
1100 mp_irq.irqflag = 0; /* Conforming */
1101 mp_irq.srcbus = MP_ISA_BUS;
1102 mp_irq.dstapic = dstapic;
1103 mp_irq.irqtype = mp_INT;
1104 mp_irq.srcbusirq = i; /* Identity mapped */
1105 mp_irq.dstirq = pin;
1106
1107 mp_save_irq(&mp_irq);
1108 }
1109}
1110
1111/*
1112 * Parse IOAPIC related entries in MADT
1113 * returns 0 on success, < 0 on error
1114 */
1115static int __init acpi_parse_madt_ioapic_entries(void)
1116{
1117 int count;
1118
1119 /*
1120 * ACPI interpreter is required to complete interrupt setup,
1121 * so if it is off, don't enumerate the io-apics with ACPI.
1122 * If MPS is present, it will handle them,
1123 * otherwise the system will stay in PIC mode
1124 */
1125 if (acpi_disabled || acpi_noirq)
1126 return -ENODEV;
1127
1128 if (!cpu_has_apic)
1129 return -ENODEV;
1130
1131 /*
1132 * if "noapic" boot option, don't look for IO-APICs
1133 */
1134 if (skip_ioapic_setup) {
1135 printk(KERN_INFO PREFIX "Skipping IOAPIC probe "
1136 "due to 'noapic' option.\n");
1137 return -ENODEV;
1138 }
1139
1140 count = acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
1141 MAX_IO_APICS);
1142 if (!count) {
1143 printk(KERN_ERR PREFIX "No IOAPIC entries present\n");
1144 return -ENODEV;
1145 } else if (count < 0) {
1146 printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n");
1147 return count;
1148 }
1149
1150 count = acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE,
1151 acpi_parse_int_src_ovr, nr_irqs);
1152 if (count < 0) {
1153 printk(KERN_ERR PREFIX
1154 "Error parsing interrupt source overrides entry\n");
1155 /* TBD: Cleanup to allow fallback to MPS */
1156 return count;
1157 }
1158
1159 /*
1160 * If BIOS did not supply an INT_SRC_OVR for the SCI
1161 * pretend we got one so we can set the SCI flags.
1162 */
1163 if (!acpi_sci_override_gsi)
1164 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0,
1165 acpi_gbl_FADT.sci_interrupt);
1166
1167 /* Fill in identity legacy mappings where no override */
1168 mp_config_acpi_legacy_irqs();
1169
1170 count = acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE,
1171 acpi_parse_nmi_src, nr_irqs);
1172 if (count < 0) {
1173 printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n");
1174 /* TBD: Cleanup to allow fallback to MPS */
1175 return count;
1176 }
1177
1178 return 0;
1179}
1180#else
1181static inline int acpi_parse_madt_ioapic_entries(void)
1182{
1183 return -1;
1184}
1185#endif /* !CONFIG_X86_IO_APIC */
1186
1187static void __init early_acpi_process_madt(void)
1188{
1189#ifdef CONFIG_X86_LOCAL_APIC
1190 int error;
1191
1192 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1193
1194 /*
1195 * Parse MADT LAPIC entries
1196 */
1197 error = early_acpi_parse_madt_lapic_addr_ovr();
1198 if (!error) {
1199 acpi_lapic = 1;
1200 smp_found_config = 1;
1201 }
1202 if (error == -EINVAL) {
1203 /*
1204 * Dell Precision Workstation 410, 610 come here.
1205 */
1206 printk(KERN_ERR PREFIX
1207 "Invalid BIOS MADT, disabling ACPI\n");
1208 disable_acpi();
1209 }
1210 }
1211#endif
1212}
1213
1214static void __init acpi_process_madt(void)
1215{
1216#ifdef CONFIG_X86_LOCAL_APIC
1217 int error;
1218
1219 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1220
1221 /*
1222 * Parse MADT LAPIC entries
1223 */
1224 error = acpi_parse_madt_lapic_entries();
1225 if (!error) {
1226 acpi_lapic = 1;
1227
1228 /*
1229 * Parse MADT IO-APIC entries
1230 */
1231 mutex_lock(&acpi_ioapic_lock);
1232 error = acpi_parse_madt_ioapic_entries();
1233 mutex_unlock(&acpi_ioapic_lock);
1234 if (!error) {
1235 acpi_set_irq_model_ioapic();
1236
1237 smp_found_config = 1;
1238 }
1239 }
1240 if (error == -EINVAL) {
1241 /*
1242 * Dell Precision Workstation 410, 610 come here.
1243 */
1244 printk(KERN_ERR PREFIX
1245 "Invalid BIOS MADT, disabling ACPI\n");
1246 disable_acpi();
1247 }
1248 } else {
1249 /*
1250 * ACPI found no MADT, and so ACPI wants UP PIC mode.
1251 * In the event an MPS table was found, forget it.
1252 * Boot with "acpi=off" to use MPS on such a system.
1253 */
1254 if (smp_found_config) {
1255 printk(KERN_WARNING PREFIX
1256 "No APIC-table, disabling MPS\n");
1257 smp_found_config = 0;
1258 }
1259 }
1260
1261 /*
1262 * ACPI supports both logical (e.g. Hyper-Threading) and physical
1263 * processors, where MPS only supports physical.
1264 */
1265 if (acpi_lapic && acpi_ioapic)
1266 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
1267 "information\n");
1268 else if (acpi_lapic)
1269 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
1270 "configuration information\n");
1271#endif
1272 return;
1273}
1274
1275static int __init disable_acpi_irq(const struct dmi_system_id *d)
1276{
1277 if (!acpi_force) {
1278 printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
1279 d->ident);
1280 acpi_noirq_set();
1281 }
1282 return 0;
1283}
1284
1285static int __init disable_acpi_pci(const struct dmi_system_id *d)
1286{
1287 if (!acpi_force) {
1288 printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
1289 d->ident);
1290 acpi_disable_pci();
1291 }
1292 return 0;
1293}
1294
1295static int __init dmi_disable_acpi(const struct dmi_system_id *d)
1296{
1297 if (!acpi_force) {
1298 printk(KERN_NOTICE "%s detected: acpi off\n", d->ident);
1299 disable_acpi();
1300 } else {
1301 printk(KERN_NOTICE
1302 "Warning: DMI blacklist says broken, but acpi forced\n");
1303 }
1304 return 0;
1305}
1306
1307/*
1308 * Force ignoring BIOS IRQ0 override
1309 */
1310static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
1311{
1312 if (!acpi_skip_timer_override) {
1313 pr_notice("%s detected: Ignoring BIOS IRQ0 override\n",
1314 d->ident);
1315 acpi_skip_timer_override = 1;
1316 }
1317 return 0;
1318}
1319
1320/*
1321 * ACPI offers an alternative platform interface model that removes
1322 * ACPI hardware requirements for platforms that do not implement
1323 * the PC Architecture.
1324 *
1325 * We initialize the Hardware-reduced ACPI model here:
1326 */
1327static void __init acpi_reduced_hw_init(void)
1328{
1329 if (acpi_gbl_reduced_hardware) {
1330 /*
1331 * Override x86_init functions and bypass legacy pic
1332 * in Hardware-reduced ACPI mode
1333 */
1334 x86_init.timers.timer_init = x86_init_noop;
1335 x86_init.irqs.pre_vector_init = x86_init_noop;
1336 legacy_pic = &null_legacy_pic;
1337 }
1338}
1339
1340/*
1341 * If your system is blacklisted here, but you find that acpi=force
1342 * works for you, please contact linux-acpi@vger.kernel.org
1343 */
1344static struct dmi_system_id __initdata acpi_dmi_table[] = {
1345 /*
1346 * Boxes that need ACPI disabled
1347 */
1348 {
1349 .callback = dmi_disable_acpi,
1350 .ident = "IBM Thinkpad",
1351 .matches = {
1352 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1353 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
1354 },
1355 },
1356
1357 /*
1358 * Boxes that need ACPI PCI IRQ routing disabled
1359 */
1360 {
1361 .callback = disable_acpi_irq,
1362 .ident = "ASUS A7V",
1363 .matches = {
1364 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
1365 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
1366 /* newer BIOS, Revision 1011, does work */
1367 DMI_MATCH(DMI_BIOS_VERSION,
1368 "ASUS A7V ACPI BIOS Revision 1007"),
1369 },
1370 },
1371 {
1372 /*
1373 * Latest BIOS for IBM 600E (1.16) has bad pcinum
1374 * for LPC bridge, which is needed for the PCI
1375 * interrupt links to work. DSDT fix is in bug 5966.
1376 * 2645, 2646 model numbers are shared with 600/600E/600X
1377 */
1378 .callback = disable_acpi_irq,
1379 .ident = "IBM Thinkpad 600 Series 2645",
1380 .matches = {
1381 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1382 DMI_MATCH(DMI_BOARD_NAME, "2645"),
1383 },
1384 },
1385 {
1386 .callback = disable_acpi_irq,
1387 .ident = "IBM Thinkpad 600 Series 2646",
1388 .matches = {
1389 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1390 DMI_MATCH(DMI_BOARD_NAME, "2646"),
1391 },
1392 },
1393 /*
1394 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
1395 */
1396 { /* _BBN 0 bug */
1397 .callback = disable_acpi_pci,
1398 .ident = "ASUS PR-DLS",
1399 .matches = {
1400 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1401 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
1402 DMI_MATCH(DMI_BIOS_VERSION,
1403 "ASUS PR-DLS ACPI BIOS Revision 1010"),
1404 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
1405 },
1406 },
1407 {
1408 .callback = disable_acpi_pci,
1409 .ident = "Acer TravelMate 36x Laptop",
1410 .matches = {
1411 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1412 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1413 },
1414 },
1415 {}
1416};
1417
1418/* second table for DMI checks that should run after early-quirks */
1419static struct dmi_system_id __initdata acpi_dmi_table_late[] = {
1420 /*
1421 * HP laptops which use a DSDT reporting as HP/SB400/10000,
1422 * which includes some code which overrides all temperature
1423 * trip points to 16C if the INTIN2 input of the I/O APIC
1424 * is enabled. This input is incorrectly designated the
1425 * ISA IRQ 0 via an interrupt source override even though
1426 * it is wired to the output of the master 8259A and INTIN0
1427 * is not connected at all. Force ignoring BIOS IRQ0
1428 * override in that cases.
1429 */
1430 {
1431 .callback = dmi_ignore_irq0_timer_override,
1432 .ident = "HP nx6115 laptop",
1433 .matches = {
1434 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1435 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"),
1436 },
1437 },
1438 {
1439 .callback = dmi_ignore_irq0_timer_override,
1440 .ident = "HP NX6125 laptop",
1441 .matches = {
1442 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1443 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"),
1444 },
1445 },
1446 {
1447 .callback = dmi_ignore_irq0_timer_override,
1448 .ident = "HP NX6325 laptop",
1449 .matches = {
1450 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1451 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"),
1452 },
1453 },
1454 {
1455 .callback = dmi_ignore_irq0_timer_override,
1456 .ident = "HP 6715b laptop",
1457 .matches = {
1458 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1459 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"),
1460 },
1461 },
1462 {
1463 .callback = dmi_ignore_irq0_timer_override,
1464 .ident = "FUJITSU SIEMENS",
1465 .matches = {
1466 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
1467 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"),
1468 },
1469 },
1470 {}
1471};
1472
1473/*
1474 * acpi_boot_table_init() and acpi_boot_init()
1475 * called from setup_arch(), always.
1476 * 1. checksums all tables
1477 * 2. enumerates lapics
1478 * 3. enumerates io-apics
1479 *
1480 * acpi_table_init() is separate to allow reading SRAT without
1481 * other side effects.
1482 *
1483 * side effects of acpi_boot_init:
1484 * acpi_lapic = 1 if LAPIC found
1485 * acpi_ioapic = 1 if IOAPIC found
1486 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
1487 * if acpi_blacklisted() acpi_disabled = 1;
1488 * acpi_irq_model=...
1489 * ...
1490 */
1491
1492void __init acpi_boot_table_init(void)
1493{
1494 dmi_check_system(acpi_dmi_table);
1495
1496 /*
1497 * If acpi_disabled, bail out
1498 */
1499 if (acpi_disabled)
1500 return;
1501
1502 /*
1503 * Initialize the ACPI boot-time table parser.
1504 */
1505 if (acpi_table_init()) {
1506 disable_acpi();
1507 return;
1508 }
1509
1510 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1511
1512 /*
1513 * blacklist may disable ACPI entirely
1514 */
1515 if (acpi_blacklisted()) {
1516 if (acpi_force) {
1517 printk(KERN_WARNING PREFIX "acpi=force override\n");
1518 } else {
1519 printk(KERN_WARNING PREFIX "Disabling ACPI support\n");
1520 disable_acpi();
1521 return;
1522 }
1523 }
1524}
1525
1526int __init early_acpi_boot_init(void)
1527{
1528 /*
1529 * If acpi_disabled, bail out
1530 */
1531 if (acpi_disabled)
1532 return 1;
1533
1534 /*
1535 * Process the Multiple APIC Description Table (MADT), if present
1536 */
1537 early_acpi_process_madt();
1538
1539 /*
1540 * Hardware-reduced ACPI mode initialization:
1541 */
1542 acpi_reduced_hw_init();
1543
1544 return 0;
1545}
1546
1547int __init acpi_boot_init(void)
1548{
1549 /* those are executed after early-quirks are executed */
1550 dmi_check_system(acpi_dmi_table_late);
1551
1552 /*
1553 * If acpi_disabled, bail out
1554 */
1555 if (acpi_disabled)
1556 return 1;
1557
1558 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1559
1560 /*
1561 * set sci_int and PM timer address
1562 */
1563 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
1564
1565 /*
1566 * Process the Multiple APIC Description Table (MADT), if present
1567 */
1568 acpi_process_madt();
1569
1570 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
1571
1572 if (!acpi_noirq)
1573 x86_init.pci.init = pci_acpi_init;
1574
1575 return 0;
1576}
1577
1578static int __init parse_acpi(char *arg)
1579{
1580 if (!arg)
1581 return -EINVAL;
1582
1583 /* "acpi=off" disables both ACPI table parsing and interpreter */
1584 if (strcmp(arg, "off") == 0) {
1585 disable_acpi();
1586 }
1587 /* acpi=force to over-ride black-list */
1588 else if (strcmp(arg, "force") == 0) {
1589 acpi_force = 1;
1590 acpi_disabled = 0;
1591 }
1592 /* acpi=strict disables out-of-spec workarounds */
1593 else if (strcmp(arg, "strict") == 0) {
1594 acpi_strict = 1;
1595 }
1596 /* acpi=rsdt use RSDT instead of XSDT */
1597 else if (strcmp(arg, "rsdt") == 0) {
1598 acpi_gbl_do_not_use_xsdt = TRUE;
1599 }
1600 /* "acpi=noirq" disables ACPI interrupt routing */
1601 else if (strcmp(arg, "noirq") == 0) {
1602 acpi_noirq_set();
1603 }
1604 /* "acpi=copy_dsdt" copys DSDT */
1605 else if (strcmp(arg, "copy_dsdt") == 0) {
1606 acpi_gbl_copy_dsdt_locally = 1;
1607 }
1608 /* "acpi=nocmcff" disables FF mode for corrected errors */
1609 else if (strcmp(arg, "nocmcff") == 0) {
1610 acpi_disable_cmcff = 1;
1611 } else {
1612 /* Core will printk when we return error. */
1613 return -EINVAL;
1614 }
1615 return 0;
1616}
1617early_param("acpi", parse_acpi);
1618
1619/* FIXME: Using pci= for an ACPI parameter is a travesty. */
1620static int __init parse_pci(char *arg)
1621{
1622 if (arg && strcmp(arg, "noacpi") == 0)
1623 acpi_disable_pci();
1624 return 0;
1625}
1626early_param("pci", parse_pci);
1627
1628int __init acpi_mps_check(void)
1629{
1630#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
1631/* mptable code is not built-in*/
1632 if (acpi_disabled || acpi_noirq) {
1633 printk(KERN_WARNING "MPS support code is not built-in.\n"
1634 "Using acpi=off or acpi=noirq or pci=noacpi "
1635 "may have problem\n");
1636 return 1;
1637 }
1638#endif
1639 return 0;
1640}
1641
1642#ifdef CONFIG_X86_IO_APIC
1643static int __init parse_acpi_skip_timer_override(char *arg)
1644{
1645 acpi_skip_timer_override = 1;
1646 return 0;
1647}
1648early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
1649
1650static int __init parse_acpi_use_timer_override(char *arg)
1651{
1652 acpi_use_timer_override = 1;
1653 return 0;
1654}
1655early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
1656#endif /* CONFIG_X86_IO_APIC */
1657
1658static int __init setup_acpi_sci(char *s)
1659{
1660 if (!s)
1661 return -EINVAL;
1662 if (!strcmp(s, "edge"))
1663 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
1664 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1665 else if (!strcmp(s, "level"))
1666 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
1667 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1668 else if (!strcmp(s, "high"))
1669 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
1670 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1671 else if (!strcmp(s, "low"))
1672 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
1673 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1674 else
1675 return -EINVAL;
1676 return 0;
1677}
1678early_param("acpi_sci", setup_acpi_sci);
1679
1680int __acpi_acquire_global_lock(unsigned int *lock)
1681{
1682 unsigned int old, new, val;
1683 do {
1684 old = *lock;
1685 new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
1686 val = cmpxchg(lock, old, new);
1687 } while (unlikely (val != old));
1688 return (new < 3) ? -1 : 0;
1689}
1690
1691int __acpi_release_global_lock(unsigned int *lock)
1692{
1693 unsigned int old, new, val;
1694 do {
1695 old = *lock;
1696 new = old & ~0x3;
1697 val = cmpxchg(lock, old, new);
1698 } while (unlikely (val != old));
1699 return old & 0x1;
1700}
1701
1702void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size)
1703{
1704 e820_add_region(addr, size, E820_ACPI);
1705 update_e820();
1706}
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * boot.c - Architecture-Specific Low-Level ACPI Boot Support
4 *
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
7 */
8#define pr_fmt(fmt) "ACPI: " fmt
9
10#include <linux/init.h>
11#include <linux/acpi.h>
12#include <linux/acpi_pmtmr.h>
13#include <linux/efi.h>
14#include <linux/cpumask.h>
15#include <linux/export.h>
16#include <linux/dmi.h>
17#include <linux/irq.h>
18#include <linux/slab.h>
19#include <linux/memblock.h>
20#include <linux/ioport.h>
21#include <linux/pci.h>
22#include <linux/efi-bgrt.h>
23#include <linux/serial_core.h>
24#include <linux/pgtable.h>
25
26#include <asm/e820/api.h>
27#include <asm/irqdomain.h>
28#include <asm/pci_x86.h>
29#include <asm/io_apic.h>
30#include <asm/apic.h>
31#include <asm/io.h>
32#include <asm/mpspec.h>
33#include <asm/smp.h>
34#include <asm/i8259.h>
35#include <asm/setup.h>
36
37#include "sleep.h" /* To include x86_acpi_suspend_lowlevel */
38static int __initdata acpi_force = 0;
39int acpi_disabled;
40EXPORT_SYMBOL(acpi_disabled);
41
42#ifdef CONFIG_X86_64
43# include <asm/proto.h>
44#endif /* X86 */
45
46int acpi_noirq; /* skip ACPI IRQ initialization */
47static int acpi_nobgrt; /* skip ACPI BGRT */
48int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
49EXPORT_SYMBOL(acpi_pci_disabled);
50
51int acpi_lapic;
52int acpi_ioapic;
53int acpi_strict;
54int acpi_disable_cmcff;
55bool acpi_int_src_ovr[NR_IRQS_LEGACY];
56
57/* ACPI SCI override configuration */
58u8 acpi_sci_flags __initdata;
59u32 acpi_sci_override_gsi __initdata = INVALID_ACPI_IRQ;
60int acpi_skip_timer_override __initdata;
61int acpi_use_timer_override __initdata;
62int acpi_fix_pin2_polarity __initdata;
63
64#ifdef CONFIG_X86_LOCAL_APIC
65static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
66static bool has_lapic_cpus __initdata;
67static bool acpi_support_online_capable;
68#endif
69
70#ifdef CONFIG_X86_64
71/* Physical address of the Multiprocessor Wakeup Structure mailbox */
72static u64 acpi_mp_wake_mailbox_paddr;
73/* Virtual address of the Multiprocessor Wakeup Structure mailbox */
74static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox;
75#endif
76
77#ifdef CONFIG_X86_IO_APIC
78/*
79 * Locks related to IOAPIC hotplug
80 * Hotplug side:
81 * ->device_hotplug_lock
82 * ->acpi_ioapic_lock
83 * ->ioapic_lock
84 * Interrupt mapping side:
85 * ->acpi_ioapic_lock
86 * ->ioapic_mutex
87 * ->ioapic_lock
88 */
89static DEFINE_MUTEX(acpi_ioapic_lock);
90#endif
91
92/* --------------------------------------------------------------------------
93 Boot-time Configuration
94 -------------------------------------------------------------------------- */
95
96/*
97 * The default interrupt routing model is PIC (8259). This gets
98 * overridden if IOAPICs are enumerated (below).
99 */
100enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
101
102
103/*
104 * ISA irqs by default are the first 16 gsis but can be
105 * any gsi as specified by an interrupt source override.
106 */
107static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
108 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
109};
110
111/*
112 * This is just a simple wrapper around early_memremap(),
113 * with sanity checks for phys == 0 and size == 0.
114 */
115void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size)
116{
117
118 if (!phys || !size)
119 return NULL;
120
121 return early_memremap(phys, size);
122}
123
124void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
125{
126 if (!map || !size)
127 return;
128
129 early_memunmap(map, size);
130}
131
132#ifdef CONFIG_X86_LOCAL_APIC
133static int __init acpi_parse_madt(struct acpi_table_header *table)
134{
135 struct acpi_table_madt *madt = NULL;
136
137 if (!boot_cpu_has(X86_FEATURE_APIC))
138 return -EINVAL;
139
140 madt = (struct acpi_table_madt *)table;
141 if (!madt) {
142 pr_warn("Unable to map MADT\n");
143 return -ENODEV;
144 }
145
146 if (madt->address) {
147 acpi_lapic_addr = (u64) madt->address;
148
149 pr_debug("Local APIC address 0x%08x\n", madt->address);
150 }
151
152 if (madt->flags & ACPI_MADT_PCAT_COMPAT)
153 legacy_pic_pcat_compat();
154
155 /* ACPI 6.3 and newer support the online capable bit. */
156 if (acpi_gbl_FADT.header.revision > 6 ||
157 (acpi_gbl_FADT.header.revision == 6 &&
158 acpi_gbl_FADT.minor_revision >= 3))
159 acpi_support_online_capable = true;
160
161 default_acpi_madt_oem_check(madt->header.oem_id,
162 madt->header.oem_table_id);
163
164 return 0;
165}
166
167/**
168 * acpi_register_lapic - register a local apic and generates a logic cpu number
169 * @id: local apic id to register
170 * @acpiid: ACPI id to register
171 * @enabled: this cpu is enabled or not
172 *
173 * Returns the logic cpu number which maps to the local apic
174 */
175static int acpi_register_lapic(int id, u32 acpiid, u8 enabled)
176{
177 int cpu;
178
179 if (id >= MAX_LOCAL_APIC) {
180 pr_info("skipped apicid that is too big\n");
181 return -EINVAL;
182 }
183
184 if (!enabled) {
185 ++disabled_cpus;
186 return -EINVAL;
187 }
188
189 cpu = generic_processor_info(id);
190 if (cpu >= 0)
191 early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid;
192
193 return cpu;
194}
195
196static bool __init acpi_is_processor_usable(u32 lapic_flags)
197{
198 if (lapic_flags & ACPI_MADT_ENABLED)
199 return true;
200
201 if (!acpi_support_online_capable ||
202 (lapic_flags & ACPI_MADT_ONLINE_CAPABLE))
203 return true;
204
205 return false;
206}
207
208static int __init
209acpi_parse_x2apic(union acpi_subtable_headers *header, const unsigned long end)
210{
211 struct acpi_madt_local_x2apic *processor = NULL;
212#ifdef CONFIG_X86_X2APIC
213 u32 apic_id;
214 u8 enabled;
215#endif
216
217 processor = (struct acpi_madt_local_x2apic *)header;
218
219 if (BAD_MADT_ENTRY(processor, end))
220 return -EINVAL;
221
222 acpi_table_print_madt_entry(&header->common);
223
224#ifdef CONFIG_X86_X2APIC
225 apic_id = processor->local_apic_id;
226 enabled = processor->lapic_flags & ACPI_MADT_ENABLED;
227
228 /* Ignore invalid ID */
229 if (apic_id == 0xffffffff)
230 return 0;
231
232 /* don't register processors that cannot be onlined */
233 if (!acpi_is_processor_usable(processor->lapic_flags))
234 return 0;
235
236 /*
237 * According to https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#processor-local-x2apic-structure
238 * when MADT provides both valid LAPIC and x2APIC entries, the APIC ID
239 * in x2APIC must be equal or greater than 0xff.
240 */
241 if (has_lapic_cpus && apic_id < 0xff)
242 return 0;
243
244 /*
245 * We need to register disabled CPU as well to permit
246 * counting disabled CPUs. This allows us to size
247 * cpus_possible_map more accurately, to permit
248 * to not preallocating memory for all NR_CPUS
249 * when we use CPU hotplug.
250 */
251 if (!apic_id_valid(apic_id)) {
252 if (enabled)
253 pr_warn("x2apic entry ignored\n");
254 return 0;
255 }
256
257 acpi_register_lapic(apic_id, processor->uid, enabled);
258#else
259 pr_warn("x2apic entry ignored\n");
260#endif
261
262 return 0;
263}
264
265static int __init
266acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end)
267{
268 struct acpi_madt_local_apic *processor = NULL;
269
270 processor = (struct acpi_madt_local_apic *)header;
271
272 if (BAD_MADT_ENTRY(processor, end))
273 return -EINVAL;
274
275 acpi_table_print_madt_entry(&header->common);
276
277 /* Ignore invalid ID */
278 if (processor->id == 0xff)
279 return 0;
280
281 /* don't register processors that can not be onlined */
282 if (!acpi_is_processor_usable(processor->lapic_flags))
283 return 0;
284
285 /*
286 * We need to register disabled CPU as well to permit
287 * counting disabled CPUs. This allows us to size
288 * cpus_possible_map more accurately, to permit
289 * to not preallocating memory for all NR_CPUS
290 * when we use CPU hotplug.
291 */
292 acpi_register_lapic(processor->id, /* APIC ID */
293 processor->processor_id, /* ACPI ID */
294 processor->lapic_flags & ACPI_MADT_ENABLED);
295
296 has_lapic_cpus = true;
297 return 0;
298}
299
300static int __init
301acpi_parse_sapic(union acpi_subtable_headers *header, const unsigned long end)
302{
303 struct acpi_madt_local_sapic *processor = NULL;
304
305 processor = (struct acpi_madt_local_sapic *)header;
306
307 if (BAD_MADT_ENTRY(processor, end))
308 return -EINVAL;
309
310 acpi_table_print_madt_entry(&header->common);
311
312 acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */
313 processor->processor_id, /* ACPI ID */
314 processor->lapic_flags & ACPI_MADT_ENABLED);
315
316 return 0;
317}
318
319static int __init
320acpi_parse_lapic_addr_ovr(union acpi_subtable_headers * header,
321 const unsigned long end)
322{
323 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
324
325 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
326
327 if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
328 return -EINVAL;
329
330 acpi_table_print_madt_entry(&header->common);
331
332 acpi_lapic_addr = lapic_addr_ovr->address;
333
334 return 0;
335}
336
337static int __init
338acpi_parse_x2apic_nmi(union acpi_subtable_headers *header,
339 const unsigned long end)
340{
341 struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL;
342
343 x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header;
344
345 if (BAD_MADT_ENTRY(x2apic_nmi, end))
346 return -EINVAL;
347
348 acpi_table_print_madt_entry(&header->common);
349
350 if (x2apic_nmi->lint != 1)
351 pr_warn("NMI not connected to LINT 1!\n");
352
353 return 0;
354}
355
356static int __init
357acpi_parse_lapic_nmi(union acpi_subtable_headers * header, const unsigned long end)
358{
359 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
360
361 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
362
363 if (BAD_MADT_ENTRY(lapic_nmi, end))
364 return -EINVAL;
365
366 acpi_table_print_madt_entry(&header->common);
367
368 if (lapic_nmi->lint != 1)
369 pr_warn("NMI not connected to LINT 1!\n");
370
371 return 0;
372}
373
374#ifdef CONFIG_X86_64
375static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip)
376{
377 /*
378 * Remap mailbox memory only for the first call to acpi_wakeup_cpu().
379 *
380 * Wakeup of secondary CPUs is fully serialized in the core code.
381 * No need to protect acpi_mp_wake_mailbox from concurrent accesses.
382 */
383 if (!acpi_mp_wake_mailbox) {
384 acpi_mp_wake_mailbox = memremap(acpi_mp_wake_mailbox_paddr,
385 sizeof(*acpi_mp_wake_mailbox),
386 MEMREMAP_WB);
387 }
388
389 /*
390 * Mailbox memory is shared between the firmware and OS. Firmware will
391 * listen on mailbox command address, and once it receives the wakeup
392 * command, the CPU associated with the given apicid will be booted.
393 *
394 * The value of 'apic_id' and 'wakeup_vector' must be visible to the
395 * firmware before the wakeup command is visible. smp_store_release()
396 * ensures ordering and visibility.
397 */
398 acpi_mp_wake_mailbox->apic_id = apicid;
399 acpi_mp_wake_mailbox->wakeup_vector = start_ip;
400 smp_store_release(&acpi_mp_wake_mailbox->command,
401 ACPI_MP_WAKE_COMMAND_WAKEUP);
402
403 /*
404 * Wait for the CPU to wake up.
405 *
406 * The CPU being woken up is essentially in a spin loop waiting to be
407 * woken up. It should not take long for it wake up and acknowledge by
408 * zeroing out ->command.
409 *
410 * ACPI specification doesn't provide any guidance on how long kernel
411 * has to wait for a wake up acknowledgement. It also doesn't provide
412 * a way to cancel a wake up request if it takes too long.
413 *
414 * In TDX environment, the VMM has control over how long it takes to
415 * wake up secondary. It can postpone scheduling secondary vCPU
416 * indefinitely. Giving up on wake up request and reporting error opens
417 * possible attack vector for VMM: it can wake up a secondary CPU when
418 * kernel doesn't expect it. Wait until positive result of the wake up
419 * request.
420 */
421 while (READ_ONCE(acpi_mp_wake_mailbox->command))
422 cpu_relax();
423
424 return 0;
425}
426#endif /* CONFIG_X86_64 */
427#endif /* CONFIG_X86_LOCAL_APIC */
428
429#ifdef CONFIG_X86_IO_APIC
430#define MP_ISA_BUS 0
431
432static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
433 u8 trigger, u32 gsi);
434
435static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
436 u32 gsi)
437{
438 /*
439 * Check bus_irq boundary.
440 */
441 if (bus_irq >= NR_IRQS_LEGACY) {
442 pr_warn("Invalid bus_irq %u for legacy override\n", bus_irq);
443 return;
444 }
445
446 /*
447 * TBD: This check is for faulty timer entries, where the override
448 * erroneously sets the trigger to level, resulting in a HUGE
449 * increase of timer interrupts!
450 */
451 if ((bus_irq == 0) && (trigger == 3))
452 trigger = 1;
453
454 if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0)
455 return;
456 /*
457 * Reset default identity mapping if gsi is also an legacy IRQ,
458 * otherwise there will be more than one entry with the same GSI
459 * and acpi_isa_irq_to_gsi() may give wrong result.
460 */
461 if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi)
462 isa_irq_to_gsi[gsi] = INVALID_ACPI_IRQ;
463 isa_irq_to_gsi[bus_irq] = gsi;
464}
465
466static void mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
467 int polarity)
468{
469#ifdef CONFIG_X86_MPPARSE
470 struct mpc_intsrc mp_irq;
471 struct pci_dev *pdev;
472 unsigned char number;
473 unsigned int devfn;
474 int ioapic;
475 u8 pin;
476
477 if (!acpi_ioapic)
478 return;
479 if (!dev || !dev_is_pci(dev))
480 return;
481
482 pdev = to_pci_dev(dev);
483 number = pdev->bus->number;
484 devfn = pdev->devfn;
485 pin = pdev->pin;
486 /* print the entry should happen on mptable identically */
487 mp_irq.type = MP_INTSRC;
488 mp_irq.irqtype = mp_INT;
489 mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
490 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
491 mp_irq.srcbus = number;
492 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
493 ioapic = mp_find_ioapic(gsi);
494 mp_irq.dstapic = mpc_ioapic_id(ioapic);
495 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
496
497 mp_save_irq(&mp_irq);
498#endif
499}
500
501static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
502 u8 trigger, u32 gsi)
503{
504 struct mpc_intsrc mp_irq;
505 int ioapic, pin;
506
507 /* Convert 'gsi' to 'ioapic.pin'(INTIN#) */
508 ioapic = mp_find_ioapic(gsi);
509 if (ioapic < 0) {
510 pr_warn("Failed to find ioapic for gsi : %u\n", gsi);
511 return ioapic;
512 }
513
514 pin = mp_find_ioapic_pin(ioapic, gsi);
515
516 mp_irq.type = MP_INTSRC;
517 mp_irq.irqtype = mp_INT;
518 mp_irq.irqflag = (trigger << 2) | polarity;
519 mp_irq.srcbus = MP_ISA_BUS;
520 mp_irq.srcbusirq = bus_irq;
521 mp_irq.dstapic = mpc_ioapic_id(ioapic);
522 mp_irq.dstirq = pin;
523
524 mp_save_irq(&mp_irq);
525
526 return 0;
527}
528
529static int __init
530acpi_parse_ioapic(union acpi_subtable_headers * header, const unsigned long end)
531{
532 struct acpi_madt_io_apic *ioapic = NULL;
533 struct ioapic_domain_cfg cfg = {
534 .type = IOAPIC_DOMAIN_DYNAMIC,
535 .ops = &mp_ioapic_irqdomain_ops,
536 };
537
538 ioapic = (struct acpi_madt_io_apic *)header;
539
540 if (BAD_MADT_ENTRY(ioapic, end))
541 return -EINVAL;
542
543 acpi_table_print_madt_entry(&header->common);
544
545 /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */
546 if (ioapic->global_irq_base < nr_legacy_irqs())
547 cfg.type = IOAPIC_DOMAIN_LEGACY;
548
549 mp_register_ioapic(ioapic->id, ioapic->address, ioapic->global_irq_base,
550 &cfg);
551
552 return 0;
553}
554
555/*
556 * Parse Interrupt Source Override for the ACPI SCI
557 */
558static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi)
559{
560 if (trigger == 0) /* compatible SCI trigger is level */
561 trigger = 3;
562
563 if (polarity == 0) /* compatible SCI polarity is low */
564 polarity = 3;
565
566 /* Command-line over-ride via acpi_sci= */
567 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
568 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
569
570 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
571 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
572
573 if (bus_irq < NR_IRQS_LEGACY)
574 mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
575 else
576 mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi);
577
578 acpi_penalize_sci_irq(bus_irq, trigger, polarity);
579
580 /*
581 * stash over-ride to indicate we've been here
582 * and for later update of acpi_gbl_FADT
583 */
584 acpi_sci_override_gsi = gsi;
585 return;
586}
587
588static int __init
589acpi_parse_int_src_ovr(union acpi_subtable_headers * header,
590 const unsigned long end)
591{
592 struct acpi_madt_interrupt_override *intsrc = NULL;
593
594 intsrc = (struct acpi_madt_interrupt_override *)header;
595
596 if (BAD_MADT_ENTRY(intsrc, end))
597 return -EINVAL;
598
599 acpi_table_print_madt_entry(&header->common);
600
601 if (intsrc->source_irq < NR_IRQS_LEGACY)
602 acpi_int_src_ovr[intsrc->source_irq] = true;
603
604 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
605 acpi_sci_ioapic_setup(intsrc->source_irq,
606 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
607 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
608 intsrc->global_irq);
609 return 0;
610 }
611
612 if (intsrc->source_irq == 0) {
613 if (acpi_skip_timer_override) {
614 pr_warn("BIOS IRQ0 override ignored.\n");
615 return 0;
616 }
617
618 if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity
619 && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) {
620 intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK;
621 pr_warn("BIOS IRQ0 pin2 override: forcing polarity to high active.\n");
622 }
623 }
624
625 mp_override_legacy_irq(intsrc->source_irq,
626 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
627 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
628 intsrc->global_irq);
629
630 return 0;
631}
632
633static int __init
634acpi_parse_nmi_src(union acpi_subtable_headers * header, const unsigned long end)
635{
636 struct acpi_madt_nmi_source *nmi_src = NULL;
637
638 nmi_src = (struct acpi_madt_nmi_source *)header;
639
640 if (BAD_MADT_ENTRY(nmi_src, end))
641 return -EINVAL;
642
643 acpi_table_print_madt_entry(&header->common);
644
645 /* TBD: Support nimsrc entries? */
646
647 return 0;
648}
649
650#endif /* CONFIG_X86_IO_APIC */
651
652/*
653 * acpi_pic_sci_set_trigger()
654 *
655 * use ELCR to set PIC-mode trigger type for SCI
656 *
657 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's
658 * it may require Edge Trigger -- use "acpi_sci=edge"
659 *
660 * Port 0x4d0-4d1 are ELCR1 and ELCR2, the Edge/Level Control Registers
661 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
662 * ELCR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
663 * ELCR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
664 */
665
666void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
667{
668 unsigned int mask = 1 << irq;
669 unsigned int old, new;
670
671 /* Real old ELCR mask */
672 old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8);
673
674 /*
675 * If we use ACPI to set PCI IRQs, then we should clear ELCR
676 * since we will set it correctly as we enable the PCI irq
677 * routing.
678 */
679 new = acpi_noirq ? old : 0;
680
681 /*
682 * Update SCI information in the ELCR, it isn't in the PCI
683 * routing tables..
684 */
685 switch (trigger) {
686 case 1: /* Edge - clear */
687 new &= ~mask;
688 break;
689 case 3: /* Level - set */
690 new |= mask;
691 break;
692 }
693
694 if (old == new)
695 return;
696
697 pr_warn("setting ELCR to %04x (from %04x)\n", new, old);
698 outb(new, PIC_ELCR1);
699 outb(new >> 8, PIC_ELCR2);
700}
701
702int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
703{
704 int rc, irq, trigger, polarity;
705
706 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
707 *irqp = gsi;
708 return 0;
709 }
710
711 rc = acpi_get_override_irq(gsi, &trigger, &polarity);
712 if (rc)
713 return rc;
714
715 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
716 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
717 irq = acpi_register_gsi(NULL, gsi, trigger, polarity);
718 if (irq < 0)
719 return irq;
720
721 *irqp = irq;
722 return 0;
723}
724EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
725
726int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
727{
728 if (isa_irq < nr_legacy_irqs() &&
729 isa_irq_to_gsi[isa_irq] != INVALID_ACPI_IRQ) {
730 *gsi = isa_irq_to_gsi[isa_irq];
731 return 0;
732 }
733
734 return -1;
735}
736
737static int acpi_register_gsi_pic(struct device *dev, u32 gsi,
738 int trigger, int polarity)
739{
740#ifdef CONFIG_PCI
741 /*
742 * Make sure all (legacy) PCI IRQs are set as level-triggered.
743 */
744 if (trigger == ACPI_LEVEL_SENSITIVE)
745 elcr_set_level_irq(gsi);
746#endif
747
748 return gsi;
749}
750
751#ifdef CONFIG_X86_LOCAL_APIC
752static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,
753 int trigger, int polarity)
754{
755 int irq = gsi;
756#ifdef CONFIG_X86_IO_APIC
757 int node;
758 struct irq_alloc_info info;
759
760 node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
761 trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
762 polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
763 ioapic_set_alloc_attr(&info, node, trigger, polarity);
764
765 mutex_lock(&acpi_ioapic_lock);
766 irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, &info);
767 /* Don't set up the ACPI SCI because it's already set up */
768 if (irq >= 0 && enable_update_mptable && gsi != acpi_gbl_FADT.sci_interrupt)
769 mp_config_acpi_gsi(dev, gsi, trigger, polarity);
770 mutex_unlock(&acpi_ioapic_lock);
771#endif
772
773 return irq;
774}
775
776static void acpi_unregister_gsi_ioapic(u32 gsi)
777{
778#ifdef CONFIG_X86_IO_APIC
779 int irq;
780
781 mutex_lock(&acpi_ioapic_lock);
782 irq = mp_map_gsi_to_irq(gsi, 0, NULL);
783 if (irq > 0)
784 mp_unmap_irq(irq);
785 mutex_unlock(&acpi_ioapic_lock);
786#endif
787}
788#endif
789
790int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
791 int trigger, int polarity) = acpi_register_gsi_pic;
792void (*__acpi_unregister_gsi)(u32 gsi) = NULL;
793
794#ifdef CONFIG_ACPI_SLEEP
795int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel;
796#else
797int (*acpi_suspend_lowlevel)(void);
798#endif
799
800/*
801 * success: return IRQ number (>=0)
802 * failure: return < 0
803 */
804int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
805{
806 return __acpi_register_gsi(dev, gsi, trigger, polarity);
807}
808EXPORT_SYMBOL_GPL(acpi_register_gsi);
809
810void acpi_unregister_gsi(u32 gsi)
811{
812 if (__acpi_unregister_gsi)
813 __acpi_unregister_gsi(gsi);
814}
815EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
816
817#ifdef CONFIG_X86_LOCAL_APIC
818static void __init acpi_set_irq_model_ioapic(void)
819{
820 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
821 __acpi_register_gsi = acpi_register_gsi_ioapic;
822 __acpi_unregister_gsi = acpi_unregister_gsi_ioapic;
823 acpi_ioapic = 1;
824}
825#endif
826
827/*
828 * ACPI based hotplug support for CPU
829 */
830#ifdef CONFIG_ACPI_HOTPLUG_CPU
831#include <acpi/processor.h>
832
833static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
834{
835#ifdef CONFIG_ACPI_NUMA
836 int nid;
837
838 nid = acpi_get_node(handle);
839 if (nid != NUMA_NO_NODE) {
840 set_apicid_to_node(physid, nid);
841 numa_set_node(cpu, nid);
842 }
843#endif
844 return 0;
845}
846
847int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id,
848 int *pcpu)
849{
850 int cpu;
851
852 cpu = acpi_register_lapic(physid, acpi_id, ACPI_MADT_ENABLED);
853 if (cpu < 0) {
854 pr_info("Unable to map lapic to logical cpu number\n");
855 return cpu;
856 }
857
858 acpi_processor_set_pdc(handle);
859 acpi_map_cpu2node(handle, cpu, physid);
860
861 *pcpu = cpu;
862 return 0;
863}
864EXPORT_SYMBOL(acpi_map_cpu);
865
866int acpi_unmap_cpu(int cpu)
867{
868#ifdef CONFIG_ACPI_NUMA
869 set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE);
870#endif
871
872 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
873 set_cpu_present(cpu, false);
874 num_processors--;
875
876 return (0);
877}
878EXPORT_SYMBOL(acpi_unmap_cpu);
879#endif /* CONFIG_ACPI_HOTPLUG_CPU */
880
881int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
882{
883 int ret = -ENOSYS;
884#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
885 int ioapic_id;
886 u64 addr;
887 struct ioapic_domain_cfg cfg = {
888 .type = IOAPIC_DOMAIN_DYNAMIC,
889 .ops = &mp_ioapic_irqdomain_ops,
890 };
891
892 ioapic_id = acpi_get_ioapic_id(handle, gsi_base, &addr);
893 if (ioapic_id < 0) {
894 unsigned long long uid;
895 acpi_status status;
896
897 status = acpi_evaluate_integer(handle, METHOD_NAME__UID,
898 NULL, &uid);
899 if (ACPI_FAILURE(status)) {
900 acpi_handle_warn(handle, "failed to get IOAPIC ID.\n");
901 return -EINVAL;
902 }
903 ioapic_id = (int)uid;
904 }
905
906 mutex_lock(&acpi_ioapic_lock);
907 ret = mp_register_ioapic(ioapic_id, phys_addr, gsi_base, &cfg);
908 mutex_unlock(&acpi_ioapic_lock);
909#endif
910
911 return ret;
912}
913EXPORT_SYMBOL(acpi_register_ioapic);
914
915int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
916{
917 int ret = -ENOSYS;
918
919#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
920 mutex_lock(&acpi_ioapic_lock);
921 ret = mp_unregister_ioapic(gsi_base);
922 mutex_unlock(&acpi_ioapic_lock);
923#endif
924
925 return ret;
926}
927EXPORT_SYMBOL(acpi_unregister_ioapic);
928
929/**
930 * acpi_ioapic_registered - Check whether IOAPIC associated with @gsi_base
931 * has been registered
932 * @handle: ACPI handle of the IOAPIC device
933 * @gsi_base: GSI base associated with the IOAPIC
934 *
935 * Assume caller holds some type of lock to serialize acpi_ioapic_registered()
936 * with acpi_register_ioapic()/acpi_unregister_ioapic().
937 */
938int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base)
939{
940 int ret = 0;
941
942#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
943 mutex_lock(&acpi_ioapic_lock);
944 ret = mp_ioapic_registered(gsi_base);
945 mutex_unlock(&acpi_ioapic_lock);
946#endif
947
948 return ret;
949}
950
951static int __init acpi_parse_sbf(struct acpi_table_header *table)
952{
953 struct acpi_table_boot *sb = (struct acpi_table_boot *)table;
954
955 sbf_port = sb->cmos_index; /* Save CMOS port */
956
957 return 0;
958}
959
960#ifdef CONFIG_HPET_TIMER
961#include <asm/hpet.h>
962
963static struct resource *hpet_res __initdata;
964
965static int __init acpi_parse_hpet(struct acpi_table_header *table)
966{
967 struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table;
968
969 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
970 pr_warn("HPET timers must be located in memory.\n");
971 return -1;
972 }
973
974 hpet_address = hpet_tbl->address.address;
975 hpet_blockid = hpet_tbl->sequence;
976
977 /*
978 * Some broken BIOSes advertise HPET at 0x0. We really do not
979 * want to allocate a resource there.
980 */
981 if (!hpet_address) {
982 pr_warn("HPET id: %#x base: %#lx is invalid\n", hpet_tbl->id, hpet_address);
983 return 0;
984 }
985#ifdef CONFIG_X86_64
986 /*
987 * Some even more broken BIOSes advertise HPET at
988 * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
989 * some noise:
990 */
991 if (hpet_address == 0xfed0000000000000UL) {
992 if (!hpet_force_user) {
993 pr_warn("HPET id: %#x base: 0xfed0000000000000 is bogus, try hpet=force on the kernel command line to fix it up to 0xfed00000.\n",
994 hpet_tbl->id);
995 hpet_address = 0;
996 return 0;
997 }
998 pr_warn("HPET id: %#x base: 0xfed0000000000000 fixed up to 0xfed00000.\n",
999 hpet_tbl->id);
1000 hpet_address >>= 32;
1001 }
1002#endif
1003 pr_info("HPET id: %#x base: %#lx\n", hpet_tbl->id, hpet_address);
1004
1005 /*
1006 * Allocate and initialize the HPET firmware resource for adding into
1007 * the resource tree during the lateinit timeframe.
1008 */
1009#define HPET_RESOURCE_NAME_SIZE 9
1010 hpet_res = memblock_alloc(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE,
1011 SMP_CACHE_BYTES);
1012 if (!hpet_res)
1013 panic("%s: Failed to allocate %zu bytes\n", __func__,
1014 sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
1015
1016 hpet_res->name = (void *)&hpet_res[1];
1017 hpet_res->flags = IORESOURCE_MEM;
1018 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
1019 hpet_tbl->sequence);
1020
1021 hpet_res->start = hpet_address;
1022 hpet_res->end = hpet_address + (1 * 1024) - 1;
1023
1024 return 0;
1025}
1026
1027/*
1028 * hpet_insert_resource inserts the HPET resources used into the resource
1029 * tree.
1030 */
1031static __init int hpet_insert_resource(void)
1032{
1033 if (!hpet_res)
1034 return 1;
1035
1036 return insert_resource(&iomem_resource, hpet_res);
1037}
1038
1039late_initcall(hpet_insert_resource);
1040
1041#else
1042#define acpi_parse_hpet NULL
1043#endif
1044
1045static int __init acpi_parse_fadt(struct acpi_table_header *table)
1046{
1047 if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_LEGACY_DEVICES)) {
1048 pr_debug("no legacy devices present\n");
1049 x86_platform.legacy.devices.pnpbios = 0;
1050 }
1051
1052 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
1053 !(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042) &&
1054 x86_platform.legacy.i8042 != X86_LEGACY_I8042_PLATFORM_ABSENT) {
1055 pr_debug("i8042 controller is absent\n");
1056 x86_platform.legacy.i8042 = X86_LEGACY_I8042_FIRMWARE_ABSENT;
1057 }
1058
1059 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
1060 pr_debug("not registering RTC platform device\n");
1061 x86_platform.legacy.rtc = 0;
1062 }
1063
1064 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_VGA) {
1065 pr_debug("probing for VGA not safe\n");
1066 x86_platform.legacy.no_vga = 1;
1067 }
1068
1069#ifdef CONFIG_X86_PM_TIMER
1070 /* detect the location of the ACPI PM Timer */
1071 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
1072 /* FADT rev. 2 */
1073 if (acpi_gbl_FADT.xpm_timer_block.space_id !=
1074 ACPI_ADR_SPACE_SYSTEM_IO)
1075 return 0;
1076
1077 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
1078 /*
1079 * "X" fields are optional extensions to the original V1.0
1080 * fields, so we must selectively expand V1.0 fields if the
1081 * corresponding X field is zero.
1082 */
1083 if (!pmtmr_ioport)
1084 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1085 } else {
1086 /* FADT rev. 1 */
1087 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
1088 }
1089 if (pmtmr_ioport)
1090 pr_info("PM-Timer IO Port: %#x\n", pmtmr_ioport);
1091#endif
1092 return 0;
1093}
1094
1095#ifdef CONFIG_X86_LOCAL_APIC
1096/*
1097 * Parse LAPIC entries in MADT
1098 * returns 0 on success, < 0 on error
1099 */
1100
1101static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
1102{
1103 int count;
1104
1105 if (!boot_cpu_has(X86_FEATURE_APIC))
1106 return -ENODEV;
1107
1108 /*
1109 * Note that the LAPIC address is obtained from the MADT (32-bit value)
1110 * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value).
1111 */
1112
1113 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
1114 acpi_parse_lapic_addr_ovr, 0);
1115 if (count < 0) {
1116 pr_err("Error parsing LAPIC address override entry\n");
1117 return count;
1118 }
1119
1120 register_lapic_address(acpi_lapic_addr);
1121
1122 return count;
1123}
1124
1125static int __init acpi_parse_madt_lapic_entries(void)
1126{
1127 int count, x2count = 0;
1128
1129 if (!boot_cpu_has(X86_FEATURE_APIC))
1130 return -ENODEV;
1131
1132 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC,
1133 acpi_parse_sapic, MAX_LOCAL_APIC);
1134
1135 if (!count) {
1136 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC,
1137 acpi_parse_lapic, MAX_LOCAL_APIC);
1138 x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC,
1139 acpi_parse_x2apic, MAX_LOCAL_APIC);
1140 }
1141 if (!count && !x2count) {
1142 pr_err("No LAPIC entries present\n");
1143 /* TBD: Cleanup to allow fallback to MPS */
1144 return -ENODEV;
1145 } else if (count < 0 || x2count < 0) {
1146 pr_err("Error parsing LAPIC entry\n");
1147 /* TBD: Cleanup to allow fallback to MPS */
1148 return count;
1149 }
1150
1151 x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC_NMI,
1152 acpi_parse_x2apic_nmi, 0);
1153 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI,
1154 acpi_parse_lapic_nmi, 0);
1155 if (count < 0 || x2count < 0) {
1156 pr_err("Error parsing LAPIC NMI entry\n");
1157 /* TBD: Cleanup to allow fallback to MPS */
1158 return count;
1159 }
1160 return 0;
1161}
1162
1163#ifdef CONFIG_X86_64
1164static int __init acpi_parse_mp_wake(union acpi_subtable_headers *header,
1165 const unsigned long end)
1166{
1167 struct acpi_madt_multiproc_wakeup *mp_wake;
1168
1169 if (!IS_ENABLED(CONFIG_SMP))
1170 return -ENODEV;
1171
1172 mp_wake = (struct acpi_madt_multiproc_wakeup *)header;
1173 if (BAD_MADT_ENTRY(mp_wake, end))
1174 return -EINVAL;
1175
1176 acpi_table_print_madt_entry(&header->common);
1177
1178 acpi_mp_wake_mailbox_paddr = mp_wake->base_address;
1179
1180 apic_update_callback(wakeup_secondary_cpu_64, acpi_wakeup_cpu);
1181
1182 return 0;
1183}
1184#endif /* CONFIG_X86_64 */
1185#endif /* CONFIG_X86_LOCAL_APIC */
1186
1187#ifdef CONFIG_X86_IO_APIC
1188static void __init mp_config_acpi_legacy_irqs(void)
1189{
1190 int i;
1191 struct mpc_intsrc mp_irq;
1192
1193#ifdef CONFIG_EISA
1194 /*
1195 * Fabricate the legacy ISA bus (bus #31).
1196 */
1197 mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
1198#endif
1199 set_bit(MP_ISA_BUS, mp_bus_not_pci);
1200 pr_debug("Bus #%d is ISA (nIRQs: %d)\n", MP_ISA_BUS, nr_legacy_irqs());
1201
1202 /*
1203 * Use the default configuration for the IRQs 0-15. Unless
1204 * overridden by (MADT) interrupt source override entries.
1205 */
1206 for (i = 0; i < nr_legacy_irqs(); i++) {
1207 int ioapic, pin;
1208 unsigned int dstapic;
1209 int idx;
1210 u32 gsi;
1211
1212 /* Locate the gsi that irq i maps to. */
1213 if (acpi_isa_irq_to_gsi(i, &gsi))
1214 continue;
1215
1216 /*
1217 * Locate the IOAPIC that manages the ISA IRQ.
1218 */
1219 ioapic = mp_find_ioapic(gsi);
1220 if (ioapic < 0)
1221 continue;
1222 pin = mp_find_ioapic_pin(ioapic, gsi);
1223 dstapic = mpc_ioapic_id(ioapic);
1224
1225 for (idx = 0; idx < mp_irq_entries; idx++) {
1226 struct mpc_intsrc *irq = mp_irqs + idx;
1227
1228 /* Do we already have a mapping for this ISA IRQ? */
1229 if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i)
1230 break;
1231
1232 /* Do we already have a mapping for this IOAPIC pin */
1233 if (irq->dstapic == dstapic && irq->dstirq == pin)
1234 break;
1235 }
1236
1237 if (idx != mp_irq_entries) {
1238 pr_debug("ACPI: IRQ%d used by override.\n", i);
1239 continue; /* IRQ already used */
1240 }
1241
1242 mp_irq.type = MP_INTSRC;
1243 mp_irq.irqflag = 0; /* Conforming */
1244 mp_irq.srcbus = MP_ISA_BUS;
1245 mp_irq.dstapic = dstapic;
1246 mp_irq.irqtype = mp_INT;
1247 mp_irq.srcbusirq = i; /* Identity mapped */
1248 mp_irq.dstirq = pin;
1249
1250 mp_save_irq(&mp_irq);
1251 }
1252}
1253
1254/*
1255 * Parse IOAPIC related entries in MADT
1256 * returns 0 on success, < 0 on error
1257 */
1258static int __init acpi_parse_madt_ioapic_entries(void)
1259{
1260 int count;
1261
1262 /*
1263 * ACPI interpreter is required to complete interrupt setup,
1264 * so if it is off, don't enumerate the io-apics with ACPI.
1265 * If MPS is present, it will handle them,
1266 * otherwise the system will stay in PIC mode
1267 */
1268 if (acpi_disabled || acpi_noirq)
1269 return -ENODEV;
1270
1271 if (!boot_cpu_has(X86_FEATURE_APIC))
1272 return -ENODEV;
1273
1274 /*
1275 * if "noapic" boot option, don't look for IO-APICs
1276 */
1277 if (ioapic_is_disabled) {
1278 pr_info("Skipping IOAPIC probe due to 'noapic' option.\n");
1279 return -ENODEV;
1280 }
1281
1282 count = acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
1283 MAX_IO_APICS);
1284 if (!count) {
1285 pr_err("No IOAPIC entries present\n");
1286 return -ENODEV;
1287 } else if (count < 0) {
1288 pr_err("Error parsing IOAPIC entry\n");
1289 return count;
1290 }
1291
1292 count = acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE,
1293 acpi_parse_int_src_ovr, nr_irqs);
1294 if (count < 0) {
1295 pr_err("Error parsing interrupt source overrides entry\n");
1296 /* TBD: Cleanup to allow fallback to MPS */
1297 return count;
1298 }
1299
1300 /*
1301 * If BIOS did not supply an INT_SRC_OVR for the SCI
1302 * pretend we got one so we can set the SCI flags.
1303 * But ignore setting up SCI on hardware reduced platforms.
1304 */
1305 if (acpi_sci_override_gsi == INVALID_ACPI_IRQ && !acpi_gbl_reduced_hardware)
1306 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0,
1307 acpi_gbl_FADT.sci_interrupt);
1308
1309 /* Fill in identity legacy mappings where no override */
1310 mp_config_acpi_legacy_irqs();
1311
1312 count = acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE,
1313 acpi_parse_nmi_src, nr_irqs);
1314 if (count < 0) {
1315 pr_err("Error parsing NMI SRC entry\n");
1316 /* TBD: Cleanup to allow fallback to MPS */
1317 return count;
1318 }
1319
1320 return 0;
1321}
1322#else
1323static inline int acpi_parse_madt_ioapic_entries(void)
1324{
1325 return -1;
1326}
1327#endif /* !CONFIG_X86_IO_APIC */
1328
1329static void __init early_acpi_process_madt(void)
1330{
1331#ifdef CONFIG_X86_LOCAL_APIC
1332 int error;
1333
1334 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1335
1336 /*
1337 * Parse MADT LAPIC entries
1338 */
1339 error = early_acpi_parse_madt_lapic_addr_ovr();
1340 if (!error) {
1341 acpi_lapic = 1;
1342 smp_found_config = 1;
1343 }
1344 if (error == -EINVAL) {
1345 /*
1346 * Dell Precision Workstation 410, 610 come here.
1347 */
1348 pr_err("Invalid BIOS MADT, disabling ACPI\n");
1349 disable_acpi();
1350 }
1351 }
1352#endif
1353}
1354
1355static void __init acpi_process_madt(void)
1356{
1357#ifdef CONFIG_X86_LOCAL_APIC
1358 int error;
1359
1360 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
1361
1362 /*
1363 * Parse MADT LAPIC entries
1364 */
1365 error = acpi_parse_madt_lapic_entries();
1366 if (!error) {
1367 acpi_lapic = 1;
1368
1369 /*
1370 * Parse MADT IO-APIC entries
1371 */
1372 mutex_lock(&acpi_ioapic_lock);
1373 error = acpi_parse_madt_ioapic_entries();
1374 mutex_unlock(&acpi_ioapic_lock);
1375 if (!error) {
1376 acpi_set_irq_model_ioapic();
1377
1378 smp_found_config = 1;
1379 }
1380
1381#ifdef CONFIG_X86_64
1382 /*
1383 * Parse MADT MP Wake entry.
1384 */
1385 acpi_table_parse_madt(ACPI_MADT_TYPE_MULTIPROC_WAKEUP,
1386 acpi_parse_mp_wake, 1);
1387#endif
1388 }
1389 if (error == -EINVAL) {
1390 /*
1391 * Dell Precision Workstation 410, 610 come here.
1392 */
1393 pr_err("Invalid BIOS MADT, disabling ACPI\n");
1394 disable_acpi();
1395 }
1396 } else {
1397 /*
1398 * ACPI found no MADT, and so ACPI wants UP PIC mode.
1399 * In the event an MPS table was found, forget it.
1400 * Boot with "acpi=off" to use MPS on such a system.
1401 */
1402 if (smp_found_config) {
1403 pr_warn("No APIC-table, disabling MPS\n");
1404 smp_found_config = 0;
1405 }
1406 }
1407
1408 /*
1409 * ACPI supports both logical (e.g. Hyper-Threading) and physical
1410 * processors, where MPS only supports physical.
1411 */
1412 if (acpi_lapic && acpi_ioapic)
1413 pr_info("Using ACPI (MADT) for SMP configuration information\n");
1414 else if (acpi_lapic)
1415 pr_info("Using ACPI for processor (LAPIC) configuration information\n");
1416#endif
1417 return;
1418}
1419
1420static int __init disable_acpi_irq(const struct dmi_system_id *d)
1421{
1422 if (!acpi_force) {
1423 pr_notice("%s detected: force use of acpi=noirq\n", d->ident);
1424 acpi_noirq_set();
1425 }
1426 return 0;
1427}
1428
1429static int __init disable_acpi_pci(const struct dmi_system_id *d)
1430{
1431 if (!acpi_force) {
1432 pr_notice("%s detected: force use of pci=noacpi\n", d->ident);
1433 acpi_disable_pci();
1434 }
1435 return 0;
1436}
1437
1438static int __init disable_acpi_xsdt(const struct dmi_system_id *d)
1439{
1440 if (!acpi_force) {
1441 pr_notice("%s detected: force use of acpi=rsdt\n", d->ident);
1442 acpi_gbl_do_not_use_xsdt = TRUE;
1443 } else {
1444 pr_notice("Warning: DMI blacklist says broken, but acpi XSDT forced\n");
1445 }
1446 return 0;
1447}
1448
1449static int __init dmi_disable_acpi(const struct dmi_system_id *d)
1450{
1451 if (!acpi_force) {
1452 pr_notice("%s detected: acpi off\n", d->ident);
1453 disable_acpi();
1454 } else {
1455 pr_notice("Warning: DMI blacklist says broken, but acpi forced\n");
1456 }
1457 return 0;
1458}
1459
1460/*
1461 * Force ignoring BIOS IRQ0 override
1462 */
1463static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
1464{
1465 if (!acpi_skip_timer_override) {
1466 pr_notice("%s detected: Ignoring BIOS IRQ0 override\n",
1467 d->ident);
1468 acpi_skip_timer_override = 1;
1469 }
1470 return 0;
1471}
1472
1473/*
1474 * ACPI offers an alternative platform interface model that removes
1475 * ACPI hardware requirements for platforms that do not implement
1476 * the PC Architecture.
1477 *
1478 * We initialize the Hardware-reduced ACPI model here:
1479 */
1480void __init acpi_generic_reduced_hw_init(void)
1481{
1482 /*
1483 * Override x86_init functions and bypass legacy PIC in
1484 * hardware reduced ACPI mode.
1485 */
1486 x86_init.timers.timer_init = x86_init_noop;
1487 x86_init.irqs.pre_vector_init = x86_init_noop;
1488 legacy_pic = &null_legacy_pic;
1489}
1490
1491static void __init acpi_reduced_hw_init(void)
1492{
1493 if (acpi_gbl_reduced_hardware)
1494 x86_init.acpi.reduced_hw_early_init();
1495}
1496
1497/*
1498 * If your system is blacklisted here, but you find that acpi=force
1499 * works for you, please contact linux-acpi@vger.kernel.org
1500 */
1501static const struct dmi_system_id acpi_dmi_table[] __initconst = {
1502 /*
1503 * Boxes that need ACPI disabled
1504 */
1505 {
1506 .callback = dmi_disable_acpi,
1507 .ident = "IBM Thinkpad",
1508 .matches = {
1509 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1510 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
1511 },
1512 },
1513
1514 /*
1515 * Boxes that need ACPI PCI IRQ routing disabled
1516 */
1517 {
1518 .callback = disable_acpi_irq,
1519 .ident = "ASUS A7V",
1520 .matches = {
1521 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
1522 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
1523 /* newer BIOS, Revision 1011, does work */
1524 DMI_MATCH(DMI_BIOS_VERSION,
1525 "ASUS A7V ACPI BIOS Revision 1007"),
1526 },
1527 },
1528 {
1529 /*
1530 * Latest BIOS for IBM 600E (1.16) has bad pcinum
1531 * for LPC bridge, which is needed for the PCI
1532 * interrupt links to work. DSDT fix is in bug 5966.
1533 * 2645, 2646 model numbers are shared with 600/600E/600X
1534 */
1535 .callback = disable_acpi_irq,
1536 .ident = "IBM Thinkpad 600 Series 2645",
1537 .matches = {
1538 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1539 DMI_MATCH(DMI_BOARD_NAME, "2645"),
1540 },
1541 },
1542 {
1543 .callback = disable_acpi_irq,
1544 .ident = "IBM Thinkpad 600 Series 2646",
1545 .matches = {
1546 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
1547 DMI_MATCH(DMI_BOARD_NAME, "2646"),
1548 },
1549 },
1550 /*
1551 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled
1552 */
1553 { /* _BBN 0 bug */
1554 .callback = disable_acpi_pci,
1555 .ident = "ASUS PR-DLS",
1556 .matches = {
1557 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1558 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
1559 DMI_MATCH(DMI_BIOS_VERSION,
1560 "ASUS PR-DLS ACPI BIOS Revision 1010"),
1561 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
1562 },
1563 },
1564 {
1565 .callback = disable_acpi_pci,
1566 .ident = "Acer TravelMate 36x Laptop",
1567 .matches = {
1568 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1569 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1570 },
1571 },
1572 /*
1573 * Boxes that need ACPI XSDT use disabled due to corrupted tables
1574 */
1575 {
1576 .callback = disable_acpi_xsdt,
1577 .ident = "Advantech DAC-BJ01",
1578 .matches = {
1579 DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
1580 DMI_MATCH(DMI_PRODUCT_NAME, "Bearlake CRB Board"),
1581 DMI_MATCH(DMI_BIOS_VERSION, "V1.12"),
1582 DMI_MATCH(DMI_BIOS_DATE, "02/01/2011"),
1583 },
1584 },
1585 {}
1586};
1587
1588/* second table for DMI checks that should run after early-quirks */
1589static const struct dmi_system_id acpi_dmi_table_late[] __initconst = {
1590 /*
1591 * HP laptops which use a DSDT reporting as HP/SB400/10000,
1592 * which includes some code which overrides all temperature
1593 * trip points to 16C if the INTIN2 input of the I/O APIC
1594 * is enabled. This input is incorrectly designated the
1595 * ISA IRQ 0 via an interrupt source override even though
1596 * it is wired to the output of the master 8259A and INTIN0
1597 * is not connected at all. Force ignoring BIOS IRQ0
1598 * override in that cases.
1599 */
1600 {
1601 .callback = dmi_ignore_irq0_timer_override,
1602 .ident = "HP nx6115 laptop",
1603 .matches = {
1604 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1605 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"),
1606 },
1607 },
1608 {
1609 .callback = dmi_ignore_irq0_timer_override,
1610 .ident = "HP NX6125 laptop",
1611 .matches = {
1612 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1613 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"),
1614 },
1615 },
1616 {
1617 .callback = dmi_ignore_irq0_timer_override,
1618 .ident = "HP NX6325 laptop",
1619 .matches = {
1620 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1621 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"),
1622 },
1623 },
1624 {
1625 .callback = dmi_ignore_irq0_timer_override,
1626 .ident = "HP 6715b laptop",
1627 .matches = {
1628 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1629 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"),
1630 },
1631 },
1632 {
1633 .callback = dmi_ignore_irq0_timer_override,
1634 .ident = "FUJITSU SIEMENS",
1635 .matches = {
1636 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
1637 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"),
1638 },
1639 },
1640 {}
1641};
1642
1643/*
1644 * acpi_boot_table_init() and acpi_boot_init()
1645 * called from setup_arch(), always.
1646 * 1. checksums all tables
1647 * 2. enumerates lapics
1648 * 3. enumerates io-apics
1649 *
1650 * acpi_table_init() is separate to allow reading SRAT without
1651 * other side effects.
1652 *
1653 * side effects of acpi_boot_init:
1654 * acpi_lapic = 1 if LAPIC found
1655 * acpi_ioapic = 1 if IOAPIC found
1656 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
1657 * if acpi_blacklisted() acpi_disabled = 1;
1658 * acpi_irq_model=...
1659 * ...
1660 */
1661
1662void __init acpi_boot_table_init(void)
1663{
1664 dmi_check_system(acpi_dmi_table);
1665
1666 /*
1667 * If acpi_disabled, bail out
1668 */
1669 if (acpi_disabled)
1670 return;
1671
1672 /*
1673 * Initialize the ACPI boot-time table parser.
1674 */
1675 if (acpi_locate_initial_tables())
1676 disable_acpi();
1677 else
1678 acpi_reserve_initial_tables();
1679}
1680
1681int __init early_acpi_boot_init(void)
1682{
1683 if (acpi_disabled)
1684 return 1;
1685
1686 acpi_table_init_complete();
1687
1688 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1689
1690 /*
1691 * blacklist may disable ACPI entirely
1692 */
1693 if (acpi_blacklisted()) {
1694 if (acpi_force) {
1695 pr_warn("acpi=force override\n");
1696 } else {
1697 pr_warn("Disabling ACPI support\n");
1698 disable_acpi();
1699 return 1;
1700 }
1701 }
1702
1703 /*
1704 * Process the Multiple APIC Description Table (MADT), if present
1705 */
1706 early_acpi_process_madt();
1707
1708 /*
1709 * Hardware-reduced ACPI mode initialization:
1710 */
1711 acpi_reduced_hw_init();
1712
1713 return 0;
1714}
1715
1716int __init acpi_boot_init(void)
1717{
1718 /* those are executed after early-quirks are executed */
1719 dmi_check_system(acpi_dmi_table_late);
1720
1721 /*
1722 * If acpi_disabled, bail out
1723 */
1724 if (acpi_disabled)
1725 return 1;
1726
1727 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
1728
1729 /*
1730 * set sci_int and PM timer address
1731 */
1732 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
1733
1734 /*
1735 * Process the Multiple APIC Description Table (MADT), if present
1736 */
1737 acpi_process_madt();
1738
1739 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
1740 if (IS_ENABLED(CONFIG_ACPI_BGRT) && !acpi_nobgrt)
1741 acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt);
1742
1743 if (!acpi_noirq)
1744 x86_init.pci.init = pci_acpi_init;
1745
1746 /* Do not enable ACPI SPCR console by default */
1747 acpi_parse_spcr(earlycon_acpi_spcr_enable, false);
1748 return 0;
1749}
1750
1751static int __init parse_acpi(char *arg)
1752{
1753 if (!arg)
1754 return -EINVAL;
1755
1756 /* "acpi=off" disables both ACPI table parsing and interpreter */
1757 if (strcmp(arg, "off") == 0) {
1758 disable_acpi();
1759 }
1760 /* acpi=force to over-ride black-list */
1761 else if (strcmp(arg, "force") == 0) {
1762 acpi_force = 1;
1763 acpi_disabled = 0;
1764 }
1765 /* acpi=strict disables out-of-spec workarounds */
1766 else if (strcmp(arg, "strict") == 0) {
1767 acpi_strict = 1;
1768 }
1769 /* acpi=rsdt use RSDT instead of XSDT */
1770 else if (strcmp(arg, "rsdt") == 0) {
1771 acpi_gbl_do_not_use_xsdt = TRUE;
1772 }
1773 /* "acpi=noirq" disables ACPI interrupt routing */
1774 else if (strcmp(arg, "noirq") == 0) {
1775 acpi_noirq_set();
1776 }
1777 /* "acpi=copy_dsdt" copies DSDT */
1778 else if (strcmp(arg, "copy_dsdt") == 0) {
1779 acpi_gbl_copy_dsdt_locally = 1;
1780 }
1781 /* "acpi=nocmcff" disables FF mode for corrected errors */
1782 else if (strcmp(arg, "nocmcff") == 0) {
1783 acpi_disable_cmcff = 1;
1784 } else {
1785 /* Core will printk when we return error. */
1786 return -EINVAL;
1787 }
1788 return 0;
1789}
1790early_param("acpi", parse_acpi);
1791
1792static int __init parse_acpi_bgrt(char *arg)
1793{
1794 acpi_nobgrt = true;
1795 return 0;
1796}
1797early_param("bgrt_disable", parse_acpi_bgrt);
1798
1799/* FIXME: Using pci= for an ACPI parameter is a travesty. */
1800static int __init parse_pci(char *arg)
1801{
1802 if (arg && strcmp(arg, "noacpi") == 0)
1803 acpi_disable_pci();
1804 return 0;
1805}
1806early_param("pci", parse_pci);
1807
1808int __init acpi_mps_check(void)
1809{
1810#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
1811/* mptable code is not built-in*/
1812 if (acpi_disabled || acpi_noirq) {
1813 pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n");
1814 return 1;
1815 }
1816#endif
1817 return 0;
1818}
1819
1820#ifdef CONFIG_X86_IO_APIC
1821static int __init parse_acpi_skip_timer_override(char *arg)
1822{
1823 acpi_skip_timer_override = 1;
1824 return 0;
1825}
1826early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
1827
1828static int __init parse_acpi_use_timer_override(char *arg)
1829{
1830 acpi_use_timer_override = 1;
1831 return 0;
1832}
1833early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
1834#endif /* CONFIG_X86_IO_APIC */
1835
1836static int __init setup_acpi_sci(char *s)
1837{
1838 if (!s)
1839 return -EINVAL;
1840 if (!strcmp(s, "edge"))
1841 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
1842 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1843 else if (!strcmp(s, "level"))
1844 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
1845 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
1846 else if (!strcmp(s, "high"))
1847 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
1848 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1849 else if (!strcmp(s, "low"))
1850 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
1851 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
1852 else
1853 return -EINVAL;
1854 return 0;
1855}
1856early_param("acpi_sci", setup_acpi_sci);
1857
1858int __acpi_acquire_global_lock(unsigned int *lock)
1859{
1860 unsigned int old, new, val;
1861
1862 old = READ_ONCE(*lock);
1863 do {
1864 val = (old >> 1) & 0x1;
1865 new = (old & ~0x3) + 2 + val;
1866 } while (!try_cmpxchg(lock, &old, new));
1867
1868 if (val)
1869 return 0;
1870
1871 return -1;
1872}
1873
1874int __acpi_release_global_lock(unsigned int *lock)
1875{
1876 unsigned int old, new;
1877
1878 old = READ_ONCE(*lock);
1879 do {
1880 new = old & ~0x3;
1881 } while (!try_cmpxchg(lock, &old, new));
1882 return old & 0x1;
1883}
1884
1885void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size)
1886{
1887 e820__range_add(addr, size, E820_TYPE_NVS);
1888 e820__update_table_print();
1889}
1890
1891void x86_default_set_root_pointer(u64 addr)
1892{
1893 boot_params.acpi_rsdp_addr = addr;
1894}
1895
1896u64 x86_default_get_root_pointer(void)
1897{
1898 return boot_params.acpi_rsdp_addr;
1899}