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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
7 * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
8 */
9#ifndef _ASM_IRQ_H
10#define _ASM_IRQ_H
11
12#include <linux/linkage.h>
13#include <linux/smp.h>
14#include <linux/irqdomain.h>
15
16#include <asm/mipsmtregs.h>
17
18#include <irq.h>
19
20#ifdef CONFIG_I8259
21static inline int irq_canonicalize(int irq)
22{
23 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
24}
25#else
26#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
27#endif
28
29asmlinkage void plat_irq_dispatch(void);
30
31extern void do_IRQ(unsigned int irq);
32
33extern void arch_init_irq(void);
34extern void spurious_interrupt(void);
35
36extern int allocate_irqno(void);
37extern void alloc_legacy_irqno(void);
38extern void free_irqno(unsigned int irq);
39
40/*
41 * Before R2 the timer and performance counter interrupts were both fixed to
42 * IE7. Since R2 their number has to be read from the c0_intctl register.
43 */
44#define CP0_LEGACY_COMPARE_IRQ 7
45#define CP0_LEGACY_PERFCNT_IRQ 7
46
47extern int cp0_compare_irq;
48extern int cp0_compare_irq_shift;
49extern int cp0_perfcount_irq;
50extern int cp0_fdc_irq;
51
52extern int get_c0_fdc_int(void);
53
54void arch_trigger_all_cpu_backtrace(bool);
55#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace
56
57#endif /* _ASM_IRQ_H */
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
7 * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
8 */
9#ifndef _ASM_IRQ_H
10#define _ASM_IRQ_H
11
12#include <linux/linkage.h>
13#include <linux/smp.h>
14
15#include <asm/mipsmtregs.h>
16
17#include <irq.h>
18
19#define IRQ_STACK_SIZE THREAD_SIZE
20#define IRQ_STACK_START (IRQ_STACK_SIZE - 16)
21
22extern void *irq_stack[NR_CPUS];
23
24/*
25 * The highest address on the IRQ stack contains a dummy frame put down in
26 * genex.S (handle_int & except_vec_vi_handler) which is structured as follows:
27 *
28 * top ------------
29 * | task sp | <- irq_stack[cpu] + IRQ_STACK_START
30 * ------------
31 * | | <- First frame of IRQ context
32 * ------------
33 *
34 * task sp holds a copy of the task stack pointer where the struct pt_regs
35 * from exception entry can be found.
36 */
37
38static inline bool on_irq_stack(int cpu, unsigned long sp)
39{
40 unsigned long low = (unsigned long)irq_stack[cpu];
41 unsigned long high = low + IRQ_STACK_SIZE;
42
43 return (low <= sp && sp <= high);
44}
45
46#ifdef CONFIG_I8259
47static inline int irq_canonicalize(int irq)
48{
49 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
50}
51#else
52#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
53#endif
54
55asmlinkage void plat_irq_dispatch(void);
56
57extern void do_IRQ(unsigned int irq);
58
59struct irq_domain;
60extern void do_domain_IRQ(struct irq_domain *domain, unsigned int irq);
61
62extern void arch_init_irq(void);
63extern void spurious_interrupt(void);
64
65/*
66 * Before R2 the timer and performance counter interrupts were both fixed to
67 * IE7. Since R2 their number has to be read from the c0_intctl register.
68 */
69#define CP0_LEGACY_COMPARE_IRQ 7
70#define CP0_LEGACY_PERFCNT_IRQ 7
71
72extern int cp0_compare_irq;
73extern int cp0_compare_irq_shift;
74extern int cp0_perfcount_irq;
75extern int cp0_fdc_irq;
76
77extern int get_c0_fdc_int(void);
78
79void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
80 int exclude_cpu);
81#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
82
83#endif /* _ASM_IRQ_H */