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1/*
2 * hdac-ext-controller.c - HD-audio extended controller functions.
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/delay.h>
21#include <linux/slab.h>
22#include <sound/hda_register.h>
23#include <sound/hdaudio_ext.h>
24
25/*
26 * maximum HDAC capablities we should parse to avoid endless looping:
27 * currently we have 4 extended caps, so this is future proof for now.
28 * extend when this limit is seen meeting in real HW
29 */
30#define HDAC_MAX_CAPS 10
31
32/**
33 * snd_hdac_ext_bus_parse_capabilities - parse capablity structure
34 * @ebus: the pointer to extended bus object
35 *
36 * Returns 0 if successful, or a negative error code.
37 */
38int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus)
39{
40 unsigned int cur_cap;
41 unsigned int offset;
42 struct hdac_bus *bus = &ebus->bus;
43 unsigned int counter = 0;
44
45 offset = snd_hdac_chip_readl(bus, LLCH);
46
47 /* Lets walk the linked capabilities list */
48 do {
49 cur_cap = _snd_hdac_chip_read(l, bus, offset);
50
51 dev_dbg(bus->dev, "Capability version: 0x%x\n",
52 ((cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF));
53
54 dev_dbg(bus->dev, "HDA capability ID: 0x%x\n",
55 (cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF);
56
57 switch ((cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF) {
58 case AZX_ML_CAP_ID:
59 dev_dbg(bus->dev, "Found ML capability\n");
60 ebus->mlcap = bus->remap_addr + offset;
61 break;
62
63 case AZX_GTS_CAP_ID:
64 dev_dbg(bus->dev, "Found GTS capability offset=%x\n", offset);
65 ebus->gtscap = bus->remap_addr + offset;
66 break;
67
68 case AZX_PP_CAP_ID:
69 /* PP capability found, the Audio DSP is present */
70 dev_dbg(bus->dev, "Found PP capability offset=%x\n", offset);
71 ebus->ppcap = bus->remap_addr + offset;
72 break;
73
74 case AZX_SPB_CAP_ID:
75 /* SPIB capability found, handler function */
76 dev_dbg(bus->dev, "Found SPB capability\n");
77 ebus->spbcap = bus->remap_addr + offset;
78 break;
79
80 case AZX_DRSM_CAP_ID:
81 /* DMA resume capability found, handler function */
82 dev_dbg(bus->dev, "Found DRSM capability\n");
83 ebus->drsmcap = bus->remap_addr + offset;
84 break;
85
86 default:
87 dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap);
88 break;
89 }
90
91 counter++;
92
93 if (counter > HDAC_MAX_CAPS) {
94 dev_err(bus->dev, "We exceeded HDAC Ext capablities!!!\n");
95 break;
96 }
97
98 /* read the offset of next capabiity */
99 offset = cur_cap & AZX_CAP_HDR_NXT_PTR_MASK;
100
101 } while (offset);
102
103 return 0;
104}
105EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_parse_capabilities);
106
107/*
108 * processing pipe helpers - these helpers are useful for dealing with HDA
109 * new capability of processing pipelines
110 */
111
112/**
113 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
114 * @ebus: HD-audio extended core bus
115 * @enable: flag to turn on/off the capability
116 */
117void snd_hdac_ext_bus_ppcap_enable(struct hdac_ext_bus *ebus, bool enable)
118{
119 struct hdac_bus *bus = &ebus->bus;
120
121 if (!ebus->ppcap) {
122 dev_err(bus->dev, "Address of PP capability is NULL");
123 return;
124 }
125
126 if (enable)
127 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN);
128 else
129 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0);
130}
131EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
132
133/**
134 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
135 * @ebus: HD-audio extended core bus
136 * @enable: flag to enable/disable interrupt
137 */
138void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_ext_bus *ebus, bool enable)
139{
140 struct hdac_bus *bus = &ebus->bus;
141
142 if (!ebus->ppcap) {
143 dev_err(bus->dev, "Address of PP capability is NULL\n");
144 return;
145 }
146
147 if (enable)
148 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE);
149 else
150 snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0);
151}
152EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
153
154/*
155 * Multilink helpers - these helpers are useful for dealing with HDA
156 * new multilink capability
157 */
158
159/**
160 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
161 * @ebus: HD-audio extended core bus
162 *
163 * This will parse all links and read the mlink capabilities and add them
164 * in hlink_list of extended hdac bus
165 * Note: this will be freed on bus exit by driver
166 */
167int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
168{
169 int idx;
170 u32 link_count;
171 struct hdac_ext_link *hlink;
172 struct hdac_bus *bus = &ebus->bus;
173
174 link_count = readl(ebus->mlcap + AZX_REG_ML_MLCD) + 1;
175
176 dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
177
178 for (idx = 0; idx < link_count; idx++) {
179 hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
180 if (!hlink)
181 return -ENOMEM;
182 hlink->index = idx;
183 hlink->bus = bus;
184 hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
185 (AZX_ML_INTERVAL * idx);
186 hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
187 hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
188
189 list_add_tail(&hlink->list, &ebus->hlink_list);
190 }
191
192 return 0;
193}
194EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
195
196/**
197 * snd_hdac_link_free_all- free hdac extended link objects
198 *
199 * @ebus: HD-audio ext core bus
200 */
201
202void snd_hdac_link_free_all(struct hdac_ext_bus *ebus)
203{
204 struct hdac_ext_link *l;
205
206 while (!list_empty(&ebus->hlink_list)) {
207 l = list_first_entry(&ebus->hlink_list, struct hdac_ext_link, list);
208 list_del(&l->list);
209 kfree(l);
210 }
211}
212EXPORT_SYMBOL_GPL(snd_hdac_link_free_all);
213
214/**
215 * snd_hdac_ext_bus_get_link_index - get link based on codec name
216 * @ebus: HD-audio extended core bus
217 * @codec_name: codec name
218 */
219struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_ext_bus *ebus,
220 const char *codec_name)
221{
222 int i;
223 struct hdac_ext_link *hlink = NULL;
224 int bus_idx, addr;
225
226 if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
227 return NULL;
228 if (ebus->idx != bus_idx)
229 return NULL;
230
231 list_for_each_entry(hlink, &ebus->hlink_list, list) {
232 for (i = 0; i < HDA_MAX_CODECS; i++) {
233 if (hlink->lsdiid & (0x1 << addr))
234 return hlink;
235 }
236 }
237
238 return NULL;
239}
240EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link);
241
242static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
243{
244 int timeout;
245 u32 val;
246 int mask = (1 << AZX_MLCTL_CPA);
247
248 udelay(3);
249 timeout = 150;
250
251 do {
252 val = readl(link->ml_addr + AZX_REG_ML_LCTL);
253 if (enable) {
254 if (((val & mask) >> AZX_MLCTL_CPA))
255 return 0;
256 } else {
257 if (!((val & mask) >> AZX_MLCTL_CPA))
258 return 0;
259 }
260 udelay(3);
261 } while (--timeout);
262
263 return -EIO;
264}
265
266/**
267 * snd_hdac_ext_bus_link_power_up -power up hda link
268 * @link: HD-audio extended link
269 */
270int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
271{
272 snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
273
274 return check_hdac_link_power_active(link, true);
275}
276EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
277
278/**
279 * snd_hdac_ext_bus_link_power_down -power down hda link
280 * @link: HD-audio extended link
281 */
282int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
283{
284 snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
285
286 return check_hdac_link_power_active(link, false);
287}
288EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
289
290/**
291 * snd_hdac_ext_bus_link_power_up_all -power up all hda link
292 * @ebus: HD-audio extended bus
293 */
294int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus)
295{
296 struct hdac_ext_link *hlink = NULL;
297 int ret;
298
299 list_for_each_entry(hlink, &ebus->hlink_list, list) {
300 snd_hdac_updatel(hlink->ml_addr,
301 AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
302 ret = check_hdac_link_power_active(hlink, true);
303 if (ret < 0)
304 return ret;
305 }
306
307 return 0;
308}
309EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all);
310
311/**
312 * snd_hdac_ext_bus_link_power_down_all -power down all hda link
313 * @ebus: HD-audio extended bus
314 */
315int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus)
316{
317 struct hdac_ext_link *hlink = NULL;
318 int ret;
319
320 list_for_each_entry(hlink, &ebus->hlink_list, list) {
321 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
322 ret = check_hdac_link_power_active(hlink, false);
323 if (ret < 0)
324 return ret;
325 }
326
327 return 0;
328}
329EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * hdac-ext-controller.c - HD-audio extended controller functions.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 */
11
12#include <linux/delay.h>
13#include <linux/slab.h>
14#include <sound/hda_register.h>
15#include <sound/hdaudio_ext.h>
16
17/*
18 * processing pipe helpers - these helpers are useful for dealing with HDA
19 * new capability of processing pipelines
20 */
21
22/**
23 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
24 * @bus: the pointer to HDAC bus object
25 * @enable: flag to turn on/off the capability
26 */
27void snd_hdac_ext_bus_ppcap_enable(struct hdac_bus *bus, bool enable)
28{
29
30 if (!bus->ppcap) {
31 dev_err(bus->dev, "Address of PP capability is NULL");
32 return;
33 }
34
35 if (enable)
36 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
37 AZX_PPCTL_GPROCEN, AZX_PPCTL_GPROCEN);
38 else
39 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
40 AZX_PPCTL_GPROCEN, 0);
41}
42EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
43
44/**
45 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
46 * @bus: the pointer to HDAC bus object
47 * @enable: flag to enable/disable interrupt
48 */
49void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_bus *bus, bool enable)
50{
51
52 if (!bus->ppcap) {
53 dev_err(bus->dev, "Address of PP capability is NULL\n");
54 return;
55 }
56
57 if (enable)
58 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
59 AZX_PPCTL_PIE, AZX_PPCTL_PIE);
60 else
61 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
62 AZX_PPCTL_PIE, 0);
63}
64EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
65
66/*
67 * Multilink helpers - these helpers are useful for dealing with HDA
68 * new multilink capability
69 */
70
71/**
72 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
73 * @bus: the pointer to HDAC bus object
74 *
75 * This will parse all links and read the mlink capabilities and add them
76 * in hlink_list of extended hdac bus
77 * Note: this will be freed on bus exit by driver
78 */
79int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus)
80{
81 int idx;
82 u32 link_count;
83 struct hdac_ext_link *hlink;
84
85 link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
86
87 dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
88
89 for (idx = 0; idx < link_count; idx++) {
90 hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
91 if (!hlink)
92 return -ENOMEM;
93 hlink->index = idx;
94 hlink->bus = bus;
95 hlink->ml_addr = bus->mlcap + AZX_ML_BASE +
96 (AZX_ML_INTERVAL * idx);
97 hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
98 hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
99
100 /* since link in On, update the ref */
101 hlink->ref_count = 1;
102
103 list_add_tail(&hlink->list, &bus->hlink_list);
104 }
105
106 return 0;
107}
108EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
109
110/**
111 * snd_hdac_ext_link_free_all- free hdac extended link objects
112 *
113 * @bus: the pointer to HDAC bus object
114 */
115
116void snd_hdac_ext_link_free_all(struct hdac_bus *bus)
117{
118 struct hdac_ext_link *hlink;
119
120 while (!list_empty(&bus->hlink_list)) {
121 hlink = list_first_entry(&bus->hlink_list, struct hdac_ext_link, list);
122 list_del(&hlink->list);
123 kfree(hlink);
124 }
125}
126EXPORT_SYMBOL_GPL(snd_hdac_ext_link_free_all);
127
128/**
129 * snd_hdac_ext_bus_get_hlink_by_addr - get hlink at specified address
130 * @bus: hlink's parent bus device
131 * @addr: codec device address
132 *
133 * Returns hlink object or NULL if matching hlink is not found.
134 */
135struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_addr(struct hdac_bus *bus, int addr)
136{
137 struct hdac_ext_link *hlink;
138
139 list_for_each_entry(hlink, &bus->hlink_list, list)
140 if (hlink->lsdiid & (0x1 << addr))
141 return hlink;
142 return NULL;
143}
144EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_hlink_by_addr);
145
146/**
147 * snd_hdac_ext_bus_get_hlink_by_name - get hlink based on codec name
148 * @bus: the pointer to HDAC bus object
149 * @codec_name: codec name
150 */
151struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_name(struct hdac_bus *bus,
152 const char *codec_name)
153{
154 int bus_idx, addr;
155
156 if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
157 return NULL;
158 if (bus->idx != bus_idx)
159 return NULL;
160 if (addr < 0 || addr > 31)
161 return NULL;
162
163 return snd_hdac_ext_bus_get_hlink_by_addr(bus, addr);
164}
165EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_hlink_by_name);
166
167static int check_hdac_link_power_active(struct hdac_ext_link *hlink, bool enable)
168{
169 int timeout;
170 u32 val;
171 int mask = (1 << AZX_ML_LCTL_CPA_SHIFT);
172
173 udelay(3);
174 timeout = 150;
175
176 do {
177 val = readl(hlink->ml_addr + AZX_REG_ML_LCTL);
178 if (enable) {
179 if (((val & mask) >> AZX_ML_LCTL_CPA_SHIFT))
180 return 0;
181 } else {
182 if (!((val & mask) >> AZX_ML_LCTL_CPA_SHIFT))
183 return 0;
184 }
185 udelay(3);
186 } while (--timeout);
187
188 return -EIO;
189}
190
191/**
192 * snd_hdac_ext_bus_link_power_up -power up hda link
193 * @hlink: HD-audio extended link
194 */
195int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *hlink)
196{
197 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL,
198 AZX_ML_LCTL_SPA, AZX_ML_LCTL_SPA);
199
200 return check_hdac_link_power_active(hlink, true);
201}
202EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
203
204/**
205 * snd_hdac_ext_bus_link_power_down -power down hda link
206 * @hlink: HD-audio extended link
207 */
208int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *hlink)
209{
210 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, AZX_ML_LCTL_SPA, 0);
211
212 return check_hdac_link_power_active(hlink, false);
213}
214EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
215
216/**
217 * snd_hdac_ext_bus_link_power_up_all -power up all hda link
218 * @bus: the pointer to HDAC bus object
219 */
220int snd_hdac_ext_bus_link_power_up_all(struct hdac_bus *bus)
221{
222 struct hdac_ext_link *hlink = NULL;
223 int ret;
224
225 list_for_each_entry(hlink, &bus->hlink_list, list) {
226 ret = snd_hdac_ext_bus_link_power_up(hlink);
227 if (ret < 0)
228 return ret;
229 }
230
231 return 0;
232}
233EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all);
234
235/**
236 * snd_hdac_ext_bus_link_power_down_all -power down all hda link
237 * @bus: the pointer to HDAC bus object
238 */
239int snd_hdac_ext_bus_link_power_down_all(struct hdac_bus *bus)
240{
241 struct hdac_ext_link *hlink = NULL;
242 int ret;
243
244 list_for_each_entry(hlink, &bus->hlink_list, list) {
245 ret = snd_hdac_ext_bus_link_power_down(hlink);
246 if (ret < 0)
247 return ret;
248 }
249
250 return 0;
251}
252EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);
253
254/**
255 * snd_hdac_ext_bus_link_set_stream_id - maps stream id to link output
256 * @link: HD-audio ext link to set up
257 * @stream: stream id
258 */
259void snd_hdac_ext_bus_link_set_stream_id(struct hdac_ext_link *link,
260 int stream)
261{
262 snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV, (1 << stream), 1 << stream);
263}
264EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_set_stream_id);
265
266/**
267 * snd_hdac_ext_bus_link_clear_stream_id - maps stream id to link output
268 * @link: HD-audio ext link to set up
269 * @stream: stream id
270 */
271void snd_hdac_ext_bus_link_clear_stream_id(struct hdac_ext_link *link,
272 int stream)
273{
274 snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV, (1 << stream), 0);
275}
276EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_clear_stream_id);
277
278int snd_hdac_ext_bus_link_get(struct hdac_bus *bus,
279 struct hdac_ext_link *hlink)
280{
281 unsigned long codec_mask;
282 int ret = 0;
283
284 mutex_lock(&bus->lock);
285
286 /*
287 * if we move from 0 to 1, count will be 1 so power up this link
288 * as well, also check the dma status and trigger that
289 */
290 if (++hlink->ref_count == 1) {
291 if (!bus->cmd_dma_state) {
292 snd_hdac_bus_init_cmd_io(bus);
293 bus->cmd_dma_state = true;
294 }
295
296 ret = snd_hdac_ext_bus_link_power_up(hlink);
297
298 /*
299 * clear the register to invalidate all the output streams
300 */
301 snd_hdac_updatew(hlink->ml_addr, AZX_REG_ML_LOSIDV,
302 AZX_ML_LOSIDV_STREAM_MASK, 0);
303 /*
304 * wait for 521usec for codec to report status
305 * HDA spec section 4.3 - Codec Discovery
306 */
307 udelay(521);
308 codec_mask = snd_hdac_chip_readw(bus, STATESTS);
309 dev_dbg(bus->dev, "codec_mask = 0x%lx\n", codec_mask);
310 snd_hdac_chip_writew(bus, STATESTS, codec_mask);
311 if (!bus->codec_mask)
312 bus->codec_mask = codec_mask;
313 }
314
315 mutex_unlock(&bus->lock);
316 return ret;
317}
318EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_get);
319
320int snd_hdac_ext_bus_link_put(struct hdac_bus *bus,
321 struct hdac_ext_link *hlink)
322{
323 int ret = 0;
324 struct hdac_ext_link *hlink_tmp;
325 bool link_up = false;
326
327 mutex_lock(&bus->lock);
328
329 /*
330 * if we move from 1 to 0, count will be 0
331 * so power down this link as well
332 */
333 if (--hlink->ref_count == 0) {
334 ret = snd_hdac_ext_bus_link_power_down(hlink);
335
336 /*
337 * now check if all links are off, if so turn off
338 * cmd dma as well
339 */
340 list_for_each_entry(hlink_tmp, &bus->hlink_list, list) {
341 if (hlink_tmp->ref_count) {
342 link_up = true;
343 break;
344 }
345 }
346
347 if (!link_up) {
348 snd_hdac_bus_stop_cmd_io(bus);
349 bus->cmd_dma_state = false;
350 }
351 }
352
353 mutex_unlock(&bus->lock);
354 return ret;
355}
356EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_put);
357
358static void hdac_ext_codec_link_up(struct hdac_device *codec)
359{
360 const char *devname = dev_name(&codec->dev);
361 struct hdac_ext_link *hlink =
362 snd_hdac_ext_bus_get_hlink_by_name(codec->bus, devname);
363
364 if (hlink)
365 snd_hdac_ext_bus_link_get(codec->bus, hlink);
366}
367
368static void hdac_ext_codec_link_down(struct hdac_device *codec)
369{
370 const char *devname = dev_name(&codec->dev);
371 struct hdac_ext_link *hlink =
372 snd_hdac_ext_bus_get_hlink_by_name(codec->bus, devname);
373
374 if (hlink)
375 snd_hdac_ext_bus_link_put(codec->bus, hlink);
376}
377
378void snd_hdac_ext_bus_link_power(struct hdac_device *codec, bool enable)
379{
380 struct hdac_bus *bus = codec->bus;
381 bool oldstate = test_bit(codec->addr, &bus->codec_powered);
382
383 if (enable == oldstate)
384 return;
385
386 snd_hdac_bus_link_power(codec, enable);
387
388 if (enable)
389 hdac_ext_codec_link_up(codec);
390 else
391 hdac_ext_codec_link_down(codec);
392}
393EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power);