1/*
  2   Boot.S: boot loader for Siemens DVB-S card
  3
  4   Copyright (C) 2001 Convergence integrated media GmbH
  5	              Written by Ralph Metzler
  6		                 <rjkm@convergence.de>
  7   Copyright (C) 2006 Matthieu CASTET <castet.mattheiu@free.fr>
  8
  9   This program is free software; you can redistribute it and/or
 10   modify it under the terms of the GNU General Public License
 11   as published by the Free Software Foundation; either version 2
 12   of the License, or (at your option) any later version.
 13
 14   This program is distributed in the hope that it will be useful,
 15   but WITHOUT ANY WARRANTY; without even the implied warranty of
 16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17   GNU General Public License for more details.
 18
 19   You should have received a copy of the GNU General Public License
 20   along with this program; if not, write to the Free Software
 21   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA.
 22
 23*/
 24
 25/*
 26	check AV711x_3_1.pdf for some hardware infos
 27	build it with :
 28	$ cc -mbig-endian -c Boot.S
 29	$ ld -Ttext 0x2c000000 -EB -o Boot Boot.o
 30	$ objcopy -Obinary Boot
 31*/
 32
 33	.text
 34	.align
 35	.globl _start
 36_start:
 37	b reset			// reset vector
 38	movs  pc, r14           // undefined
 39	subs  pc, r14, #4       // SWI
 40	subs  pc, r14, #4       // prefetch abort
 41	subs  pc, r14, #8       // data abort
 42	subs  pc, r14, #4       // reserved
 43	subs  pc, r14, #4       // IRQ
 44	subs  pc, r14, #4       // FIQ
 45
 46	.word tbl               // table needed by firmware ROM
 47tbl:	.word (endtbl - tbl)
 48	.word 0
 49  	.word conf
 50endtbl:	.word 0
 51conf:	.word 0xa5a55a5a
 52	.word 0x001f1555
 53	.word 0x00000009
 54
 55reset:	ldr	r13, buffer
 56	ldr	r4, flag
 57	mov	r0, #0
 58	str	r0, [r4]
 59	str	r0, [r4, #4]
 60
 61	ldr		r1, wait_address
 62	ldr		r2, flag_address
 63	ldr		r3, sram
 64
 65copycode: // copy the code HW Sram
 66	ldmia	r1!, {r5-r12}
 67	stmia	r3!, {r5-r12}
 68	cmp		r1, r2
 69	ble 	copycode
 70	ldr		pc, sram // jump to the copied code
 71
 72wait:	ldrh	r1, [r4]        // wait for flag!=0
 73 	cmp	r1, #0
 74	beq	wait
 75
 76	mov	r1, r13         // buffer address
 77 	ldr	r3, [r4,#4]     // destaddr
 78
 79 	ldrh	r2, [r4,#2]     // get segment length
 80	add     r2, r2, #63     // round length to next 64 bytes
 81	movs	r2, r2, lsr #6  // and divide by 64
 82	moveq	r0, #2          // if 0, set flag to 2, else signal
 83	strh	r0, [r4]        // that buffer is accepted by setting to 0
 84        beq wait
 85	
 86copyloop:
 87	ldmia	r1!, {r5-r12}
 88	stmia	r3!, {r5-r12}
 89	ldmia	r1!, {r5-r12}
 90	stmia	r3!, {r5-r12}
 91 	subs	r2, r2, #1
 92 	bne	copyloop
 93
 94	eor     r13, r13, #0x1400    // switch to other buffer
 95	b	wait
 96
 97// flag is stored at 0x2c0003f8, length at 0x2c0003fa,
 98// destaddr at 0x2c0003fc
 99
100flag:	.word	0x2c0003f8
101
102
103// buffer 1 is at 0x2c000400, buffer 2 at 0x2c001000
104
105buffer:	.word	0x2c000400
106
107sram: .word   0x9e000800
108wait_address: .word   wait
109flag_address: .word   flag