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v4.6
 
  1/*
  2 * OHCI HCD(Host Controller Driver) for USB.
  3 *
  4 *(C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5 *(C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6 *(C) Copyright 2002 Hewlett-Packard Company
  7 *
  8 * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core
  9 * (C) Copyright 2005 Chris Humbert <mahadri-usb@drigon.com>
 10 * (C) Copyright 2007, 2008 Dmitry Baryshkov <dbaryshkov@gmail.com>
 11 *
 12 * This is known to work with the following variants:
 13 *	TC6393XB revision 3	(32kB SRAM)
 14 *
 15 * The TMIO's OHCI core DMAs through a small internal buffer that
 16 * is directly addressable by the CPU.
 17 *
 18 * Written from sparse documentation from Toshiba and Sharp's driver
 19 * for the 2.4 kernel,
 20 *	usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc.
 21 *
 22 * This program is free software; you can redistribute it and/or modify
 23 * it under the terms of the GNU General Public License version 2 as
 24 * published by the Free Software Foundation.
 25 */
 26
 27/*#include <linux/fs.h>
 28#include <linux/mount.h>
 29#include <linux/pagemap.h>
 30#include <linux/namei.h>
 31#include <linux/sched.h>*/
 32#include <linux/platform_device.h>
 33#include <linux/mfd/core.h>
 34#include <linux/mfd/tmio.h>
 35#include <linux/dma-mapping.h>
 36
 37/*-------------------------------------------------------------------------*/
 38
 39/*
 40 * USB Host Controller Configuration Register
 41 */
 42#define CCR_REVID	0x08	/* b Revision ID				*/
 43#define CCR_BASE	0x10	/* l USB Control Register Base Address Low	*/
 44#define CCR_ILME	0x40	/* b Internal Local Memory Enable		*/
 45#define CCR_PM		0x4c	/* w Power Management			*/
 46#define CCR_INTC	0x50	/* b INT Control				*/
 47#define CCR_LMW1L	0x54	/* w Local Memory Window 1 LMADRS Low	*/
 48#define CCR_LMW1H	0x56	/* w Local Memory Window 1 LMADRS High	*/
 49#define CCR_LMW1BL	0x58	/* w Local Memory Window 1 Base Address Low	*/
 50#define CCR_LMW1BH	0x5A	/* w Local Memory Window 1 Base Address High	*/
 51#define CCR_LMW2L	0x5C	/* w Local Memory Window 2 LMADRS Low	*/
 52#define CCR_LMW2H	0x5E	/* w Local Memory Window 2 LMADRS High	*/
 53#define CCR_LMW2BL	0x60	/* w Local Memory Window 2 Base Address Low	*/
 54#define CCR_LMW2BH	0x62	/* w Local Memory Window 2 Base Address High	*/
 55#define CCR_MISC	0xFC	/* b MISC					*/
 56
 57#define CCR_PM_GKEN      0x0001
 58#define CCR_PM_CKRNEN    0x0002
 59#define CCR_PM_USBPW1    0x0004
 60#define CCR_PM_USBPW2    0x0008
 61#define CCR_PM_USBPW3    0x0010
 62#define CCR_PM_PMEE      0x0100
 63#define CCR_PM_PMES      0x8000
 64
 65/*-------------------------------------------------------------------------*/
 66
 67struct tmio_hcd {
 68	void __iomem		*ccr;
 69	spinlock_t		lock; /* protects RMW cycles */
 70};
 71
 72#define hcd_to_tmio(hcd)	((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1))
 73
 74/*-------------------------------------------------------------------------*/
 75
 76static void tmio_write_pm(struct platform_device *dev)
 77{
 78	struct usb_hcd *hcd = platform_get_drvdata(dev);
 79	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
 80	u16 pm;
 81	unsigned long flags;
 82
 83	spin_lock_irqsave(&tmio->lock, flags);
 84
 85	pm = CCR_PM_GKEN | CCR_PM_CKRNEN |
 86	     CCR_PM_PMEE | CCR_PM_PMES;
 87
 88	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
 89	spin_unlock_irqrestore(&tmio->lock, flags);
 90}
 91
 92static void tmio_stop_hc(struct platform_device *dev)
 93{
 94	struct usb_hcd *hcd = platform_get_drvdata(dev);
 95	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
 96	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
 97	u16 pm;
 98
 99	pm = CCR_PM_GKEN | CCR_PM_CKRNEN;
100	switch (ohci->num_ports) {
101		default:
102			dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports);
 
103		case 3:
104			pm |= CCR_PM_USBPW3;
 
105		case 2:
106			pm |= CCR_PM_USBPW2;
 
107		case 1:
108			pm |= CCR_PM_USBPW1;
109	}
110	tmio_iowrite8(0, tmio->ccr + CCR_INTC);
111	tmio_iowrite8(0, tmio->ccr + CCR_ILME);
112	tmio_iowrite16(0, tmio->ccr + CCR_BASE);
113	tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
114	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
115}
116
117static void tmio_start_hc(struct platform_device *dev)
118{
119	struct usb_hcd *hcd = platform_get_drvdata(dev);
120	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
121	unsigned long base = hcd->rsrc_start;
122
123	tmio_write_pm(dev);
124	tmio_iowrite16(base, tmio->ccr + CCR_BASE);
125	tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
126	tmio_iowrite8(1, tmio->ccr + CCR_ILME);
127	tmio_iowrite8(2, tmio->ccr + CCR_INTC);
128
129	dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n",
130			tmio_ioread8(tmio->ccr + CCR_REVID),
131			(u64) hcd->rsrc_start, hcd->irq);
132}
133
134static int ohci_tmio_start(struct usb_hcd *hcd)
135{
136	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
137	int ret;
138
139	if ((ret = ohci_init(ohci)) < 0)
140		return ret;
141
142	if ((ret = ohci_run(ohci)) < 0) {
143		dev_err(hcd->self.controller, "can't start %s\n",
144			hcd->self.bus_name);
145		ohci_stop(hcd);
146		return ret;
147	}
148
149	return 0;
150}
151
152static const struct hc_driver ohci_tmio_hc_driver = {
153	.description =		hcd_name,
154	.product_desc =		"TMIO OHCI USB Host Controller",
155	.hcd_priv_size =	sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd),
156
157	/* generic hardware linkage */
158	.irq =			ohci_irq,
159	.flags =		HCD_USB11 | HCD_MEMORY | HCD_LOCAL_MEM,
160
161	/* basic lifecycle operations */
162	.start =		ohci_tmio_start,
163	.stop =			ohci_stop,
164	.shutdown =		ohci_shutdown,
165
166	/* managing i/o requests and associated device resources */
167	.urb_enqueue =		ohci_urb_enqueue,
168	.urb_dequeue =		ohci_urb_dequeue,
169	.endpoint_disable =	ohci_endpoint_disable,
170
171	/* scheduling support */
172	.get_frame_number =	ohci_get_frame,
173
174	/* root hub support */
175	.hub_status_data =	ohci_hub_status_data,
176	.hub_control =		ohci_hub_control,
177#ifdef	CONFIG_PM
178	.bus_suspend =		ohci_bus_suspend,
179	.bus_resume =		ohci_bus_resume,
180#endif
181	.start_port_reset =	ohci_start_port_reset,
182};
183
184/*-------------------------------------------------------------------------*/
185static struct platform_driver ohci_hcd_tmio_driver;
186
187static int ohci_hcd_tmio_drv_probe(struct platform_device *dev)
188{
189	const struct mfd_cell *cell = mfd_get_cell(dev);
190	struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
191	struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1);
192	struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2);
193	int irq = platform_get_irq(dev, 0);
194	struct tmio_hcd *tmio;
195	struct ohci_hcd *ohci;
196	struct usb_hcd *hcd;
197	int ret;
198
199	if (usb_disabled())
200		return -ENODEV;
201
202	if (!cell)
203		return -EINVAL;
204
 
 
 
205	hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev));
206	if (!hcd) {
207		ret = -ENOMEM;
208		goto err_usb_create_hcd;
209	}
210
211	hcd->rsrc_start = regs->start;
212	hcd->rsrc_len = resource_size(regs);
213
214	tmio = hcd_to_tmio(hcd);
215
216	spin_lock_init(&tmio->lock);
217
218	tmio->ccr = ioremap(config->start, resource_size(config));
219	if (!tmio->ccr) {
220		ret = -ENOMEM;
221		goto err_ioremap_ccr;
222	}
223
224	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
225	if (!hcd->regs) {
226		ret = -ENOMEM;
227		goto err_ioremap_regs;
228	}
229
230	if (!dma_declare_coherent_memory(&dev->dev, sram->start,
231				sram->start,
232				resource_size(sram),
233				DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) {
234		ret = -EBUSY;
235		goto err_dma_declare;
236	}
237
238	if (cell->enable) {
239		ret = cell->enable(dev);
240		if (ret)
241			goto err_enable;
242	}
243
244	tmio_start_hc(dev);
245	ohci = hcd_to_ohci(hcd);
246	ohci_hcd_init(ohci);
247
 
 
 
 
 
248	ret = usb_add_hcd(hcd, irq, 0);
249	if (ret)
250		goto err_add_hcd;
251
252	device_wakeup_enable(hcd->self.controller);
253	if (ret == 0)
254		return ret;
255
256	usb_remove_hcd(hcd);
257
258err_add_hcd:
259	tmio_stop_hc(dev);
260	if (cell->disable)
261		cell->disable(dev);
262err_enable:
263	dma_release_declared_memory(&dev->dev);
264err_dma_declare:
265	iounmap(hcd->regs);
266err_ioremap_regs:
267	iounmap(tmio->ccr);
268err_ioremap_ccr:
269	usb_put_hcd(hcd);
270err_usb_create_hcd:
271
272	return ret;
273}
274
275static int ohci_hcd_tmio_drv_remove(struct platform_device *dev)
276{
277	struct usb_hcd *hcd = platform_get_drvdata(dev);
278	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
279	const struct mfd_cell *cell = mfd_get_cell(dev);
280
281	usb_remove_hcd(hcd);
282	tmio_stop_hc(dev);
283	if (cell->disable)
284		cell->disable(dev);
285	dma_release_declared_memory(&dev->dev);
286	iounmap(hcd->regs);
287	iounmap(tmio->ccr);
288	usb_put_hcd(hcd);
289
290	return 0;
291}
292
293#ifdef CONFIG_PM
294static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state)
295{
296	const struct mfd_cell *cell = mfd_get_cell(dev);
297	struct usb_hcd *hcd = platform_get_drvdata(dev);
298	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
299	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
300	unsigned long flags;
301	u8 misc;
302	int ret;
303
304	if (time_before(jiffies, ohci->next_statechange))
305		msleep(5);
306	ohci->next_statechange = jiffies;
307
308	spin_lock_irqsave(&tmio->lock, flags);
309
310	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
311	misc |= 1 << 3; /* USSUSP */
312	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
313
314	spin_unlock_irqrestore(&tmio->lock, flags);
315
316	if (cell->suspend) {
317		ret = cell->suspend(dev);
318		if (ret)
319			return ret;
320	}
321	return 0;
322}
323
324static int ohci_hcd_tmio_drv_resume(struct platform_device *dev)
325{
326	const struct mfd_cell *cell = mfd_get_cell(dev);
327	struct usb_hcd *hcd = platform_get_drvdata(dev);
328	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
329	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
330	unsigned long flags;
331	u8 misc;
332	int ret;
333
334	if (time_before(jiffies, ohci->next_statechange))
335		msleep(5);
336	ohci->next_statechange = jiffies;
337
338	if (cell->resume) {
339		ret = cell->resume(dev);
340		if (ret)
341			return ret;
342	}
343
344	tmio_start_hc(dev);
345
346	spin_lock_irqsave(&tmio->lock, flags);
347
348	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
349	misc &= ~(1 << 3); /* USSUSP */
350	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
351
352	spin_unlock_irqrestore(&tmio->lock, flags);
353
354	ohci_resume(hcd, false);
355
356	return 0;
357}
358#else
359#define ohci_hcd_tmio_drv_suspend NULL
360#define ohci_hcd_tmio_drv_resume NULL
361#endif
362
363static struct platform_driver ohci_hcd_tmio_driver = {
364	.probe		= ohci_hcd_tmio_drv_probe,
365	.remove		= ohci_hcd_tmio_drv_remove,
366	.shutdown	= usb_hcd_platform_shutdown,
367	.suspend	= ohci_hcd_tmio_drv_suspend,
368	.resume		= ohci_hcd_tmio_drv_resume,
369	.driver		= {
370		.name	= "tmio-ohci",
371	},
372};
v6.2
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * OHCI HCD(Host Controller Driver) for USB.
  4 *
  5 *(C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  6 *(C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  7 *(C) Copyright 2002 Hewlett-Packard Company
  8 *
  9 * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core
 10 * (C) Copyright 2005 Chris Humbert <mahadri-usb@drigon.com>
 11 * (C) Copyright 2007, 2008 Dmitry Baryshkov <dbaryshkov@gmail.com>
 12 *
 13 * This is known to work with the following variants:
 14 *	TC6393XB revision 3	(32kB SRAM)
 15 *
 16 * The TMIO's OHCI core DMAs through a small internal buffer that
 17 * is directly addressable by the CPU.
 18 *
 19 * Written from sparse documentation from Toshiba and Sharp's driver
 20 * for the 2.4 kernel,
 21 *	usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc.
 
 
 
 
 22 */
 23
 
 
 
 
 
 24#include <linux/platform_device.h>
 25#include <linux/mfd/core.h>
 26#include <linux/mfd/tmio.h>
 27#include <linux/dma-mapping.h>
 28
 29/*-------------------------------------------------------------------------*/
 30
 31/*
 32 * USB Host Controller Configuration Register
 33 */
 34#define CCR_REVID	0x08	/* b Revision ID				*/
 35#define CCR_BASE	0x10	/* l USB Control Register Base Address Low	*/
 36#define CCR_ILME	0x40	/* b Internal Local Memory Enable		*/
 37#define CCR_PM		0x4c	/* w Power Management			*/
 38#define CCR_INTC	0x50	/* b INT Control				*/
 39#define CCR_LMW1L	0x54	/* w Local Memory Window 1 LMADRS Low	*/
 40#define CCR_LMW1H	0x56	/* w Local Memory Window 1 LMADRS High	*/
 41#define CCR_LMW1BL	0x58	/* w Local Memory Window 1 Base Address Low	*/
 42#define CCR_LMW1BH	0x5A	/* w Local Memory Window 1 Base Address High	*/
 43#define CCR_LMW2L	0x5C	/* w Local Memory Window 2 LMADRS Low	*/
 44#define CCR_LMW2H	0x5E	/* w Local Memory Window 2 LMADRS High	*/
 45#define CCR_LMW2BL	0x60	/* w Local Memory Window 2 Base Address Low	*/
 46#define CCR_LMW2BH	0x62	/* w Local Memory Window 2 Base Address High	*/
 47#define CCR_MISC	0xFC	/* b MISC					*/
 48
 49#define CCR_PM_GKEN      0x0001
 50#define CCR_PM_CKRNEN    0x0002
 51#define CCR_PM_USBPW1    0x0004
 52#define CCR_PM_USBPW2    0x0008
 53#define CCR_PM_USBPW3    0x0010
 54#define CCR_PM_PMEE      0x0100
 55#define CCR_PM_PMES      0x8000
 56
 57/*-------------------------------------------------------------------------*/
 58
 59struct tmio_hcd {
 60	void __iomem		*ccr;
 61	spinlock_t		lock; /* protects RMW cycles */
 62};
 63
 64#define hcd_to_tmio(hcd)	((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1))
 65
 66/*-------------------------------------------------------------------------*/
 67
 68static void tmio_write_pm(struct platform_device *dev)
 69{
 70	struct usb_hcd *hcd = platform_get_drvdata(dev);
 71	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
 72	u16 pm;
 73	unsigned long flags;
 74
 75	spin_lock_irqsave(&tmio->lock, flags);
 76
 77	pm = CCR_PM_GKEN | CCR_PM_CKRNEN |
 78	     CCR_PM_PMEE | CCR_PM_PMES;
 79
 80	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
 81	spin_unlock_irqrestore(&tmio->lock, flags);
 82}
 83
 84static void tmio_stop_hc(struct platform_device *dev)
 85{
 86	struct usb_hcd *hcd = platform_get_drvdata(dev);
 87	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
 88	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
 89	u16 pm;
 90
 91	pm = CCR_PM_GKEN | CCR_PM_CKRNEN;
 92	switch (ohci->num_ports) {
 93		default:
 94			dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports);
 95			fallthrough;
 96		case 3:
 97			pm |= CCR_PM_USBPW3;
 98			fallthrough;
 99		case 2:
100			pm |= CCR_PM_USBPW2;
101			fallthrough;
102		case 1:
103			pm |= CCR_PM_USBPW1;
104	}
105	tmio_iowrite8(0, tmio->ccr + CCR_INTC);
106	tmio_iowrite8(0, tmio->ccr + CCR_ILME);
107	tmio_iowrite16(0, tmio->ccr + CCR_BASE);
108	tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
109	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
110}
111
112static void tmio_start_hc(struct platform_device *dev)
113{
114	struct usb_hcd *hcd = platform_get_drvdata(dev);
115	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
116	unsigned long base = hcd->rsrc_start;
117
118	tmio_write_pm(dev);
119	tmio_iowrite16(base, tmio->ccr + CCR_BASE);
120	tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
121	tmio_iowrite8(1, tmio->ccr + CCR_ILME);
122	tmio_iowrite8(2, tmio->ccr + CCR_INTC);
123
124	dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n",
125			tmio_ioread8(tmio->ccr + CCR_REVID),
126			(u64) hcd->rsrc_start, hcd->irq);
127}
128
129static int ohci_tmio_start(struct usb_hcd *hcd)
130{
131	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
132	int ret;
133
134	if ((ret = ohci_init(ohci)) < 0)
135		return ret;
136
137	if ((ret = ohci_run(ohci)) < 0) {
138		dev_err(hcd->self.controller, "can't start %s\n",
139			hcd->self.bus_name);
140		ohci_stop(hcd);
141		return ret;
142	}
143
144	return 0;
145}
146
147static const struct hc_driver ohci_tmio_hc_driver = {
148	.description =		hcd_name,
149	.product_desc =		"TMIO OHCI USB Host Controller",
150	.hcd_priv_size =	sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd),
151
152	/* generic hardware linkage */
153	.irq =			ohci_irq,
154	.flags =		HCD_USB11 | HCD_MEMORY,
155
156	/* basic lifecycle operations */
157	.start =		ohci_tmio_start,
158	.stop =			ohci_stop,
159	.shutdown =		ohci_shutdown,
160
161	/* managing i/o requests and associated device resources */
162	.urb_enqueue =		ohci_urb_enqueue,
163	.urb_dequeue =		ohci_urb_dequeue,
164	.endpoint_disable =	ohci_endpoint_disable,
165
166	/* scheduling support */
167	.get_frame_number =	ohci_get_frame,
168
169	/* root hub support */
170	.hub_status_data =	ohci_hub_status_data,
171	.hub_control =		ohci_hub_control,
172#ifdef	CONFIG_PM
173	.bus_suspend =		ohci_bus_suspend,
174	.bus_resume =		ohci_bus_resume,
175#endif
176	.start_port_reset =	ohci_start_port_reset,
177};
178
179/*-------------------------------------------------------------------------*/
180static struct platform_driver ohci_hcd_tmio_driver;
181
182static int ohci_hcd_tmio_drv_probe(struct platform_device *dev)
183{
184	const struct mfd_cell *cell = mfd_get_cell(dev);
185	struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
186	struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1);
187	struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2);
188	int irq = platform_get_irq(dev, 0);
189	struct tmio_hcd *tmio;
190	struct ohci_hcd *ohci;
191	struct usb_hcd *hcd;
192	int ret;
193
194	if (usb_disabled())
195		return -ENODEV;
196
197	if (!cell || !regs || !config || !sram)
198		return -EINVAL;
199
200	if (irq < 0)
201		return irq;
202
203	hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev));
204	if (!hcd) {
205		ret = -ENOMEM;
206		goto err_usb_create_hcd;
207	}
208
209	hcd->rsrc_start = regs->start;
210	hcd->rsrc_len = resource_size(regs);
211
212	tmio = hcd_to_tmio(hcd);
213
214	spin_lock_init(&tmio->lock);
215
216	tmio->ccr = ioremap(config->start, resource_size(config));
217	if (!tmio->ccr) {
218		ret = -ENOMEM;
219		goto err_ioremap_ccr;
220	}
221
222	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
223	if (!hcd->regs) {
224		ret = -ENOMEM;
225		goto err_ioremap_regs;
226	}
227
 
 
 
 
 
 
 
 
228	if (cell->enable) {
229		ret = cell->enable(dev);
230		if (ret)
231			goto err_enable;
232	}
233
234	tmio_start_hc(dev);
235	ohci = hcd_to_ohci(hcd);
236	ohci_hcd_init(ohci);
237
238	ret = usb_hcd_setup_local_mem(hcd, sram->start, sram->start,
239				      resource_size(sram));
240	if (ret < 0)
241		goto err_enable;
242
243	ret = usb_add_hcd(hcd, irq, 0);
244	if (ret)
245		goto err_add_hcd;
246
247	device_wakeup_enable(hcd->self.controller);
248	if (ret == 0)
249		return ret;
250
251	usb_remove_hcd(hcd);
252
253err_add_hcd:
254	tmio_stop_hc(dev);
255	if (cell->disable)
256		cell->disable(dev);
257err_enable:
 
 
258	iounmap(hcd->regs);
259err_ioremap_regs:
260	iounmap(tmio->ccr);
261err_ioremap_ccr:
262	usb_put_hcd(hcd);
263err_usb_create_hcd:
264
265	return ret;
266}
267
268static int ohci_hcd_tmio_drv_remove(struct platform_device *dev)
269{
270	struct usb_hcd *hcd = platform_get_drvdata(dev);
271	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
272	const struct mfd_cell *cell = mfd_get_cell(dev);
273
274	usb_remove_hcd(hcd);
275	tmio_stop_hc(dev);
276	if (cell->disable)
277		cell->disable(dev);
 
278	iounmap(hcd->regs);
279	iounmap(tmio->ccr);
280	usb_put_hcd(hcd);
281
282	return 0;
283}
284
285#ifdef CONFIG_PM
286static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state)
287{
288	const struct mfd_cell *cell = mfd_get_cell(dev);
289	struct usb_hcd *hcd = platform_get_drvdata(dev);
290	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
291	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
292	unsigned long flags;
293	u8 misc;
294	int ret;
295
296	if (time_before(jiffies, ohci->next_statechange))
297		msleep(5);
298	ohci->next_statechange = jiffies;
299
300	spin_lock_irqsave(&tmio->lock, flags);
301
302	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
303	misc |= 1 << 3; /* USSUSP */
304	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
305
306	spin_unlock_irqrestore(&tmio->lock, flags);
307
308	if (cell->suspend) {
309		ret = cell->suspend(dev);
310		if (ret)
311			return ret;
312	}
313	return 0;
314}
315
316static int ohci_hcd_tmio_drv_resume(struct platform_device *dev)
317{
318	const struct mfd_cell *cell = mfd_get_cell(dev);
319	struct usb_hcd *hcd = platform_get_drvdata(dev);
320	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
321	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
322	unsigned long flags;
323	u8 misc;
324	int ret;
325
326	if (time_before(jiffies, ohci->next_statechange))
327		msleep(5);
328	ohci->next_statechange = jiffies;
329
330	if (cell->resume) {
331		ret = cell->resume(dev);
332		if (ret)
333			return ret;
334	}
335
336	tmio_start_hc(dev);
337
338	spin_lock_irqsave(&tmio->lock, flags);
339
340	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
341	misc &= ~(1 << 3); /* USSUSP */
342	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
343
344	spin_unlock_irqrestore(&tmio->lock, flags);
345
346	ohci_resume(hcd, false);
347
348	return 0;
349}
350#else
351#define ohci_hcd_tmio_drv_suspend NULL
352#define ohci_hcd_tmio_drv_resume NULL
353#endif
354
355static struct platform_driver ohci_hcd_tmio_driver = {
356	.probe		= ohci_hcd_tmio_drv_probe,
357	.remove		= ohci_hcd_tmio_drv_remove,
358	.shutdown	= usb_hcd_platform_shutdown,
359	.suspend	= ohci_hcd_tmio_drv_suspend,
360	.resume		= ohci_hcd_tmio_drv_resume,
361	.driver		= {
362		.name	= "tmio-ohci",
363	},
364};