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1// SPDX-License-Identifier: GPL-2.0
2// SPI interface for ChromeOS Embedded Controller
3//
4// Copyright (C) 2012 Google, Inc
5
6#include <linux/delay.h>
7#include <linux/kernel.h>
8#include <linux/module.h>
9#include <linux/of.h>
10#include <linux/platform_data/cros_ec_commands.h>
11#include <linux/platform_data/cros_ec_proto.h>
12#include <linux/platform_device.h>
13#include <linux/slab.h>
14#include <linux/spi/spi.h>
15#include <uapi/linux/sched/types.h>
16
17#include "cros_ec.h"
18
19/* The header byte, which follows the preamble */
20#define EC_MSG_HEADER 0xec
21
22/*
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
26 * we could increase this so that might expect the preamble and
27 * message to occur in a single transaction. However, the maximum
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
29 * time of perhaps <320us (200 bytes / 1600 bits).
30 */
31#define EC_MSG_PREAMBLE_COUNT 32
32
33/*
34 * Allow for a long time for the EC to respond. We support i2c
35 * tunneling and support fairly long messages for the tunnel (249
36 * bytes long at the moment). If we're talking to a 100 kHz device
37 * on the other end and need to transfer ~256 bytes, then we need:
38 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
39 *
40 * We'll wait 8 times that to handle clock stretching and other
41 * paranoia. Note that some battery gas gauge ICs claim to have a
42 * clock stretch of 144ms in rare situations. That's incentive for
43 * not directly passing i2c through, but it's too late for that for
44 * existing hardware.
45 *
46 * It's pretty unlikely that we'll really see a 249 byte tunnel in
47 * anything other than testing. If this was more common we might
48 * consider having slow commands like this require a GET_STATUS
49 * wait loop. The 'flash write' command would be another candidate
50 * for this, clocking in at 2-3ms.
51 */
52#define EC_MSG_DEADLINE_MS 200
53
54/*
55 * Time between raising the SPI chip select (for the end of a
56 * transaction) and dropping it again (for the next transaction).
57 * If we go too fast, the EC will miss the transaction. We know that we
58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
59 * safe.
60 */
61#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
62
63/**
64 * struct cros_ec_spi - information about a SPI-connected EC
65 *
66 * @spi: SPI device we are connected to
67 * @last_transfer_ns: time that we last finished a transfer.
68 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69 * is sent when we want to turn on CS at the start of a transaction.
70 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
71 * is sent when we want to turn off CS at the end of a transaction.
72 * @high_pri_worker: Used to schedule high priority work.
73 */
74struct cros_ec_spi {
75 struct spi_device *spi;
76 s64 last_transfer_ns;
77 unsigned int start_of_msg_delay;
78 unsigned int end_of_msg_delay;
79 struct kthread_worker *high_pri_worker;
80};
81
82typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev,
83 struct cros_ec_command *ec_msg);
84
85/**
86 * struct cros_ec_xfer_work_params - params for our high priority workers
87 *
88 * @work: The work_struct needed to queue work
89 * @fn: The function to use to transfer
90 * @ec_dev: ChromeOS EC device
91 * @ec_msg: Message to transfer
92 * @ret: The return value of the function
93 */
94
95struct cros_ec_xfer_work_params {
96 struct kthread_work work;
97 cros_ec_xfer_fn_t fn;
98 struct cros_ec_device *ec_dev;
99 struct cros_ec_command *ec_msg;
100 int ret;
101};
102
103static void debug_packet(struct device *dev, const char *name, u8 *ptr,
104 int len)
105{
106#ifdef DEBUG
107 int i;
108
109 dev_dbg(dev, "%s: ", name);
110 for (i = 0; i < len; i++)
111 pr_cont(" %02x", ptr[i]);
112
113 pr_cont("\n");
114#endif
115}
116
117static int terminate_request(struct cros_ec_device *ec_dev)
118{
119 struct cros_ec_spi *ec_spi = ec_dev->priv;
120 struct spi_message msg;
121 struct spi_transfer trans;
122 int ret;
123
124 /*
125 * Turn off CS, possibly adding a delay to ensure the rising edge
126 * doesn't come too soon after the end of the data.
127 */
128 spi_message_init(&msg);
129 memset(&trans, 0, sizeof(trans));
130 trans.delay.value = ec_spi->end_of_msg_delay;
131 trans.delay.unit = SPI_DELAY_UNIT_USECS;
132 spi_message_add_tail(&trans, &msg);
133
134 ret = spi_sync_locked(ec_spi->spi, &msg);
135
136 /* Reset end-of-response timer */
137 ec_spi->last_transfer_ns = ktime_get_ns();
138 if (ret < 0) {
139 dev_err(ec_dev->dev,
140 "cs-deassert spi transfer failed: %d\n",
141 ret);
142 }
143
144 return ret;
145}
146
147/**
148 * receive_n_bytes - receive n bytes from the EC.
149 *
150 * Assumes buf is a pointer into the ec_dev->din buffer
151 *
152 * @ec_dev: ChromeOS EC device.
153 * @buf: Pointer to the buffer receiving the data.
154 * @n: Number of bytes received.
155 */
156static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
157{
158 struct cros_ec_spi *ec_spi = ec_dev->priv;
159 struct spi_transfer trans;
160 struct spi_message msg;
161 int ret;
162
163 if (buf - ec_dev->din + n > ec_dev->din_size)
164 return -EINVAL;
165
166 memset(&trans, 0, sizeof(trans));
167 trans.cs_change = 1;
168 trans.rx_buf = buf;
169 trans.len = n;
170
171 spi_message_init(&msg);
172 spi_message_add_tail(&trans, &msg);
173 ret = spi_sync_locked(ec_spi->spi, &msg);
174 if (ret < 0)
175 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
176
177 return ret;
178}
179
180/**
181 * cros_ec_spi_receive_packet - Receive a packet from the EC.
182 *
183 * This function has two phases: reading the preamble bytes (since if we read
184 * data from the EC before it is ready to send, we just get preamble) and
185 * reading the actual message.
186 *
187 * The received data is placed into ec_dev->din.
188 *
189 * @ec_dev: ChromeOS EC device
190 * @need_len: Number of message bytes we need to read
191 */
192static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
193 int need_len)
194{
195 struct ec_host_response *response;
196 u8 *ptr, *end;
197 int ret;
198 unsigned long deadline;
199 int todo;
200
201 if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT)
202 return -EINVAL;
203
204 /* Receive data until we see the header byte */
205 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
206 while (true) {
207 unsigned long start_jiffies = jiffies;
208
209 ret = receive_n_bytes(ec_dev,
210 ec_dev->din,
211 EC_MSG_PREAMBLE_COUNT);
212 if (ret < 0)
213 return ret;
214
215 ptr = ec_dev->din;
216 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
217 if (*ptr == EC_SPI_FRAME_START) {
218 dev_dbg(ec_dev->dev, "msg found at %zd\n",
219 ptr - ec_dev->din);
220 break;
221 }
222 }
223 if (ptr != end)
224 break;
225
226 /*
227 * Use the time at the start of the loop as a timeout. This
228 * gives us one last shot at getting the transfer and is useful
229 * in case we got context switched out for a while.
230 */
231 if (time_after(start_jiffies, deadline)) {
232 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
233 return -ETIMEDOUT;
234 }
235 }
236
237 /*
238 * ptr now points to the header byte. Copy any valid data to the
239 * start of our buffer
240 */
241 todo = end - ++ptr;
242 todo = min(todo, need_len);
243 memmove(ec_dev->din, ptr, todo);
244 ptr = ec_dev->din + todo;
245 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
246 need_len, todo);
247 need_len -= todo;
248
249 /* If the entire response struct wasn't read, get the rest of it. */
250 if (todo < sizeof(*response)) {
251 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
252 if (ret < 0)
253 return -EBADMSG;
254 ptr += (sizeof(*response) - todo);
255 todo = sizeof(*response);
256 }
257
258 response = (struct ec_host_response *)ec_dev->din;
259
260 /* Abort if data_len is too large. */
261 if (response->data_len > ec_dev->din_size)
262 return -EMSGSIZE;
263
264 /* Receive data until we have it all */
265 while (need_len > 0) {
266 /*
267 * We can't support transfers larger than the SPI FIFO size
268 * unless we have DMA. We don't have DMA on the ISP SPI ports
269 * for Exynos. We need a way of asking SPI driver for
270 * maximum-supported transfer size.
271 */
272 todo = min(need_len, 256);
273 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
274 todo, need_len, ptr - ec_dev->din);
275
276 ret = receive_n_bytes(ec_dev, ptr, todo);
277 if (ret < 0)
278 return ret;
279
280 ptr += todo;
281 need_len -= todo;
282 }
283
284 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
285
286 return 0;
287}
288
289/**
290 * cros_ec_spi_receive_response - Receive a response from the EC.
291 *
292 * This function has two phases: reading the preamble bytes (since if we read
293 * data from the EC before it is ready to send, we just get preamble) and
294 * reading the actual message.
295 *
296 * The received data is placed into ec_dev->din.
297 *
298 * @ec_dev: ChromeOS EC device
299 * @need_len: Number of message bytes we need to read
300 */
301static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
302 int need_len)
303{
304 u8 *ptr, *end;
305 int ret;
306 unsigned long deadline;
307 int todo;
308
309 if (ec_dev->din_size < EC_MSG_PREAMBLE_COUNT)
310 return -EINVAL;
311
312 /* Receive data until we see the header byte */
313 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
314 while (true) {
315 unsigned long start_jiffies = jiffies;
316
317 ret = receive_n_bytes(ec_dev,
318 ec_dev->din,
319 EC_MSG_PREAMBLE_COUNT);
320 if (ret < 0)
321 return ret;
322
323 ptr = ec_dev->din;
324 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
325 if (*ptr == EC_SPI_FRAME_START) {
326 dev_dbg(ec_dev->dev, "msg found at %zd\n",
327 ptr - ec_dev->din);
328 break;
329 }
330 }
331 if (ptr != end)
332 break;
333
334 /*
335 * Use the time at the start of the loop as a timeout. This
336 * gives us one last shot at getting the transfer and is useful
337 * in case we got context switched out for a while.
338 */
339 if (time_after(start_jiffies, deadline)) {
340 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
341 return -ETIMEDOUT;
342 }
343 }
344
345 /*
346 * ptr now points to the header byte. Copy any valid data to the
347 * start of our buffer
348 */
349 todo = end - ++ptr;
350 todo = min(todo, need_len);
351 memmove(ec_dev->din, ptr, todo);
352 ptr = ec_dev->din + todo;
353 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
354 need_len, todo);
355 need_len -= todo;
356
357 /* Receive data until we have it all */
358 while (need_len > 0) {
359 /*
360 * We can't support transfers larger than the SPI FIFO size
361 * unless we have DMA. We don't have DMA on the ISP SPI ports
362 * for Exynos. We need a way of asking SPI driver for
363 * maximum-supported transfer size.
364 */
365 todo = min(need_len, 256);
366 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
367 todo, need_len, ptr - ec_dev->din);
368
369 ret = receive_n_bytes(ec_dev, ptr, todo);
370 if (ret < 0)
371 return ret;
372
373 debug_packet(ec_dev->dev, "interim", ptr, todo);
374 ptr += todo;
375 need_len -= todo;
376 }
377
378 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
379
380 return 0;
381}
382
383/**
384 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
385 *
386 * @ec_dev: ChromeOS EC device
387 * @ec_msg: Message to transfer
388 */
389static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
390 struct cros_ec_command *ec_msg)
391{
392 struct ec_host_response *response;
393 struct cros_ec_spi *ec_spi = ec_dev->priv;
394 struct spi_transfer trans, trans_delay;
395 struct spi_message msg;
396 int i, len;
397 u8 *ptr;
398 u8 *rx_buf;
399 u8 sum;
400 u8 rx_byte;
401 int ret = 0, final_ret;
402 unsigned long delay;
403
404 len = cros_ec_prepare_tx(ec_dev, ec_msg);
405 if (len < 0)
406 return len;
407 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
408
409 /* If it's too soon to do another transaction, wait */
410 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
411 if (delay < EC_SPI_RECOVERY_TIME_NS)
412 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
413
414 rx_buf = kzalloc(len, GFP_KERNEL);
415 if (!rx_buf)
416 return -ENOMEM;
417
418 spi_bus_lock(ec_spi->spi->master);
419
420 /*
421 * Leave a gap between CS assertion and clocking of data to allow the
422 * EC time to wakeup.
423 */
424 spi_message_init(&msg);
425 if (ec_spi->start_of_msg_delay) {
426 memset(&trans_delay, 0, sizeof(trans_delay));
427 trans_delay.delay.value = ec_spi->start_of_msg_delay;
428 trans_delay.delay.unit = SPI_DELAY_UNIT_USECS;
429 spi_message_add_tail(&trans_delay, &msg);
430 }
431
432 /* Transmit phase - send our message */
433 memset(&trans, 0, sizeof(trans));
434 trans.tx_buf = ec_dev->dout;
435 trans.rx_buf = rx_buf;
436 trans.len = len;
437 trans.cs_change = 1;
438 spi_message_add_tail(&trans, &msg);
439 ret = spi_sync_locked(ec_spi->spi, &msg);
440
441 /* Get the response */
442 if (!ret) {
443 /* Verify that EC can process command */
444 for (i = 0; i < len; i++) {
445 rx_byte = rx_buf[i];
446 /*
447 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
448 * markers are all signs that the EC didn't fully
449 * receive our command. e.g., if the EC is flashing
450 * itself, it can't respond to any commands and instead
451 * clocks out EC_SPI_PAST_END from its SPI hardware
452 * buffer. Similar occurrences can happen if the AP is
453 * too slow to clock out data after asserting CS -- the
454 * EC will abort and fill its buffer with
455 * EC_SPI_RX_BAD_DATA.
456 *
457 * In all cases, these errors should be safe to retry.
458 * Report -EAGAIN and let the caller decide what to do
459 * about that.
460 */
461 if (rx_byte == EC_SPI_PAST_END ||
462 rx_byte == EC_SPI_RX_BAD_DATA ||
463 rx_byte == EC_SPI_NOT_READY) {
464 ret = -EAGAIN;
465 break;
466 }
467 }
468 }
469
470 if (!ret)
471 ret = cros_ec_spi_receive_packet(ec_dev,
472 ec_msg->insize + sizeof(*response));
473 else if (ret != -EAGAIN)
474 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
475
476 final_ret = terminate_request(ec_dev);
477
478 spi_bus_unlock(ec_spi->spi->master);
479
480 if (!ret)
481 ret = final_ret;
482 if (ret < 0)
483 goto exit;
484
485 ptr = ec_dev->din;
486
487 /* check response error code */
488 response = (struct ec_host_response *)ptr;
489 ec_msg->result = response->result;
490
491 ret = cros_ec_check_result(ec_dev, ec_msg);
492 if (ret)
493 goto exit;
494
495 len = response->data_len;
496 sum = 0;
497 if (len > ec_msg->insize) {
498 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
499 len, ec_msg->insize);
500 ret = -EMSGSIZE;
501 goto exit;
502 }
503
504 for (i = 0; i < sizeof(*response); i++)
505 sum += ptr[i];
506
507 /* copy response packet payload and compute checksum */
508 memcpy(ec_msg->data, ptr + sizeof(*response), len);
509 for (i = 0; i < len; i++)
510 sum += ec_msg->data[i];
511
512 if (sum) {
513 dev_err(ec_dev->dev,
514 "bad packet checksum, calculated %x\n",
515 sum);
516 ret = -EBADMSG;
517 goto exit;
518 }
519
520 ret = len;
521exit:
522 kfree(rx_buf);
523 if (ec_msg->command == EC_CMD_REBOOT_EC)
524 msleep(EC_REBOOT_DELAY_MS);
525
526 return ret;
527}
528
529/**
530 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
531 *
532 * @ec_dev: ChromeOS EC device
533 * @ec_msg: Message to transfer
534 */
535static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
536 struct cros_ec_command *ec_msg)
537{
538 struct cros_ec_spi *ec_spi = ec_dev->priv;
539 struct spi_transfer trans;
540 struct spi_message msg;
541 int i, len;
542 u8 *ptr;
543 u8 *rx_buf;
544 u8 rx_byte;
545 int sum;
546 int ret = 0, final_ret;
547 unsigned long delay;
548
549 len = cros_ec_prepare_tx(ec_dev, ec_msg);
550 if (len < 0)
551 return len;
552 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
553
554 /* If it's too soon to do another transaction, wait */
555 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
556 if (delay < EC_SPI_RECOVERY_TIME_NS)
557 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
558
559 rx_buf = kzalloc(len, GFP_KERNEL);
560 if (!rx_buf)
561 return -ENOMEM;
562
563 spi_bus_lock(ec_spi->spi->master);
564
565 /* Transmit phase - send our message */
566 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
567 memset(&trans, 0, sizeof(trans));
568 trans.tx_buf = ec_dev->dout;
569 trans.rx_buf = rx_buf;
570 trans.len = len;
571 trans.cs_change = 1;
572 spi_message_init(&msg);
573 spi_message_add_tail(&trans, &msg);
574 ret = spi_sync_locked(ec_spi->spi, &msg);
575
576 /* Get the response */
577 if (!ret) {
578 /* Verify that EC can process command */
579 for (i = 0; i < len; i++) {
580 rx_byte = rx_buf[i];
581 /* See comments in cros_ec_pkt_xfer_spi() */
582 if (rx_byte == EC_SPI_PAST_END ||
583 rx_byte == EC_SPI_RX_BAD_DATA ||
584 rx_byte == EC_SPI_NOT_READY) {
585 ret = -EAGAIN;
586 break;
587 }
588 }
589 }
590
591 if (!ret)
592 ret = cros_ec_spi_receive_response(ec_dev,
593 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
594 else if (ret != -EAGAIN)
595 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
596
597 final_ret = terminate_request(ec_dev);
598
599 spi_bus_unlock(ec_spi->spi->master);
600
601 if (!ret)
602 ret = final_ret;
603 if (ret < 0)
604 goto exit;
605
606 ptr = ec_dev->din;
607
608 /* check response error code */
609 ec_msg->result = ptr[0];
610 ret = cros_ec_check_result(ec_dev, ec_msg);
611 if (ret)
612 goto exit;
613
614 len = ptr[1];
615 sum = ptr[0] + ptr[1];
616 if (len > ec_msg->insize) {
617 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
618 len, ec_msg->insize);
619 ret = -ENOSPC;
620 goto exit;
621 }
622
623 /* copy response packet payload and compute checksum */
624 for (i = 0; i < len; i++) {
625 sum += ptr[i + 2];
626 if (ec_msg->insize)
627 ec_msg->data[i] = ptr[i + 2];
628 }
629 sum &= 0xff;
630
631 debug_packet(ec_dev->dev, "in", ptr, len + 3);
632
633 if (sum != ptr[len + 2]) {
634 dev_err(ec_dev->dev,
635 "bad packet checksum, expected %02x, got %02x\n",
636 sum, ptr[len + 2]);
637 ret = -EBADMSG;
638 goto exit;
639 }
640
641 ret = len;
642exit:
643 kfree(rx_buf);
644 if (ec_msg->command == EC_CMD_REBOOT_EC)
645 msleep(EC_REBOOT_DELAY_MS);
646
647 return ret;
648}
649
650static void cros_ec_xfer_high_pri_work(struct kthread_work *work)
651{
652 struct cros_ec_xfer_work_params *params;
653
654 params = container_of(work, struct cros_ec_xfer_work_params, work);
655 params->ret = params->fn(params->ec_dev, params->ec_msg);
656}
657
658static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev,
659 struct cros_ec_command *ec_msg,
660 cros_ec_xfer_fn_t fn)
661{
662 struct cros_ec_spi *ec_spi = ec_dev->priv;
663 struct cros_ec_xfer_work_params params = {
664 .work = KTHREAD_WORK_INIT(params.work,
665 cros_ec_xfer_high_pri_work),
666 .ec_dev = ec_dev,
667 .ec_msg = ec_msg,
668 .fn = fn,
669 };
670
671 /*
672 * This looks a bit ridiculous. Why do the work on a
673 * different thread if we're just going to block waiting for
674 * the thread to finish? The key here is that the thread is
675 * running at high priority but the calling context might not
676 * be. We need to be at high priority to avoid getting
677 * context switched out for too long and the EC giving up on
678 * the transfer.
679 */
680 kthread_queue_work(ec_spi->high_pri_worker, ¶ms.work);
681 kthread_flush_work(¶ms.work);
682
683 return params.ret;
684}
685
686static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
687 struct cros_ec_command *ec_msg)
688{
689 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi);
690}
691
692static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
693 struct cros_ec_command *ec_msg)
694{
695 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi);
696}
697
698static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
699{
700 struct device_node *np = dev->of_node;
701 u32 val;
702 int ret;
703
704 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
705 if (!ret)
706 ec_spi->start_of_msg_delay = val;
707
708 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
709 if (!ret)
710 ec_spi->end_of_msg_delay = val;
711}
712
713static void cros_ec_spi_high_pri_release(void *worker)
714{
715 kthread_destroy_worker(worker);
716}
717
718static int cros_ec_spi_devm_high_pri_alloc(struct device *dev,
719 struct cros_ec_spi *ec_spi)
720{
721 int err;
722
723 ec_spi->high_pri_worker =
724 kthread_create_worker(0, "cros_ec_spi_high_pri");
725
726 if (IS_ERR(ec_spi->high_pri_worker)) {
727 err = PTR_ERR(ec_spi->high_pri_worker);
728 dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err);
729 return err;
730 }
731
732 err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release,
733 ec_spi->high_pri_worker);
734 if (err)
735 return err;
736
737 sched_set_fifo(ec_spi->high_pri_worker->task);
738
739 return 0;
740}
741
742static int cros_ec_spi_probe(struct spi_device *spi)
743{
744 struct device *dev = &spi->dev;
745 struct cros_ec_device *ec_dev;
746 struct cros_ec_spi *ec_spi;
747 int err;
748
749 spi->rt = true;
750 err = spi_setup(spi);
751 if (err < 0)
752 return err;
753
754 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
755 if (ec_spi == NULL)
756 return -ENOMEM;
757 ec_spi->spi = spi;
758 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
759 if (!ec_dev)
760 return -ENOMEM;
761
762 /* Check for any DT properties */
763 cros_ec_spi_dt_probe(ec_spi, dev);
764
765 spi_set_drvdata(spi, ec_dev);
766 ec_dev->dev = dev;
767 ec_dev->priv = ec_spi;
768 ec_dev->irq = spi->irq;
769 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
770 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
771 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
772 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
773 sizeof(struct ec_host_response) +
774 sizeof(struct ec_response_get_protocol_info);
775 ec_dev->dout_size = sizeof(struct ec_host_request);
776
777 ec_spi->last_transfer_ns = ktime_get_ns();
778
779 err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi);
780 if (err)
781 return err;
782
783 err = cros_ec_register(ec_dev);
784 if (err) {
785 dev_err(dev, "cannot register EC\n");
786 return err;
787 }
788
789 device_init_wakeup(&spi->dev, true);
790
791 return 0;
792}
793
794static void cros_ec_spi_remove(struct spi_device *spi)
795{
796 struct cros_ec_device *ec_dev = spi_get_drvdata(spi);
797
798 cros_ec_unregister(ec_dev);
799}
800
801#ifdef CONFIG_PM_SLEEP
802static int cros_ec_spi_suspend(struct device *dev)
803{
804 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
805
806 return cros_ec_suspend(ec_dev);
807}
808
809static int cros_ec_spi_resume(struct device *dev)
810{
811 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
812
813 return cros_ec_resume(ec_dev);
814}
815#endif
816
817static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
818 cros_ec_spi_resume);
819
820static const struct of_device_id cros_ec_spi_of_match[] = {
821 { .compatible = "google,cros-ec-spi", },
822 { /* sentinel */ },
823};
824MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
825
826static const struct spi_device_id cros_ec_spi_id[] = {
827 { "cros-ec-spi", 0 },
828 { }
829};
830MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
831
832static struct spi_driver cros_ec_driver_spi = {
833 .driver = {
834 .name = "cros-ec-spi",
835 .of_match_table = cros_ec_spi_of_match,
836 .pm = &cros_ec_spi_pm_ops,
837 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
838 },
839 .probe = cros_ec_spi_probe,
840 .remove = cros_ec_spi_remove,
841 .id_table = cros_ec_spi_id,
842};
843
844module_spi_driver(cros_ec_driver_spi);
845
846MODULE_LICENSE("GPL v2");
847MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");