Loading...
Note: File does not exist in v4.6.
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2017 NXP Semiconductors.
4 * Author: Marco Franchi <marco.franchi@nxp.com>
5 *
6 * Based on Panel Simple driver by Thierry Reding <treding@nvidia.com>
7 */
8
9#include <linux/delay.h>
10#include <linux/media-bus-format.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/platform_device.h>
14#include <linux/regulator/consumer.h>
15
16#include <video/display_timing.h>
17#include <video/videomode.h>
18
19#include <drm/drm_crtc.h>
20#include <drm/drm_device.h>
21#include <drm/drm_panel.h>
22
23struct seiko_panel_desc {
24 const struct drm_display_mode *modes;
25 unsigned int num_modes;
26 const struct display_timing *timings;
27 unsigned int num_timings;
28
29 unsigned int bpc;
30
31 /**
32 * @width: width (in millimeters) of the panel's active display area
33 * @height: height (in millimeters) of the panel's active display area
34 */
35 struct {
36 unsigned int width;
37 unsigned int height;
38 } size;
39
40 u32 bus_format;
41 u32 bus_flags;
42};
43
44struct seiko_panel {
45 struct drm_panel base;
46 bool prepared;
47 bool enabled;
48 const struct seiko_panel_desc *desc;
49 struct regulator *dvdd;
50 struct regulator *avdd;
51};
52
53static inline struct seiko_panel *to_seiko_panel(struct drm_panel *panel)
54{
55 return container_of(panel, struct seiko_panel, base);
56}
57
58static int seiko_panel_get_fixed_modes(struct seiko_panel *panel,
59 struct drm_connector *connector)
60{
61 struct drm_display_mode *mode;
62 unsigned int i, num = 0;
63
64 if (!panel->desc)
65 return 0;
66
67 for (i = 0; i < panel->desc->num_timings; i++) {
68 const struct display_timing *dt = &panel->desc->timings[i];
69 struct videomode vm;
70
71 videomode_from_timing(dt, &vm);
72 mode = drm_mode_create(connector->dev);
73 if (!mode) {
74 dev_err(panel->base.dev, "failed to add mode %ux%u\n",
75 dt->hactive.typ, dt->vactive.typ);
76 continue;
77 }
78
79 drm_display_mode_from_videomode(&vm, mode);
80
81 mode->type |= DRM_MODE_TYPE_DRIVER;
82
83 if (panel->desc->num_timings == 1)
84 mode->type |= DRM_MODE_TYPE_PREFERRED;
85
86 drm_mode_probed_add(connector, mode);
87 num++;
88 }
89
90 for (i = 0; i < panel->desc->num_modes; i++) {
91 const struct drm_display_mode *m = &panel->desc->modes[i];
92
93 mode = drm_mode_duplicate(connector->dev, m);
94 if (!mode) {
95 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
96 m->hdisplay, m->vdisplay,
97 drm_mode_vrefresh(m));
98 continue;
99 }
100
101 mode->type |= DRM_MODE_TYPE_DRIVER;
102
103 if (panel->desc->num_modes == 1)
104 mode->type |= DRM_MODE_TYPE_PREFERRED;
105
106 drm_mode_set_name(mode);
107
108 drm_mode_probed_add(connector, mode);
109 num++;
110 }
111
112 connector->display_info.bpc = panel->desc->bpc;
113 connector->display_info.width_mm = panel->desc->size.width;
114 connector->display_info.height_mm = panel->desc->size.height;
115 if (panel->desc->bus_format)
116 drm_display_info_set_bus_formats(&connector->display_info,
117 &panel->desc->bus_format, 1);
118 connector->display_info.bus_flags = panel->desc->bus_flags;
119
120 return num;
121}
122
123static int seiko_panel_disable(struct drm_panel *panel)
124{
125 struct seiko_panel *p = to_seiko_panel(panel);
126
127 if (!p->enabled)
128 return 0;
129
130 p->enabled = false;
131
132 return 0;
133}
134
135static int seiko_panel_unprepare(struct drm_panel *panel)
136{
137 struct seiko_panel *p = to_seiko_panel(panel);
138
139 if (!p->prepared)
140 return 0;
141
142 regulator_disable(p->avdd);
143
144 /* Add a 100ms delay as per the panel datasheet */
145 msleep(100);
146
147 regulator_disable(p->dvdd);
148
149 p->prepared = false;
150
151 return 0;
152}
153
154static int seiko_panel_prepare(struct drm_panel *panel)
155{
156 struct seiko_panel *p = to_seiko_panel(panel);
157 int err;
158
159 if (p->prepared)
160 return 0;
161
162 err = regulator_enable(p->dvdd);
163 if (err < 0) {
164 dev_err(panel->dev, "failed to enable dvdd: %d\n", err);
165 return err;
166 }
167
168 /* Add a 100ms delay as per the panel datasheet */
169 msleep(100);
170
171 err = regulator_enable(p->avdd);
172 if (err < 0) {
173 dev_err(panel->dev, "failed to enable avdd: %d\n", err);
174 goto disable_dvdd;
175 }
176
177 p->prepared = true;
178
179 return 0;
180
181disable_dvdd:
182 regulator_disable(p->dvdd);
183 return err;
184}
185
186static int seiko_panel_enable(struct drm_panel *panel)
187{
188 struct seiko_panel *p = to_seiko_panel(panel);
189
190 if (p->enabled)
191 return 0;
192
193 p->enabled = true;
194
195 return 0;
196}
197
198static int seiko_panel_get_modes(struct drm_panel *panel,
199 struct drm_connector *connector)
200{
201 struct seiko_panel *p = to_seiko_panel(panel);
202
203 /* add hard-coded panel modes */
204 return seiko_panel_get_fixed_modes(p, connector);
205}
206
207static int seiko_panel_get_timings(struct drm_panel *panel,
208 unsigned int num_timings,
209 struct display_timing *timings)
210{
211 struct seiko_panel *p = to_seiko_panel(panel);
212 unsigned int i;
213
214 if (p->desc->num_timings < num_timings)
215 num_timings = p->desc->num_timings;
216
217 if (timings)
218 for (i = 0; i < num_timings; i++)
219 timings[i] = p->desc->timings[i];
220
221 return p->desc->num_timings;
222}
223
224static const struct drm_panel_funcs seiko_panel_funcs = {
225 .disable = seiko_panel_disable,
226 .unprepare = seiko_panel_unprepare,
227 .prepare = seiko_panel_prepare,
228 .enable = seiko_panel_enable,
229 .get_modes = seiko_panel_get_modes,
230 .get_timings = seiko_panel_get_timings,
231};
232
233static int seiko_panel_probe(struct device *dev,
234 const struct seiko_panel_desc *desc)
235{
236 struct seiko_panel *panel;
237 int err;
238
239 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
240 if (!panel)
241 return -ENOMEM;
242
243 panel->enabled = false;
244 panel->prepared = false;
245 panel->desc = desc;
246
247 panel->dvdd = devm_regulator_get(dev, "dvdd");
248 if (IS_ERR(panel->dvdd))
249 return PTR_ERR(panel->dvdd);
250
251 panel->avdd = devm_regulator_get(dev, "avdd");
252 if (IS_ERR(panel->avdd))
253 return PTR_ERR(panel->avdd);
254
255 drm_panel_init(&panel->base, dev, &seiko_panel_funcs,
256 DRM_MODE_CONNECTOR_DPI);
257
258 err = drm_panel_of_backlight(&panel->base);
259 if (err)
260 return err;
261
262 drm_panel_add(&panel->base);
263
264 dev_set_drvdata(dev, panel);
265
266 return 0;
267}
268
269static int seiko_panel_remove(struct platform_device *pdev)
270{
271 struct seiko_panel *panel = platform_get_drvdata(pdev);
272
273 drm_panel_remove(&panel->base);
274 drm_panel_disable(&panel->base);
275
276 return 0;
277}
278
279static void seiko_panel_shutdown(struct platform_device *pdev)
280{
281 struct seiko_panel *panel = platform_get_drvdata(pdev);
282
283 drm_panel_disable(&panel->base);
284}
285
286static const struct display_timing seiko_43wvf1g_timing = {
287 .pixelclock = { 33500000, 33500000, 33500000 },
288 .hactive = { 800, 800, 800 },
289 .hfront_porch = { 164, 164, 164 },
290 .hback_porch = { 89, 89, 89 },
291 .hsync_len = { 10, 10, 10 },
292 .vactive = { 480, 480, 480 },
293 .vfront_porch = { 10, 10, 10 },
294 .vback_porch = { 23, 23, 23 },
295 .vsync_len = { 10, 10, 10 },
296 .flags = DISPLAY_FLAGS_DE_LOW,
297};
298
299static const struct seiko_panel_desc seiko_43wvf1g = {
300 .timings = &seiko_43wvf1g_timing,
301 .num_timings = 1,
302 .bpc = 8,
303 .size = {
304 .width = 93,
305 .height = 57,
306 },
307 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
308 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
309};
310
311static const struct of_device_id platform_of_match[] = {
312 {
313 .compatible = "sii,43wvf1g",
314 .data = &seiko_43wvf1g,
315 }, {
316 /* sentinel */
317 }
318};
319MODULE_DEVICE_TABLE(of, platform_of_match);
320
321static int seiko_panel_platform_probe(struct platform_device *pdev)
322{
323 const struct of_device_id *id;
324
325 id = of_match_node(platform_of_match, pdev->dev.of_node);
326 if (!id)
327 return -ENODEV;
328
329 return seiko_panel_probe(&pdev->dev, id->data);
330}
331
332static struct platform_driver seiko_panel_platform_driver = {
333 .driver = {
334 .name = "seiko_panel",
335 .of_match_table = platform_of_match,
336 },
337 .probe = seiko_panel_platform_probe,
338 .remove = seiko_panel_remove,
339 .shutdown = seiko_panel_shutdown,
340};
341module_platform_driver(seiko_panel_platform_driver);
342
343MODULE_AUTHOR("Marco Franchi <marco.franchi@nxp.com>");
344MODULE_DESCRIPTION("Seiko 43WVF1G panel driver");
345MODULE_LICENSE("GPL v2");