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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2020,2021 Intel Corporation
4 */
5
6#include "i915_drv.h"
7#include "intel_step.h"
8
9/*
10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display
11 * steppings. E.g., in some cases a higher PCI revision may translate to a
12 * lower stepping of the GT and/or display IP. This file provides lookup
13 * tables to map the PCI revision into a standard set of stepping values that
14 * can be compared numerically.
15 *
16 * Also note that some revisions/steppings may have been set aside as
17 * placeholders but never materialized in real hardware; in those cases there
18 * may be jumps in the revision IDs or stepping values in the tables below.
19 */
20
21/*
22 * Some platforms always have the same stepping value for GT and display;
23 * use a macro to define these to make it easier to identify the platforms
24 * where the two steppings can deviate.
25 */
26#define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x
27#define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x
28
29static const struct intel_step_info skl_revids[] = {
30 [0x6] = { COMMON_STEP(G0) },
31 [0x7] = { COMMON_STEP(H0) },
32 [0x9] = { COMMON_STEP(J0) },
33 [0xA] = { COMMON_STEP(I1) },
34};
35
36static const struct intel_step_info kbl_revids[] = {
37 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
38 [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 },
39 [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 },
40 [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 },
41 [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 },
42 [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 },
43 [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 },
44};
45
46static const struct intel_step_info bxt_revids[] = {
47 [0xA] = { COMMON_STEP(C0) },
48 [0xB] = { COMMON_STEP(C0) },
49 [0xC] = { COMMON_STEP(D0) },
50 [0xD] = { COMMON_STEP(E0) },
51};
52
53static const struct intel_step_info glk_revids[] = {
54 [3] = { COMMON_STEP(B0) },
55};
56
57static const struct intel_step_info icl_revids[] = {
58 [7] = { COMMON_STEP(D0) },
59};
60
61static const struct intel_step_info jsl_ehl_revids[] = {
62 [0] = { COMMON_STEP(A0) },
63 [1] = { COMMON_STEP(B0) },
64};
65
66static const struct intel_step_info tgl_uy_revids[] = {
67 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
68 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 },
69 [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
70 [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 },
71};
72
73/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
74static const struct intel_step_info tgl_revids[] = {
75 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 },
76 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 },
77};
78
79static const struct intel_step_info rkl_revids[] = {
80 [0] = { COMMON_STEP(A0) },
81 [1] = { COMMON_STEP(B0) },
82 [4] = { COMMON_STEP(C0) },
83};
84
85static const struct intel_step_info dg1_revids[] = {
86 [0] = { COMMON_STEP(A0) },
87 [1] = { COMMON_STEP(B0) },
88};
89
90static const struct intel_step_info adls_revids[] = {
91 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
92 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 },
93 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
94 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 },
95 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
96};
97
98static const struct intel_step_info adlp_revids[] = {
99 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
100 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
101 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 },
102 [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 },
103};
104
105static const struct intel_step_info xehpsdv_revids[] = {
106 [0x0] = { COMMON_GT_MEDIA_STEP(A0) },
107 [0x1] = { COMMON_GT_MEDIA_STEP(A1) },
108 [0x4] = { COMMON_GT_MEDIA_STEP(B0) },
109 [0x8] = { COMMON_GT_MEDIA_STEP(C0) },
110};
111
112static const struct intel_step_info dg2_g10_revid_step_tbl[] = {
113 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
114 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 },
115 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
116 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 },
117};
118
119static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
120 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 },
121 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 },
122 [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
123};
124
125static const struct intel_step_info dg2_g12_revid_step_tbl[] = {
126 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_C0 },
127};
128
129static const struct intel_step_info adls_rpls_revids[] = {
130 [0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 },
131 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
132};
133
134static const struct intel_step_info adlp_rplp_revids[] = {
135 [0x4] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_E0 },
136};
137
138static const struct intel_step_info adlp_n_revids[] = {
139 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_D0 },
140};
141
142static u8 gmd_to_intel_step(struct drm_i915_private *i915,
143 struct intel_ip_version *gmd)
144{
145 u8 step = gmd->step + STEP_A0;
146
147 if (step >= STEP_FUTURE) {
148 drm_dbg(&i915->drm, "Using future steppings\n");
149 return STEP_FUTURE;
150 }
151
152 return step;
153}
154
155static void pvc_step_init(struct drm_i915_private *i915, int pci_revid);
156
157void intel_step_init(struct drm_i915_private *i915)
158{
159 const struct intel_step_info *revids = NULL;
160 int size = 0;
161 int revid = INTEL_REVID(i915);
162 struct intel_step_info step = {};
163
164 if (HAS_GMD_ID(i915)) {
165 step.graphics_step = gmd_to_intel_step(i915,
166 &RUNTIME_INFO(i915)->graphics.ip);
167 step.media_step = gmd_to_intel_step(i915,
168 &RUNTIME_INFO(i915)->media.ip);
169 step.display_step = gmd_to_intel_step(i915,
170 &RUNTIME_INFO(i915)->display.ip);
171 RUNTIME_INFO(i915)->step = step;
172
173 return;
174 }
175
176 if (IS_PONTEVECCHIO(i915)) {
177 pvc_step_init(i915, revid);
178 return;
179 } else if (IS_DG2_G10(i915)) {
180 revids = dg2_g10_revid_step_tbl;
181 size = ARRAY_SIZE(dg2_g10_revid_step_tbl);
182 } else if (IS_DG2_G11(i915)) {
183 revids = dg2_g11_revid_step_tbl;
184 size = ARRAY_SIZE(dg2_g11_revid_step_tbl);
185 } else if (IS_DG2_G12(i915)) {
186 revids = dg2_g12_revid_step_tbl;
187 size = ARRAY_SIZE(dg2_g12_revid_step_tbl);
188 } else if (IS_XEHPSDV(i915)) {
189 revids = xehpsdv_revids;
190 size = ARRAY_SIZE(xehpsdv_revids);
191 } else if (IS_ADLP_N(i915)) {
192 revids = adlp_n_revids;
193 size = ARRAY_SIZE(adlp_n_revids);
194 } else if (IS_ADLP_RPLP(i915)) {
195 revids = adlp_rplp_revids;
196 size = ARRAY_SIZE(adlp_rplp_revids);
197 } else if (IS_ALDERLAKE_P(i915)) {
198 revids = adlp_revids;
199 size = ARRAY_SIZE(adlp_revids);
200 } else if (IS_ADLS_RPLS(i915)) {
201 revids = adls_rpls_revids;
202 size = ARRAY_SIZE(adls_rpls_revids);
203 } else if (IS_ALDERLAKE_S(i915)) {
204 revids = adls_revids;
205 size = ARRAY_SIZE(adls_revids);
206 } else if (IS_DG1(i915)) {
207 revids = dg1_revids;
208 size = ARRAY_SIZE(dg1_revids);
209 } else if (IS_ROCKETLAKE(i915)) {
210 revids = rkl_revids;
211 size = ARRAY_SIZE(rkl_revids);
212 } else if (IS_TGL_UY(i915)) {
213 revids = tgl_uy_revids;
214 size = ARRAY_SIZE(tgl_uy_revids);
215 } else if (IS_TIGERLAKE(i915)) {
216 revids = tgl_revids;
217 size = ARRAY_SIZE(tgl_revids);
218 } else if (IS_JSL_EHL(i915)) {
219 revids = jsl_ehl_revids;
220 size = ARRAY_SIZE(jsl_ehl_revids);
221 } else if (IS_ICELAKE(i915)) {
222 revids = icl_revids;
223 size = ARRAY_SIZE(icl_revids);
224 } else if (IS_GEMINILAKE(i915)) {
225 revids = glk_revids;
226 size = ARRAY_SIZE(glk_revids);
227 } else if (IS_BROXTON(i915)) {
228 revids = bxt_revids;
229 size = ARRAY_SIZE(bxt_revids);
230 } else if (IS_KABYLAKE(i915)) {
231 revids = kbl_revids;
232 size = ARRAY_SIZE(kbl_revids);
233 } else if (IS_SKYLAKE(i915)) {
234 revids = skl_revids;
235 size = ARRAY_SIZE(skl_revids);
236 }
237
238 /* Not using the stepping scheme for the platform yet. */
239 if (!revids)
240 return;
241
242 if (revid < size && revids[revid].graphics_step != STEP_NONE) {
243 step = revids[revid];
244 } else {
245 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid);
246
247 /*
248 * If we hit a gap in the revid array, use the information for
249 * the next revid.
250 *
251 * This may be wrong in all sorts of ways, especially if the
252 * steppings in the array are not monotonically increasing, but
253 * it's better than defaulting to 0.
254 */
255 while (revid < size && revids[revid].graphics_step == STEP_NONE)
256 revid++;
257
258 if (revid < size) {
259 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n",
260 revid);
261 step = revids[revid];
262 } else {
263 drm_dbg(&i915->drm, "Using future steppings\n");
264 step.graphics_step = STEP_FUTURE;
265 step.display_step = STEP_FUTURE;
266 }
267 }
268
269 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE))
270 return;
271
272 RUNTIME_INFO(i915)->step = step;
273}
274
275#define PVC_BD_REVID GENMASK(5, 3)
276#define PVC_CT_REVID GENMASK(2, 0)
277
278static const int pvc_bd_subids[] = {
279 [0x0] = STEP_A0,
280 [0x3] = STEP_B0,
281 [0x4] = STEP_B1,
282 [0x5] = STEP_B3,
283};
284
285static const int pvc_ct_subids[] = {
286 [0x3] = STEP_A0,
287 [0x5] = STEP_B0,
288 [0x6] = STEP_B1,
289 [0x7] = STEP_C0,
290};
291
292static int
293pvc_step_lookup(struct drm_i915_private *i915, const char *type,
294 const int *table, int size, int subid)
295{
296 if (subid < size && table[subid] != STEP_NONE)
297 return table[subid];
298
299 drm_warn(&i915->drm, "Unknown %s id 0x%02x\n", type, subid);
300
301 /*
302 * As on other platforms, try to use the next higher ID if we land on a
303 * gap in the table.
304 */
305 while (subid < size && table[subid] == STEP_NONE)
306 subid++;
307
308 if (subid < size) {
309 drm_dbg(&i915->drm, "Using steppings for %s id 0x%02x\n",
310 type, subid);
311 return table[subid];
312 }
313
314 drm_dbg(&i915->drm, "Using future steppings\n");
315 return STEP_FUTURE;
316}
317
318/*
319 * PVC needs special handling since we don't lookup the
320 * revid in a table, but rather specific bitfields within
321 * the revid for various components.
322 */
323static void pvc_step_init(struct drm_i915_private *i915, int pci_revid)
324{
325 int ct_subid, bd_subid;
326
327 bd_subid = FIELD_GET(PVC_BD_REVID, pci_revid);
328 ct_subid = FIELD_GET(PVC_CT_REVID, pci_revid);
329
330 RUNTIME_INFO(i915)->step.basedie_step =
331 pvc_step_lookup(i915, "Base Die", pvc_bd_subids,
332 ARRAY_SIZE(pvc_bd_subids), bd_subid);
333 RUNTIME_INFO(i915)->step.graphics_step =
334 pvc_step_lookup(i915, "Compute Tile", pvc_ct_subids,
335 ARRAY_SIZE(pvc_ct_subids), ct_subid);
336}
337
338#define STEP_NAME_CASE(name) \
339 case STEP_##name: \
340 return #name;
341
342const char *intel_step_name(enum intel_step step)
343{
344 switch (step) {
345 STEP_NAME_LIST(STEP_NAME_CASE);
346
347 default:
348 return "**";
349 }
350}