1/*
 2 *  ARM HDLCD Controller register definition
 3 */
 4
 5#ifndef __HDLCD_DRV_H__
 6#define __HDLCD_DRV_H__
 7
 8struct hdlcd_drm_private {
 
 9	void __iomem			*mmio;
10	struct clk			*clk;
11	struct drm_fbdev_cma		*fbdev;
12	struct drm_framebuffer		*fb;
13	struct list_head		event_list;
14	struct drm_crtc			crtc;
15	struct drm_plane		*plane;
 
16#ifdef CONFIG_DEBUG_FS
17	atomic_t buffer_underrun_count;
18	atomic_t bus_error_count;
19	atomic_t vsync_count;
20	atomic_t dma_end_count;
21#endif
22};
23
 
24#define crtc_to_hdlcd_priv(x)	container_of(x, struct hdlcd_drm_private, crtc)
25
26static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd,
27			       unsigned int reg, u32 value)
28{
29	writel(value, hdlcd->mmio + reg);
30}
31
32static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg)
33{
34	return readl(hdlcd->mmio + reg);
35}
36
37int hdlcd_setup_crtc(struct drm_device *dev);
38void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);
39void hdlcd_crtc_suspend(struct drm_crtc *crtc);
40void hdlcd_crtc_resume(struct drm_crtc *crtc);
41
42#endif /* __HDLCD_DRV_H__ */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 *  ARM HDLCD Controller register definition
 4 */
 5
 6#ifndef __HDLCD_DRV_H__
 7#define __HDLCD_DRV_H__
 8
 9struct hdlcd_drm_private {
10	struct drm_device		base;
11	void __iomem			*mmio;
12	struct clk			*clk;
 
 
 
13	struct drm_crtc			crtc;
14	struct drm_plane		*plane;
15	unsigned int			irq;
16#ifdef CONFIG_DEBUG_FS
17	atomic_t buffer_underrun_count;
18	atomic_t bus_error_count;
19	atomic_t vsync_count;
20	atomic_t dma_end_count;
21#endif
22};
23
24#define drm_to_hdlcd_priv(x)	container_of(x, struct hdlcd_drm_private, base)
25#define crtc_to_hdlcd_priv(x)	container_of(x, struct hdlcd_drm_private, crtc)
26
27static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd,
28			       unsigned int reg, u32 value)
29{
30	writel(value, hdlcd->mmio + reg);
31}
32
33static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg)
34{
35	return readl(hdlcd->mmio + reg);
36}
37
38int hdlcd_setup_crtc(struct drm_device *dev);
39void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);
 
 
40
41#endif /* __HDLCD_DRV_H__ */