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1/*
2 * Initial setup-routines for HP 9000 based hardware.
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
6 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
7 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
8 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
9 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
10 *
11 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
16 * any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 *
27 */
28#include <linux/delay.h>
29#include <linux/init.h>
30#include <linux/mm.h>
31#include <linux/module.h>
32#include <linux/seq_file.h>
33#include <linux/slab.h>
34#include <linux/cpu.h>
35#include <asm/param.h>
36#include <asm/cache.h>
37#include <asm/hardware.h> /* for register_parisc_driver() stuff */
38#include <asm/processor.h>
39#include <asm/page.h>
40#include <asm/pdc.h>
41#include <asm/pdcpat.h>
42#include <asm/irq.h> /* for struct irq_region */
43#include <asm/parisc-device.h>
44
45struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
46EXPORT_SYMBOL(boot_cpu_data);
47#ifdef CONFIG_PA8X00
48int _parisc_requires_coherency __read_mostly;
49EXPORT_SYMBOL(_parisc_requires_coherency);
50#endif
51
52DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
53
54extern int update_cr16_clocksource(void); /* from time.c */
55
56/*
57** PARISC CPU driver - claim "device" and initialize CPU data structures.
58**
59** Consolidate per CPU initialization into (mostly) one module.
60** Monarch CPU will initialize boot_cpu_data which shouldn't
61** change once the system has booted.
62**
63** The callback *should* do per-instance initialization of
64** everything including the monarch. "Per CPU" init code in
65** setup.c:start_parisc() has migrated here and start_parisc()
66** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
67**
68** The goal of consolidating CPU initialization into one place is
69** to make sure all CPUs get initialized the same way.
70** The code path not shared is how PDC hands control of the CPU to the OS.
71** The initialization of OS data structures is the same (done below).
72*/
73
74/**
75 * init_cpu_profiler - enable/setup per cpu profiling hooks.
76 * @cpunum: The processor instance.
77 *
78 * FIXME: doesn't do much yet...
79 */
80static void
81init_percpu_prof(unsigned long cpunum)
82{
83 struct cpuinfo_parisc *p;
84
85 p = &per_cpu(cpu_data, cpunum);
86 p->prof_counter = 1;
87 p->prof_multiplier = 1;
88}
89
90
91/**
92 * processor_probe - Determine if processor driver should claim this device.
93 * @dev: The device which has been found.
94 *
95 * Determine if processor driver should claim this chip (return 0) or not
96 * (return 1). If so, initialize the chip and tell other partners in crime
97 * they have work to do.
98 */
99static int processor_probe(struct parisc_device *dev)
100{
101 unsigned long txn_addr;
102 unsigned long cpuid;
103 struct cpuinfo_parisc *p;
104
105#ifdef CONFIG_SMP
106 if (num_online_cpus() >= nr_cpu_ids) {
107 printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
108 return 1;
109 }
110#else
111 if (boot_cpu_data.cpu_count > 0) {
112 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
113 return 1;
114 }
115#endif
116
117 /* logical CPU ID and update global counter
118 * May get overwritten by PAT code.
119 */
120 cpuid = boot_cpu_data.cpu_count;
121 txn_addr = dev->hpa.start; /* for legacy PDC */
122
123#ifdef CONFIG_64BIT
124 if (is_pdc_pat()) {
125 ulong status;
126 unsigned long bytecnt;
127 pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
128#undef USE_PAT_CPUID
129#ifdef USE_PAT_CPUID
130 struct pdc_pat_cpu_num cpu_info;
131#endif
132
133 pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
134 if (!pa_pdc_cell)
135 panic("couldn't allocate memory for PDC_PAT_CELL!");
136
137 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
138 dev->mod_index, PA_VIEW, pa_pdc_cell);
139
140 BUG_ON(PDC_OK != status);
141
142 /* verify it's the same as what do_pat_inventory() found */
143 BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
144 BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
145
146 txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
147
148 kfree(pa_pdc_cell);
149
150#ifdef USE_PAT_CPUID
151/* We need contiguous numbers for cpuid. Firmware's notion
152 * of cpuid is for physical CPUs and we just don't care yet.
153 * We'll care when we need to query PAT PDC about a CPU *after*
154 * boot time (ie shutdown a CPU from an OS perspective).
155 */
156 /* get the cpu number */
157 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
158
159 BUG_ON(PDC_OK != status);
160
161 if (cpu_info.cpu_num >= NR_CPUS) {
162 printk(KERN_WARNING "IGNORING CPU at 0x%x,"
163 " cpu_slot_id > NR_CPUS"
164 " (%ld > %d)\n",
165 dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
166 /* Ignore CPU since it will only crash */
167 boot_cpu_data.cpu_count--;
168 return 1;
169 } else {
170 cpuid = cpu_info.cpu_num;
171 }
172#endif
173 }
174#endif
175
176 p = &per_cpu(cpu_data, cpuid);
177 boot_cpu_data.cpu_count++;
178
179 /* initialize counters - CPU 0 gets it_value set in time_init() */
180 if (cpuid)
181 memset(p, 0, sizeof(struct cpuinfo_parisc));
182
183 p->loops_per_jiffy = loops_per_jiffy;
184 p->dev = dev; /* Save IODC data in case we need it */
185 p->hpa = dev->hpa.start; /* save CPU hpa */
186 p->cpuid = cpuid; /* save CPU id */
187 p->txn_addr = txn_addr; /* save CPU IRQ address */
188#ifdef CONFIG_SMP
189 /*
190 ** FIXME: review if any other initialization is clobbered
191 ** for boot_cpu by the above memset().
192 */
193 init_percpu_prof(cpuid);
194#endif
195
196 /*
197 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
198 ** OS control. RENDEZVOUS is the default state - see mem_set above.
199 ** p->state = STATE_RENDEZVOUS;
200 */
201
202#if 0
203 /* CPU 0 IRQ table is statically allocated/initialized */
204 if (cpuid) {
205 struct irqaction actions[];
206
207 /*
208 ** itimer and ipi IRQ handlers are statically initialized in
209 ** arch/parisc/kernel/irq.c. ie Don't need to register them.
210 */
211 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
212 if (!actions) {
213 /* not getting it's own table, share with monarch */
214 actions = cpu_irq_actions[0];
215 }
216
217 cpu_irq_actions[cpuid] = actions;
218 }
219#endif
220
221 /*
222 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
223 */
224#ifdef CONFIG_SMP
225 if (cpuid) {
226 set_cpu_present(cpuid, true);
227 cpu_up(cpuid);
228 }
229#endif
230
231 /* If we've registered more than one cpu,
232 * we'll use the jiffies clocksource since cr16
233 * is not synchronized between CPUs.
234 */
235 update_cr16_clocksource();
236
237 return 0;
238}
239
240/**
241 * collect_boot_cpu_data - Fill the boot_cpu_data structure.
242 *
243 * This function collects and stores the generic processor information
244 * in the boot_cpu_data structure.
245 */
246void __init collect_boot_cpu_data(void)
247{
248 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
249
250 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
251
252 /* get CPU-Model Information... */
253#define p ((unsigned long *)&boot_cpu_data.pdc.model)
254 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK)
255 printk(KERN_INFO
256 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
257 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
258#undef p
259
260 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK)
261 printk(KERN_INFO "vers %08lx\n",
262 boot_cpu_data.pdc.versions);
263
264 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK)
265 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
266 (boot_cpu_data.pdc.cpuid >> 5) & 127,
267 boot_cpu_data.pdc.cpuid & 31,
268 boot_cpu_data.pdc.cpuid);
269
270 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
271 printk(KERN_INFO "capabilities 0x%lx\n",
272 boot_cpu_data.pdc.capabilities);
273
274 if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
275 printk(KERN_INFO "model %s\n",
276 boot_cpu_data.pdc.sys_model_name);
277
278 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
279 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
280
281 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
282 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
283 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
284
285#ifdef CONFIG_PA8X00
286 _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
287 (boot_cpu_data.cpu_type == mako2);
288#endif
289}
290
291
292/**
293 * init_per_cpu - Handle individual processor initializations.
294 * @cpunum: logical processor number.
295 *
296 * This function handles initialization for *every* CPU
297 * in the system:
298 *
299 * o Set "default" CPU width for trap handlers
300 *
301 * o Enable FP coprocessor
302 * REVISIT: this could be done in the "code 22" trap handler.
303 * (frowands idea - that way we know which processes need FP
304 * registers saved on the interrupt stack.)
305 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
306 * formatted printing of %lx for example (double divides I think)
307 *
308 * o Enable CPU profiling hooks.
309 */
310int init_per_cpu(int cpunum)
311{
312 int ret;
313 struct pdc_coproc_cfg coproc_cfg;
314
315 set_firmware_width();
316 ret = pdc_coproc_cfg(&coproc_cfg);
317
318 if(ret >= 0 && coproc_cfg.ccr_functional) {
319 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
320
321 /* FWIW, FP rev/model is a more accurate way to determine
322 ** CPU type. CPU rev/model has some ambiguous cases.
323 */
324 per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
325 per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
326
327 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
328 cpunum, coproc_cfg.revision, coproc_cfg.model);
329
330 /*
331 ** store status register to stack (hopefully aligned)
332 ** and clear the T-bit.
333 */
334 asm volatile ("fstd %fr0,8(%sp)");
335
336 } else {
337 printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
338 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
339#ifdef CONFIG_64BIT
340 "Halting Machine - FP required\n"
341#endif
342 , coproc_cfg.ccr_functional);
343#ifdef CONFIG_64BIT
344 mdelay(100); /* previous chars get pushed to console */
345 panic("FP CoProc not reported");
346#endif
347 }
348
349 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
350 init_percpu_prof(cpunum);
351
352 return ret;
353}
354
355/*
356 * Display CPU info for all CPUs.
357 */
358int
359show_cpuinfo (struct seq_file *m, void *v)
360{
361 unsigned long cpu;
362
363 for_each_online_cpu(cpu) {
364 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
365#ifdef CONFIG_SMP
366 if (0 == cpuinfo->hpa)
367 continue;
368#endif
369 seq_printf(m, "processor\t: %lu\n"
370 "cpu family\t: PA-RISC %s\n",
371 cpu, boot_cpu_data.family_name);
372
373 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
374
375 /* cpu MHz */
376 seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
377 boot_cpu_data.cpu_hz / 1000000,
378 boot_cpu_data.cpu_hz % 1000000 );
379
380 seq_printf(m, "capabilities\t:");
381 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
382 seq_puts(m, " os32");
383 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
384 seq_puts(m, " os64");
385 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
386 seq_puts(m, " iopdir_fdc");
387 switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
388 case PDC_MODEL_NVA_SUPPORTED:
389 seq_puts(m, " nva_supported");
390 break;
391 case PDC_MODEL_NVA_SLOW:
392 seq_puts(m, " nva_slow");
393 break;
394 case PDC_MODEL_NVA_UNSUPPORTED:
395 seq_puts(m, " needs_equivalent_aliasing");
396 break;
397 }
398 seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
399
400 seq_printf(m, "model\t\t: %s\n"
401 "model name\t: %s\n",
402 boot_cpu_data.pdc.sys_model_name,
403 cpuinfo->dev ?
404 cpuinfo->dev->name : "Unknown");
405
406 seq_printf(m, "hversion\t: 0x%08x\n"
407 "sversion\t: 0x%08x\n",
408 boot_cpu_data.hversion,
409 boot_cpu_data.sversion );
410
411 /* print cachesize info */
412 show_cache_info(m);
413
414 seq_printf(m, "bogomips\t: %lu.%02lu\n",
415 cpuinfo->loops_per_jiffy / (500000 / HZ),
416 (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
417
418 seq_printf(m, "software id\t: %ld\n\n",
419 boot_cpu_data.pdc.model.sw_id);
420 }
421 return 0;
422}
423
424static const struct parisc_device_id processor_tbl[] = {
425 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
426 { 0, }
427};
428
429static struct parisc_driver cpu_driver = {
430 .name = "CPU",
431 .id_table = processor_tbl,
432 .probe = processor_probe
433};
434
435/**
436 * processor_init - Processor initialization procedure.
437 *
438 * Register this driver.
439 */
440void __init processor_init(void)
441{
442 register_parisc_driver(&cpu_driver);
443}
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Initial setup-routines for HP 9000 based hardware.
4 *
5 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
6 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
7 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
8 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
9 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
10 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
11 *
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
13 */
14#include <linux/delay.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/module.h>
18#include <linux/seq_file.h>
19#include <linux/random.h>
20#include <linux/slab.h>
21#include <linux/cpu.h>
22#include <asm/topology.h>
23#include <asm/param.h>
24#include <asm/cache.h>
25#include <asm/hardware.h> /* for register_parisc_driver() stuff */
26#include <asm/processor.h>
27#include <asm/page.h>
28#include <asm/pdc.h>
29#include <asm/pdcpat.h>
30#include <asm/irq.h> /* for struct irq_region */
31#include <asm/parisc-device.h>
32
33struct system_cpuinfo_parisc boot_cpu_data __ro_after_init;
34EXPORT_SYMBOL(boot_cpu_data);
35#ifdef CONFIG_PA8X00
36int _parisc_requires_coherency __ro_after_init;
37EXPORT_SYMBOL(_parisc_requires_coherency);
38#endif
39
40DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
41
42/*
43** PARISC CPU driver - claim "device" and initialize CPU data structures.
44**
45** Consolidate per CPU initialization into (mostly) one module.
46** Monarch CPU will initialize boot_cpu_data which shouldn't
47** change once the system has booted.
48**
49** The callback *should* do per-instance initialization of
50** everything including the monarch. "Per CPU" init code in
51** setup.c:start_parisc() has migrated here and start_parisc()
52** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
53**
54** The goal of consolidating CPU initialization into one place is
55** to make sure all CPUs get initialized the same way.
56** The code path not shared is how PDC hands control of the CPU to the OS.
57** The initialization of OS data structures is the same (done below).
58*/
59
60/**
61 * init_cpu_profiler - enable/setup per cpu profiling hooks.
62 * @cpunum: The processor instance.
63 *
64 * FIXME: doesn't do much yet...
65 */
66static void
67init_percpu_prof(unsigned long cpunum)
68{
69}
70
71
72/**
73 * processor_probe - Determine if processor driver should claim this device.
74 * @dev: The device which has been found.
75 *
76 * Determine if processor driver should claim this chip (return 0) or not
77 * (return 1). If so, initialize the chip and tell other partners in crime
78 * they have work to do.
79 */
80static int __init processor_probe(struct parisc_device *dev)
81{
82 unsigned long txn_addr;
83 unsigned long cpuid;
84 struct cpuinfo_parisc *p;
85 struct pdc_pat_cpu_num cpu_info = { };
86
87#ifdef CONFIG_SMP
88 if (num_online_cpus() >= nr_cpu_ids) {
89 printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
90 return 1;
91 }
92#else
93 if (boot_cpu_data.cpu_count > 0) {
94 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
95 return 1;
96 }
97#endif
98
99 /* logical CPU ID and update global counter
100 * May get overwritten by PAT code.
101 */
102 cpuid = boot_cpu_data.cpu_count;
103 txn_addr = dev->hpa.start; /* for legacy PDC */
104 cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
105
106#ifdef CONFIG_64BIT
107 if (is_pdc_pat()) {
108 ulong status;
109 unsigned long bytecnt;
110 pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
111
112 pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
113 if (!pa_pdc_cell)
114 panic("couldn't allocate memory for PDC_PAT_CELL!");
115
116 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
117 dev->mod_index, PA_VIEW, pa_pdc_cell);
118
119 BUG_ON(PDC_OK != status);
120
121 /* verify it's the same as what do_pat_inventory() found */
122 BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
123 BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
124
125 txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
126
127 kfree(pa_pdc_cell);
128
129 /* get the cpu number */
130 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
131 BUG_ON(PDC_OK != status);
132
133 pr_info("Logical CPU #%lu is physical cpu #%lu at location "
134 "0x%lx with hpa %pa\n",
135 cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
136 &dev->hpa.start);
137
138#undef USE_PAT_CPUID
139#ifdef USE_PAT_CPUID
140/* We need contiguous numbers for cpuid. Firmware's notion
141 * of cpuid is for physical CPUs and we just don't care yet.
142 * We'll care when we need to query PAT PDC about a CPU *after*
143 * boot time (ie shutdown a CPU from an OS perspective).
144 */
145 if (cpu_info.cpu_num >= NR_CPUS) {
146 printk(KERN_WARNING "IGNORING CPU at %pa,"
147 " cpu_slot_id > NR_CPUS"
148 " (%ld > %d)\n",
149 &dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
150 /* Ignore CPU since it will only crash */
151 boot_cpu_data.cpu_count--;
152 return 1;
153 } else {
154 cpuid = cpu_info.cpu_num;
155 }
156#endif
157 }
158#endif
159
160 p = &per_cpu(cpu_data, cpuid);
161 boot_cpu_data.cpu_count++;
162
163 /* initialize counters - CPU 0 gets it_value set in time_init() */
164 if (cpuid)
165 memset(p, 0, sizeof(struct cpuinfo_parisc));
166
167 p->dev = dev; /* Save IODC data in case we need it */
168 p->hpa = dev->hpa.start; /* save CPU hpa */
169 p->cpuid = cpuid; /* save CPU id */
170 p->txn_addr = txn_addr; /* save CPU IRQ address */
171 p->cpu_num = cpu_info.cpu_num;
172 p->cpu_loc = cpu_info.cpu_loc;
173
174 set_cpu_possible(cpuid, true);
175 store_cpu_topology(cpuid);
176
177#ifdef CONFIG_SMP
178 /*
179 ** FIXME: review if any other initialization is clobbered
180 ** for boot_cpu by the above memset().
181 */
182 init_percpu_prof(cpuid);
183#endif
184
185 /*
186 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
187 ** OS control. RENDEZVOUS is the default state - see mem_set above.
188 ** p->state = STATE_RENDEZVOUS;
189 */
190
191#if 0
192 /* CPU 0 IRQ table is statically allocated/initialized */
193 if (cpuid) {
194 struct irqaction actions[];
195
196 /*
197 ** itimer and ipi IRQ handlers are statically initialized in
198 ** arch/parisc/kernel/irq.c. ie Don't need to register them.
199 */
200 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
201 if (!actions) {
202 /* not getting it's own table, share with monarch */
203 actions = cpu_irq_actions[0];
204 }
205
206 cpu_irq_actions[cpuid] = actions;
207 }
208#endif
209
210 /*
211 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
212 */
213#ifdef CONFIG_SMP
214 if (cpuid) {
215 set_cpu_present(cpuid, true);
216 add_cpu(cpuid);
217 }
218#endif
219
220 return 0;
221}
222
223/**
224 * collect_boot_cpu_data - Fill the boot_cpu_data structure.
225 *
226 * This function collects and stores the generic processor information
227 * in the boot_cpu_data structure.
228 */
229void __init collect_boot_cpu_data(void)
230{
231 unsigned long cr16_seed;
232 char orig_prod_num[64], current_prod_num[64], serial_no[64];
233
234 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
235
236 cr16_seed = get_cycles();
237 add_device_randomness(&cr16_seed, sizeof(cr16_seed));
238
239 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
240
241 /* get CPU-Model Information... */
242#define p ((unsigned long *)&boot_cpu_data.pdc.model)
243 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
244 printk(KERN_INFO
245 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
246 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
247
248 add_device_randomness(&boot_cpu_data.pdc.model,
249 sizeof(boot_cpu_data.pdc.model));
250 }
251#undef p
252
253 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
254 printk(KERN_INFO "vers %08lx\n",
255 boot_cpu_data.pdc.versions);
256
257 add_device_randomness(&boot_cpu_data.pdc.versions,
258 sizeof(boot_cpu_data.pdc.versions));
259 }
260
261 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
262 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
263 (boot_cpu_data.pdc.cpuid >> 5) & 127,
264 boot_cpu_data.pdc.cpuid & 31,
265 boot_cpu_data.pdc.cpuid);
266
267 add_device_randomness(&boot_cpu_data.pdc.cpuid,
268 sizeof(boot_cpu_data.pdc.cpuid));
269 }
270
271 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
272 printk(KERN_INFO "capabilities 0x%lx\n",
273 boot_cpu_data.pdc.capabilities);
274
275 if (pdc_model_sysmodel(OS_ID_HPUX, boot_cpu_data.pdc.sys_model_name) == PDC_OK)
276 pr_info("HP-UX model name: %s\n",
277 boot_cpu_data.pdc.sys_model_name);
278
279 serial_no[0] = 0;
280 if (pdc_model_sysmodel(OS_ID_MPEXL, serial_no) == PDC_OK &&
281 serial_no[0])
282 pr_info("MPE/iX model name: %s\n", serial_no);
283
284 dump_stack_set_arch_desc("%s", boot_cpu_data.pdc.sys_model_name);
285
286 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
287 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
288
289 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
290 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
291 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
292
293#ifdef CONFIG_PA8X00
294 _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
295 (boot_cpu_data.cpu_type == mako2);
296#endif
297
298 if (pdc_model_platform_info(orig_prod_num, current_prod_num, serial_no) == PDC_OK) {
299 printk(KERN_INFO "product %s, original product %s, S/N: %s\n",
300 current_prod_num[0] ? current_prod_num : "n/a",
301 orig_prod_num, serial_no);
302 add_device_randomness(orig_prod_num, strlen(orig_prod_num));
303 add_device_randomness(current_prod_num, strlen(current_prod_num));
304 add_device_randomness(serial_no, strlen(serial_no));
305 }
306}
307
308
309/**
310 * init_per_cpu - Handle individual processor initializations.
311 * @cpunum: logical processor number.
312 *
313 * This function handles initialization for *every* CPU
314 * in the system:
315 *
316 * o Set "default" CPU width for trap handlers
317 *
318 * o Enable FP coprocessor
319 * REVISIT: this could be done in the "code 22" trap handler.
320 * (frowands idea - that way we know which processes need FP
321 * registers saved on the interrupt stack.)
322 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
323 * formatted printing of %lx for example (double divides I think)
324 *
325 * o Enable CPU profiling hooks.
326 */
327int init_per_cpu(int cpunum)
328{
329 int ret;
330 struct pdc_coproc_cfg coproc_cfg;
331
332 set_firmware_width();
333 ret = pdc_coproc_cfg(&coproc_cfg);
334
335 if(ret >= 0 && coproc_cfg.ccr_functional) {
336 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
337
338 /* FWIW, FP rev/model is a more accurate way to determine
339 ** CPU type. CPU rev/model has some ambiguous cases.
340 */
341 per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
342 per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
343
344 if (cpunum == 0)
345 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
346 cpunum, coproc_cfg.revision, coproc_cfg.model);
347
348 /*
349 ** store status register to stack (hopefully aligned)
350 ** and clear the T-bit.
351 */
352 asm volatile ("fstd %fr0,8(%sp)");
353
354 } else {
355 printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
356 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
357#ifdef CONFIG_64BIT
358 "Halting Machine - FP required\n"
359#endif
360 , coproc_cfg.ccr_functional);
361#ifdef CONFIG_64BIT
362 mdelay(100); /* previous chars get pushed to console */
363 panic("FP CoProc not reported");
364#endif
365 }
366
367 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
368 init_percpu_prof(cpunum);
369
370 return ret;
371}
372
373/*
374 * Display CPU info for all CPUs.
375 */
376int
377show_cpuinfo (struct seq_file *m, void *v)
378{
379 unsigned long cpu;
380
381 for_each_online_cpu(cpu) {
382 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
383#ifdef CONFIG_SMP
384 if (0 == cpuinfo->hpa)
385 continue;
386#endif
387 seq_printf(m, "processor\t: %lu\n"
388 "cpu family\t: PA-RISC %s\n",
389 cpu, boot_cpu_data.family_name);
390
391 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
392
393 /* cpu MHz */
394 seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
395 boot_cpu_data.cpu_hz / 1000000,
396 boot_cpu_data.cpu_hz % 1000000 );
397
398#ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
399 seq_printf(m, "physical id\t: %d\n",
400 topology_physical_package_id(cpu));
401 seq_printf(m, "siblings\t: %d\n",
402 cpumask_weight(topology_core_cpumask(cpu)));
403 seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
404#endif
405
406 seq_printf(m, "capabilities\t:");
407 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
408 seq_puts(m, " os32");
409 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
410 seq_puts(m, " os64");
411 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
412 seq_puts(m, " iopdir_fdc");
413 switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
414 case PDC_MODEL_NVA_SUPPORTED:
415 seq_puts(m, " nva_supported");
416 break;
417 case PDC_MODEL_NVA_SLOW:
418 seq_puts(m, " nva_slow");
419 break;
420 case PDC_MODEL_NVA_UNSUPPORTED:
421 seq_puts(m, " needs_equivalent_aliasing");
422 break;
423 }
424 seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
425
426 seq_printf(m, "model\t\t: %s - %s\n",
427 boot_cpu_data.pdc.sys_model_name,
428 cpuinfo->dev ?
429 cpuinfo->dev->name : "Unknown");
430
431 seq_printf(m, "hversion\t: 0x%08x\n"
432 "sversion\t: 0x%08x\n",
433 boot_cpu_data.hversion,
434 boot_cpu_data.sversion );
435
436 /* print cachesize info */
437 show_cache_info(m);
438
439 seq_printf(m, "bogomips\t: %lu.%02lu\n",
440 loops_per_jiffy / (500000 / HZ),
441 loops_per_jiffy / (5000 / HZ) % 100);
442
443 seq_printf(m, "software id\t: %ld\n\n",
444 boot_cpu_data.pdc.model.sw_id);
445 }
446 return 0;
447}
448
449static const struct parisc_device_id processor_tbl[] __initconst = {
450 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
451 { 0, }
452};
453
454static struct parisc_driver cpu_driver __refdata = {
455 .name = "CPU",
456 .id_table = processor_tbl,
457 .probe = processor_probe
458};
459
460/**
461 * processor_init - Processor initialization procedure.
462 *
463 * Register this driver.
464 */
465void __init processor_init(void)
466{
467 unsigned int cpu;
468
469 reset_cpu_topology();
470
471 /* reset possible mask. We will mark those which are possible. */
472 for_each_possible_cpu(cpu)
473 set_cpu_possible(cpu, false);
474
475 register_parisc_driver(&cpu_driver);
476}