1/*
  2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
  3 * reserved.
  4 *
  5 * This software is available to you under a choice of one of two
  6 * licenses.  You may choose to be licensed under the terms of the GNU
  7 * General Public License (GPL) Version 2, available from the file
  8 * COPYING in the main directory of this source tree, or the NetLogic
  9 * license below:
 10 *
 11 * Redistribution and use in source and binary forms, with or without
 12 * modification, are permitted provided that the following conditions
 13 * are met:
 14 *
 15 * 1. Redistributions of source code must retain the above copyright
 16 *    notice, this list of conditions and the following disclaimer.
 17 * 2. Redistributions in binary form must reproduce the above copyright
 18 *    notice, this list of conditions and the following disclaimer in
 19 *    the documentation and/or other materials provided with the
 20 *    distribution.
 21 *
 22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
 29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
 31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
 32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 33 */
 34
 35#ifndef _ASM_NLM_IOMAP_H
 36#define _ASM_NLM_IOMAP_H
 37
 38#define DEFAULT_NETLOGIC_IO_BASE	   CKSEG1ADDR(0x1ef00000)
 39#define NETLOGIC_IO_DDR2_CHN0_OFFSET	   0x01000
 40#define NETLOGIC_IO_DDR2_CHN1_OFFSET	   0x02000
 41#define NETLOGIC_IO_DDR2_CHN2_OFFSET	   0x03000
 42#define NETLOGIC_IO_DDR2_CHN3_OFFSET	   0x04000
 43#define NETLOGIC_IO_PIC_OFFSET		   0x08000
 44#define NETLOGIC_IO_UART_0_OFFSET	   0x14000
 45#define NETLOGIC_IO_UART_1_OFFSET	   0x15100
 46
 47#define NETLOGIC_IO_SIZE		   0x1000
 48
 49#define NETLOGIC_IO_BRIDGE_OFFSET	   0x00000
 50
 51#define NETLOGIC_IO_RLD2_CHN0_OFFSET	   0x05000
 52#define NETLOGIC_IO_RLD2_CHN1_OFFSET	   0x06000
 53
 54#define NETLOGIC_IO_SRAM_OFFSET		   0x07000
 55
 56#define NETLOGIC_IO_PCIX_OFFSET		   0x09000
 57#define NETLOGIC_IO_HT_OFFSET		   0x0A000
 58
 59#define NETLOGIC_IO_SECURITY_OFFSET	   0x0B000
 60
 61#define NETLOGIC_IO_GMAC_0_OFFSET	   0x0C000
 62#define NETLOGIC_IO_GMAC_1_OFFSET	   0x0D000
 63#define NETLOGIC_IO_GMAC_2_OFFSET	   0x0E000
 64#define NETLOGIC_IO_GMAC_3_OFFSET	   0x0F000
 65
 66/* XLS devices */
 67#define NETLOGIC_IO_GMAC_4_OFFSET	   0x20000
 68#define NETLOGIC_IO_GMAC_5_OFFSET	   0x21000
 69#define NETLOGIC_IO_GMAC_6_OFFSET	   0x22000
 70#define NETLOGIC_IO_GMAC_7_OFFSET	   0x23000
 71
 72#define NETLOGIC_IO_PCIE_0_OFFSET	   0x1E000
 73#define NETLOGIC_IO_PCIE_1_OFFSET	   0x1F000
 74#define NETLOGIC_IO_SRIO_0_OFFSET	   0x1E000
 75#define NETLOGIC_IO_SRIO_1_OFFSET	   0x1F000
 76
 77#define NETLOGIC_IO_USB_0_OFFSET	   0x24000
 78#define NETLOGIC_IO_USB_1_OFFSET	   0x25000
 79
 80#define NETLOGIC_IO_COMP_OFFSET		   0x1D000
 81/* end XLS devices */
 82
 83/* XLR devices */
 84#define NETLOGIC_IO_SPI4_0_OFFSET	   0x10000
 85#define NETLOGIC_IO_XGMAC_0_OFFSET	   0x11000
 86#define NETLOGIC_IO_SPI4_1_OFFSET	   0x12000
 87#define NETLOGIC_IO_XGMAC_1_OFFSET	   0x13000
 88/* end XLR devices */
 89
 90#define NETLOGIC_IO_I2C_0_OFFSET	   0x16000
 91#define NETLOGIC_IO_I2C_1_OFFSET	   0x17000
 92
 93#define NETLOGIC_IO_GPIO_OFFSET		   0x18000
 94#define NETLOGIC_IO_FLASH_OFFSET	   0x19000
 95#define NETLOGIC_IO_TB_OFFSET		   0x1C000
 96
 97#define NETLOGIC_CPLD_OFFSET		   KSEG1ADDR(0x1d840000)
 98
 99/*
100 * Base Address (Virtual) of the PCI Config address space
101 * For now, choose 256M phys in kseg1 = 0xA0000000 + (1<<28)
102 * Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes
103 * ie 1<<24 = 16M
104 */
105#define DEFAULT_PCI_CONFIG_BASE		0x18000000
106#define DEFAULT_HT_TYPE0_CFG_BASE	0x16000000
107#define DEFAULT_HT_TYPE1_CFG_BASE	0x17000000
108
109#endif