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1/*
2 * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller
3 *
4 * Copyright (C) 2012-2015 Google, Inc
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * This driver uses the Chrome OS EC byte-level message-based protocol for
16 * communicating the keyboard state (which keys are pressed) from a keyboard EC
17 * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
18 * but everything else (including deghosting) is done here. The main
19 * motivation for this is to keep the EC firmware as simple as possible, since
20 * it cannot be easily upgraded and EC flash/IRAM space is relatively
21 * expensive.
22 */
23
24#include <linux/dmi.h>
25#include <linux/delay.h>
26#include <linux/io.h>
27#include <linux/mfd/cros_ec.h>
28#include <linux/mfd/cros_ec_commands.h>
29#include <linux/module.h>
30#include <linux/platform_device.h>
31#include <linux/printk.h>
32
33#define DRV_NAME "cros_ec_lpc"
34
35static int ec_response_timed_out(void)
36{
37 unsigned long one_second = jiffies + HZ;
38
39 usleep_range(200, 300);
40 do {
41 if (!(inb(EC_LPC_ADDR_HOST_CMD) & EC_LPC_STATUS_BUSY_MASK))
42 return 0;
43 usleep_range(100, 200);
44 } while (time_before(jiffies, one_second));
45
46 return 1;
47}
48
49static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
50 struct cros_ec_command *msg)
51{
52 struct ec_host_request *request;
53 struct ec_host_response response;
54 u8 sum = 0;
55 int i;
56 int ret = 0;
57 u8 *dout;
58
59 ret = cros_ec_prepare_tx(ec, msg);
60
61 /* Write buffer */
62 for (i = 0; i < ret; i++)
63 outb(ec->dout[i], EC_LPC_ADDR_HOST_PACKET + i);
64
65 request = (struct ec_host_request *)ec->dout;
66
67 /* Here we go */
68 outb(EC_COMMAND_PROTOCOL_3, EC_LPC_ADDR_HOST_CMD);
69
70 if (ec_response_timed_out()) {
71 dev_warn(ec->dev, "EC responsed timed out\n");
72 ret = -EIO;
73 goto done;
74 }
75
76 /* Check result */
77 msg->result = inb(EC_LPC_ADDR_HOST_DATA);
78 ret = cros_ec_check_result(ec, msg);
79 if (ret)
80 goto done;
81
82 /* Read back response */
83 dout = (u8 *)&response;
84 for (i = 0; i < sizeof(response); i++) {
85 dout[i] = inb(EC_LPC_ADDR_HOST_PACKET + i);
86 sum += dout[i];
87 }
88
89 msg->result = response.result;
90
91 if (response.data_len > msg->insize) {
92 dev_err(ec->dev,
93 "packet too long (%d bytes, expected %d)",
94 response.data_len, msg->insize);
95 ret = -EMSGSIZE;
96 goto done;
97 }
98
99 /* Read response and process checksum */
100 for (i = 0; i < response.data_len; i++) {
101 msg->data[i] =
102 inb(EC_LPC_ADDR_HOST_PACKET + sizeof(response) + i);
103 sum += msg->data[i];
104 }
105
106 if (sum) {
107 dev_err(ec->dev,
108 "bad packet checksum %02x\n",
109 response.checksum);
110 ret = -EBADMSG;
111 goto done;
112 }
113
114 /* Return actual amount of data received */
115 ret = response.data_len;
116done:
117 return ret;
118}
119
120static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
121 struct cros_ec_command *msg)
122{
123 struct ec_lpc_host_args args;
124 int csum;
125 int i;
126 int ret = 0;
127
128 if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
129 msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
130 dev_err(ec->dev,
131 "invalid buffer sizes (out %d, in %d)\n",
132 msg->outsize, msg->insize);
133 return -EINVAL;
134 }
135
136 /* Now actually send the command to the EC and get the result */
137 args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
138 args.command_version = msg->version;
139 args.data_size = msg->outsize;
140
141 /* Initialize checksum */
142 csum = msg->command + args.flags +
143 args.command_version + args.data_size;
144
145 /* Copy data and update checksum */
146 for (i = 0; i < msg->outsize; i++) {
147 outb(msg->data[i], EC_LPC_ADDR_HOST_PARAM + i);
148 csum += msg->data[i];
149 }
150
151 /* Finalize checksum and write args */
152 args.checksum = csum & 0xFF;
153 outb(args.flags, EC_LPC_ADDR_HOST_ARGS);
154 outb(args.command_version, EC_LPC_ADDR_HOST_ARGS + 1);
155 outb(args.data_size, EC_LPC_ADDR_HOST_ARGS + 2);
156 outb(args.checksum, EC_LPC_ADDR_HOST_ARGS + 3);
157
158 /* Here we go */
159 outb(msg->command, EC_LPC_ADDR_HOST_CMD);
160
161 if (ec_response_timed_out()) {
162 dev_warn(ec->dev, "EC responsed timed out\n");
163 ret = -EIO;
164 goto done;
165 }
166
167 /* Check result */
168 msg->result = inb(EC_LPC_ADDR_HOST_DATA);
169 ret = cros_ec_check_result(ec, msg);
170 if (ret)
171 goto done;
172
173 /* Read back args */
174 args.flags = inb(EC_LPC_ADDR_HOST_ARGS);
175 args.command_version = inb(EC_LPC_ADDR_HOST_ARGS + 1);
176 args.data_size = inb(EC_LPC_ADDR_HOST_ARGS + 2);
177 args.checksum = inb(EC_LPC_ADDR_HOST_ARGS + 3);
178
179 if (args.data_size > msg->insize) {
180 dev_err(ec->dev,
181 "packet too long (%d bytes, expected %d)",
182 args.data_size, msg->insize);
183 ret = -ENOSPC;
184 goto done;
185 }
186
187 /* Start calculating response checksum */
188 csum = msg->command + args.flags +
189 args.command_version + args.data_size;
190
191 /* Read response and update checksum */
192 for (i = 0; i < args.data_size; i++) {
193 msg->data[i] = inb(EC_LPC_ADDR_HOST_PARAM + i);
194 csum += msg->data[i];
195 }
196
197 /* Verify checksum */
198 if (args.checksum != (csum & 0xFF)) {
199 dev_err(ec->dev,
200 "bad packet checksum, expected %02x, got %02x\n",
201 args.checksum, csum & 0xFF);
202 ret = -EBADMSG;
203 goto done;
204 }
205
206 /* Return actual amount of data received */
207 ret = args.data_size;
208done:
209 return ret;
210}
211
212/* Returns num bytes read, or negative on error. Doesn't need locking. */
213static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
214 unsigned int bytes, void *dest)
215{
216 int i = offset;
217 char *s = dest;
218 int cnt = 0;
219
220 if (offset >= EC_MEMMAP_SIZE - bytes)
221 return -EINVAL;
222
223 /* fixed length */
224 if (bytes) {
225 for (; cnt < bytes; i++, s++, cnt++)
226 *s = inb(EC_LPC_ADDR_MEMMAP + i);
227 return cnt;
228 }
229
230 /* string */
231 for (; i < EC_MEMMAP_SIZE; i++, s++) {
232 *s = inb(EC_LPC_ADDR_MEMMAP + i);
233 cnt++;
234 if (!*s)
235 break;
236 }
237
238 return cnt;
239}
240
241static int cros_ec_lpc_probe(struct platform_device *pdev)
242{
243 struct device *dev = &pdev->dev;
244 struct cros_ec_device *ec_dev;
245 int ret;
246
247 if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
248 dev_name(dev))) {
249 dev_err(dev, "couldn't reserve memmap region\n");
250 return -EBUSY;
251 }
252
253 if ((inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID) != 'E') ||
254 (inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID + 1) != 'C')) {
255 dev_err(dev, "EC ID not detected\n");
256 return -ENODEV;
257 }
258
259 if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
260 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
261 dev_err(dev, "couldn't reserve region0\n");
262 return -EBUSY;
263 }
264 if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
265 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
266 dev_err(dev, "couldn't reserve region1\n");
267 return -EBUSY;
268 }
269
270 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
271 if (!ec_dev)
272 return -ENOMEM;
273
274 platform_set_drvdata(pdev, ec_dev);
275 ec_dev->dev = dev;
276 ec_dev->phys_name = dev_name(dev);
277 ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
278 ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
279 ec_dev->cmd_readmem = cros_ec_lpc_readmem;
280 ec_dev->din_size = sizeof(struct ec_host_response) +
281 sizeof(struct ec_response_get_protocol_info);
282 ec_dev->dout_size = sizeof(struct ec_host_request);
283
284 ret = cros_ec_register(ec_dev);
285 if (ret) {
286 dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
287 return ret;
288 }
289
290 return 0;
291}
292
293static int cros_ec_lpc_remove(struct platform_device *pdev)
294{
295 struct cros_ec_device *ec_dev;
296
297 ec_dev = platform_get_drvdata(pdev);
298 cros_ec_remove(ec_dev);
299
300 return 0;
301}
302
303static struct dmi_system_id cros_ec_lpc_dmi_table[] __initdata = {
304 {
305 /*
306 * Today all Chromebooks/boxes ship with Google_* as version and
307 * coreboot as bios vendor. No other systems with this
308 * combination are known to date.
309 */
310 .matches = {
311 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
312 DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
313 },
314 },
315 {
316 /* x86-link, the Chromebook Pixel. */
317 .matches = {
318 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
319 DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
320 },
321 },
322 {
323 /* x86-samus, the Chromebook Pixel 2. */
324 .matches = {
325 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
326 DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
327 },
328 },
329 {
330 /* x86-peppy, the Acer C720 Chromebook. */
331 .matches = {
332 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
333 DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
334 },
335 },
336 { /* sentinel */ }
337};
338MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
339
340static struct platform_driver cros_ec_lpc_driver = {
341 .driver = {
342 .name = DRV_NAME,
343 },
344 .probe = cros_ec_lpc_probe,
345 .remove = cros_ec_lpc_remove,
346};
347
348static struct platform_device cros_ec_lpc_device = {
349 .name = DRV_NAME
350};
351
352static int __init cros_ec_lpc_init(void)
353{
354 int ret;
355
356 if (!dmi_check_system(cros_ec_lpc_dmi_table)) {
357 pr_err(DRV_NAME ": unsupported system.\n");
358 return -ENODEV;
359 }
360
361 /* Register the driver */
362 ret = platform_driver_register(&cros_ec_lpc_driver);
363 if (ret) {
364 pr_err(DRV_NAME ": can't register driver: %d\n", ret);
365 return ret;
366 }
367
368 /* Register the device, and it'll get hooked up automatically */
369 ret = platform_device_register(&cros_ec_lpc_device);
370 if (ret) {
371 pr_err(DRV_NAME ": can't register device: %d\n", ret);
372 platform_driver_unregister(&cros_ec_lpc_driver);
373 return ret;
374 }
375
376 return 0;
377}
378
379static void __exit cros_ec_lpc_exit(void)
380{
381 platform_device_unregister(&cros_ec_lpc_device);
382 platform_driver_unregister(&cros_ec_lpc_driver);
383}
384
385module_init(cros_ec_lpc_init);
386module_exit(cros_ec_lpc_exit);
387
388MODULE_LICENSE("GPL");
389MODULE_DESCRIPTION("ChromeOS EC LPC driver");
1// SPDX-License-Identifier: GPL-2.0
2// LPC interface for ChromeOS Embedded Controller
3//
4// Copyright (C) 2012-2015 Google, Inc
5//
6// This driver uses the ChromeOS EC byte-level message-based protocol for
7// communicating the keyboard state (which keys are pressed) from a keyboard EC
8// to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
9// but everything else (including deghosting) is done here. The main
10// motivation for this is to keep the EC firmware as simple as possible, since
11// it cannot be easily upgraded and EC flash/IRAM space is relatively
12// expensive.
13
14#include <linux/acpi.h>
15#include <linux/dmi.h>
16#include <linux/delay.h>
17#include <linux/io.h>
18#include <linux/interrupt.h>
19#include <linux/module.h>
20#include <linux/platform_data/cros_ec_commands.h>
21#include <linux/platform_data/cros_ec_proto.h>
22#include <linux/platform_device.h>
23#include <linux/printk.h>
24#include <linux/suspend.h>
25
26#include "cros_ec.h"
27#include "cros_ec_lpc_mec.h"
28
29#define DRV_NAME "cros_ec_lpcs"
30#define ACPI_DRV_NAME "GOOG0004"
31
32/* True if ACPI device is present */
33static bool cros_ec_lpc_acpi_device_found;
34
35/**
36 * struct lpc_driver_ops - LPC driver operations
37 * @read: Copy length bytes from EC address offset into buffer dest. Returns
38 * the 8-bit checksum of all bytes read.
39 * @write: Copy length bytes from buffer msg into EC address offset. Returns
40 * the 8-bit checksum of all bytes written.
41 */
42struct lpc_driver_ops {
43 u8 (*read)(unsigned int offset, unsigned int length, u8 *dest);
44 u8 (*write)(unsigned int offset, unsigned int length, const u8 *msg);
45};
46
47static struct lpc_driver_ops cros_ec_lpc_ops = { };
48
49/*
50 * A generic instance of the read function of struct lpc_driver_ops, used for
51 * the LPC EC.
52 */
53static u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length,
54 u8 *dest)
55{
56 int sum = 0;
57 int i;
58
59 for (i = 0; i < length; ++i) {
60 dest[i] = inb(offset + i);
61 sum += dest[i];
62 }
63
64 /* Return checksum of all bytes read */
65 return sum;
66}
67
68/*
69 * A generic instance of the write function of struct lpc_driver_ops, used for
70 * the LPC EC.
71 */
72static u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length,
73 const u8 *msg)
74{
75 int sum = 0;
76 int i;
77
78 for (i = 0; i < length; ++i) {
79 outb(msg[i], offset + i);
80 sum += msg[i];
81 }
82
83 /* Return checksum of all bytes written */
84 return sum;
85}
86
87/*
88 * An instance of the read function of struct lpc_driver_ops, used for the
89 * MEC variant of LPC EC.
90 */
91static u8 cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length,
92 u8 *dest)
93{
94 int in_range = cros_ec_lpc_mec_in_range(offset, length);
95
96 if (in_range < 0)
97 return 0;
98
99 return in_range ?
100 cros_ec_lpc_io_bytes_mec(MEC_IO_READ,
101 offset - EC_HOST_CMD_REGION0,
102 length, dest) :
103 cros_ec_lpc_read_bytes(offset, length, dest);
104}
105
106/*
107 * An instance of the write function of struct lpc_driver_ops, used for the
108 * MEC variant of LPC EC.
109 */
110static u8 cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length,
111 const u8 *msg)
112{
113 int in_range = cros_ec_lpc_mec_in_range(offset, length);
114
115 if (in_range < 0)
116 return 0;
117
118 return in_range ?
119 cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE,
120 offset - EC_HOST_CMD_REGION0,
121 length, (u8 *)msg) :
122 cros_ec_lpc_write_bytes(offset, length, msg);
123}
124
125static int ec_response_timed_out(void)
126{
127 unsigned long one_second = jiffies + HZ;
128 u8 data;
129
130 usleep_range(200, 300);
131 do {
132 if (!(cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_CMD, 1, &data) &
133 EC_LPC_STATUS_BUSY_MASK))
134 return 0;
135 usleep_range(100, 200);
136 } while (time_before(jiffies, one_second));
137
138 return 1;
139}
140
141static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
142 struct cros_ec_command *msg)
143{
144 struct ec_host_response response;
145 u8 sum;
146 int ret = 0;
147 u8 *dout;
148
149 ret = cros_ec_prepare_tx(ec, msg);
150 if (ret < 0)
151 goto done;
152
153 /* Write buffer */
154 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
155
156 /* Here we go */
157 sum = EC_COMMAND_PROTOCOL_3;
158 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
159
160 if (ec_response_timed_out()) {
161 dev_warn(ec->dev, "EC response timed out\n");
162 ret = -EIO;
163 goto done;
164 }
165
166 /* Check result */
167 msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
168 ret = cros_ec_check_result(ec, msg);
169 if (ret)
170 goto done;
171
172 /* Read back response */
173 dout = (u8 *)&response;
174 sum = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
175 dout);
176
177 msg->result = response.result;
178
179 if (response.data_len > msg->insize) {
180 dev_err(ec->dev,
181 "packet too long (%d bytes, expected %d)",
182 response.data_len, msg->insize);
183 ret = -EMSGSIZE;
184 goto done;
185 }
186
187 /* Read response and process checksum */
188 sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET +
189 sizeof(response), response.data_len,
190 msg->data);
191
192 if (sum) {
193 dev_err(ec->dev,
194 "bad packet checksum %02x\n",
195 response.checksum);
196 ret = -EBADMSG;
197 goto done;
198 }
199
200 /* Return actual amount of data received */
201 ret = response.data_len;
202done:
203 return ret;
204}
205
206static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
207 struct cros_ec_command *msg)
208{
209 struct ec_lpc_host_args args;
210 u8 sum;
211 int ret = 0;
212
213 if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
214 msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
215 dev_err(ec->dev,
216 "invalid buffer sizes (out %d, in %d)\n",
217 msg->outsize, msg->insize);
218 return -EINVAL;
219 }
220
221 /* Now actually send the command to the EC and get the result */
222 args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
223 args.command_version = msg->version;
224 args.data_size = msg->outsize;
225
226 /* Initialize checksum */
227 sum = msg->command + args.flags + args.command_version + args.data_size;
228
229 /* Copy data and update checksum */
230 sum += cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
231 msg->data);
232
233 /* Finalize checksum and write args */
234 args.checksum = sum;
235 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
236 (u8 *)&args);
237
238 /* Here we go */
239 sum = msg->command;
240 cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
241
242 if (ec_response_timed_out()) {
243 dev_warn(ec->dev, "EC response timed out\n");
244 ret = -EIO;
245 goto done;
246 }
247
248 /* Check result */
249 msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
250 ret = cros_ec_check_result(ec, msg);
251 if (ret)
252 goto done;
253
254 /* Read back args */
255 cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args);
256
257 if (args.data_size > msg->insize) {
258 dev_err(ec->dev,
259 "packet too long (%d bytes, expected %d)",
260 args.data_size, msg->insize);
261 ret = -ENOSPC;
262 goto done;
263 }
264
265 /* Start calculating response checksum */
266 sum = msg->command + args.flags + args.command_version + args.data_size;
267
268 /* Read response and update checksum */
269 sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PARAM, args.data_size,
270 msg->data);
271
272 /* Verify checksum */
273 if (args.checksum != sum) {
274 dev_err(ec->dev,
275 "bad packet checksum, expected %02x, got %02x\n",
276 args.checksum, sum);
277 ret = -EBADMSG;
278 goto done;
279 }
280
281 /* Return actual amount of data received */
282 ret = args.data_size;
283done:
284 return ret;
285}
286
287/* Returns num bytes read, or negative on error. Doesn't need locking. */
288static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
289 unsigned int bytes, void *dest)
290{
291 int i = offset;
292 char *s = dest;
293 int cnt = 0;
294
295 if (offset >= EC_MEMMAP_SIZE - bytes)
296 return -EINVAL;
297
298 /* fixed length */
299 if (bytes) {
300 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
301 return bytes;
302 }
303
304 /* string */
305 for (; i < EC_MEMMAP_SIZE; i++, s++) {
306 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + i, 1, s);
307 cnt++;
308 if (!*s)
309 break;
310 }
311
312 return cnt;
313}
314
315static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
316{
317 struct cros_ec_device *ec_dev = data;
318 bool ec_has_more_events;
319 int ret;
320
321 ec_dev->last_event_time = cros_ec_get_time_ns();
322
323 if (ec_dev->mkbp_event_supported)
324 do {
325 ret = cros_ec_get_next_event(ec_dev, NULL,
326 &ec_has_more_events);
327 if (ret > 0)
328 blocking_notifier_call_chain(
329 &ec_dev->event_notifier, 0,
330 ec_dev);
331 } while (ec_has_more_events);
332
333 if (value == ACPI_NOTIFY_DEVICE_WAKE)
334 pm_system_wakeup();
335}
336
337static int cros_ec_lpc_probe(struct platform_device *pdev)
338{
339 struct device *dev = &pdev->dev;
340 struct acpi_device *adev;
341 acpi_status status;
342 struct cros_ec_device *ec_dev;
343 u8 buf[2];
344 int irq, ret;
345
346 /*
347 * The Framework Laptop (and possibly other non-ChromeOS devices)
348 * only exposes the eight I/O ports that are required for the Microchip EC.
349 * Requesting a larger reservation will fail.
350 */
351 if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
352 EC_HOST_CMD_MEC_REGION_SIZE, dev_name(dev))) {
353 dev_err(dev, "couldn't reserve MEC region\n");
354 return -EBUSY;
355 }
356
357 cros_ec_lpc_mec_init(EC_HOST_CMD_REGION0,
358 EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE);
359
360 /*
361 * Read the mapped ID twice, the first one is assuming the
362 * EC is a Microchip Embedded Controller (MEC) variant, if the
363 * protocol fails, fallback to the non MEC variant and try to
364 * read again the ID.
365 */
366 cros_ec_lpc_ops.read = cros_ec_lpc_mec_read_bytes;
367 cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;
368 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
369 if (buf[0] != 'E' || buf[1] != 'C') {
370 if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
371 dev_name(dev))) {
372 dev_err(dev, "couldn't reserve memmap region\n");
373 return -EBUSY;
374 }
375
376 /* Re-assign read/write operations for the non MEC variant */
377 cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;
378 cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
379 cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2,
380 buf);
381 if (buf[0] != 'E' || buf[1] != 'C') {
382 dev_err(dev, "EC ID not detected\n");
383 return -ENODEV;
384 }
385
386 /* Reserve the remaining I/O ports required by the non-MEC protocol. */
387 if (!devm_request_region(dev, EC_HOST_CMD_REGION0 + EC_HOST_CMD_MEC_REGION_SIZE,
388 EC_HOST_CMD_REGION_SIZE - EC_HOST_CMD_MEC_REGION_SIZE,
389 dev_name(dev))) {
390 dev_err(dev, "couldn't reserve remainder of region0\n");
391 return -EBUSY;
392 }
393 if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
394 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
395 dev_err(dev, "couldn't reserve region1\n");
396 return -EBUSY;
397 }
398 }
399
400 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
401 if (!ec_dev)
402 return -ENOMEM;
403
404 platform_set_drvdata(pdev, ec_dev);
405 ec_dev->dev = dev;
406 ec_dev->phys_name = dev_name(dev);
407 ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
408 ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
409 ec_dev->cmd_readmem = cros_ec_lpc_readmem;
410 ec_dev->din_size = sizeof(struct ec_host_response) +
411 sizeof(struct ec_response_get_protocol_info);
412 ec_dev->dout_size = sizeof(struct ec_host_request);
413
414 /*
415 * Some boards do not have an IRQ allotted for cros_ec_lpc,
416 * which makes ENXIO an expected (and safe) scenario.
417 */
418 irq = platform_get_irq_optional(pdev, 0);
419 if (irq > 0)
420 ec_dev->irq = irq;
421 else if (irq != -ENXIO) {
422 dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq);
423 return irq;
424 }
425
426 ret = cros_ec_register(ec_dev);
427 if (ret) {
428 dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
429 return ret;
430 }
431
432 /*
433 * Connect a notify handler to process MKBP messages if we have a
434 * companion ACPI device.
435 */
436 adev = ACPI_COMPANION(dev);
437 if (adev) {
438 status = acpi_install_notify_handler(adev->handle,
439 ACPI_ALL_NOTIFY,
440 cros_ec_lpc_acpi_notify,
441 ec_dev);
442 if (ACPI_FAILURE(status))
443 dev_warn(dev, "Failed to register notifier %08x\n",
444 status);
445 }
446
447 return 0;
448}
449
450static int cros_ec_lpc_remove(struct platform_device *pdev)
451{
452 struct cros_ec_device *ec_dev = platform_get_drvdata(pdev);
453 struct acpi_device *adev;
454
455 adev = ACPI_COMPANION(&pdev->dev);
456 if (adev)
457 acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
458 cros_ec_lpc_acpi_notify);
459
460 cros_ec_unregister(ec_dev);
461
462 return 0;
463}
464
465static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
466 { ACPI_DRV_NAME, 0 },
467 { }
468};
469MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
470
471static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
472 {
473 /*
474 * Today all Chromebooks/boxes ship with Google_* as version and
475 * coreboot as bios vendor. No other systems with this
476 * combination are known to date.
477 */
478 .matches = {
479 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
480 DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
481 },
482 },
483 {
484 /*
485 * If the box is running custom coreboot firmware then the
486 * DMI BIOS version string will not be matched by "Google_",
487 * but the system vendor string will still be matched by
488 * "GOOGLE".
489 */
490 .matches = {
491 DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
492 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
493 },
494 },
495 {
496 /* x86-link, the Chromebook Pixel. */
497 .matches = {
498 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
499 DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
500 },
501 },
502 {
503 /* x86-samus, the Chromebook Pixel 2. */
504 .matches = {
505 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
506 DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
507 },
508 },
509 {
510 /* x86-peppy, the Acer C720 Chromebook. */
511 .matches = {
512 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
513 DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
514 },
515 },
516 {
517 /* x86-glimmer, the Lenovo Thinkpad Yoga 11e. */
518 .matches = {
519 DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
520 DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"),
521 },
522 },
523 /* A small number of non-Chromebook/box machines also use the ChromeOS EC */
524 {
525 /* the Framework Laptop */
526 .matches = {
527 DMI_MATCH(DMI_SYS_VENDOR, "Framework"),
528 DMI_MATCH(DMI_PRODUCT_NAME, "Laptop"),
529 },
530 },
531 { /* sentinel */ }
532};
533MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
534
535#ifdef CONFIG_PM_SLEEP
536static int cros_ec_lpc_suspend(struct device *dev)
537{
538 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
539
540 return cros_ec_suspend(ec_dev);
541}
542
543static int cros_ec_lpc_resume(struct device *dev)
544{
545 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
546
547 return cros_ec_resume(ec_dev);
548}
549#endif
550
551static const struct dev_pm_ops cros_ec_lpc_pm_ops = {
552 SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
553};
554
555static struct platform_driver cros_ec_lpc_driver = {
556 .driver = {
557 .name = DRV_NAME,
558 .acpi_match_table = cros_ec_lpc_acpi_device_ids,
559 .pm = &cros_ec_lpc_pm_ops,
560 /*
561 * ACPI child devices may probe before us, and they racily
562 * check our drvdata pointer. Force synchronous probe until
563 * those races are resolved.
564 */
565 .probe_type = PROBE_FORCE_SYNCHRONOUS,
566 },
567 .probe = cros_ec_lpc_probe,
568 .remove = cros_ec_lpc_remove,
569};
570
571static struct platform_device cros_ec_lpc_device = {
572 .name = DRV_NAME
573};
574
575static acpi_status cros_ec_lpc_parse_device(acpi_handle handle, u32 level,
576 void *context, void **retval)
577{
578 *(bool *)context = true;
579 return AE_CTRL_TERMINATE;
580}
581
582static int __init cros_ec_lpc_init(void)
583{
584 int ret;
585 acpi_status status;
586
587 status = acpi_get_devices(ACPI_DRV_NAME, cros_ec_lpc_parse_device,
588 &cros_ec_lpc_acpi_device_found, NULL);
589 if (ACPI_FAILURE(status))
590 pr_warn(DRV_NAME ": Looking for %s failed\n", ACPI_DRV_NAME);
591
592 if (!cros_ec_lpc_acpi_device_found &&
593 !dmi_check_system(cros_ec_lpc_dmi_table)) {
594 pr_err(DRV_NAME ": unsupported system.\n");
595 return -ENODEV;
596 }
597
598 /* Register the driver */
599 ret = platform_driver_register(&cros_ec_lpc_driver);
600 if (ret) {
601 pr_err(DRV_NAME ": can't register driver: %d\n", ret);
602 return ret;
603 }
604
605 if (!cros_ec_lpc_acpi_device_found) {
606 /* Register the device, and it'll get hooked up automatically */
607 ret = platform_device_register(&cros_ec_lpc_device);
608 if (ret) {
609 pr_err(DRV_NAME ": can't register device: %d\n", ret);
610 platform_driver_unregister(&cros_ec_lpc_driver);
611 }
612 }
613
614 return ret;
615}
616
617static void __exit cros_ec_lpc_exit(void)
618{
619 if (!cros_ec_lpc_acpi_device_found)
620 platform_device_unregister(&cros_ec_lpc_device);
621 platform_driver_unregister(&cros_ec_lpc_driver);
622}
623
624module_init(cros_ec_lpc_init);
625module_exit(cros_ec_lpc_exit);
626
627MODULE_LICENSE("GPL");
628MODULE_DESCRIPTION("ChromeOS EC LPC driver");