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1/*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
4 * Vincent Abriou <vincent.abriou@st.com>
5 * for STMicroelectronics.
6 * License terms: GNU General Public License (GPL), version 2
7 */
8
9#include <linux/clk.h>
10#include <linux/component.h>
11#include <linux/module.h>
12#include <linux/of_platform.h>
13#include <linux/platform_device.h>
14#include <linux/reset.h>
15
16#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18
19#include "sti_crtc.h"
20#include "sti_vtg.h"
21
22/* glue registers */
23#define TVO_CSC_MAIN_M0 0x000
24#define TVO_CSC_MAIN_M1 0x004
25#define TVO_CSC_MAIN_M2 0x008
26#define TVO_CSC_MAIN_M3 0x00c
27#define TVO_CSC_MAIN_M4 0x010
28#define TVO_CSC_MAIN_M5 0x014
29#define TVO_CSC_MAIN_M6 0x018
30#define TVO_CSC_MAIN_M7 0x01c
31#define TVO_MAIN_IN_VID_FORMAT 0x030
32#define TVO_CSC_AUX_M0 0x100
33#define TVO_CSC_AUX_M1 0x104
34#define TVO_CSC_AUX_M2 0x108
35#define TVO_CSC_AUX_M3 0x10c
36#define TVO_CSC_AUX_M4 0x110
37#define TVO_CSC_AUX_M5 0x114
38#define TVO_CSC_AUX_M6 0x118
39#define TVO_CSC_AUX_M7 0x11c
40#define TVO_AUX_IN_VID_FORMAT 0x130
41#define TVO_VIP_HDF 0x400
42#define TVO_HD_SYNC_SEL 0x418
43#define TVO_HD_DAC_CFG_OFF 0x420
44#define TVO_VIP_HDMI 0x500
45#define TVO_HDMI_FORCE_COLOR_0 0x504
46#define TVO_HDMI_FORCE_COLOR_1 0x508
47#define TVO_HDMI_CLIP_VALUE_B_CB 0x50c
48#define TVO_HDMI_CLIP_VALUE_Y_G 0x510
49#define TVO_HDMI_CLIP_VALUE_R_CR 0x514
50#define TVO_HDMI_SYNC_SEL 0x518
51#define TVO_HDMI_DFV_OBS 0x540
52#define TVO_VIP_DVO 0x600
53#define TVO_DVO_SYNC_SEL 0x618
54#define TVO_DVO_CONFIG 0x620
55
56#define TVO_IN_FMT_SIGNED BIT(0)
57#define TVO_SYNC_EXT BIT(4)
58
59#define TVO_VIP_REORDER_R_SHIFT 24
60#define TVO_VIP_REORDER_G_SHIFT 20
61#define TVO_VIP_REORDER_B_SHIFT 16
62#define TVO_VIP_REORDER_MASK 0x3
63#define TVO_VIP_REORDER_Y_G_SEL 0
64#define TVO_VIP_REORDER_CB_B_SEL 1
65#define TVO_VIP_REORDER_CR_R_SEL 2
66
67#define TVO_VIP_CLIP_SHIFT 8
68#define TVO_VIP_CLIP_MASK 0x7
69#define TVO_VIP_CLIP_DISABLED 0
70#define TVO_VIP_CLIP_EAV_SAV 1
71#define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
72#define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
73#define TVO_VIP_CLIP_PROG_RANGE 4
74
75#define TVO_VIP_RND_SHIFT 4
76#define TVO_VIP_RND_MASK 0x3
77#define TVO_VIP_RND_8BIT_ROUNDED 0
78#define TVO_VIP_RND_10BIT_ROUNDED 1
79#define TVO_VIP_RND_12BIT_ROUNDED 2
80
81#define TVO_VIP_SEL_INPUT_MASK 0xf
82#define TVO_VIP_SEL_INPUT_MAIN 0x0
83#define TVO_VIP_SEL_INPUT_AUX 0x8
84#define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf
85#define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1
86#define TVO_VIP_SEL_INPUT_BYPASSED 1
87
88#define TVO_SYNC_MAIN_VTG_SET_REF 0x00
89#define TVO_SYNC_AUX_VTG_SET_REF 0x10
90
91#define TVO_SYNC_HD_DCS_SHIFT 8
92
93#define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8
94#define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16
95
96#define ENCODER_CRTC_MASK (BIT(0) | BIT(1))
97
98#define TVO_MIN_HD_HEIGHT 720
99
100/* enum listing the supported output data format */
101enum sti_tvout_video_out_type {
102 STI_TVOUT_VIDEO_OUT_RGB,
103 STI_TVOUT_VIDEO_OUT_YUV,
104};
105
106struct sti_tvout {
107 struct device *dev;
108 struct drm_device *drm_dev;
109 void __iomem *regs;
110 struct reset_control *reset;
111 struct drm_encoder *hdmi;
112 struct drm_encoder *hda;
113 struct drm_encoder *dvo;
114};
115
116struct sti_tvout_encoder {
117 struct drm_encoder encoder;
118 struct sti_tvout *tvout;
119};
120
121#define to_sti_tvout_encoder(x) \
122 container_of(x, struct sti_tvout_encoder, encoder)
123
124#define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
125
126/* preformatter conversion matrix */
127static const u32 rgb_to_ycbcr_601[8] = {
128 0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
129 0x0000082E, 0x00002000, 0x00002000, 0x00000000
130};
131
132/* 709 RGB to YCbCr */
133static const u32 rgb_to_ycbcr_709[8] = {
134 0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
135 0x0000082F, 0x00002000, 0x00002000, 0x00000000
136};
137
138static u32 tvout_read(struct sti_tvout *tvout, int offset)
139{
140 return readl(tvout->regs + offset);
141}
142
143static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
144{
145 writel(val, tvout->regs + offset);
146}
147
148/**
149 * Set the clipping mode of a VIP
150 *
151 * @tvout: tvout structure
152 * @reg: register to set
153 * @cr_r:
154 * @y_g:
155 * @cb_b:
156 */
157static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
158 u32 cr_r, u32 y_g, u32 cb_b)
159{
160 u32 val = tvout_read(tvout, reg);
161
162 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
163 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
164 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
165 val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
166 val |= y_g << TVO_VIP_REORDER_G_SHIFT;
167 val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
168
169 tvout_write(tvout, val, reg);
170}
171
172/**
173 * Set the clipping mode of a VIP
174 *
175 * @tvout: tvout structure
176 * @reg: register to set
177 * @range: clipping range
178 */
179static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
180{
181 u32 val = tvout_read(tvout, reg);
182
183 val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
184 val |= range << TVO_VIP_CLIP_SHIFT;
185 tvout_write(tvout, val, reg);
186}
187
188/**
189 * Set the rounded value of a VIP
190 *
191 * @tvout: tvout structure
192 * @reg: register to set
193 * @rnd: rounded val per component
194 */
195static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
196{
197 u32 val = tvout_read(tvout, reg);
198
199 val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
200 val |= rnd << TVO_VIP_RND_SHIFT;
201 tvout_write(tvout, val, reg);
202}
203
204/**
205 * Select the VIP input
206 *
207 * @tvout: tvout structure
208 * @reg: register to set
209 * @main_path: main or auxiliary path
210 * @sel_input_logic_inverted: need to invert the logic
211 * @sel_input: selected_input (main/aux + conv)
212 */
213static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
214 int reg,
215 bool main_path,
216 bool sel_input_logic_inverted,
217 enum sti_tvout_video_out_type video_out)
218{
219 u32 sel_input;
220 u32 val = tvout_read(tvout, reg);
221
222 if (main_path)
223 sel_input = TVO_VIP_SEL_INPUT_MAIN;
224 else
225 sel_input = TVO_VIP_SEL_INPUT_AUX;
226
227 switch (video_out) {
228 case STI_TVOUT_VIDEO_OUT_RGB:
229 sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
230 break;
231 case STI_TVOUT_VIDEO_OUT_YUV:
232 sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
233 break;
234 }
235
236 /* on stih407 chip the sel_input bypass mode logic is inverted */
237 if (sel_input_logic_inverted)
238 sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
239
240 val &= ~TVO_VIP_SEL_INPUT_MASK;
241 val |= sel_input;
242 tvout_write(tvout, val, reg);
243}
244
245/**
246 * Select the input video signed or unsigned
247 *
248 * @tvout: tvout structure
249 * @reg: register to set
250 * @in_vid_signed: used video input format
251 */
252static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
253 int reg, u32 in_vid_fmt)
254{
255 u32 val = tvout_read(tvout, reg);
256
257 val &= ~TVO_IN_FMT_SIGNED;
258 val |= in_vid_fmt;
259 tvout_write(tvout, val, reg);
260}
261
262/**
263 * Set preformatter matrix
264 *
265 * @tvout: tvout structure
266 * @mode: display mode structure
267 */
268static void tvout_preformatter_set_matrix(struct sti_tvout *tvout,
269 struct drm_display_mode *mode)
270{
271 unsigned int i;
272 const u32 *pf_matrix;
273
274 if (mode->vdisplay >= TVO_MIN_HD_HEIGHT)
275 pf_matrix = rgb_to_ycbcr_709;
276 else
277 pf_matrix = rgb_to_ycbcr_601;
278
279 for (i = 0; i < 8; i++) {
280 tvout_write(tvout, *(pf_matrix + i),
281 TVO_CSC_MAIN_M0 + (i * 4));
282 tvout_write(tvout, *(pf_matrix + i),
283 TVO_CSC_AUX_M0 + (i * 4));
284 }
285}
286
287/**
288 * Start VIP block for DVO output
289 *
290 * @tvout: pointer on tvout structure
291 * @main_path: true if main path has to be used in the vip configuration
292 * else aux path is used.
293 */
294static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path)
295{
296 struct device_node *node = tvout->dev->of_node;
297 bool sel_input_logic_inverted = false;
298 u32 tvo_in_vid_format;
299 int val, tmp;
300
301 dev_dbg(tvout->dev, "%s\n", __func__);
302
303 if (main_path) {
304 DRM_DEBUG_DRIVER("main vip for DVO\n");
305 /* Select the input sync for dvo */
306 tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO;
307 val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
308 val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
309 val |= tmp;
310 tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
311 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
312 } else {
313 DRM_DEBUG_DRIVER("aux vip for DVO\n");
314 /* Select the input sync for dvo */
315 tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO;
316 val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
317 val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
318 val |= tmp;
319 tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
320 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
321 }
322
323 /* Set color channel order */
324 tvout_vip_set_color_order(tvout, TVO_VIP_DVO,
325 TVO_VIP_REORDER_CR_R_SEL,
326 TVO_VIP_REORDER_Y_G_SEL,
327 TVO_VIP_REORDER_CB_B_SEL);
328
329 /* Set clipping mode */
330 tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, TVO_VIP_CLIP_DISABLED);
331
332 /* Set round mode (rounded to 8-bit per component) */
333 tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED);
334
335 if (of_device_is_compatible(node, "st,stih407-tvout")) {
336 /* Set input video format */
337 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
338 TVO_IN_FMT_SIGNED);
339 sel_input_logic_inverted = true;
340 }
341
342 /* Input selection */
343 tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path,
344 sel_input_logic_inverted,
345 STI_TVOUT_VIDEO_OUT_RGB);
346}
347
348/**
349 * Start VIP block for HDMI output
350 *
351 * @tvout: pointer on tvout structure
352 * @main_path: true if main path has to be used in the vip configuration
353 * else aux path is used.
354 */
355static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
356{
357 struct device_node *node = tvout->dev->of_node;
358 bool sel_input_logic_inverted = false;
359 u32 tvo_in_vid_format;
360
361 dev_dbg(tvout->dev, "%s\n", __func__);
362
363 if (main_path) {
364 DRM_DEBUG_DRIVER("main vip for hdmi\n");
365 /* select the input sync for hdmi */
366 tvout_write(tvout,
367 TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI,
368 TVO_HDMI_SYNC_SEL);
369 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
370 } else {
371 DRM_DEBUG_DRIVER("aux vip for hdmi\n");
372 /* select the input sync for hdmi */
373 tvout_write(tvout,
374 TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI,
375 TVO_HDMI_SYNC_SEL);
376 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
377 }
378
379 /* set color channel order */
380 tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
381 TVO_VIP_REORDER_CR_R_SEL,
382 TVO_VIP_REORDER_Y_G_SEL,
383 TVO_VIP_REORDER_CB_B_SEL);
384
385 /* set clipping mode */
386 tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, TVO_VIP_CLIP_DISABLED);
387
388 /* set round mode (rounded to 8-bit per component) */
389 tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
390
391 if (of_device_is_compatible(node, "st,stih407-tvout")) {
392 /* set input video format */
393 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
394 TVO_IN_FMT_SIGNED);
395 sel_input_logic_inverted = true;
396 }
397
398 /* input selection */
399 tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
400 sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB);
401}
402
403/**
404 * Start HDF VIP and HD DAC
405 *
406 * @tvout: pointer on tvout structure
407 * @main_path: true if main path has to be used in the vip configuration
408 * else aux path is used.
409 */
410static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
411{
412 struct device_node *node = tvout->dev->of_node;
413 bool sel_input_logic_inverted = false;
414 u32 tvo_in_vid_format;
415 int val;
416
417 dev_dbg(tvout->dev, "%s\n", __func__);
418
419 if (main_path) {
420 DRM_DEBUG_DRIVER("main vip for HDF\n");
421 /* Select the input sync for HD analog and HD DCS */
422 val = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
423 val = val << TVO_SYNC_HD_DCS_SHIFT;
424 val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF;
425 tvout_write(tvout, val, TVO_HD_SYNC_SEL);
426 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
427 } else {
428 DRM_DEBUG_DRIVER("aux vip for HDF\n");
429 /* Select the input sync for HD analog and HD DCS */
430 val = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
431 val = val << TVO_SYNC_HD_DCS_SHIFT;
432 val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF;
433 tvout_write(tvout, val, TVO_HD_SYNC_SEL);
434 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
435 }
436
437 /* set color channel order */
438 tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
439 TVO_VIP_REORDER_CR_R_SEL,
440 TVO_VIP_REORDER_Y_G_SEL,
441 TVO_VIP_REORDER_CB_B_SEL);
442
443 /* set clipping mode */
444 tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_DISABLED);
445
446 /* set round mode (rounded to 10-bit per component) */
447 tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
448
449 if (of_device_is_compatible(node, "st,stih407-tvout")) {
450 /* set input video format */
451 tvout_vip_set_in_vid_fmt(tvout,
452 tvo_in_vid_format, TVO_IN_FMT_SIGNED);
453 sel_input_logic_inverted = true;
454 }
455
456 /* Input selection */
457 tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
458 sel_input_logic_inverted,
459 STI_TVOUT_VIDEO_OUT_YUV);
460
461 /* power up HD DAC */
462 tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
463}
464
465#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
466 readl(tvout->regs + reg))
467
468static void tvout_dbg_vip(struct seq_file *s, int val)
469{
470 int r, g, b, tmp, mask;
471 char *const reorder[] = {"Y_G", "Cb_B", "Cr_R"};
472 char *const clipping[] = {"No", "EAV/SAV", "Limited range RGB/Y",
473 "Limited range Cb/Cr", "decided by register"};
474 char *const round[] = {"8-bit", "10-bit", "12-bit"};
475 char *const input_sel[] = {"Main (color matrix enabled)",
476 "Main (color matrix by-passed)",
477 "", "", "", "", "", "",
478 "Aux (color matrix enabled)",
479 "Aux (color matrix by-passed)",
480 "", "", "", "", "", "Force value"};
481
482 seq_puts(s, "\t");
483 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT;
484 r = (val & mask) >> TVO_VIP_REORDER_R_SHIFT;
485 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT;
486 g = (val & mask) >> TVO_VIP_REORDER_G_SHIFT;
487 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT;
488 b = (val & mask) >> TVO_VIP_REORDER_B_SHIFT;
489 seq_printf(s, "%-24s %s->%s %s->%s %s->%s\n", "Reorder:",
490 reorder[r], reorder[TVO_VIP_REORDER_CR_R_SEL],
491 reorder[g], reorder[TVO_VIP_REORDER_Y_G_SEL],
492 reorder[b], reorder[TVO_VIP_REORDER_CB_B_SEL]);
493 seq_puts(s, "\t\t\t\t\t");
494 mask = TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT;
495 tmp = (val & mask) >> TVO_VIP_CLIP_SHIFT;
496 seq_printf(s, "%-24s %s\n", "Clipping:", clipping[tmp]);
497 seq_puts(s, "\t\t\t\t\t");
498 mask = TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT;
499 tmp = (val & mask) >> TVO_VIP_RND_SHIFT;
500 seq_printf(s, "%-24s input data rounded to %s per component\n",
501 "Round:", round[tmp]);
502 seq_puts(s, "\t\t\t\t\t");
503 tmp = (val & TVO_VIP_SEL_INPUT_MASK);
504 seq_printf(s, "%-24s %s", "Input selection:", input_sel[tmp]);
505}
506
507static void tvout_dbg_hd_dac_cfg(struct seq_file *s, int val)
508{
509 seq_printf(s, "\t%-24s %s", "HD DAC:",
510 val & 1 ? "disabled" : "enabled");
511}
512
513static int tvout_dbg_show(struct seq_file *s, void *data)
514{
515 struct drm_info_node *node = s->private;
516 struct sti_tvout *tvout = (struct sti_tvout *)node->info_ent->data;
517 struct drm_device *dev = node->minor->dev;
518 struct drm_crtc *crtc;
519 int ret;
520
521 ret = mutex_lock_interruptible(&dev->struct_mutex);
522 if (ret)
523 return ret;
524
525 seq_printf(s, "TVOUT: (vaddr = 0x%p)", tvout->regs);
526
527 seq_puts(s, "\n\n HDMI encoder: ");
528 crtc = tvout->hdmi->crtc;
529 if (crtc) {
530 seq_printf(s, "connected to %s path",
531 sti_crtc_is_main(crtc) ? "main" : "aux");
532 DBGFS_DUMP(TVO_HDMI_SYNC_SEL);
533 DBGFS_DUMP(TVO_VIP_HDMI);
534 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI));
535 } else {
536 seq_puts(s, "disabled");
537 }
538
539 seq_puts(s, "\n\n DVO encoder: ");
540 crtc = tvout->dvo->crtc;
541 if (crtc) {
542 seq_printf(s, "connected to %s path",
543 sti_crtc_is_main(crtc) ? "main" : "aux");
544 DBGFS_DUMP(TVO_DVO_SYNC_SEL);
545 DBGFS_DUMP(TVO_DVO_CONFIG);
546 DBGFS_DUMP(TVO_VIP_DVO);
547 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO));
548 } else {
549 seq_puts(s, "disabled");
550 }
551
552 seq_puts(s, "\n\n HDA encoder: ");
553 crtc = tvout->hda->crtc;
554 if (crtc) {
555 seq_printf(s, "connected to %s path",
556 sti_crtc_is_main(crtc) ? "main" : "aux");
557 DBGFS_DUMP(TVO_HD_SYNC_SEL);
558 DBGFS_DUMP(TVO_HD_DAC_CFG_OFF);
559 tvout_dbg_hd_dac_cfg(s,
560 readl(tvout->regs + TVO_HD_DAC_CFG_OFF));
561 DBGFS_DUMP(TVO_VIP_HDF);
562 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF));
563 } else {
564 seq_puts(s, "disabled");
565 }
566
567 seq_puts(s, "\n\n main path configuration");
568 DBGFS_DUMP(TVO_CSC_MAIN_M0);
569 DBGFS_DUMP(TVO_CSC_MAIN_M1);
570 DBGFS_DUMP(TVO_CSC_MAIN_M2);
571 DBGFS_DUMP(TVO_CSC_MAIN_M3);
572 DBGFS_DUMP(TVO_CSC_MAIN_M4);
573 DBGFS_DUMP(TVO_CSC_MAIN_M5);
574 DBGFS_DUMP(TVO_CSC_MAIN_M6);
575 DBGFS_DUMP(TVO_CSC_MAIN_M7);
576 DBGFS_DUMP(TVO_MAIN_IN_VID_FORMAT);
577
578 seq_puts(s, "\n\n auxiliary path configuration");
579 DBGFS_DUMP(TVO_CSC_AUX_M0);
580 DBGFS_DUMP(TVO_CSC_AUX_M2);
581 DBGFS_DUMP(TVO_CSC_AUX_M3);
582 DBGFS_DUMP(TVO_CSC_AUX_M4);
583 DBGFS_DUMP(TVO_CSC_AUX_M5);
584 DBGFS_DUMP(TVO_CSC_AUX_M6);
585 DBGFS_DUMP(TVO_CSC_AUX_M7);
586 DBGFS_DUMP(TVO_AUX_IN_VID_FORMAT);
587 seq_puts(s, "\n");
588
589 mutex_unlock(&dev->struct_mutex);
590 return 0;
591}
592
593static struct drm_info_list tvout_debugfs_files[] = {
594 { "tvout", tvout_dbg_show, 0, NULL },
595};
596
597static void tvout_debugfs_exit(struct sti_tvout *tvout, struct drm_minor *minor)
598{
599 drm_debugfs_remove_files(tvout_debugfs_files,
600 ARRAY_SIZE(tvout_debugfs_files),
601 minor);
602}
603
604static int tvout_debugfs_init(struct sti_tvout *tvout, struct drm_minor *minor)
605{
606 unsigned int i;
607
608 for (i = 0; i < ARRAY_SIZE(tvout_debugfs_files); i++)
609 tvout_debugfs_files[i].data = tvout;
610
611 return drm_debugfs_create_files(tvout_debugfs_files,
612 ARRAY_SIZE(tvout_debugfs_files),
613 minor->debugfs_root, minor);
614}
615
616static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
617{
618}
619
620static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
621 struct drm_display_mode *mode,
622 struct drm_display_mode *adjusted_mode)
623{
624}
625
626static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
627{
628 struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
629
630 drm_encoder_cleanup(encoder);
631 kfree(sti_encoder);
632}
633
634static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
635 .destroy = sti_tvout_encoder_destroy,
636};
637
638static void sti_dvo_encoder_enable(struct drm_encoder *encoder)
639{
640 struct sti_tvout *tvout = to_sti_tvout(encoder);
641
642 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
643
644 tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc));
645}
646
647static void sti_dvo_encoder_disable(struct drm_encoder *encoder)
648{
649 struct sti_tvout *tvout = to_sti_tvout(encoder);
650
651 /* Reset VIP register */
652 tvout_write(tvout, 0x0, TVO_VIP_DVO);
653}
654
655static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = {
656 .dpms = sti_tvout_encoder_dpms,
657 .mode_set = sti_tvout_encoder_mode_set,
658 .enable = sti_dvo_encoder_enable,
659 .disable = sti_dvo_encoder_disable,
660};
661
662static struct drm_encoder *
663sti_tvout_create_dvo_encoder(struct drm_device *dev,
664 struct sti_tvout *tvout)
665{
666 struct sti_tvout_encoder *encoder;
667 struct drm_encoder *drm_encoder;
668
669 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
670 if (!encoder)
671 return NULL;
672
673 encoder->tvout = tvout;
674
675 drm_encoder = (struct drm_encoder *)encoder;
676
677 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
678 drm_encoder->possible_clones = 1 << 0;
679
680 drm_encoder_init(dev, drm_encoder,
681 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS,
682 NULL);
683
684 drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs);
685
686 return drm_encoder;
687}
688
689static void sti_hda_encoder_enable(struct drm_encoder *encoder)
690{
691 struct sti_tvout *tvout = to_sti_tvout(encoder);
692
693 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
694
695 tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc));
696}
697
698static void sti_hda_encoder_disable(struct drm_encoder *encoder)
699{
700 struct sti_tvout *tvout = to_sti_tvout(encoder);
701
702 /* reset VIP register */
703 tvout_write(tvout, 0x0, TVO_VIP_HDF);
704
705 /* power down HD DAC */
706 tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
707}
708
709static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
710 .dpms = sti_tvout_encoder_dpms,
711 .mode_set = sti_tvout_encoder_mode_set,
712 .commit = sti_hda_encoder_enable,
713 .disable = sti_hda_encoder_disable,
714};
715
716static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
717 struct sti_tvout *tvout)
718{
719 struct sti_tvout_encoder *encoder;
720 struct drm_encoder *drm_encoder;
721
722 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
723 if (!encoder)
724 return NULL;
725
726 encoder->tvout = tvout;
727
728 drm_encoder = (struct drm_encoder *) encoder;
729
730 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
731 drm_encoder->possible_clones = 1 << 0;
732
733 drm_encoder_init(dev, drm_encoder,
734 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
735
736 drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
737
738 return drm_encoder;
739}
740
741static void sti_hdmi_encoder_enable(struct drm_encoder *encoder)
742{
743 struct sti_tvout *tvout = to_sti_tvout(encoder);
744
745 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
746
747 tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc));
748}
749
750static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
751{
752 struct sti_tvout *tvout = to_sti_tvout(encoder);
753
754 /* reset VIP register */
755 tvout_write(tvout, 0x0, TVO_VIP_HDMI);
756}
757
758static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
759 .dpms = sti_tvout_encoder_dpms,
760 .mode_set = sti_tvout_encoder_mode_set,
761 .commit = sti_hdmi_encoder_enable,
762 .disable = sti_hdmi_encoder_disable,
763};
764
765static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
766 struct sti_tvout *tvout)
767{
768 struct sti_tvout_encoder *encoder;
769 struct drm_encoder *drm_encoder;
770
771 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
772 if (!encoder)
773 return NULL;
774
775 encoder->tvout = tvout;
776
777 drm_encoder = (struct drm_encoder *) encoder;
778
779 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
780 drm_encoder->possible_clones = 1 << 1;
781
782 drm_encoder_init(dev, drm_encoder,
783 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL);
784
785 drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
786
787 return drm_encoder;
788}
789
790static void sti_tvout_create_encoders(struct drm_device *dev,
791 struct sti_tvout *tvout)
792{
793 tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
794 tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
795 tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout);
796}
797
798static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
799{
800 if (tvout->hdmi)
801 drm_encoder_cleanup(tvout->hdmi);
802 tvout->hdmi = NULL;
803
804 if (tvout->hda)
805 drm_encoder_cleanup(tvout->hda);
806 tvout->hda = NULL;
807
808 if (tvout->dvo)
809 drm_encoder_cleanup(tvout->dvo);
810 tvout->dvo = NULL;
811}
812
813static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
814{
815 struct sti_tvout *tvout = dev_get_drvdata(dev);
816 struct drm_device *drm_dev = data;
817
818 tvout->drm_dev = drm_dev;
819
820 sti_tvout_create_encoders(drm_dev, tvout);
821
822 if (tvout_debugfs_init(tvout, drm_dev->primary))
823 DRM_ERROR("TVOUT debugfs setup failed\n");
824
825 return 0;
826}
827
828static void sti_tvout_unbind(struct device *dev, struct device *master,
829 void *data)
830{
831 struct sti_tvout *tvout = dev_get_drvdata(dev);
832 struct drm_device *drm_dev = data;
833
834 sti_tvout_destroy_encoders(tvout);
835
836 tvout_debugfs_exit(tvout, drm_dev->primary);
837}
838
839static const struct component_ops sti_tvout_ops = {
840 .bind = sti_tvout_bind,
841 .unbind = sti_tvout_unbind,
842};
843
844static int sti_tvout_probe(struct platform_device *pdev)
845{
846 struct device *dev = &pdev->dev;
847 struct device_node *node = dev->of_node;
848 struct sti_tvout *tvout;
849 struct resource *res;
850
851 DRM_INFO("%s\n", __func__);
852
853 if (!node)
854 return -ENODEV;
855
856 tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
857 if (!tvout)
858 return -ENOMEM;
859
860 tvout->dev = dev;
861
862 /* get Memory ressources */
863 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
864 if (!res) {
865 DRM_ERROR("Invalid glue resource\n");
866 return -ENOMEM;
867 }
868 tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
869 if (!tvout->regs)
870 return -ENOMEM;
871
872 /* get reset resources */
873 tvout->reset = devm_reset_control_get(dev, "tvout");
874 /* take tvout out of reset */
875 if (!IS_ERR(tvout->reset))
876 reset_control_deassert(tvout->reset);
877
878 platform_set_drvdata(pdev, tvout);
879
880 return component_add(dev, &sti_tvout_ops);
881}
882
883static int sti_tvout_remove(struct platform_device *pdev)
884{
885 component_del(&pdev->dev, &sti_tvout_ops);
886 return 0;
887}
888
889static const struct of_device_id tvout_of_match[] = {
890 { .compatible = "st,stih416-tvout", },
891 { .compatible = "st,stih407-tvout", },
892 { /* end node */ }
893};
894MODULE_DEVICE_TABLE(of, tvout_of_match);
895
896struct platform_driver sti_tvout_driver = {
897 .driver = {
898 .name = "sti-tvout",
899 .owner = THIS_MODULE,
900 .of_match_table = tvout_of_match,
901 },
902 .probe = sti_tvout_probe,
903 .remove = sti_tvout_remove,
904};
905
906MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
907MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
908MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) STMicroelectronics SA 2014
4 * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
5 * Vincent Abriou <vincent.abriou@st.com>
6 * for STMicroelectronics.
7 */
8
9#include <linux/clk.h>
10#include <linux/component.h>
11#include <linux/io.h>
12#include <linux/module.h>
13#include <linux/of_platform.h>
14#include <linux/platform_device.h>
15#include <linux/reset.h>
16#include <linux/seq_file.h>
17
18#include <drm/drm_atomic_helper.h>
19#include <drm/drm_debugfs.h>
20#include <drm/drm_device.h>
21#include <drm/drm_file.h>
22#include <drm/drm_print.h>
23
24#include "sti_crtc.h"
25#include "sti_drv.h"
26#include "sti_vtg.h"
27
28/* glue registers */
29#define TVO_CSC_MAIN_M0 0x000
30#define TVO_CSC_MAIN_M1 0x004
31#define TVO_CSC_MAIN_M2 0x008
32#define TVO_CSC_MAIN_M3 0x00c
33#define TVO_CSC_MAIN_M4 0x010
34#define TVO_CSC_MAIN_M5 0x014
35#define TVO_CSC_MAIN_M6 0x018
36#define TVO_CSC_MAIN_M7 0x01c
37#define TVO_MAIN_IN_VID_FORMAT 0x030
38#define TVO_CSC_AUX_M0 0x100
39#define TVO_CSC_AUX_M1 0x104
40#define TVO_CSC_AUX_M2 0x108
41#define TVO_CSC_AUX_M3 0x10c
42#define TVO_CSC_AUX_M4 0x110
43#define TVO_CSC_AUX_M5 0x114
44#define TVO_CSC_AUX_M6 0x118
45#define TVO_CSC_AUX_M7 0x11c
46#define TVO_AUX_IN_VID_FORMAT 0x130
47#define TVO_VIP_HDF 0x400
48#define TVO_HD_SYNC_SEL 0x418
49#define TVO_HD_DAC_CFG_OFF 0x420
50#define TVO_VIP_HDMI 0x500
51#define TVO_HDMI_FORCE_COLOR_0 0x504
52#define TVO_HDMI_FORCE_COLOR_1 0x508
53#define TVO_HDMI_CLIP_VALUE_B_CB 0x50c
54#define TVO_HDMI_CLIP_VALUE_Y_G 0x510
55#define TVO_HDMI_CLIP_VALUE_R_CR 0x514
56#define TVO_HDMI_SYNC_SEL 0x518
57#define TVO_HDMI_DFV_OBS 0x540
58#define TVO_VIP_DVO 0x600
59#define TVO_DVO_SYNC_SEL 0x618
60#define TVO_DVO_CONFIG 0x620
61
62#define TVO_IN_FMT_SIGNED BIT(0)
63#define TVO_SYNC_EXT BIT(4)
64
65#define TVO_VIP_REORDER_R_SHIFT 24
66#define TVO_VIP_REORDER_G_SHIFT 20
67#define TVO_VIP_REORDER_B_SHIFT 16
68#define TVO_VIP_REORDER_MASK 0x3
69#define TVO_VIP_REORDER_Y_G_SEL 0
70#define TVO_VIP_REORDER_CB_B_SEL 1
71#define TVO_VIP_REORDER_CR_R_SEL 2
72
73#define TVO_VIP_CLIP_SHIFT 8
74#define TVO_VIP_CLIP_MASK 0x7
75#define TVO_VIP_CLIP_DISABLED 0
76#define TVO_VIP_CLIP_EAV_SAV 1
77#define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
78#define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
79#define TVO_VIP_CLIP_PROG_RANGE 4
80
81#define TVO_VIP_RND_SHIFT 4
82#define TVO_VIP_RND_MASK 0x3
83#define TVO_VIP_RND_8BIT_ROUNDED 0
84#define TVO_VIP_RND_10BIT_ROUNDED 1
85#define TVO_VIP_RND_12BIT_ROUNDED 2
86
87#define TVO_VIP_SEL_INPUT_MASK 0xf
88#define TVO_VIP_SEL_INPUT_MAIN 0x0
89#define TVO_VIP_SEL_INPUT_AUX 0x8
90#define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf
91#define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1
92#define TVO_VIP_SEL_INPUT_BYPASSED 1
93
94#define TVO_SYNC_MAIN_VTG_SET_REF 0x00
95#define TVO_SYNC_AUX_VTG_SET_REF 0x10
96
97#define TVO_SYNC_HD_DCS_SHIFT 8
98
99#define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8
100#define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16
101
102#define ENCODER_CRTC_MASK (BIT(0) | BIT(1))
103
104#define TVO_MIN_HD_HEIGHT 720
105
106/* enum listing the supported output data format */
107enum sti_tvout_video_out_type {
108 STI_TVOUT_VIDEO_OUT_RGB,
109 STI_TVOUT_VIDEO_OUT_YUV,
110};
111
112struct sti_tvout {
113 struct device *dev;
114 struct drm_device *drm_dev;
115 void __iomem *regs;
116 struct reset_control *reset;
117 struct drm_encoder *hdmi;
118 struct drm_encoder *hda;
119 struct drm_encoder *dvo;
120 bool debugfs_registered;
121};
122
123struct sti_tvout_encoder {
124 struct drm_encoder encoder;
125 struct sti_tvout *tvout;
126};
127
128#define to_sti_tvout_encoder(x) \
129 container_of(x, struct sti_tvout_encoder, encoder)
130
131#define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
132
133/* preformatter conversion matrix */
134static const u32 rgb_to_ycbcr_601[8] = {
135 0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
136 0x0000082E, 0x00002000, 0x00002000, 0x00000000
137};
138
139/* 709 RGB to YCbCr */
140static const u32 rgb_to_ycbcr_709[8] = {
141 0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
142 0x0000082F, 0x00002000, 0x00002000, 0x00000000
143};
144
145static u32 tvout_read(struct sti_tvout *tvout, int offset)
146{
147 return readl(tvout->regs + offset);
148}
149
150static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
151{
152 writel(val, tvout->regs + offset);
153}
154
155/**
156 * tvout_vip_set_color_order - Set the clipping mode of a VIP
157 *
158 * @tvout: tvout structure
159 * @reg: register to set
160 * @cr_r: red chroma or red order
161 * @y_g: y or green order
162 * @cb_b: blue chroma or blue order
163 */
164static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
165 u32 cr_r, u32 y_g, u32 cb_b)
166{
167 u32 val = tvout_read(tvout, reg);
168
169 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
170 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
171 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
172 val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
173 val |= y_g << TVO_VIP_REORDER_G_SHIFT;
174 val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
175
176 tvout_write(tvout, val, reg);
177}
178
179/**
180 * tvout_vip_set_clip_mode - Set the clipping mode of a VIP
181 *
182 * @tvout: tvout structure
183 * @reg: register to set
184 * @range: clipping range
185 */
186static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
187{
188 u32 val = tvout_read(tvout, reg);
189
190 val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
191 val |= range << TVO_VIP_CLIP_SHIFT;
192 tvout_write(tvout, val, reg);
193}
194
195/**
196 * tvout_vip_set_rnd - Set the rounded value of a VIP
197 *
198 * @tvout: tvout structure
199 * @reg: register to set
200 * @rnd: rounded val per component
201 */
202static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
203{
204 u32 val = tvout_read(tvout, reg);
205
206 val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
207 val |= rnd << TVO_VIP_RND_SHIFT;
208 tvout_write(tvout, val, reg);
209}
210
211/**
212 * tvout_vip_set_sel_input - Select the VIP input
213 *
214 * @tvout: tvout structure
215 * @reg: register to set
216 * @main_path: main or auxiliary path
217 * @video_out: selected_input (main/aux + conv)
218 */
219static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
220 int reg,
221 bool main_path,
222 enum sti_tvout_video_out_type video_out)
223{
224 u32 sel_input;
225 u32 val = tvout_read(tvout, reg);
226
227 if (main_path)
228 sel_input = TVO_VIP_SEL_INPUT_MAIN;
229 else
230 sel_input = TVO_VIP_SEL_INPUT_AUX;
231
232 switch (video_out) {
233 case STI_TVOUT_VIDEO_OUT_RGB:
234 sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
235 break;
236 case STI_TVOUT_VIDEO_OUT_YUV:
237 sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
238 break;
239 }
240
241 /* on stih407 chip the sel_input bypass mode logic is inverted */
242 sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
243
244 val &= ~TVO_VIP_SEL_INPUT_MASK;
245 val |= sel_input;
246 tvout_write(tvout, val, reg);
247}
248
249/**
250 * tvout_vip_set_in_vid_fmt - Select the input video signed or unsigned
251 *
252 * @tvout: tvout structure
253 * @reg: register to set
254 * @in_vid_fmt: used video input format
255 */
256static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
257 int reg, u32 in_vid_fmt)
258{
259 u32 val = tvout_read(tvout, reg);
260
261 val &= ~TVO_IN_FMT_SIGNED;
262 val |= in_vid_fmt;
263 tvout_write(tvout, val, reg);
264}
265
266/**
267 * tvout_preformatter_set_matrix - Set preformatter matrix
268 *
269 * @tvout: tvout structure
270 * @mode: display mode structure
271 */
272static void tvout_preformatter_set_matrix(struct sti_tvout *tvout,
273 struct drm_display_mode *mode)
274{
275 unsigned int i;
276 const u32 *pf_matrix;
277
278 if (mode->vdisplay >= TVO_MIN_HD_HEIGHT)
279 pf_matrix = rgb_to_ycbcr_709;
280 else
281 pf_matrix = rgb_to_ycbcr_601;
282
283 for (i = 0; i < 8; i++) {
284 tvout_write(tvout, *(pf_matrix + i),
285 TVO_CSC_MAIN_M0 + (i * 4));
286 tvout_write(tvout, *(pf_matrix + i),
287 TVO_CSC_AUX_M0 + (i * 4));
288 }
289}
290
291/**
292 * tvout_dvo_start - Start VIP block for DVO output
293 *
294 * @tvout: pointer on tvout structure
295 * @main_path: true if main path has to be used in the vip configuration
296 * else aux path is used.
297 */
298static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path)
299{
300 u32 tvo_in_vid_format;
301 int val, tmp;
302
303 dev_dbg(tvout->dev, "%s\n", __func__);
304
305 if (main_path) {
306 DRM_DEBUG_DRIVER("main vip for DVO\n");
307 /* Select the input sync for dvo */
308 tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO;
309 val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
310 val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
311 val |= tmp;
312 tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
313 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
314 } else {
315 DRM_DEBUG_DRIVER("aux vip for DVO\n");
316 /* Select the input sync for dvo */
317 tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO;
318 val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
319 val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
320 val |= tmp;
321 tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
322 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
323 }
324
325 /* Set color channel order */
326 tvout_vip_set_color_order(tvout, TVO_VIP_DVO,
327 TVO_VIP_REORDER_CR_R_SEL,
328 TVO_VIP_REORDER_Y_G_SEL,
329 TVO_VIP_REORDER_CB_B_SEL);
330
331 /* Set clipping mode */
332 tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, TVO_VIP_CLIP_DISABLED);
333
334 /* Set round mode (rounded to 8-bit per component) */
335 tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED);
336
337 /* Set input video format */
338 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
339
340 /* Input selection */
341 tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path,
342 STI_TVOUT_VIDEO_OUT_RGB);
343}
344
345/**
346 * tvout_hdmi_start - Start VIP block for HDMI output
347 *
348 * @tvout: pointer on tvout structure
349 * @main_path: true if main path has to be used in the vip configuration
350 * else aux path is used.
351 */
352static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
353{
354 u32 tvo_in_vid_format;
355
356 dev_dbg(tvout->dev, "%s\n", __func__);
357
358 if (main_path) {
359 DRM_DEBUG_DRIVER("main vip for hdmi\n");
360 /* select the input sync for hdmi */
361 tvout_write(tvout,
362 TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI,
363 TVO_HDMI_SYNC_SEL);
364 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
365 } else {
366 DRM_DEBUG_DRIVER("aux vip for hdmi\n");
367 /* select the input sync for hdmi */
368 tvout_write(tvout,
369 TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI,
370 TVO_HDMI_SYNC_SEL);
371 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
372 }
373
374 /* set color channel order */
375 tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
376 TVO_VIP_REORDER_CR_R_SEL,
377 TVO_VIP_REORDER_Y_G_SEL,
378 TVO_VIP_REORDER_CB_B_SEL);
379
380 /* set clipping mode */
381 tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, TVO_VIP_CLIP_DISABLED);
382
383 /* set round mode (rounded to 8-bit per component) */
384 tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
385
386 /* set input video format */
387 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
388
389 /* input selection */
390 tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
391 STI_TVOUT_VIDEO_OUT_RGB);
392}
393
394/**
395 * tvout_hda_start - Start HDF VIP and HD DAC
396 *
397 * @tvout: pointer on tvout structure
398 * @main_path: true if main path has to be used in the vip configuration
399 * else aux path is used.
400 */
401static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
402{
403 u32 tvo_in_vid_format;
404 int val;
405
406 dev_dbg(tvout->dev, "%s\n", __func__);
407
408 if (main_path) {
409 DRM_DEBUG_DRIVER("main vip for HDF\n");
410 /* Select the input sync for HD analog and HD DCS */
411 val = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
412 val = val << TVO_SYNC_HD_DCS_SHIFT;
413 val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF;
414 tvout_write(tvout, val, TVO_HD_SYNC_SEL);
415 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
416 } else {
417 DRM_DEBUG_DRIVER("aux vip for HDF\n");
418 /* Select the input sync for HD analog and HD DCS */
419 val = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
420 val = val << TVO_SYNC_HD_DCS_SHIFT;
421 val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF;
422 tvout_write(tvout, val, TVO_HD_SYNC_SEL);
423 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
424 }
425
426 /* set color channel order */
427 tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
428 TVO_VIP_REORDER_CR_R_SEL,
429 TVO_VIP_REORDER_Y_G_SEL,
430 TVO_VIP_REORDER_CB_B_SEL);
431
432 /* set clipping mode */
433 tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_DISABLED);
434
435 /* set round mode (rounded to 10-bit per component) */
436 tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
437
438 /* Set input video format */
439 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
440
441 /* Input selection */
442 tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
443 STI_TVOUT_VIDEO_OUT_YUV);
444
445 /* power up HD DAC */
446 tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
447}
448
449#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
450 readl(tvout->regs + reg))
451
452static void tvout_dbg_vip(struct seq_file *s, int val)
453{
454 int r, g, b, tmp, mask;
455 char *const reorder[] = {"Y_G", "Cb_B", "Cr_R"};
456 char *const clipping[] = {"No", "EAV/SAV", "Limited range RGB/Y",
457 "Limited range Cb/Cr", "decided by register"};
458 char *const round[] = {"8-bit", "10-bit", "12-bit"};
459 char *const input_sel[] = {"Main (color matrix enabled)",
460 "Main (color matrix by-passed)",
461 "", "", "", "", "", "",
462 "Aux (color matrix enabled)",
463 "Aux (color matrix by-passed)",
464 "", "", "", "", "", "Force value"};
465
466 seq_putc(s, '\t');
467 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT;
468 r = (val & mask) >> TVO_VIP_REORDER_R_SHIFT;
469 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT;
470 g = (val & mask) >> TVO_VIP_REORDER_G_SHIFT;
471 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT;
472 b = (val & mask) >> TVO_VIP_REORDER_B_SHIFT;
473 seq_printf(s, "%-24s %s->%s %s->%s %s->%s\n", "Reorder:",
474 reorder[r], reorder[TVO_VIP_REORDER_CR_R_SEL],
475 reorder[g], reorder[TVO_VIP_REORDER_Y_G_SEL],
476 reorder[b], reorder[TVO_VIP_REORDER_CB_B_SEL]);
477 seq_puts(s, "\t\t\t\t\t");
478 mask = TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT;
479 tmp = (val & mask) >> TVO_VIP_CLIP_SHIFT;
480 seq_printf(s, "%-24s %s\n", "Clipping:", clipping[tmp]);
481 seq_puts(s, "\t\t\t\t\t");
482 mask = TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT;
483 tmp = (val & mask) >> TVO_VIP_RND_SHIFT;
484 seq_printf(s, "%-24s input data rounded to %s per component\n",
485 "Round:", round[tmp]);
486 seq_puts(s, "\t\t\t\t\t");
487 tmp = (val & TVO_VIP_SEL_INPUT_MASK);
488 seq_printf(s, "%-24s %s", "Input selection:", input_sel[tmp]);
489}
490
491static void tvout_dbg_hd_dac_cfg(struct seq_file *s, int val)
492{
493 seq_printf(s, "\t%-24s %s", "HD DAC:",
494 val & 1 ? "disabled" : "enabled");
495}
496
497static int tvout_dbg_show(struct seq_file *s, void *data)
498{
499 struct drm_info_node *node = s->private;
500 struct sti_tvout *tvout = (struct sti_tvout *)node->info_ent->data;
501 struct drm_crtc *crtc;
502
503 seq_printf(s, "TVOUT: (vaddr = 0x%p)", tvout->regs);
504
505 seq_puts(s, "\n\n HDMI encoder: ");
506 crtc = tvout->hdmi->crtc;
507 if (crtc) {
508 seq_printf(s, "connected to %s path",
509 sti_crtc_is_main(crtc) ? "main" : "aux");
510 DBGFS_DUMP(TVO_HDMI_SYNC_SEL);
511 DBGFS_DUMP(TVO_VIP_HDMI);
512 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI));
513 } else {
514 seq_puts(s, "disabled");
515 }
516
517 seq_puts(s, "\n\n DVO encoder: ");
518 crtc = tvout->dvo->crtc;
519 if (crtc) {
520 seq_printf(s, "connected to %s path",
521 sti_crtc_is_main(crtc) ? "main" : "aux");
522 DBGFS_DUMP(TVO_DVO_SYNC_SEL);
523 DBGFS_DUMP(TVO_DVO_CONFIG);
524 DBGFS_DUMP(TVO_VIP_DVO);
525 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO));
526 } else {
527 seq_puts(s, "disabled");
528 }
529
530 seq_puts(s, "\n\n HDA encoder: ");
531 crtc = tvout->hda->crtc;
532 if (crtc) {
533 seq_printf(s, "connected to %s path",
534 sti_crtc_is_main(crtc) ? "main" : "aux");
535 DBGFS_DUMP(TVO_HD_SYNC_SEL);
536 DBGFS_DUMP(TVO_HD_DAC_CFG_OFF);
537 tvout_dbg_hd_dac_cfg(s,
538 readl(tvout->regs + TVO_HD_DAC_CFG_OFF));
539 DBGFS_DUMP(TVO_VIP_HDF);
540 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF));
541 } else {
542 seq_puts(s, "disabled");
543 }
544
545 seq_puts(s, "\n\n main path configuration");
546 DBGFS_DUMP(TVO_CSC_MAIN_M0);
547 DBGFS_DUMP(TVO_CSC_MAIN_M1);
548 DBGFS_DUMP(TVO_CSC_MAIN_M2);
549 DBGFS_DUMP(TVO_CSC_MAIN_M3);
550 DBGFS_DUMP(TVO_CSC_MAIN_M4);
551 DBGFS_DUMP(TVO_CSC_MAIN_M5);
552 DBGFS_DUMP(TVO_CSC_MAIN_M6);
553 DBGFS_DUMP(TVO_CSC_MAIN_M7);
554 DBGFS_DUMP(TVO_MAIN_IN_VID_FORMAT);
555
556 seq_puts(s, "\n\n auxiliary path configuration");
557 DBGFS_DUMP(TVO_CSC_AUX_M0);
558 DBGFS_DUMP(TVO_CSC_AUX_M2);
559 DBGFS_DUMP(TVO_CSC_AUX_M3);
560 DBGFS_DUMP(TVO_CSC_AUX_M4);
561 DBGFS_DUMP(TVO_CSC_AUX_M5);
562 DBGFS_DUMP(TVO_CSC_AUX_M6);
563 DBGFS_DUMP(TVO_CSC_AUX_M7);
564 DBGFS_DUMP(TVO_AUX_IN_VID_FORMAT);
565 seq_putc(s, '\n');
566 return 0;
567}
568
569static struct drm_info_list tvout_debugfs_files[] = {
570 { "tvout", tvout_dbg_show, 0, NULL },
571};
572
573static void tvout_debugfs_init(struct sti_tvout *tvout, struct drm_minor *minor)
574{
575 unsigned int i;
576
577 for (i = 0; i < ARRAY_SIZE(tvout_debugfs_files); i++)
578 tvout_debugfs_files[i].data = tvout;
579
580 drm_debugfs_create_files(tvout_debugfs_files,
581 ARRAY_SIZE(tvout_debugfs_files),
582 minor->debugfs_root, minor);
583}
584
585static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
586{
587}
588
589static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
590 struct drm_display_mode *mode,
591 struct drm_display_mode *adjusted_mode)
592{
593}
594
595static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
596{
597 struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
598
599 drm_encoder_cleanup(encoder);
600 kfree(sti_encoder);
601}
602
603static int sti_tvout_late_register(struct drm_encoder *encoder)
604{
605 struct sti_tvout *tvout = to_sti_tvout(encoder);
606
607 if (tvout->debugfs_registered)
608 return 0;
609
610 tvout_debugfs_init(tvout, encoder->dev->primary);
611
612 tvout->debugfs_registered = true;
613 return 0;
614}
615
616static void sti_tvout_early_unregister(struct drm_encoder *encoder)
617{
618 struct sti_tvout *tvout = to_sti_tvout(encoder);
619
620 if (!tvout->debugfs_registered)
621 return;
622
623 tvout->debugfs_registered = false;
624}
625
626static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
627 .destroy = sti_tvout_encoder_destroy,
628 .late_register = sti_tvout_late_register,
629 .early_unregister = sti_tvout_early_unregister,
630};
631
632static void sti_dvo_encoder_enable(struct drm_encoder *encoder)
633{
634 struct sti_tvout *tvout = to_sti_tvout(encoder);
635
636 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
637
638 tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc));
639}
640
641static void sti_dvo_encoder_disable(struct drm_encoder *encoder)
642{
643 struct sti_tvout *tvout = to_sti_tvout(encoder);
644
645 /* Reset VIP register */
646 tvout_write(tvout, 0x0, TVO_VIP_DVO);
647}
648
649static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = {
650 .dpms = sti_tvout_encoder_dpms,
651 .mode_set = sti_tvout_encoder_mode_set,
652 .enable = sti_dvo_encoder_enable,
653 .disable = sti_dvo_encoder_disable,
654};
655
656static struct drm_encoder *
657sti_tvout_create_dvo_encoder(struct drm_device *dev,
658 struct sti_tvout *tvout)
659{
660 struct sti_tvout_encoder *encoder;
661 struct drm_encoder *drm_encoder;
662
663 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
664 if (!encoder)
665 return NULL;
666
667 encoder->tvout = tvout;
668
669 drm_encoder = &encoder->encoder;
670
671 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
672
673 drm_encoder_init(dev, drm_encoder,
674 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS,
675 NULL);
676
677 drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs);
678
679 return drm_encoder;
680}
681
682static void sti_hda_encoder_enable(struct drm_encoder *encoder)
683{
684 struct sti_tvout *tvout = to_sti_tvout(encoder);
685
686 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
687
688 tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc));
689}
690
691static void sti_hda_encoder_disable(struct drm_encoder *encoder)
692{
693 struct sti_tvout *tvout = to_sti_tvout(encoder);
694
695 /* reset VIP register */
696 tvout_write(tvout, 0x0, TVO_VIP_HDF);
697
698 /* power down HD DAC */
699 tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
700}
701
702static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
703 .dpms = sti_tvout_encoder_dpms,
704 .mode_set = sti_tvout_encoder_mode_set,
705 .commit = sti_hda_encoder_enable,
706 .disable = sti_hda_encoder_disable,
707};
708
709static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
710 struct sti_tvout *tvout)
711{
712 struct sti_tvout_encoder *encoder;
713 struct drm_encoder *drm_encoder;
714
715 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
716 if (!encoder)
717 return NULL;
718
719 encoder->tvout = tvout;
720
721 drm_encoder = &encoder->encoder;
722
723 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
724
725 drm_encoder_init(dev, drm_encoder,
726 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
727
728 drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
729
730 return drm_encoder;
731}
732
733static void sti_hdmi_encoder_enable(struct drm_encoder *encoder)
734{
735 struct sti_tvout *tvout = to_sti_tvout(encoder);
736
737 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
738
739 tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc));
740}
741
742static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
743{
744 struct sti_tvout *tvout = to_sti_tvout(encoder);
745
746 /* reset VIP register */
747 tvout_write(tvout, 0x0, TVO_VIP_HDMI);
748}
749
750static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
751 .dpms = sti_tvout_encoder_dpms,
752 .mode_set = sti_tvout_encoder_mode_set,
753 .commit = sti_hdmi_encoder_enable,
754 .disable = sti_hdmi_encoder_disable,
755};
756
757static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
758 struct sti_tvout *tvout)
759{
760 struct sti_tvout_encoder *encoder;
761 struct drm_encoder *drm_encoder;
762
763 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
764 if (!encoder)
765 return NULL;
766
767 encoder->tvout = tvout;
768
769 drm_encoder = &encoder->encoder;
770
771 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
772
773 drm_encoder_init(dev, drm_encoder,
774 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL);
775
776 drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
777
778 return drm_encoder;
779}
780
781static void sti_tvout_create_encoders(struct drm_device *dev,
782 struct sti_tvout *tvout)
783{
784 tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
785 tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
786 tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout);
787
788 tvout->hdmi->possible_clones = drm_encoder_mask(tvout->hdmi) |
789 drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
790 tvout->hda->possible_clones = drm_encoder_mask(tvout->hdmi) |
791 drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
792 tvout->dvo->possible_clones = drm_encoder_mask(tvout->hdmi) |
793 drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
794}
795
796static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
797{
798 if (tvout->hdmi)
799 drm_encoder_cleanup(tvout->hdmi);
800 tvout->hdmi = NULL;
801
802 if (tvout->hda)
803 drm_encoder_cleanup(tvout->hda);
804 tvout->hda = NULL;
805
806 if (tvout->dvo)
807 drm_encoder_cleanup(tvout->dvo);
808 tvout->dvo = NULL;
809}
810
811static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
812{
813 struct sti_tvout *tvout = dev_get_drvdata(dev);
814 struct drm_device *drm_dev = data;
815
816 tvout->drm_dev = drm_dev;
817
818 sti_tvout_create_encoders(drm_dev, tvout);
819
820 return 0;
821}
822
823static void sti_tvout_unbind(struct device *dev, struct device *master,
824 void *data)
825{
826 struct sti_tvout *tvout = dev_get_drvdata(dev);
827
828 sti_tvout_destroy_encoders(tvout);
829}
830
831static const struct component_ops sti_tvout_ops = {
832 .bind = sti_tvout_bind,
833 .unbind = sti_tvout_unbind,
834};
835
836static int sti_tvout_probe(struct platform_device *pdev)
837{
838 struct device *dev = &pdev->dev;
839 struct device_node *node = dev->of_node;
840 struct sti_tvout *tvout;
841 struct resource *res;
842
843 DRM_INFO("%s\n", __func__);
844
845 if (!node)
846 return -ENODEV;
847
848 tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
849 if (!tvout)
850 return -ENOMEM;
851
852 tvout->dev = dev;
853
854 /* get memory resources */
855 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
856 if (!res) {
857 DRM_ERROR("Invalid glue resource\n");
858 return -ENOMEM;
859 }
860 tvout->regs = devm_ioremap(dev, res->start, resource_size(res));
861 if (!tvout->regs)
862 return -ENOMEM;
863
864 /* get reset resources */
865 tvout->reset = devm_reset_control_get(dev, "tvout");
866 /* take tvout out of reset */
867 if (!IS_ERR(tvout->reset))
868 reset_control_deassert(tvout->reset);
869
870 platform_set_drvdata(pdev, tvout);
871
872 return component_add(dev, &sti_tvout_ops);
873}
874
875static int sti_tvout_remove(struct platform_device *pdev)
876{
877 component_del(&pdev->dev, &sti_tvout_ops);
878 return 0;
879}
880
881static const struct of_device_id tvout_of_match[] = {
882 { .compatible = "st,stih407-tvout", },
883 { /* end node */ }
884};
885MODULE_DEVICE_TABLE(of, tvout_of_match);
886
887struct platform_driver sti_tvout_driver = {
888 .driver = {
889 .name = "sti-tvout",
890 .owner = THIS_MODULE,
891 .of_match_table = tvout_of_match,
892 },
893 .probe = sti_tvout_probe,
894 .remove = sti_tvout_remove,
895};
896
897MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
898MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
899MODULE_LICENSE("GPL");