Loading...
1/*
2 * Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 */
9
10#include <linux/platform_device.h>
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/rtc.h>
14#include <linux/types.h>
15#include <linux/bcd.h>
16#include <linux/rtc-ds2404.h>
17#include <linux/delay.h>
18#include <linux/gpio.h>
19#include <linux/slab.h>
20
21#include <linux/io.h>
22
23#define DS2404_STATUS_REG 0x200
24#define DS2404_CONTROL_REG 0x201
25#define DS2404_RTC_REG 0x202
26
27#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
28#define DS2404_READ_SCRATCHPAD_CMD 0xaa
29#define DS2404_COPY_SCRATCHPAD_CMD 0x55
30#define DS2404_READ_MEMORY_CMD 0xf0
31
32struct ds2404;
33
34struct ds2404_chip_ops {
35 int (*map_io)(struct ds2404 *chip, struct platform_device *pdev,
36 struct ds2404_platform_data *pdata);
37 void (*unmap_io)(struct ds2404 *chip);
38};
39
40#define DS2404_RST 0
41#define DS2404_CLK 1
42#define DS2404_DQ 2
43
44struct ds2404_gpio {
45 const char *name;
46 unsigned int gpio;
47};
48
49struct ds2404 {
50 struct ds2404_gpio *gpio;
51 const struct ds2404_chip_ops *ops;
52 struct rtc_device *rtc;
53};
54
55static struct ds2404_gpio ds2404_gpio[] = {
56 { "RTC RST", 0 },
57 { "RTC CLK", 0 },
58 { "RTC DQ", 0 },
59};
60
61static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev,
62 struct ds2404_platform_data *pdata)
63{
64 int i, err;
65
66 ds2404_gpio[DS2404_RST].gpio = pdata->gpio_rst;
67 ds2404_gpio[DS2404_CLK].gpio = pdata->gpio_clk;
68 ds2404_gpio[DS2404_DQ].gpio = pdata->gpio_dq;
69
70 for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++) {
71 err = gpio_request(ds2404_gpio[i].gpio, ds2404_gpio[i].name);
72 if (err) {
73 dev_err(&pdev->dev, "error mapping gpio %s: %d\n",
74 ds2404_gpio[i].name, err);
75 goto err_request;
76 }
77 if (i != DS2404_DQ)
78 gpio_direction_output(ds2404_gpio[i].gpio, 1);
79 }
80
81 chip->gpio = ds2404_gpio;
82 return 0;
83
84err_request:
85 while (--i >= 0)
86 gpio_free(ds2404_gpio[i].gpio);
87 return err;
88}
89
90static void ds2404_gpio_unmap(struct ds2404 *chip)
91{
92 int i;
93
94 for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++)
95 gpio_free(ds2404_gpio[i].gpio);
96}
97
98static const struct ds2404_chip_ops ds2404_gpio_ops = {
99 .map_io = ds2404_gpio_map,
100 .unmap_io = ds2404_gpio_unmap,
101};
102
103static void ds2404_reset(struct device *dev)
104{
105 gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 0);
106 udelay(1000);
107 gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 1);
108 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
109 gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 0);
110 udelay(10);
111}
112
113static void ds2404_write_byte(struct device *dev, u8 byte)
114{
115 int i;
116
117 gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 1);
118 for (i = 0; i < 8; i++) {
119 gpio_set_value(ds2404_gpio[DS2404_DQ].gpio, byte & (1 << i));
120 udelay(10);
121 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
122 udelay(10);
123 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
124 udelay(10);
125 }
126}
127
128static u8 ds2404_read_byte(struct device *dev)
129{
130 int i;
131 u8 ret = 0;
132
133 gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
134
135 for (i = 0; i < 8; i++) {
136 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
137 udelay(10);
138 if (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
139 ret |= 1 << i;
140 gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
141 udelay(10);
142 }
143 return ret;
144}
145
146static void ds2404_read_memory(struct device *dev, u16 offset,
147 int length, u8 *out)
148{
149 ds2404_reset(dev);
150 ds2404_write_byte(dev, DS2404_READ_MEMORY_CMD);
151 ds2404_write_byte(dev, offset & 0xff);
152 ds2404_write_byte(dev, (offset >> 8) & 0xff);
153 while (length--)
154 *out++ = ds2404_read_byte(dev);
155}
156
157static void ds2404_write_memory(struct device *dev, u16 offset,
158 int length, u8 *out)
159{
160 int i;
161 u8 ta01, ta02, es;
162
163 ds2404_reset(dev);
164 ds2404_write_byte(dev, DS2404_WRITE_SCRATCHPAD_CMD);
165 ds2404_write_byte(dev, offset & 0xff);
166 ds2404_write_byte(dev, (offset >> 8) & 0xff);
167
168 for (i = 0; i < length; i++)
169 ds2404_write_byte(dev, out[i]);
170
171 ds2404_reset(dev);
172 ds2404_write_byte(dev, DS2404_READ_SCRATCHPAD_CMD);
173
174 ta01 = ds2404_read_byte(dev);
175 ta02 = ds2404_read_byte(dev);
176 es = ds2404_read_byte(dev);
177
178 for (i = 0; i < length; i++) {
179 if (out[i] != ds2404_read_byte(dev)) {
180 dev_err(dev, "read invalid data\n");
181 return;
182 }
183 }
184
185 ds2404_reset(dev);
186 ds2404_write_byte(dev, DS2404_COPY_SCRATCHPAD_CMD);
187 ds2404_write_byte(dev, ta01);
188 ds2404_write_byte(dev, ta02);
189 ds2404_write_byte(dev, es);
190
191 gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
192 while (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
193 ;
194}
195
196static void ds2404_enable_osc(struct device *dev)
197{
198 u8 in[1] = { 0x10 }; /* enable oscillator */
199 ds2404_write_memory(dev, 0x201, 1, in);
200}
201
202static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
203{
204 unsigned long time = 0;
205
206 ds2404_read_memory(dev, 0x203, 4, (u8 *)&time);
207 time = le32_to_cpu(time);
208
209 rtc_time_to_tm(time, dt);
210 return rtc_valid_tm(dt);
211}
212
213static int ds2404_set_mmss(struct device *dev, unsigned long secs)
214{
215 u32 time = cpu_to_le32(secs);
216 ds2404_write_memory(dev, 0x203, 4, (u8 *)&time);
217 return 0;
218}
219
220static const struct rtc_class_ops ds2404_rtc_ops = {
221 .read_time = ds2404_read_time,
222 .set_mmss = ds2404_set_mmss,
223};
224
225static int rtc_probe(struct platform_device *pdev)
226{
227 struct ds2404_platform_data *pdata = dev_get_platdata(&pdev->dev);
228 struct ds2404 *chip;
229 int retval = -EBUSY;
230
231 chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
232 if (!chip)
233 return -ENOMEM;
234
235 chip->ops = &ds2404_gpio_ops;
236
237 retval = chip->ops->map_io(chip, pdev, pdata);
238 if (retval)
239 goto err_chip;
240
241 dev_info(&pdev->dev, "using GPIOs RST:%d, CLK:%d, DQ:%d\n",
242 chip->gpio[DS2404_RST].gpio, chip->gpio[DS2404_CLK].gpio,
243 chip->gpio[DS2404_DQ].gpio);
244
245 platform_set_drvdata(pdev, chip);
246
247 chip->rtc = devm_rtc_device_register(&pdev->dev, "ds2404",
248 &ds2404_rtc_ops, THIS_MODULE);
249 if (IS_ERR(chip->rtc)) {
250 retval = PTR_ERR(chip->rtc);
251 goto err_io;
252 }
253
254 ds2404_enable_osc(&pdev->dev);
255 return 0;
256
257err_io:
258 chip->ops->unmap_io(chip);
259err_chip:
260 return retval;
261}
262
263static int rtc_remove(struct platform_device *dev)
264{
265 struct ds2404 *chip = platform_get_drvdata(dev);
266
267 chip->ops->unmap_io(chip);
268
269 return 0;
270}
271
272static struct platform_driver rtc_device_driver = {
273 .probe = rtc_probe,
274 .remove = rtc_remove,
275 .driver = {
276 .name = "ds2404",
277 },
278};
279module_platform_driver(rtc_device_driver);
280
281MODULE_DESCRIPTION("DS2404 RTC");
282MODULE_AUTHOR("Sven Schnelle");
283MODULE_LICENSE("GPL");
284MODULE_ALIAS("platform:ds2404");
1// SPDX-License-Identifier: GPL-2.0
2// Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
3
4#include <linux/platform_device.h>
5#include <linux/module.h>
6#include <linux/init.h>
7#include <linux/rtc.h>
8#include <linux/types.h>
9#include <linux/bcd.h>
10#include <linux/delay.h>
11#include <linux/gpio/consumer.h>
12#include <linux/slab.h>
13
14#include <linux/io.h>
15
16#define DS2404_STATUS_REG 0x200
17#define DS2404_CONTROL_REG 0x201
18#define DS2404_RTC_REG 0x202
19
20#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
21#define DS2404_READ_SCRATCHPAD_CMD 0xaa
22#define DS2404_COPY_SCRATCHPAD_CMD 0x55
23#define DS2404_READ_MEMORY_CMD 0xf0
24
25#define DS2404_RST 0
26#define DS2404_CLK 1
27#define DS2404_DQ 2
28
29struct ds2404 {
30 struct device *dev;
31 struct gpio_desc *rst_gpiod;
32 struct gpio_desc *clk_gpiod;
33 struct gpio_desc *dq_gpiod;
34 struct rtc_device *rtc;
35};
36
37static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev)
38{
39 struct device *dev = &pdev->dev;
40
41 /* This will de-assert RESET, declare this GPIO as GPIOD_ACTIVE_LOW */
42 chip->rst_gpiod = devm_gpiod_get(dev, "rst", GPIOD_OUT_LOW);
43 if (IS_ERR(chip->rst_gpiod))
44 return PTR_ERR(chip->rst_gpiod);
45
46 chip->clk_gpiod = devm_gpiod_get(dev, "clk", GPIOD_OUT_HIGH);
47 if (IS_ERR(chip->clk_gpiod))
48 return PTR_ERR(chip->clk_gpiod);
49
50 chip->dq_gpiod = devm_gpiod_get(dev, "dq", GPIOD_ASIS);
51 if (IS_ERR(chip->dq_gpiod))
52 return PTR_ERR(chip->dq_gpiod);
53
54 return 0;
55}
56
57static void ds2404_reset(struct ds2404 *chip)
58{
59 gpiod_set_value(chip->rst_gpiod, 1);
60 udelay(1000);
61 gpiod_set_value(chip->rst_gpiod, 0);
62 gpiod_set_value(chip->clk_gpiod, 0);
63 gpiod_direction_output(chip->dq_gpiod, 0);
64 udelay(10);
65}
66
67static void ds2404_write_byte(struct ds2404 *chip, u8 byte)
68{
69 int i;
70
71 gpiod_direction_output(chip->dq_gpiod, 1);
72 for (i = 0; i < 8; i++) {
73 gpiod_set_value(chip->dq_gpiod, byte & (1 << i));
74 udelay(10);
75 gpiod_set_value(chip->clk_gpiod, 1);
76 udelay(10);
77 gpiod_set_value(chip->clk_gpiod, 0);
78 udelay(10);
79 }
80}
81
82static u8 ds2404_read_byte(struct ds2404 *chip)
83{
84 int i;
85 u8 ret = 0;
86
87 gpiod_direction_input(chip->dq_gpiod);
88
89 for (i = 0; i < 8; i++) {
90 gpiod_set_value(chip->clk_gpiod, 0);
91 udelay(10);
92 if (gpiod_get_value(chip->dq_gpiod))
93 ret |= 1 << i;
94 gpiod_set_value(chip->clk_gpiod, 1);
95 udelay(10);
96 }
97 return ret;
98}
99
100static void ds2404_read_memory(struct ds2404 *chip, u16 offset,
101 int length, u8 *out)
102{
103 ds2404_reset(chip);
104 ds2404_write_byte(chip, DS2404_READ_MEMORY_CMD);
105 ds2404_write_byte(chip, offset & 0xff);
106 ds2404_write_byte(chip, (offset >> 8) & 0xff);
107 while (length--)
108 *out++ = ds2404_read_byte(chip);
109}
110
111static void ds2404_write_memory(struct ds2404 *chip, u16 offset,
112 int length, u8 *out)
113{
114 int i;
115 u8 ta01, ta02, es;
116
117 ds2404_reset(chip);
118 ds2404_write_byte(chip, DS2404_WRITE_SCRATCHPAD_CMD);
119 ds2404_write_byte(chip, offset & 0xff);
120 ds2404_write_byte(chip, (offset >> 8) & 0xff);
121
122 for (i = 0; i < length; i++)
123 ds2404_write_byte(chip, out[i]);
124
125 ds2404_reset(chip);
126 ds2404_write_byte(chip, DS2404_READ_SCRATCHPAD_CMD);
127
128 ta01 = ds2404_read_byte(chip);
129 ta02 = ds2404_read_byte(chip);
130 es = ds2404_read_byte(chip);
131
132 for (i = 0; i < length; i++) {
133 if (out[i] != ds2404_read_byte(chip)) {
134 dev_err(chip->dev, "read invalid data\n");
135 return;
136 }
137 }
138
139 ds2404_reset(chip);
140 ds2404_write_byte(chip, DS2404_COPY_SCRATCHPAD_CMD);
141 ds2404_write_byte(chip, ta01);
142 ds2404_write_byte(chip, ta02);
143 ds2404_write_byte(chip, es);
144
145 while (gpiod_get_value(chip->dq_gpiod))
146 ;
147}
148
149static void ds2404_enable_osc(struct ds2404 *chip)
150{
151 u8 in[1] = { 0x10 }; /* enable oscillator */
152
153 ds2404_write_memory(chip, 0x201, 1, in);
154}
155
156static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
157{
158 struct ds2404 *chip = dev_get_drvdata(dev);
159 unsigned long time = 0;
160 __le32 hw_time = 0;
161
162 ds2404_read_memory(chip, 0x203, 4, (u8 *)&hw_time);
163 time = le32_to_cpu(hw_time);
164
165 rtc_time64_to_tm(time, dt);
166 return 0;
167}
168
169static int ds2404_set_time(struct device *dev, struct rtc_time *dt)
170{
171 struct ds2404 *chip = dev_get_drvdata(dev);
172 u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
173 ds2404_write_memory(chip, 0x203, 4, (u8 *)&time);
174 return 0;
175}
176
177static const struct rtc_class_ops ds2404_rtc_ops = {
178 .read_time = ds2404_read_time,
179 .set_time = ds2404_set_time,
180};
181
182static int rtc_probe(struct platform_device *pdev)
183{
184 struct ds2404 *chip;
185 int retval = -EBUSY;
186
187 chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
188 if (!chip)
189 return -ENOMEM;
190
191 chip->dev = &pdev->dev;
192
193 chip->rtc = devm_rtc_allocate_device(&pdev->dev);
194 if (IS_ERR(chip->rtc))
195 return PTR_ERR(chip->rtc);
196
197 retval = ds2404_gpio_map(chip, pdev);
198 if (retval)
199 return retval;
200
201 platform_set_drvdata(pdev, chip);
202
203 chip->rtc->ops = &ds2404_rtc_ops;
204 chip->rtc->range_max = U32_MAX;
205
206 retval = devm_rtc_register_device(chip->rtc);
207 if (retval)
208 return retval;
209
210 ds2404_enable_osc(chip);
211 return 0;
212}
213
214static struct platform_driver rtc_device_driver = {
215 .probe = rtc_probe,
216 .driver = {
217 .name = "ds2404",
218 },
219};
220module_platform_driver(rtc_device_driver);
221
222MODULE_DESCRIPTION("DS2404 RTC");
223MODULE_AUTHOR("Sven Schnelle");
224MODULE_LICENSE("GPL");
225MODULE_ALIAS("platform:ds2404");