1ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm
 2ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi
 
 
 
 
 3
 4msm-y := \
 5	adreno/adreno_device.o \
 6	adreno/adreno_gpu.o \
 
 
 
 
 7	adreno/a3xx_gpu.o \
 
 8	adreno/a4xx_gpu.o \
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 9	hdmi/hdmi.o \
10	hdmi/hdmi_audio.o \
11	hdmi/hdmi_bridge.o \
12	hdmi/hdmi_connector.o \
13	hdmi/hdmi_hdcp.o \
14	hdmi/hdmi_i2c.o \
15	hdmi/hdmi_phy.o \
16	hdmi/hdmi_phy_8960.o \
 
 
17	hdmi/hdmi_phy_8x60.o \
18	hdmi/hdmi_phy_8x74.o \
19	edp/edp.o \
20	edp/edp_aux.o \
21	edp/edp_bridge.o \
22	edp/edp_connector.o \
23	edp/edp_ctrl.o \
24	edp/edp_phy.o \
25	mdp/mdp_format.o \
26	mdp/mdp_kms.o \
27	mdp/mdp4/mdp4_crtc.o \
28	mdp/mdp4/mdp4_dtv_encoder.o \
29	mdp/mdp4/mdp4_lcdc_encoder.o \
30	mdp/mdp4/mdp4_lvds_connector.o \
31	mdp/mdp4/mdp4_irq.o \
32	mdp/mdp4/mdp4_kms.o \
33	mdp/mdp4/mdp4_plane.o \
34	mdp/mdp5/mdp5_cfg.o \
35	mdp/mdp5/mdp5_ctl.o \
36	mdp/mdp5/mdp5_crtc.o \
37	mdp/mdp5/mdp5_encoder.o \
38	mdp/mdp5/mdp5_irq.o \
39	mdp/mdp5/mdp5_kms.o \
40	mdp/mdp5/mdp5_plane.o \
41	mdp/mdp5/mdp5_smp.o \
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
42	msm_atomic.o \
 
 
43	msm_drv.o \
44	msm_fb.o \
 
45	msm_gem.o \
46	msm_gem_prime.o \
 
47	msm_gem_submit.o \
 
48	msm_gpu.o \
 
 
49	msm_iommu.o \
 
50	msm_perf.o \
51	msm_rd.o \
52	msm_ringbuffer.o
 
 
53
54msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
55msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o
56msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
57msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o
58
59msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
60			mdp/mdp4/mdp4_dsi_encoder.o \
 
 
 
 
 
 
 
 
 
 
 
 
 
 
61			dsi/dsi_cfg.o \
62			dsi/dsi_host.o \
63			dsi/dsi_manager.o \
64			dsi/phy/dsi_phy.o \
65			mdp/mdp5/mdp5_cmd_encoder.o
66
67msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
68msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
69msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
70
71ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
72msm-y += dsi/pll/dsi_pll.o
73msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o
74msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/pll/dsi_pll_28nm_8960.o
75endif
76
77obj-$(CONFIG_DRM_MSM)	+= msm.o

  1# SPDX-License-Identifier: GPL-2.0
  2ccflags-y := -I $(src)
  3ccflags-y += -I $(obj)/generated
  4ccflags-y += -I $(src)/disp/dpu1
  5ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(src)/dsi
  6ccflags-$(CONFIG_DRM_MSM_DP) += -I $(src)/dp
  7
  8adreno-y := \
  9	adreno/adreno_device.o \
 10	adreno/adreno_gpu.o \
 11	adreno/a2xx_catalog.o \
 12	adreno/a2xx_gpu.o \
 13	adreno/a2xx_gpummu.o \
 14	adreno/a3xx_catalog.o \
 15	adreno/a3xx_gpu.o \
 16	adreno/a4xx_catalog.o \
 17	adreno/a4xx_gpu.o \
 18	adreno/a5xx_catalog.o \
 19	adreno/a5xx_gpu.o \
 20	adreno/a5xx_power.o \
 21	adreno/a5xx_preempt.o \
 22	adreno/a6xx_catalog.o \
 23	adreno/a6xx_gpu.o \
 24	adreno/a6xx_gmu.o \
 25	adreno/a6xx_hfi.o \
 26	adreno/a6xx_preempt.o \
 27
 28adreno-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
 29
 30adreno-$(CONFIG_DRM_MSM_GPU_STATE)	+= adreno/a6xx_gpu_state.o
 31
 32msm-display-$(CONFIG_DRM_MSM_HDMI) += \
 33	hdmi/hdmi.o \
 34	hdmi/hdmi_audio.o \
 35	hdmi/hdmi_bridge.o \
 36	hdmi/hdmi_hpd.o \
 
 37	hdmi/hdmi_i2c.o \
 38	hdmi/hdmi_phy.o \
 39	hdmi/hdmi_phy_8960.o \
 40	hdmi/hdmi_phy_8996.o \
 41	hdmi/hdmi_phy_8998.o \
 42	hdmi/hdmi_phy_8x60.o \
 43	hdmi/hdmi_phy_8x74.o \
 44	hdmi/hdmi_pll_8960.o \
 45
 46msm-display-$(CONFIG_DRM_MSM_MDP4) += \
 47	disp/mdp4/mdp4_crtc.o \
 48	disp/mdp4/mdp4_dsi_encoder.o \
 49	disp/mdp4/mdp4_dtv_encoder.o \
 50	disp/mdp4/mdp4_lcdc_encoder.o \
 51	disp/mdp4/mdp4_lvds_connector.o \
 52	disp/mdp4/mdp4_lvds_pll.o \
 53	disp/mdp4/mdp4_irq.o \
 54	disp/mdp4/mdp4_kms.o \
 55	disp/mdp4/mdp4_plane.o \
 56
 57msm-display-$(CONFIG_DRM_MSM_MDP5) += \
 58	disp/mdp5/mdp5_cfg.o \
 59	disp/mdp5/mdp5_cmd_encoder.o \
 60	disp/mdp5/mdp5_ctl.o \
 61	disp/mdp5/mdp5_crtc.o \
 62	disp/mdp5/mdp5_encoder.o \
 63	disp/mdp5/mdp5_irq.o \
 64	disp/mdp5/mdp5_kms.o \
 65	disp/mdp5/mdp5_pipe.o \
 66	disp/mdp5/mdp5_mixer.o \
 67	disp/mdp5/mdp5_plane.o \
 68	disp/mdp5/mdp5_smp.o \
 69
 70msm-display-$(CONFIG_DRM_MSM_DPU) += \
 71	disp/dpu1/dpu_core_perf.o \
 72	disp/dpu1/dpu_crtc.o \
 73	disp/dpu1/dpu_encoder.o \
 74	disp/dpu1/dpu_encoder_phys_cmd.o \
 75	disp/dpu1/dpu_encoder_phys_vid.o \
 76	disp/dpu1/dpu_encoder_phys_wb.o \
 77	disp/dpu1/dpu_formats.o \
 78	disp/dpu1/dpu_hw_catalog.o \
 79	disp/dpu1/dpu_hw_cdm.o \
 80	disp/dpu1/dpu_hw_ctl.o \
 81	disp/dpu1/dpu_hw_dsc.o \
 82	disp/dpu1/dpu_hw_dsc_1_2.o \
 83	disp/dpu1/dpu_hw_interrupts.o \
 84	disp/dpu1/dpu_hw_intf.o \
 85	disp/dpu1/dpu_hw_lm.o \
 86	disp/dpu1/dpu_hw_pingpong.o \
 87	disp/dpu1/dpu_hw_sspp.o \
 88	disp/dpu1/dpu_hw_dspp.o \
 89	disp/dpu1/dpu_hw_merge3d.o \
 90	disp/dpu1/dpu_hw_top.o \
 91	disp/dpu1/dpu_hw_util.o \
 92	disp/dpu1/dpu_hw_vbif.o \
 93	disp/dpu1/dpu_hw_wb.o \
 94	disp/dpu1/dpu_kms.o \
 95	disp/dpu1/dpu_plane.o \
 96	disp/dpu1/dpu_rm.o \
 97	disp/dpu1/dpu_vbif.o \
 98	disp/dpu1/dpu_writeback.o
 99
100msm-display-$(CONFIG_DRM_MSM_MDSS) += \
101	msm_mdss.o \
102
103msm-display-y += \
104	disp/mdp_format.o \
105	disp/mdp_kms.o \
106	disp/msm_disp_snapshot.o \
107	disp/msm_disp_snapshot_util.o \
108
109msm-y += \
110	msm_atomic.o \
111	msm_atomic_tracepoints.o \
112	msm_debugfs.o \
113	msm_drv.o \
114	msm_fb.o \
115	msm_fence.o \
116	msm_gem.o \
117	msm_gem_prime.o \
118	msm_gem_shrinker.o \
119	msm_gem_submit.o \
120	msm_gem_vma.o \
121	msm_gpu.o \
122	msm_gpu_devfreq.o \
123	msm_io_utils.o \
124	msm_iommu.o \
125	msm_kms.o \
126	msm_perf.o \
127	msm_rd.o \
128	msm_ringbuffer.o \
129	msm_submitqueue.o \
130	msm_gpu_tracepoints.o \
131
132msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
 
 
 
133
134msm-display-$(CONFIG_DEBUG_FS) += \
135	dp/dp_debug.o
136
137msm-display-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
138	dp/dp_catalog.o \
139	dp/dp_ctrl.o \
140	dp/dp_display.o \
141	dp/dp_drm.o \
142	dp/dp_link.o \
143	dp/dp_panel.o \
144	dp/dp_audio.o \
145	dp/dp_utils.o
146
147msm-display-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
148
149msm-display-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
150			dsi/dsi_cfg.o \
151			dsi/dsi_host.o \
152			dsi/dsi_manager.o \
153			dsi/phy/dsi_phy.o
 
154
155msm-display-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
156msm-display-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
157msm-display-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
158msm-display-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
159msm-display-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o
160msm-display-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o
161
162msm-y += $(adreno-y) $(msm-display-y)
 
163
164obj-$(CONFIG_DRM_MSM)	+= msm.o
165
166ifeq (y,$(CONFIG_DRM_MSM_VALIDATE_XML))
167	headergen-opts += --validate
168else
169	headergen-opts += --no-validate
170endif
171
172quiet_cmd_headergen = GENHDR  $@
173      cmd_headergen = mkdir -p $(obj)/generated && $(PYTHON3) $(src)/registers/gen_header.py \
174		      $(headergen-opts) --rnn $(src)/registers --xml $< c-defines > $@
175
176$(obj)/generated/%.xml.h: $(src)/registers/adreno/%.xml \
177		$(src)/registers/adreno/adreno_common.xml \
178		$(src)/registers/adreno/adreno_pm4.xml \
179		$(src)/registers/freedreno_copyright.xml \
180		$(src)/registers/gen_header.py \
181		$(src)/registers/rules-fd.xsd \
182		FORCE
183	$(call if_changed,headergen)
184
185$(obj)/generated/%.xml.h: $(src)/registers/display/%.xml \
186		$(src)/registers/freedreno_copyright.xml \
187		$(src)/registers/gen_header.py \
188		$(src)/registers/rules-fd.xsd \
189		FORCE
190	$(call if_changed,headergen)
191
192ADRENO_HEADERS = \
193	generated/a2xx.xml.h \
194	generated/a3xx.xml.h \
195	generated/a4xx.xml.h \
196	generated/a5xx.xml.h \
197	generated/a6xx.xml.h \
198	generated/a6xx_gmu.xml.h \
199	generated/adreno_common.xml.h \
200	generated/adreno_pm4.xml.h \
201
202DISPLAY_HEADERS = \
203	generated/dsi_phy_7nm.xml.h \
204	generated/dsi_phy_10nm.xml.h \
205	generated/dsi_phy_14nm.xml.h \
206	generated/dsi_phy_20nm.xml.h \
207	generated/dsi_phy_28nm_8960.xml.h \
208	generated/dsi_phy_28nm.xml.h \
209	generated/dsi.xml.h \
210	generated/hdmi.xml.h \
211	generated/mdp4.xml.h \
212	generated/mdp5.xml.h \
213	generated/mdp_common.xml.h \
214	generated/mdss.xml.h \
215	generated/sfpb.xml.h
216
217$(addprefix $(obj)/,$(adreno-y)): $(addprefix $(obj)/,$(ADRENO_HEADERS))
218$(addprefix $(obj)/,$(msm-display-y)): $(addprefix $(obj)/,$(DISPLAY_HEADERS))
219
220targets += $(ADRENO_HEADERS) $(DISPLAY_HEADERS)