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1/* IEEE754 floating point arithmetic
2 * single precision
3 */
4/*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#include "ieee754sp.h"
23
24union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
25{
26 int s;
27
28 COMPXSP;
29 COMPYSP;
30
31 EXPLODEXSP;
32 EXPLODEYSP;
33
34 ieee754_clearcx();
35
36 FLUSHXSP;
37 FLUSHYSP;
38
39 switch (CLPAIR(xc, yc)) {
40 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
41 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
42 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
43 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
44 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
45 return ieee754sp_nanxcpt(y);
46
47 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
49 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
50 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
53 return ieee754sp_nanxcpt(x);
54
55 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
56 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
57 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
58 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
59 return y;
60
61 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
62 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
63 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
64 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
65 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
66 return x;
67
68
69 /*
70 * Infinity handling
71 */
72 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
73 if (xs == ys)
74 return x;
75 ieee754_setcx(IEEE754_INVALID_OPERATION);
76 return ieee754sp_indef();
77
78 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
79 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
80 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
81 return y;
82
83 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
84 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
85 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
86 return x;
87
88 /*
89 * Zero handling
90 */
91 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
92 if (xs == ys)
93 return x;
94 else
95 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
96
97 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
98 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
99 return x;
100
101 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
102 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
103 return y;
104
105 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
106 SPDNORMX;
107
108 /* FALL THROUGH */
109
110 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
111 SPDNORMY;
112 break;
113
114 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
115 SPDNORMX;
116 break;
117
118 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
119 break;
120 }
121 assert(xm & SP_HIDDEN_BIT);
122 assert(ym & SP_HIDDEN_BIT);
123
124 /*
125 * Provide guard, round and stick bit space.
126 */
127 xm <<= 3;
128 ym <<= 3;
129
130 if (xe > ye) {
131 /*
132 * Have to shift y fraction right to align.
133 */
134 s = xe - ye;
135 SPXSRSYn(s);
136 } else if (ye > xe) {
137 /*
138 * Have to shift x fraction right to align.
139 */
140 s = ye - xe;
141 SPXSRSXn(s);
142 }
143 assert(xe == ye);
144 assert(xe <= SP_EMAX);
145
146 if (xs == ys) {
147 /*
148 * Generate 28 bit result of adding two 27 bit numbers
149 * leaving result in xm, xs and xe.
150 */
151 xm = xm + ym;
152
153 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
154 SPXSRSX1();
155 }
156 } else {
157 if (xm >= ym) {
158 xm = xm - ym;
159 } else {
160 xm = ym - xm;
161 xs = ys;
162 }
163 if (xm == 0)
164 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
165
166 /*
167 * Normalize in extended single precision
168 */
169 while ((xm >> (SP_FBITS + 3)) == 0) {
170 xm <<= 1;
171 xe--;
172 }
173 }
174
175 return ieee754sp_format(xs, xe, xm);
176}
1// SPDX-License-Identifier: GPL-2.0-only
2/* IEEE754 floating point arithmetic
3 * single precision
4 */
5/*
6 * MIPS floating point support
7 * Copyright (C) 1994-2000 Algorithmics Ltd.
8 */
9
10#include "ieee754sp.h"
11
12union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
13{
14 int s;
15
16 COMPXSP;
17 COMPYSP;
18
19 EXPLODEXSP;
20 EXPLODEYSP;
21
22 ieee754_clearcx();
23
24 FLUSHXSP;
25 FLUSHYSP;
26
27 switch (CLPAIR(xc, yc)) {
28 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
29 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
30 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
31 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
32 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
33 return ieee754sp_nanxcpt(y);
34
35 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
36 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
37 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
38 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
39 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
40 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
41 return ieee754sp_nanxcpt(x);
42
43 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
44 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
45 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
46 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
47 return y;
48
49 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
50 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
51 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
52 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
53 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
54 return x;
55
56
57 /*
58 * Infinity handling
59 */
60 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
61 if (xs == ys)
62 return x;
63 ieee754_setcx(IEEE754_INVALID_OPERATION);
64 return ieee754sp_indef();
65
66 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
67 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
68 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
69 return y;
70
71 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
72 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
73 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
74 return x;
75
76 /*
77 * Zero handling
78 */
79 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
80 if (xs == ys)
81 return x;
82 else
83 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
84
85 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
86 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
87 return x;
88
89 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
90 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
91 return y;
92
93 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
94 SPDNORMX;
95 fallthrough;
96 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
97 SPDNORMY;
98 break;
99
100 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
101 SPDNORMX;
102 break;
103
104 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
105 break;
106 }
107 assert(xm & SP_HIDDEN_BIT);
108 assert(ym & SP_HIDDEN_BIT);
109
110 /*
111 * Provide guard, round and stick bit space.
112 */
113 xm <<= 3;
114 ym <<= 3;
115
116 if (xe > ye) {
117 /*
118 * Have to shift y fraction right to align.
119 */
120 s = xe - ye;
121 ym = XSPSRS(ym, s);
122 ye += s;
123 } else if (ye > xe) {
124 /*
125 * Have to shift x fraction right to align.
126 */
127 s = ye - xe;
128 xm = XSPSRS(xm, s);
129 xe += s;
130 }
131 assert(xe == ye);
132 assert(xe <= SP_EMAX);
133
134 if (xs == ys) {
135 /*
136 * Generate 28 bit result of adding two 27 bit numbers
137 * leaving result in xm, xs and xe.
138 */
139 xm = xm + ym;
140
141 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
142 SPXSRSX1();
143 }
144 } else {
145 if (xm >= ym) {
146 xm = xm - ym;
147 } else {
148 xm = ym - xm;
149 xs = ys;
150 }
151 if (xm == 0)
152 return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
153
154 /*
155 * Normalize in extended single precision
156 */
157 while ((xm >> (SP_FBITS + 3)) == 0) {
158 xm <<= 1;
159 xe--;
160 }
161 }
162
163 return ieee754sp_format(xs, xe, xm);
164}